CN115792584B - Integrated circuit experimental method and device based on big data - Google Patents
Integrated circuit experimental method and device based on big data Download PDFInfo
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Abstract
The invention relates to an intelligent decision technique, and discloses an integrated circuit experimental method and device based on big data, wherein the method comprises the following steps: performing device detection on the integrated circuit to obtain circuit devices, and calculating the experimental priority of each device in the circuit devices; acquiring a circuit diagram of an integrated circuit, determining a logic relationship corresponding to each device in circuit devices, inquiring the device function of each device in the circuit devices, and determining the logic function of the integrated circuit; according to the logic function, creating experimental items of the circuit device, acquiring historical experimental data of the integrated circuit, calculating the fault probability of each item in the experimental items, and determining the experimental sequence of the circuit device based on the fault probability and the experimental priority; and performing functional experiments on the integrated circuit to obtain experimental data, comparing the experimental data with preset conventional data to obtain a comparison result, and generating an experimental scheme of the integrated circuit according to the comparison result. The invention aims to improve the accuracy of integrated circuit experiments of big data.
Description
Technical Field
The invention relates to the technical field of integrated circuit experiments, in particular to an integrated circuit experiment method and device based on big data.
Background
The integrated circuit is a miniature electronic device or component, and adopts a certain process to interconnect the elements of transistor, resistor, capacitor and inductor, etc. required in a circuit together, and make them into a miniature structure with required circuit function.
However, in the existing integrated circuit test method, the test is performed according to a preset test sequence, and the test is stopped when the first test fails, so that the test time of the faulty circuit is reduced, the used test item reordering process is limited to the first fault information, the information of the test item which fails to be tested is first caused, and the test result of part of the test items is absent in the final test result because the integrated circuit does not undergo the complete test flow, so that the accuracy of the test of the integrated circuit is reduced, and therefore, a method capable of improving the accuracy of the test of the integrated circuit with big data is needed.
Disclosure of Invention
The invention provides an integrated circuit experimental method and device based on big data, which mainly aim to improve the accuracy of the integrated circuit experiment of the big data.
In order to achieve the above object, the integrated circuit experimental method based on big data provided by the invention comprises the steps of obtaining an integrated circuit to be tested, carrying out device detection on the integrated circuit to obtain a circuit device, calculating the experimental priority of each device in the circuit device according to the device name and the integrated circuit, obtaining a circuit diagram of the integrated circuit, determining the logic relation corresponding to each device in the circuit device according to the circuit diagram, inquiring the device function of each device in the circuit device, determining the logic function of the integrated circuit according to the device function and the logic relation, creating experimental items of the circuit device according to the logic function, obtaining historical experimental data of the integrated circuit, calculating the fault probability of each item in the experimental items according to the historical experimental data, determining the experimental order of the circuit device based on the fault probability and the experimental priority, carrying out functional experiments on the integrated circuit according to the experimental items and the experimental order, obtaining experimental data, comparing the experimental data with preset conventional data, and obtaining a comparison result according to the comparison result.
Optionally, the calculating the experiment priority of each device in the circuit devices includes querying a circuit category of the integrated circuit, identifying a device name of each device in the circuit devices, vector encoding the circuit category and the device name to obtain a circuit vector and a device vector, calculating the support degree of the circuit vector and the device vector by using a preset support degree algorithm, and determining the experiment priority of each device in the circuit devices according to the support degree.
Optionally, the calculating the support of the circuit vector and the device vector includes calculating a weight ratio of each of the device vectors by the following formula,
wherein (1)>
Representing the weight proportion of each of the device vectors, +.>
Representing the total number of vectors in the device vector, +.>
Represents the c-th vector of the device vectors, +.>
An association vector representing the c-th vector of the device vectors,>
and expressing the number of the c-th vectors contained in the device vector, extracting the feature vector in the device vector according to the weight proportion to obtain the feature vector, and calculating the support degree of the feature vector and the circuit vector by using a preset support degree algorithm.
Optionally, the preset support algorithm comprises,
wherein (1)>
Representing the support of feature vectors and circuit vectors, < >>
Representing an open square function>
Representing the total number of feature vectors and circuit vectors, +.>
Vector coordinates representing the ith vector of the feature vectors, etc>
Representing the vector coordinates of the i-th vector of the circuit vectors.
Optionally, determining the logic relationship corresponding to each device in the circuit device according to the circuit diagram includes obtaining an electrical sign corresponding to each device in the circuit device to obtain a device sign, matching the device sign with the sign in the circuit diagram to obtain a matching result, obtaining a device sequence of each device in the circuit diagram according to the matching result, and determining the logic relationship corresponding to each device in the circuit device according to the device sequence and the circuit diagram.
Optionally, the matching the device flag with the flag in the circuit diagram includes matching the device flag with the flag in the circuit diagram by the following formula:
wherein (1)>
Representing the matching result of the device flag and the flag in the circuit diagram,/for the device flag >
Attribute value representing mth flag of device flags,/->
Mean value of properties of mth mark representing device mark,/-, for example>
Indicating the × th in the circuit diagram>
The attribute value of the individual flags is set,
represents the average value of the attribute of the first mark in the circuit diagram, and y represents the total number of the device marks and the marks in the circuit diagram.
Optionally, determining the logic function of the integrated circuit according to the device function and the logic relationship includes extracting a label from each function in the device function to obtain a function label, calculating a confidence level of each label in the function label according to the circuit device, performing function screening on the device function according to the confidence level to obtain a target function, and generating the logic function of the integrated circuit according to the logic relationship and the target function.
Optionally, the calculating the confidence of each of the functional tags according to the circuit device includes calculating the confidence of each of the functional tags by the following formula,
wherein (1)>
Indicating the confidence level of each of the functional tags, < >>
Representing the predictive confidence of the jth functional tag, < >>
Indicating the circuit device corresponding to the jth functional tag, < > >
A value representing the number of functional tags and said circuit devices, ">
Representing the confidence interval of the functional label.
Optionally, the creating the experimental item of the circuit device according to the logic function includes extracting a variable parameter of each device in the circuit device, obtaining a digital signal corresponding to the variable parameter according to the variable parameter, constructing an experimental element of each device in the circuit device according to the digital signal, and creating the experimental item of the circuit device according to the logic function and the experimental element.
In order to solve the above problems, the present invention further provides an integrated circuit experimental apparatus based on big data, the apparatus includes a priority calculating module for obtaining an integrated circuit to be tested, performing device detection on the integrated circuit to obtain a circuit device, calculating an experimental priority of each device in the circuit device according to the device name and the integrated circuit, a logic function determining module for obtaining a circuit diagram of the integrated circuit, determining a logic relationship corresponding to each device in the circuit device according to the circuit diagram, querying a device function of each device in the circuit device, determining a logic function of the integrated circuit according to the device function and the logic relationship, a fault probability calculating module for creating experimental items of the circuit device according to the logic function, obtaining historical experimental data of the integrated circuit, calculating a fault probability of each item in the experimental items according to the historical experimental data, determining an experimental sequence of the circuit device based on the fault probability and the experimental priority, and comparing the experimental sequence with the experimental data according to the experimental items and the experimental data, comparing the experimental data with the experimental data to obtain a conventional experimental scheme.
According to the invention, the integrated circuit to be tested is obtained, the device detection is carried out on the integrated circuit to obtain a circuit device, the electronic device in the integrated circuit can be known, the priority of the circuit device can be conveniently calculated later, the logic relationship corresponding to each device in the circuit device can be obtained by obtaining the circuit diagram of the integrated circuit according to the logic relationship corresponding to each device in the circuit device, the logic function of the integrated circuit can be conveniently determined later, wherein the invention creates the experimental items of the circuit device according to the logic function, and the experimental detection can be carried out on the integrated circuit according to the experimental items, thereby being convenient for detecting the faults of the integrated circuit; in addition, the invention performs functional experiments on the integrated circuit by combining the experimental project and the experimental sequence to obtain experimental data, and can obtain experimental results of the integrated circuit. Therefore, the integrated circuit experimental method and the integrated circuit experimental device based on the big data provided by the embodiment of the invention can be used for improving the accuracy of the integrated circuit experiment of the big data.
Drawings
Fig. 1 is a flow chart of an integrated circuit experimental method for big data according to an embodiment of the invention.
FIG. 2 is a functional block diagram of an integrated circuit experimental device with big data according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of an electronic device for implementing the integrated circuit experimental method of big data according to an embodiment of the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The embodiment of the application provides an integrated circuit experimental method based on big data. In the embodiment of the present application, the execution body of the integrated circuit experimental method of big data includes, but is not limited to, at least one of a server, a terminal, and the like, which can be configured to execute the electronic device of the method provided in the embodiment of the present application. In other words, the integrated circuit experimental method of big data may be performed by software or hardware installed in a terminal device or a server device, and the software may be a blockchain platform. The service end includes but is not limited to: a single server, a server cluster, a cloud server or a cloud server cluster, and the like. The server may be an independent server, or may be a cloud server that provides cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content delivery networks (Content Delivery Network, CDN), and basic cloud computing services such as big data and artificial intelligence platforms.
Referring to fig. 1, a flow chart of an integrated circuit experimental method for big data according to an embodiment of the invention is shown. In this embodiment, the method for testing the integrated circuit of big data includes steps S1 to S4.
S1, acquiring an integrated circuit to be tested, detecting devices of the integrated circuit to obtain circuit devices, and calculating the test priority of each device in the circuit devices.
According to the invention, the integrated circuit to be tested is obtained, and the device detection is carried out on the integrated circuit to obtain the circuit device, so that the electronic device in the integrated circuit can be known, and the priority of the circuit device can be conveniently calculated subsequently.
The integrated circuit is formed by interconnecting elements such as transistors, resistors, capacitors, inductors and the like required in a circuit and wiring by adopting a certain process, manufacturing the elements on a small semiconductor wafer or a plurality of small semiconductor wafers or dielectric substrates, and then packaging the elements in a tube shell to form a microstructure with the required circuit function, wherein the circuit elements are electronic elements in the integrated circuit, such as semiconductors, resistors, capacitors and the like, and further, the integrated circuit can be subjected to device detection through a device detector.
The importance of each device can be obtained by calculating the experimental priority of each device in the circuit device, so that the device can be conveniently and preferentially detected later, wherein the experimental priority is the experimental priority degree corresponding to each device in the circuit device.
According to one embodiment of the invention, the calculation of the experiment priority of each device in the circuit devices comprises the steps of inquiring the circuit category of the integrated circuit, identifying the device name of each device in the circuit devices, carrying out vector coding on the circuit category and the device name to obtain a circuit vector and a device vector, calculating the support degree of the circuit vector and the device vector, and determining the experiment priority of each device in the circuit devices according to the support degree.
The circuit category is a category of the integrated circuit, such as a digital circuit or a signal circuit, the device name is a academic name of each device in the circuit device, such as a semiconductor, the circuit vector and the device vector respectively represent vector expression forms corresponding to the circuit category and the device name, and the support degree represents a support degree between the circuit vector and the device vector.
Further, the device name of each of the circuit devices may be identified by OCR recognition techniques, and a one-hot encoding algorithm may be used to encode the circuit class and the device name by vector.
As an optional embodiment of the present invention, the calculating the support degree of the circuit vector and the device vector includes calculating a weight ratio of each vector in the device vector, extracting a feature vector in the device vector according to the weight ratio to obtain a feature vector, calculating the support degree of the feature vector and the circuit vector by using a preset support degree algorithm, and determining an experiment priority of each device in the circuit device according to the support degree.
The weight proportion is the proportion of each vector in the device vectors, and the characteristic vector is a vector with characterization meaning in the device vectors.
Further, as an alternative embodiment of the present invention, the calculating the weight ratio of each of the device vectors includes calculating the weight ratio of each of the device vectors by the following formula,
wherein (1)>
Representing the weight proportion of each of the device vectors, +. >
Representing the total number of vectors in the device vector, +.>
Represents the c-th vector of the device vectors, +.>
Representing the association vector of the c-th vector in the device vectors,
the number of vectors containing the c-th vector in the device vector is indicated.
Further, as an alternative embodiment of the present invention, the preset support algorithm includes,
wherein (1)>
Representing the support of feature vectors and circuit vectors, < >>
Representing an open square function>
Representing the total number of feature vectors and circuit vectors, +.>
Vector coordinates representing the ith vector of the feature vectors, etc>
Representing the vector coordinates of the i-th vector of the circuit vectors.
S2, acquiring a circuit diagram of the integrated circuit, determining a logic relation corresponding to each device in the circuit devices according to the circuit diagram, inquiring the device function of each device in the circuit devices, and determining the logic function of the integrated circuit according to the device function and the logic relation.
According to the invention, the relation between each device in the circuit devices can be obtained by acquiring the circuit diagram of the integrated circuit and determining the corresponding logic relation of each device in the circuit devices according to the circuit diagram, so that the logic function of the integrated circuit can be conveniently determined later.
According to the method, a logic relation corresponding to each device in the circuit device is determined according to the circuit diagram, the method comprises the steps of obtaining an electrical mark corresponding to each device in the circuit device, obtaining a device mark, matching the device mark with the mark in the circuit diagram, obtaining a matching result, obtaining a device sequence of each device in the circuit diagram according to the matching result, and determining the logic relation corresponding to each device in the circuit device according to the device sequence and the circuit diagram.
The device marks are electrical symbols corresponding to each device in the circuit device, the matching result is the matching degree of the device marks and the marks in the circuit diagram, the device sequence is the sequence of each device in the circuit diagram, further, the electrical marks corresponding to each device in the circuit device can be obtained through internet query, the circuit device can be ranked according to the matching result by using a ranking algorithm, and further, the device sequence of each device in the circuit diagram is obtained, and the ranking algorithm comprises bubbling ranking.
Further, as an alternative embodiment of the present invention, said matching said device flag with a flag in said circuit diagram includes,the device flag and the flag in the circuit diagram are matched by the following formula,
wherein (1)>
Representing the matching result of the device flag and the flag in the circuit diagram,/for the device flag>
Attribute value representing mth flag of device flags,/->
Mean value of properties of mth mark representing device mark,/-, for example>
Represents the average value of the attribute of the first mark in the circuit diagram, and y represents the total number of the device marks and the marks in the circuit diagram.
The invention can know the function of each device in the circuit devices by inquiring the device function of each device, thereby facilitating the subsequent determination of the logic function of the integrated circuit, wherein the device function is the beneficial function of each device in the circuit devices.
According to one embodiment of the invention, the determining the logic function of the integrated circuit according to the device function and the logic relation comprises extracting labels of each function in the device function to obtain function labels, calculating the confidence coefficient of each label in the function labels according to the circuit device, performing function screening on the device function according to the confidence coefficient to obtain a target function, and generating the logic function of the integrated circuit according to the logic relation and the target function.
The function labels are corresponding identifications of each function in the device functions, the confidence coefficient is the reliability degree of each label in the function labels, the target function is a function obtained by screening the device functions according to the numerical value of the confidence coefficient, further, label extraction can be carried out on each function in the device functions through a label extractor, function screening can be carried out on the device functions through a screening function, the screening function comprises a FILTER function, and the logic function of the integrated circuit can be realized through a function synthesizer.
Further, as an alternative embodiment of the present invention, the calculating the confidence of each of the functional tags according to the circuit device includes calculating the confidence of each of the functional tags by the following formula,
wherein (1)>
Indicating the confidence level of each of the functional tags, < >>
Representing the predictive confidence of the jth functional tag, < >>
Indicating the circuit device corresponding to the jth functional tag, < >>
A value representing the number of functional tags and said circuit devices, ">
Representing the confidence interval of the functional label.
S3, creating experimental items of the circuit device according to the logic function, acquiring historical experimental data of the integrated circuit, calculating fault probability of each item in the experimental items according to the historical experimental data, and determining the experimental sequence of the circuit device based on the fault probability and the experimental priority.
According to the logic function, the experimental project of the circuit device is created, and the integrated circuit can be subjected to experimental detection according to the experimental project, so that the fault of the integrated circuit can be conveniently detected, wherein the experimental project is an experimental step of the circuit device.
According to the logic function, the experimental project of the circuit device is created, wherein the experimental project of the circuit device is created according to the logic function and the experimental elements.
The variable parameter is variable information of each device in the circuit device, the digital signal is an electric signal of the variable parameter, the signal can be conveniently read by a computer, the experimental element is an experimental detection element of each device in the circuit device, further, the variable parameter of each device in the circuit device can be extracted through a parameter extractor, the digital signal corresponding to the variable parameter can be obtained through a binary converter, and the experimental element of each device in the circuit device can be constructed through a singlechip.
According to the method, the historical experimental data of the integrated circuit are obtained, the fault probability of each item in the experimental items is calculated according to the historical experimental data, and further the subsequent determination of the experimental sequence of the circuit device is facilitated, wherein the historical experimental data are experimental data before the integrated circuit, the fault probability is the frequency of faults of each item in the experimental items, and further the fault probability can be obtained by dividing the times of faults of each item in the historical experimental data by the times of detection of the items.
According to the invention, the experimental sequence of the circuit device is determined based on the fault probability and the experimental priority, and the final experimental sequence of the circuit device can be determined according to the fault probability and the experimental priority, wherein the experimental sequence is the sequence of the circuit device in function experiments, further, the experimental sequence of the circuit device can be obtained by calculating the optimal combination of the fault probability and the experimental priority, and the optimal combination can be obtained by calculating an interior point algorithm.
And S4, combining the experimental items with the experimental sequence, performing functional experiments on the integrated circuit to obtain experimental data, comparing the experimental data with preset conventional data to obtain a comparison result, and generating an experimental scheme of the integrated circuit according to the comparison result.
According to the invention, through combining the experimental items and the experimental sequence, the integrated circuit is subjected to functional experiments to obtain experimental data, so that the experimental result of the integrated circuit can be obtained, and the subsequent comparison is convenient, wherein the experimental data are obtained by the functional experiments of the integrated circuit, and further, the functional experiments of the integrated circuit can be performed in a man-machine interaction mode.
According to the invention, the experimental data is compared with the preset conventional data to obtain a comparison result, the experimental scheme of the integrated circuit is generated according to the comparison result, and the experimental result of the integrated circuit can be further obtained according to the comparison result, so that the generation of a subsequent experimental scheme is facilitated, wherein the preset conventional data is data corresponding to the normal function of the integrated circuit, and the comparison result is the difference condition of the experimental data and the preset conventional data.
According to the invention, the integrated circuit to be tested is obtained, the device detection is carried out on the integrated circuit to obtain a circuit device, the electronic device in the integrated circuit can be known, the priority of the circuit device can be conveniently calculated later, the logic relationship corresponding to each device in the circuit device can be obtained by obtaining the circuit diagram of the integrated circuit according to the logic relationship corresponding to each device in the circuit device, the logic function of the integrated circuit can be conveniently determined later, wherein the invention creates the experimental items of the circuit device according to the logic function, and the experimental detection can be carried out on the integrated circuit according to the experimental items, thereby being convenient for detecting the faults of the integrated circuit; in addition, the invention performs functional experiments on the integrated circuit by combining the experimental project and the experimental sequence to obtain experimental data, and can obtain experimental results of the integrated circuit. Therefore, the integrated circuit experimental method based on big data provided by the embodiment of the invention can be used for improving the accuracy of the integrated circuit experiment of the big data.
FIG. 2 is a functional block diagram of an integrated circuit experimental device with big data according to an embodiment of the present invention.
The big data integrated circuit experimental device 100 of the invention can be installed in an electronic device. Depending on the implemented functions, the big data integrated circuit experimental device 100 may include a priority calculation module 101, a logic function determination module 102, a failure probability calculation module 103, and an experimental plan generation module 104. The module of the invention, which may also be referred to as a unit, refers to a series of computer program segments, which are stored in the memory of the electronic device, capable of being executed by the processor of the electronic device and of performing a fixed function.
In the present embodiment, the functions concerning the respective modules/units are as follows:
the priority calculating module 101 is configured to obtain an integrated circuit to be tested, perform device detection on the integrated circuit to obtain a circuit device, and calculate an experiment priority of each device in the circuit device according to the device name and the integrated circuit.
The logic function determining module 102 is configured to obtain a circuit diagram of the integrated circuit, determine a logic relationship corresponding to each device in the circuit devices according to the circuit diagram, query a device function of each device in the circuit devices, and determine a logic function of the integrated circuit according to the device function and the logic relationship.
The fault probability calculation module 103 is configured to create experimental items of the circuit device according to the logic function, obtain historical experimental data of the integrated circuit, calculate a fault probability of each item in the experimental items according to the historical experimental data, and determine an experimental order of the circuit device based on the fault probability and the experimental priority.
The experimental scheme generating module 104 is configured to combine the experimental items and the experimental sequences, perform a functional experiment on the integrated circuit to obtain experimental data, compare the experimental data with preset conventional data to obtain a comparison result, and generate an experimental scheme of the integrated circuit according to the comparison result.
In detail, each module in the integrated circuit experimental device 100 for big data in the embodiment of the present application adopts the same technical means as the integrated circuit experimental method for big data described in fig. 1 and can generate the same technical effects when in use, which is not described herein.
Fig. 3 is a schematic structural diagram of an electronic device 1 for implementing an integrated circuit experimental method for big data according to an embodiment of the present invention.
The electronic device 1 may comprise a processor 10, a memory 11, a communication bus 12 and a communication interface 13, and may further comprise a computer program, such as an integrated circuit experimental method program of big data, stored in the memory 11 and executable on the processor 10.
The processor 10 may be formed by an integrated circuit in some embodiments, for example, a single packaged integrated circuit, or may be formed by a plurality of integrated circuits packaged with the same function or different functions, including one or more central processing units (Central Processing Unit, CPU), a microprocessor, a digital processing chip, a graphics processor, a combination of various control chips, and so on. The processor 10 is a Control Unit (Control Unit) of the electronic device 1, connects respective parts of the entire electronic device using various interfaces and lines, executes or executes programs or modules (for example, an integrated circuit experimental method program for executing large data, etc.) stored in the memory 11, and invokes data stored in the memory 11 to perform various functions of the electronic device and process data.
The memory 11 includes at least one type of readable storage medium including flash memory, a removable hard disk, a multimedia card, a card type memory (e.g., SD or DX memory, etc.), a magnetic memory, a magnetic disk, an optical disk, etc. The memory 11 may in some embodiments be an internal storage unit of the electronic device, such as a mobile hard disk of the electronic device. The memory 11 may in other embodiments also be an external storage device of the electronic device, such as a plug-in mobile hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card) or the like, which are provided on the electronic device. Further, the memory 11 may also include both an internal storage unit and an external storage device of the electronic device. The memory 11 may be used not only for storing application software installed in an electronic device and various types of data, such as codes of an integrated circuit experimental method program of big data, but also for temporarily storing data that has been output or is to be output.
The communication bus 12 may be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The bus may be classified as an address bus, a data bus, a control bus, etc. The bus is arranged to enable a connection communication between the memory 11 and at least one processor 10 etc.
The communication interface 13 is used for communication between the electronic device 1 and other devices, including a network interface and a user interface. Optionally, the network interface may include a wired interface and/or a wireless interface (e.g., WI-FI interface, bluetooth interface, etc.), typically used to establish a communication connection between the electronic device and other electronic devices. The user interface may be a Display (Display), an input unit such as a Keyboard (Keyboard), or alternatively a standard wired interface, a wireless interface. Alternatively, in some embodiments, the display may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch, or the like. The display may also be referred to as a display screen or display unit, as appropriate, for displaying information processed in the electronic device and for displaying a visual user interface.
Fig. 3 shows only an electronic device with components, it being understood by a person skilled in the art that the structure shown in fig. 3 does not constitute a limitation of the electronic device 1, and may comprise fewer or more components than shown, or may combine certain components, or may be arranged in different components.
For example, although not shown, the electronic device 1 may further include a power source (such as a battery) for supplying power to each component, and preferably, the power source may be logically connected to the at least one processor 10 through a power management device, so that functions of charge management, discharge management, power consumption management, and the like are implemented through the power management device. The power supply may also include one or more of any of a direct current or alternating current power supply, recharging device, power failure detection circuit, power converter or inverter, power status indicator, etc. The electronic device 1 may further include various sensors, bluetooth modules, wi-Fi modules, etc., which will not be described herein.
It should be understood that the embodiments described are for illustrative purposes only and are not limited to this configuration in the scope of the patent application.
The integrated circuit experimental method program of big data stored in the memory 11 in the electronic equipment 1 is a combination of a plurality of instructions, when the integrated circuit experimental method program runs in the processor 10, the integrated circuit to be tested can be obtained, device detection is carried out on the integrated circuit to obtain a circuit device, the experimental priority of each device in the circuit device is calculated according to the device name and the integrated circuit, a circuit diagram of the integrated circuit is obtained, the logic relation corresponding to each device in the circuit device is determined according to the circuit diagram, the device function of each device in the circuit device is queried, the logic function of the integrated circuit is determined according to the device function and the logic relation, the experimental item of the circuit device is created according to the logic function, the historical experimental data of the integrated circuit is obtained, the fault probability of each item in the experimental item is calculated according to the historical experimental data, the experimental order of the circuit device is determined based on the fault probability and the experimental priority, the integrated circuit is combined with the experimental item and the experimental order, the experimental data is compared with the experimental data, and the conventional experimental scheme is obtained.
In particular, the specific implementation method of the above instructions by the processor 10 may refer to the description of the relevant steps in the corresponding embodiment of the drawings, which is not repeated herein.
Further, the modules/units integrated in the electronic device 1 may be stored in a computer readable storage medium if implemented in the form of software functional units and sold or used as separate products. The computer readable storage medium may be volatile or nonvolatile. For example, the computer readable medium may include any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM).
The invention also provides a computer readable storage medium, the readable storage medium stores a computer program, the computer program can be realized when being executed by a processor of an electronic device, acquire an integrated circuit to be tested, perform device detection on the integrated circuit to obtain a circuit device, calculate an experiment priority of each device in the circuit device according to the device name and the integrated circuit, acquire a circuit diagram of the integrated circuit, determine a logic relationship corresponding to each device in the circuit device according to the circuit diagram, query a device function of each device in the circuit device, determine a logic function of the integrated circuit according to the device function and the logic relationship, create an experiment item of the circuit device according to the logic function, acquire historical experiment data of the integrated circuit, calculate a fault probability of each item in the experiment item according to the historical experiment data, determine an experiment order of the circuit device based on the fault probability and the experiment priority, combine the experiment item and the experiment order, compare the experiment data with the integrated circuit according to the preset experiment data, and compare the experiment data to obtain the conventional experiment data.
In the several embodiments provided in the present invention, it should be understood that the disclosed apparatus, device and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be other manners of division when actually implemented.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical units, may be located in one place, or may be distributed over multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional module in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units can be realized in a form of hardware or a form of hardware and a form of software functional modules.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof.
The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference signs in the claims shall not be construed as limiting the claim concerned.
The embodiment of the application can acquire and process the related data based on the artificial intelligence technology. Among these, artificial intelligence (Artificial Intelligence, AI) is the theory, method, technique and application system that uses a digital computer or a digital computer-controlled machine to simulate, extend and extend human intelligence, sense the environment, acquire knowledge and use knowledge to obtain optimal results.
Furthermore, it is evident that the word "comprising" does not exclude other elements or steps, and that the singular does not exclude a plurality. A plurality of units or means recited in the system claims can also be implemented by means of software or hardware by means of one unit or means. The terms first, second, etc. are used to denote a name, but not any particular order.
Finally, it should be noted that the above-mentioned embodiments are merely for illustrating the technical solution of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications and equivalents may be made to the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention.
Claims (7)
1. An integrated circuit experimental method based on big data, which is characterized by comprising the following steps:
obtaining an integrated circuit to be tested, performing device detection on the integrated circuit to obtain a circuit device, and calculating the test priority of each device in the circuit device according to the circuit device and the integrated circuit, wherein the calculating the test priority of each device in the circuit device comprises the following steps:
querying a circuit class of the integrated circuit, wherein the circuit class is a class of the integrated circuit, identifying a device name of each of the circuit devices, wherein the device name is a academic name of each of the circuit devices;
vector encoding is carried out on the circuit category and the device name to obtain a circuit vector and a device vector;
the weight ratio of each of the device vectors is calculated by the following formula:
Extracting a feature vector from the device vector according to the weight proportion to obtain a feature vector;
calculating the support degree of the feature vector and the circuit vector by using a preset support degree algorithm;
the preset support algorithm comprises the following steps:
determining the experiment priority of each device in the circuit devices according to the support degree;
obtaining a circuit diagram of the integrated circuit, wherein the circuit diagram is a principle layout diagram drawn by a sign of physical and electrical standardization of the integrated circuit, determining a logic relation corresponding to each device in the circuit devices according to the circuit diagram, wherein the logic relation is a subordinate relation among each device in the circuit devices, inquiring a device function of each device in the circuit devices, wherein the device function is an advantageous effect of each device in the circuit devices, and determining the logic function of the integrated circuit according to the device function and the logic relation;
Creating experimental items of the circuit device according to the logic function, acquiring historical experimental data of the integrated circuit, calculating fault probability of each item in the experimental items according to the historical experimental data, and determining the experimental sequence of the circuit device based on the fault probability and the experimental priority;
and combining the experimental items with the experimental sequence, performing functional experiments on the integrated circuit to obtain experimental data, comparing the experimental data with preset conventional data to obtain a comparison result, and generating an experimental scheme of the integrated circuit according to the comparison result.
2. The method of claim 1, wherein determining the logic relationship corresponding to each of the circuit devices based on the circuit diagram comprises:
obtaining an electrical mark corresponding to each device in the circuit device to obtain a device mark, wherein the device mark is an electrical symbol corresponding to each device in the circuit device;
matching the device mark with the mark in the circuit diagram to obtain a matching result;
obtaining a device sequence of each device in the circuit diagram according to the matching result;
And determining the corresponding logic relation of each device in the circuit device according to the device sequence and the circuit diagram.
3. The method of big data integrated circuit testing of claim 2, wherein said matching said device signature with a signature in said circuit diagram comprises:
matching the device flag with the flag in the circuit diagram by the following formula:
4. The method of claim 1, wherein determining the logic function of the integrated circuit based on the device function and the logic relationship comprises:
extracting a label from each of the device functions to obtain a function label, wherein the function label is a corresponding identifier of each of the device functions;
calculating the confidence coefficient of each tag in the functional tags according to the circuit device;
Performing function screening on the device functions according to the confidence coefficient to obtain target functions;
and generating the logic function of the integrated circuit according to the logic relation and the target function.
5. The method of claim 4, wherein calculating the confidence level for each of the functional tags based on the circuit device comprises:
the confidence level of each of the functional labels is calculated by the following formula:
6. The method of big data integrated circuit experiments of claim 1, wherein creating experimental items of the circuit device according to the logic function comprises:
extracting variable parameters of each device in the circuit devices, wherein the variable parameters are variable information of each device in the circuit devices;
acquiring a digital signal corresponding to the variable parameter according to the variable parameter, wherein the digital signal is an electric signal of the variable parameter;
Constructing an experimental element of each of the circuit devices according to the digital signals;
based on the logic function and the experimental element, an experimental project of the circuit device is created.
7. Integrated circuit experimental device based on big data, characterized in that it comprises:
the priority calculating module is configured to obtain an integrated circuit to be tested, perform device detection on the integrated circuit to obtain a circuit device, and calculate an experiment priority of each device in the circuit device according to the circuit device and the integrated circuit, where the calculating the experiment priority of each device in the circuit device includes:
querying a circuit class of the integrated circuit, wherein the circuit class is a class of the integrated circuit, identifying a device name of each of the circuit devices, wherein the device name is a academic name of each of the circuit devices;
vector encoding is carried out on the circuit category and the device name to obtain a circuit vector and a device vector;
the weight ratio of each of the device vectors is calculated by the following formula:
extracting a feature vector from the device vector according to the weight proportion to obtain a feature vector;
calculating the support degree of the feature vector and the circuit vector by using a preset support degree algorithm;
the preset support algorithm comprises the following steps:
determining the experiment priority of each device in the circuit devices according to the support degree;
a logic function determining module, configured to obtain a circuit diagram of the integrated circuit, where the circuit diagram is a schematic layout diagram drawn by a sign of physical and electrical standardization of the integrated circuit, determine a logic relationship corresponding to each device in the circuit devices according to the circuit diagram, where the logic relationship is a dependency relationship between each device in the circuit devices, query a device function of each device in the circuit devices, where the device function is an advantageous function of each device in the circuit devices, and determine a logic function of the integrated circuit according to the device function and the logic relationship;
The fault probability calculation module is used for creating experimental items of the circuit device according to the logic function, acquiring historical experimental data of the integrated circuit, calculating the fault probability of each item in the experimental items according to the historical experimental data, and determining the experimental sequence of the circuit device based on the fault probability and the experimental priority;
and the experimental scheme generation module is used for carrying out functional experiments on the integrated circuit by combining the experimental items with the experimental sequence to obtain experimental data, comparing the experimental data with preset conventional data to obtain a comparison result, and generating the experimental scheme of the integrated circuit according to the comparison result.
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