CN1157786C - Low-noise high-frequency integrated circuit device and its making method - Google Patents
Low-noise high-frequency integrated circuit device and its making method Download PDFInfo
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- CN1157786C CN1157786C CNB011350830A CN01135083A CN1157786C CN 1157786 C CN1157786 C CN 1157786C CN B011350830 A CNB011350830 A CN B011350830A CN 01135083 A CN01135083 A CN 01135083A CN 1157786 C CN1157786 C CN 1157786C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
- H01L2224/49176—Wire connectors having the same loop shape and height
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Semiconductor Integrated Circuits (AREA)
Abstract
The present invention relates to an integrated circuit device with low-noise high-frequency signals and a manufacturing method thereof. The device comprises a wafer, a circuit substrate, a first conducting wire and a plurality of second conducting wires, wherein the wafer is provided with a first connecting pad and a plurality of second connecting pads, the first connecting pad transfers an AC signal, and the second connecting pads transfer DC signals; the circuit substrate is provided with a third connecting pad and a plurality of fourth connecting pads; the first connecting pad on the wafer is electrically connected to the third connecting pad of the circuit substrate by the first connecting wire, and the second connecting pads on the wafer are connected to the fourth connecting pads of the circuit substrate by the second connecting wires which envelop the first connecting wire. The manufacturing method comprises the following steps: a wafer and a circuit substrate are provided; a third connecting pad and a plurality of fourth connecting pads are formed on the circuit substrate; a first conducting wire is welded between the first connecting pad and the third connecting pad; and a plurality of second conducting wires enveloping the first conducting wire are welded between the second connecting pads and the fourth connecting pads.
Description
Technical field
The present invention relates to a kind of integrated circuit (IC) apparatus and manufacture method thereof, be particularly to a kind of integrated circuit (IC) apparatus and manufacture method thereof with low-noise high-frequency.
Background of invention
Before a chip (chip) that contains integrated circuit is finished encapsulation, must carry out the routing action (bonding) between chip connection gasket (pad) and circuit substrate connection gasket, with the pin on the circuit substrate (pin) or connect ball (solder ball), to exchange with other circuit element or the transmission of direct current signal by plain conductor (gold thread) and relative chip connection gasket electric connection.
Fig. 1 shows that one uses the part schematic diagram of the integrated circuit (IC) apparatus of traditional routing configuration, comprises a circuit substrate 11, a chip 12 and many gold threads 13
1~13
12Have a plurality of connection gaskets 121 on the chip 12, transmit 3 ground signallings (ground signal) GND1-GND3,6 data-signals (datasignal) D1-D6,1 clock signal (clock signal) CLK and 2 triggering signals (strobesignal) S1, S2 respectively, and nationality is by gold thread 13
1~13
12Be electrically connected to the connection gasket 111 of circuit substrate 11.Have more a ground loop (ground ring) 112 and power ring (power ring) 113 on the circuit substrate 11.
Fig. 2 shows gold thread 13 in the said integrated circuit device
1~13
12Profile along AA '. Gold thread 13
1, 13
4Transmission triggering signal S1, S2, gold thread 13
2Transmit clock signal CLK, gold thread 13
3, 13
9And 13
12Transmission ground signalling GND1-GND3, gold thread 13
5~13
8And 13
10, 13
11Transmission of data signals D1-D6 then.
Yet in above-mentioned traditional routing configuration, owing to the AC signal (as clock signal, data-signal, triggering signal) of direct current signal (as ground signalling) and high frequency is not done suitable separating and disposing, make that the gold thread of transmission AC signal is adjacent and produce and disturb that this phenomenon is especially serious to the gold thread of transmitting high-frequency signal.In addition, because the connection gasket on circuit substrate only is arranged in row, makes that the spacing of each bar gold thread is very close, and when irritating mould thereafter, the problem that gold thread touches may take place.
Summary of the invention
In order to address the above problem, the invention provides a kind of integrated circuit (IC) apparatus and manufacture method thereof, the gold thread of transmission interchange and direct current signal is done suitable configuration, the phenomenon that erasure signal disturbs with low-noise high-frequency, also can widen the gold thread spacing, avoid gold thread that improper contact takes place.
One of purpose of the present invention is to provide a kind of integrated circuit (IC) apparatus with low-noise high-frequency, comprises a chip, a circuit substrate, at least one first lead and a plurality of second lead.Wherein, chip has at least one first connection gasket and a plurality of second connection gasket, and those first connection gaskets transmit AC signal and those second connection gaskets transmission direct current signals.Circuit substrate has at least one the 3rd connection gasket and a plurality of the 4th connection gasket.First lead is electrically connected to this first connection gasket on this chip the 3rd connection gasket of this circuit substrate.Second lead is electrically connected to those the 4th connection gaskets of this circuit substrate with those second connection gaskets on this chip, and surrounds this first lead.
Another object of the present invention is to provide a kind of manufacture method with integrated circuit (IC) apparatus of low-noise high-frequency, may further comprise the steps: a chip and a circuit substrate are provided, have at least one first connection gasket and a plurality of second connection gasket on this chip, this first connection gasket transmits AC signal and those second connection gaskets transmission direct current signals.On this circuit substrate, form at least one the 3rd connection gasket and a plurality of the 4th connection gasket.Welding first lead between the 3rd connection gasket of this first connection gasket of this chip and this circuit substrate.Second lead of this first lead of a plurality of encirclements of welding between those the 4th connection gaskets of those second connection gaskets of this chip and this circuit substrate.
By this, the lead that the present invention will be transmitted direct current signal surrounds the lead of transmission AC signal, makes the AC signal of high frequency can not produce noise because of the AC signal in other leads, improves the shortcoming in the known techniques.
Description of drawings
Fig. 1, Fig. 2 are the schematic diagram of the integrated circuit (IC) apparatus of the traditional routing configuration of use;
Fig. 3, Fig. 4 are the schematic diagram of the integrated circuit (IC) apparatus of first embodiment of the invention;
Fig. 5, Fig. 6 are the schematic diagram of the integrated circuit (IC) apparatus of second embodiment of the invention;
Fig. 7 is the flow chart of the present invention's one integrated circuit (IC) apparatus manufacture method;
Embodiment
As shown in Figure 3, the integrated circuit (IC) apparatus of first embodiment comprises a circuit substrate 21, a chip 22 and many gold threads 23
1~23
12Have a plurality of connection gaskets 221 on the chip 22, transmit 6 ground signallings (ground signal) GND1-GND6,3 data-signals (data signal) D1-D3,1 clock signal (clock signal) CLK and 2 triggering signals (strobe signal) S1, S2 respectively, and nationality is by gold thread 23
1~23
12Be electrically connected to the connection gasket 211 of circuit substrate 21.Have more a ground loop (ground ring) 212 and power ring (power ring) 213 on the circuit substrate 21.
Fig. 4 shows gold thread 23 in the said integrated circuit device
1~23
12Profile along AA '.Gold thread 23
2, 23
4Transmission triggering signal S1, S2, gold thread 23
6Transmit clock signal CLK, gold thread 23
8, 23
10And 23
12Transmission of data signals D1-D3, gold thread 23
1, 23
3, 23
5, 23
7, 23
9, 23
11Then transmit ground signalling GND1-GND6.
As shown in Figure 4, the gold thread of one transmission direct current signal (ground signalling GND1-GND6) all is set between the gold thread of each carry high frequency AC signal (triggering signal S1, S2, clock signal clk, data-signal D1-D3), meaning is the gold thread encirclement that the gold thread of carry high frequency AC signal all is transmitted direct current signal, and make high frequency ac signal when transmission, can not produce jamming incoherent signal.
As shown in Figure 5, the integrated circuit (IC) apparatus of second embodiment comprises a circuit substrate 31, a chip 32 and many gold threads 33
1~33
12Have a plurality of connection gaskets 321 on the chip 32, transmit 9 ground signallings (ground signal) GND1-GND9,1 data-signal (data signal) D1,1 clock signal (clock signal) CLK and a triggering signal (strobe signal) S1 respectively, and by gold thread 33
1~33
12Be electrically connected to the connection gasket 311 of circuit substrate 31.Connection gasket 311 is arranged on the circuit substrate 31 in the mode of two row.Have more a ground loop (ground ring) 312 and power ring (power ring) 313 on the circuit substrate 31.
Fig. 6 shows gold thread 33 in the said integrated circuit device
1~33
12Profile along AA '.Because connection gasket 311 on circuit substrate 31 is configured to two row, make connected gold thread 33
1~33
12Two kinds of different length and curvature are arranged, make its section different, form two-layer arrangement up and down with Fig. 4.Wherein, gold thread 33
3Transmission triggering signal S1, gold thread 33
7Transmit clock signal CLK, gold thread 33
11Transmission of data signals D1, gold thread 33
1, 33
2, 33
4, 33
5, 33
6, 33
8, 33
9, 33
10, 33
12Then transmit ground signalling GND1-GND9.
As shown in Figure 6, be provided with the gold thread of four transmission direct current signals (ground signalling GND1-GND9) around the gold thread of each carry high frequency AC signal (triggering signal S1, clock signal clk, data-signal D1), meaning is that the gold thread of each carry high frequency AC signal is all surrounded by the gold thread of four transmission direct current signals, and make high frequency ac signal when transmission, can not produce jamming incoherent signal.In addition, owing to be arranged to two row, make gold thread 33 at the connection gasket 311 of circuit substrate 31
1~33
12Also become two-layer arrangement, can more formerly be arranged in the gold thread pitch enlargement twice of one deck, when irritating mould thereafter, be difficult for generation and touch improperly with the gold thread spacing of one deck.
Fig. 7 is the flow chart of the present invention's one integrated circuit (IC) apparatus manufacture method.
At first, in step 41, on a chip, form a plurality of connection gaskets, make the connection gasket of transmitting high-frequency signal (number of it is believed that in full, clock signal and triggering signal) be provided with the connection gasket that transmits direct current signal (as ground signalling) on every side.
Then, in step 42, on a circuit substrate, form a plurality of connection gaskets and make it be set to two row, the connection gasket near chip one side is in order to be connected to the connection gasket of direct current signal on the chip, in opposite side, make that to be connected on the chip direct current signal and AC signal interlaced.
At last, in step 43, between the connection gasket of chip and circuit substrate, weld gold thread, because the arrangement mode of circuit substrate connection gasket, make those gold threads have two kinds of different length and curvature, and cause the gold thread of transmission AC signal to be surrounded by the gold threads of four transmission direct current signals all around.
Comprehensively above-mentioned, because in the present invention, the arrangement mode of chip connection gasket and circuit substrate connection gasket changes, and the quantity of direct current signal connection gasket on the increase chip, make the gold thread of transmission AC signal to be surrounded by the gold thread of transmission direct current signal more than two, in addition, the mode that the circuit substrate connection gasket becomes two row to be provided with also makes gold thread that different curvatures is arranged and forms two-layer up and down, the gold thread spacing of each layer just can double by more traditional arrangement mode, makes gold thread be difficult for taking place improper phenomenon of touching.In the present invention, the columns of connection gasket is not limited to two row on the circuit substrate, columns is the more the time, can allow and have the gold thread of more transmission direct current signals around the gold thread of transmission AC signal, it is more multi-layered simultaneously also gold thread to be arranged in, not only jamming-proof effect can be strengthened, also the gold thread spacing can be further widened again.
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limiting the present invention, anyly has the knack of this skill person, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention defines and is as the criterion when looking claim.
Claims (16)
1. the integrated circuit (IC) apparatus with low-noise high-frequency is characterized in that, comprising:
One chip, this chip have at least one first connection gasket and a plurality of second connection gasket, and this first connection gasket transmits AC signal and those second connection gaskets transmission direct current signals;
One circuit substrate has at least one the 3rd connection gasket and a plurality of the 4th connection gasket;
At least one first lead is electrically connected to this first connection gasket on this chip the 3rd connection gasket of this circuit substrate;
A plurality of second leads are electrically connected to those second connection gaskets on this chip those the 4th connection gaskets of this circuit substrate respectively, and surround this first lead.
2. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: described AC signal is a clock signal.
3. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: described AC signal is a triggering signal.
4. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: described AC signal is a data-signal.
5. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: those direct current signals are ground signalling.
6. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: those the 3rd connection gaskets and those the 4th connection gaskets are provided with row, and those the 4th connection gaskets are the both sides that are positioned at those the 3rd connection gaskets.
7. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: the 3rd connection gasket and those the 4th connection gaskets are set to multiple row, and those the 4th connection gaskets are adjacent with the 3rd connection gasket.
8. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 1 is characterized in that: one of those leads are a gold thread.
9. the manufacture method of an integrated circuit (IC) apparatus is characterized in that, may further comprise the steps:
One chip and a circuit substrate are provided, have at least one first connection gasket and a plurality of second connection gasket on this chip, those first connection gaskets transmit AC signal and those second connection gaskets transmission direct current signals;
On this circuit substrate, form at least one the 3rd connection gasket and a plurality of the 4th connection gasket;
Welding first lead between those the 3rd connection gaskets of those first connection gaskets of this chip and this circuit substrate;
Second lead of those first leads of a plurality of encirclements of welding between those the 4th connection gaskets of those second connection gaskets of this chip and this circuit substrate.
10. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 9 is characterized in that: described AC signal is a clock signal.
11. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 9 is characterized in that: described AC signal is a triggering signal.
12. the integrated circuit (IC) apparatus with low-noise high-frequency as claimed in claim 9 is characterized in that: described AC signal is a data-signal.
13. the manufacture method of integrated circuit (IC) apparatus as claimed in claim 9 is characterized in that: those direct current signals are ground signallings.
14. the manufacture method of integrated circuit (IC) apparatus as claimed in claim 9 is characterized in that: those the 3rd connection gaskets and those the 4th connection gaskets are provided with row, and those the 4th connection gaskets are positioned at the both sides of those the 3rd connection gaskets.
15. the manufacture method of integrated circuit (IC) apparatus as claimed in claim 9 is characterized in that: those the 3rd connection gaskets and those the 4th connection gaskets are set to multiple row, and those the 4th connection gaskets are adjacent with those the 3rd connection gaskets.
16. the manufacture method of integrated circuit (IC) apparatus as claimed in claim 9 is characterized in that: one of those leads are a gold thread.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB011350830A CN1157786C (en) | 2001-11-19 | 2001-11-19 | Low-noise high-frequency integrated circuit device and its making method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB011350830A CN1157786C (en) | 2001-11-19 | 2001-11-19 | Low-noise high-frequency integrated circuit device and its making method |
Publications (2)
Publication Number | Publication Date |
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CN1356725A CN1356725A (en) | 2002-07-03 |
CN1157786C true CN1157786C (en) | 2004-07-14 |
Family
ID=4672938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNB011350830A Expired - Lifetime CN1157786C (en) | 2001-11-19 | 2001-11-19 | Low-noise high-frequency integrated circuit device and its making method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1157786C (en) |
-
2001
- 2001-11-19 CN CNB011350830A patent/CN1157786C/en not_active Expired - Lifetime
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CN1356725A (en) | 2002-07-03 |
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