CN115769463A

CN115769463A - Power receiving device

Info

Publication number: CN115769463A
Application number: CN202080102283.4A
Authority: CN
Inventors: 吉田秀人; 坂下友一
Original assignee: Mitsubishi Electric Corp
Current assignee: Mitsubishi Electric Corp
Priority date: 2020-07-29
Filing date: 2020-07-29
Publication date: 2023-03-07
Also published as: JPWO2022024237A1; WO2022024237A1; JP6869446B1

Abstract

A power receiving device (3) for wireless power transmission using three-phase alternating current is provided with: a three-phase power receiving circuit that receives power received from a coil provided for each phase, and outputs the power to a power terminal (124) for each phase via a resonance capacitor (123); a three-phase bridge circuit (13) connected to the power terminals of the three-phase powered circuit, having a semiconductor switch (134, 135, 136) for each phase of the powered power; a filter (14) for smoothing a DC output supplied from the three-phase bridge circuit to a load; and a control circuit (200) that outputs a drive signal for periodically turning on and off the semiconductor switch, and adjusts the power supplied to the load by changing the period of the drive signal.

Description

Power receiving device

Technical Field

The present application relates to a power receiving device in wireless power supply.

Background

There are wireless power supply techniques that transfer power through magnetic field coupling between coils that separate spaces. In the present technology, there are various methods for adjusting the power supply, and many of them are performed by controlling a power converter on the power transmission side. However, since many loads to which the wireless power feeding technology is applied are power storage elements such as batteries, it is desirable to perform power control in a power converter on the load side (power receiving side) in order to adjust the power to be fed according to the charging state. For the above reasons, a method of controlling transmission power only by a power converter on the power receiving side has been studied, and various methods have been reported.

On the other hand, applications to high power applications are also prevalent. In particular, from the viewpoint of convenience, application to a charging apparatus for an electric vehicle is being promoted. If a large current flows through the coil as the capacity increases, the power supply efficiency decreases. For example, non-patent document 1 describes wireless power feeding with a three-phase structure, and distributes currents to coils to three phases, thereby obtaining an effect that power feeding can be performed with a low loss even with the same power.

Documents of the prior art

Patent document

Patent document 1: japanese laid-open patent publication No. 2014-195387

Non-patent document

Non-patent document 1: kusaka and J.Itoh, "Three-phase Inductive Power Transfer System with 12coils for Radiation Noise Reduction", proc.IPEC 2018, pages 69-76, 2018.

Disclosure of Invention

Problems to be solved by the invention

In non-patent document 1, wireless power supply is realized by three-phase alternating current, but power control on the power receiving device side is not mentioned. Further, patent document 1 performs power control by the power receiving device to control the power supply power at a time ratio of a time during which the output end of the power receiving coil is in a short-circuited state. In one form of this document, the switching loss is reduced by synchronizing the timing of a part of the switching operation with the zero crossing of the coil current. However, the circuit configuration is a single-phase configuration, and application to a three-phase configuration described in non-patent document 1, for example, is not assumed.

When the power control in the power receiving device is applied to a three-phase configuration, the driving modes of the switches are diversified, and thus the method in a single phase cannot be directly applied. In addition, in order to expand the method in the single-phase configuration, a method of fixing the state of the specific switch to on or off is considered, but there is a problem that the output ripple voltage becomes large, and the volume of the power receiving device increases due to the large size of the output filter.

An object of the present invention is to provide a power receiving device that reduces output voltage ripples and reduces the size of the device by reducing the size of a filter, for a wireless power converter having a three-phase structure.

Means for solving the problems

The power receiving device of the present application is a power receiving device that wirelessly supplies power using three-phase alternating current, and includes: a power receiving circuit that receives power received from a coil provided for each phase and outputs the power to a power terminal for each phase via a resonance capacitor; a three-phase bridge circuit connected to the power terminal of the power receiving circuit, having a semiconductor switch for each phase of the power receiving power; a filter that smoothes a direct current output supplied from the three-phase bridge circuit to a load; and a control circuit that outputs a drive signal for periodically turning on and off the semiconductor switch, and adjusts power supplied to the load by changing a period of the drive signal.

Effects of the invention

Since the power supplied to the load is adjusted by changing the cycle of the drive signal of the semiconductor switch in the three-phase bridge circuit having the semiconductor switch for each phase of the received power, the output voltage ripple can be reduced and the filter can be made compact.

Drawings

Fig. 1 is a block diagram showing the overall configuration of a wireless power feeding system including a power receiving device according to embodiment 1.

Fig. 2A is a circuit diagram showing a three-phase power receiving circuit of the power receiving device according to embodiment 1.

Fig. 2B is a circuit diagram illustrating a three-phase power receiving circuit of the power receiving device according to embodiment 1.

Fig. 3 is a circuit diagram showing a power receiving device according to embodiment 1.

Fig. 4 is a block diagram showing a control circuit of the power receiving device according to embodiment 1.

Fig. 5 is a flowchart showing the operation of the control circuit of the power receiving device according to embodiment 1.

Fig. 6 is a timing chart showing a drive signal of the power receiving device according to embodiment 1.

Fig. 7 is a diagram showing a circuit configuration of a control circuit of a power receiving device according to embodiment 1.

Fig. 8 is a circuit diagram showing a power receiving device according to embodiment 2.

Fig. 9 is a block diagram showing a control circuit of the power receiving device according to embodiment 2.

Fig. 10 is a timing chart illustrating control of the power receiving device according to embodiment 2.

Fig. 11 is a block diagram showing a control circuit of the power receiving device according to embodiment 2.

Fig. 12 is a timing chart showing a control circuit of the power receiving device according to embodiment 2.

(description of reference numerals)

1: a wireless power supply system; 2: a power transmission device; 3: a power receiving device; 10: a three-phase AC power supply; 11: a three-phase power transmission circuit; 12: a three-phase power receiving circuit; 121: a triangular wiring coil; 122: a star connection coil; 123. 123a, 123b, 123c: a resonant capacitor; 124a, 124b, 124c: a power terminal; 13: a three-phase bridge circuit; 131. 132, 133: a diode; 134. 135, 136: a semiconductor switch; 14: a filter; 15: a load; 16. 17: a current detection sensor; 18: a voltage detection unit; 200: a control circuit; 201: a processor; 202: a storage device; 20: a driving signal generator; 21: a current detection unit; 211: a phase corrector; 212: a switching current zero crossing detector; 22: a delta-sigma modulator; 221: a subtractor; 222: an integrator; 223: a comparator; 224: a delay element; 23: a splitter; 24: a comparator; 25: a multiplexer; 26: a hysteresis comparator.

Detailed Description

Embodiment mode 1

Hereinafter, a power receiving device according to embodiment 1 will be described. Fig. 1 is a block diagram showing the overall configuration of a power receiving device. The wireless power supply system 1 shown in fig. 1 includes a three-phase ac power supply 10 and a three-phase power transmission circuit 11 as a power transmission device 2, and a three-phase power reception circuit 12, a three-phase bridge circuit 13, a filter 14, and a load 15 as a power reception device 3.

Electric power is supplied from a three-phase ac power supply 10, and the electric power is transmitted between a three-phase power transmission circuit 11 and a three-phase power reception circuit 12 without contact. The three-phase bridge circuit 13 plays a role of adjusting the received power in addition to converting the ac power received by the three-phase power receiving circuit 12 into dc power. The filter 14 attenuates an ac component included in the output power of the three-phase bridge circuit 13, and the load 15 consumes or stores the power.

Fig. 2A and 2B show configuration examples of the three-phase power transmission circuit 11 and the three-phase power reception circuit 12. The three-phase power transmission circuit 11 and the three-phase power receiving circuit 12 are circuits including at least three coils and at least three resonance capacitors 123. Fig. 2A shows an example of a configuration using a delta connection coil 121, and fig. 2B shows an example of a configuration using a star connection coil 122. In fig. 2A and 2B, one coil constitutes one phase, but a configuration may be adopted in which a plurality of coils are used for each phase. 3

power terminals

124a, 124b, 124c are drawn from the coils of each wiring state so as to be connected to an external circuit. The first power terminal 124a is connected to an external circuit via a first resonance capacitor 123a, the second power terminal 124b is connected to the external circuit via a second resonance capacitor 123b, and the third power terminal 124c is connected to the external circuit via a third resonance capacitor 123 c. The connection structure of the coil and the resonance capacitor shown in fig. 2A and 2B is an example of various connection structures, and is not limited to the connection structure of the delta connection coil 121, the star connection coil 122, and the resonance capacitor 123. The external circuit corresponds to the three-phase ac power supply 10 in the case of the three-phase power transmission circuit 11 and corresponds to the three-phase bridge circuit 13 in the case of the three-phase power reception circuit 12. In general, the three-phase power transmission circuit 11 and the three-phase power reception circuit 12 are designed such that the coils and capacitors provided therein resonate with each other, and the reactance component of the impedance seen from the three-phase ac power supply 10 is reduced. Then, the power is transmitted with the output frequency of the three-phase ac power supply 10 set to the resonance frequency or substantially the resonance frequency of the three-phase power transmission circuit 11 and the three-phase power reception circuit 12.

Fig. 3 shows a circuit diagram of the power receiving device 3 according to embodiment 1. The three-phase bridge circuit 13 includes three

diodes

131, 132, 133 and three

semiconductor switches

134, 135, 136. The Semiconductor switches 134, 135, 136 are electric components having a characteristic that the switches and the diodes are connected in parallel in the opposite direction, such as MOS-FETs (Metal Oxide Semiconductor Field Effect transistors) or IGBTs (Insulated Gate Bipolar transistors). The three-phase bridge circuit includes three branches connected in parallel, one arm of each branch includes

diodes

131, 132, and 133, and the other arm includes semiconductor switches 134, 135, and 136. In fig. 3, the upper arms are

diodes

131, 132, 133 and the lower arms are

semiconductor switches

134, 135, 136, but all of them may be semiconductor switches, or the upper arms may be semiconductor switches and the lower arms may be diodes. An ac terminal is drawn from between the upper and lower arms of each branch, and is connected to three

power terminals

124a, 124b, and 124c provided in the three-phase power receiving circuit 12. One end of the cathode side of the diode in each branch is connected to the high-voltage side of the common dc wiring, and the other end of each branch is connected to the low-voltage side of the common dc wiring.

The filter 14 is a dc capacitor connected to a dc wiring, and has a function of attenuating a ripple voltage of an ac component included as an output voltage of the three-phase bridge circuit 13. When the ripple voltage is attenuated to a predetermined amount, a large-capacity dc capacitor is required as the ripple voltage output from the three-phase bridge circuit 13 increases. In other words, if the ripple voltage output from the three-phase bridge circuit 13 can be reduced, the filter 14 needs to have a small capacity, and the dc capacitor can be reduced in size. The load 15 is a motor that consumes electric power, a battery for storing electric power, or the like.

The

current detection sensors

16, 17 detect input currents of the three-phase bridge circuit. In the example of fig. 3, the currents of the two phases Ia and Ib are detected, but the phases to be obtained are not limited, and current information of different combinations may be obtained. Further, the currents of two phases among the three phases are detected, but the currents of all the three phases may be detected. When only two phases are detected, it is necessary to calculate the current of the undetected phase by an arithmetic operation. In the embodiment of the present application, only two phases are detected, and currents of three phases including an undetected phase are calculated and detected inside the control circuit 200.

In the power receiving device 3 of the present application, when all of the semiconductor switches 134, 135, 136 are in the off state, the switches operate as diodes, and therefore the three-phase bridge circuit 13 functions as a three-phase diode rectifier circuit. Therefore, at this time, the power received by the three-phase power receiving circuit 12 is supplied to the load 15 in its entirety. On the other hand, when all the semiconductor switches are in the on state, the output terminals of the three-phase power receiving circuit 12 are in the short-circuited state. In the short-circuit state, the current output from the three-phase power receiving circuit 12 has a current waveform substantially equal to that in the case where all the semiconductor switches 134, 135, and 136 are in the off state. However, this current does not flow in the load and circulates back to the three-phase powered circuit 12 via the semiconductor switches 134, 135, 136. As a result, the power supply from the three-phase bridge circuit 13 to the load 15 can be interrupted. For example, if the semiconductor switch 134 and the semiconductor switch 135 are turned on and the semiconductor switch 136 is turned off, the power supply state is set in which only the power supplied via the diode 133 is supplied to the load 15, and the power supply to the load in this case is 1/3 of the power supply in the case where all the semiconductor switches are turned off. As described above, the power reception device 3 of the present application can control the power feeding state and the non-power feeding state by controlling the states of the semiconductor switches 134, 135, 136. By controlling the time ratio of the power supply state and the non-power supply state, the power supplied to the load 15 can be controlled.

In the power receiving device of the present application, the drive signals of the semiconductor switches 134, 135, 136 are pulse density modulated, and the switching timings of the semiconductor switches 134, 135, 136 are controlled so as to be in a period during which the currents of the semiconductor switches 134, 135, 136 are zero. Therefore, compared to a driving method involving a hard switching operation such as pulse width modulation, there is an advantage that a switching loss can be reduced and accordingly, an operation with high efficiency can be performed. On the other hand, in the case of pulse width modulation, the time ratio of the power feeding state and the non-power feeding state in one period of the phase current is generally controlled, but in the case of pulse density modulation, the time ratio of the power feeding state and the non-power feeding state in a plurality of periods of the phase current is controlled. That is, the time required for the time adjustment is large for the pulse density modulation as compared with the pulse width modulation. As a result, the ripple voltage increases, and the filter 14 becomes large, which is disadvantageous. Therefore, in order to minimize the increase in the volume of the filter 14 while applying the pulse density modulation, it is necessary to minimize the increase in the ripple voltage.

Fig. 4 illustrates a method for generating drive signals for the semiconductor switches 134, 135, 136 in the power receiving device 3 according to embodiment 1. The drive signals for the three semiconductor switches are generated using a single drive signal generator 20. The drive signal generator 20 has a current detection unit 21, a delta-sigma modulator 22, and a shunt 23. The drive signal generator 20 receives as input the current information acquired by the

current detection sensors

16 and 17 and an arbitrary modulation factor command value m, and outputs drive signals for the semiconductor switches 134, 135, and 136. In addition, these devices are configured within the control circuit 200.

The current detection means 21 has

current detection sensors

16 and 17, and determines the timing at which the currents of the semiconductor switches 134, 135, and 136 become zero by the phase corrector 211 and the switching current zero-crossing detector 212 based on the current values obtained from these sensors. The phase corrector 211 corrects the amount of phase change accompanying the detection of the switching current and the acquisition process to the control device, and matches the current and the phase with the actual values. Based on the current information corrected by the phase corrector 211, the switching current zero-crossing detector 212 detects zero-crossing points of the currents flowing in the semiconductor switches 134, 135, 136, and outputs the zero-crossing timing to the delta-sigma modulator 22. Further, "which semiconductor switch has zero current among the currents of the three semiconductor switches 134 to 136" is output to the shunt 23.

The delta-sigma modulator 22 receives an arbitrary modulation rate command value m, and includes a subtractor 221, an integrator 222, a comparator 223, and a delay element 224. The delta-sigma modulator 22 operates each time the output signal of the switching current zero-crossing detector 212 synchronized with the zero-crossing timing at which any of the semiconductor switches 134, 135, 136 has become zero is output. The phases of the currents are shifted by about 120 deg., and there is a second zero crossing every period, so that the integration operation is performed every about 1/6 period of the input current period of the three-phase bridge circuit 13. Delay element 224 indicates that the last output value was used in the calculation.

Since the previous output is not present at the start of the operation, the subtraction value of the subtractor 221 is 0, and the modulation factor command value m is output to the integrator 222. The comparator 223 compares the output of the integrator 222 with 0.5, and outputs 1 when the integrator output is large, and 0 when the integrator output is small. By operating the delta-sigma modulator 22 in this way, a pulse signal in which the output of the comparator 223 becomes 1 can be output at a fixed cycle with respect to the modulation factor command value m. For example, if m =0.5, the output of the integrator 222 becomes 0.5, and the output of the comparator 223 becomes 1. At the next timing, the output of the delay element 224 becomes 1, the output of the subtractor 221 becomes-0.5, the output of the integrator 222 becomes 0, and the output of the comparator 223 becomes 0. If continued further, the output of the delta sigma modulator 22 repeats 1 and 0 at the zero crossing timing. For example, if m =0.25, the output of the delta-sigma modulator 22

repeats

1, 0, 1, 0 at the zero-crossing timing.

The shunt 23 receives the output signal of the comparator 223 as the drive signal of the semiconductor switch based on the information on the semiconductor switch that the current output from the switching current zero-cross detector 212 is zero. The comparator 223 outputs an on drive signal to the semiconductor switch if the output signal has a value of 1, and outputs an off drive signal to the semiconductor switch if the output signal has a value of 0. At this time, the drive signals of the other two semiconductor switches having non-zero current are not changed, and the states of the signals are maintained.

As described above, in the generation of the drive signals for the semiconductor switches 134, 135, 136, the combination of the delta-sigma modulator 22 and the splitter 23 can generate the drive signals for turning on and off the semiconductor switches 134, 135, 136 periodically.

In the drive signal generator 20, the timing of changing the drive signal of each semiconductor switch is twice in one cycle. By generating the drive signals for the three switches collectively in this way, the control circuit can be mounted easily. Further, since the timing of the power supply can be adjusted in a period of one phase current cycle, the output ripple voltage can be reduced compared to two times in the case of the single-phase configuration and six times in the case of the three-phase configuration, and the filter can be made smaller if compared with the single-phase configuration.

Fig. 5 illustrates a driving signal output flow at the time of startup of the power receiving device 3 according to embodiment 1. The power receiving device 3 of the present application operates in synchronization with the currents of the semiconductor switches 134, 135, 136 in order to perform switching at the timing when the currents of the semiconductor switches 134, 135, 136 become zero. Therefore, as described above, the phase difference between the actual current and the detected current information is corrected by the phase corrector 211. If the drive signals are generated in a phase-shifted state, switching losses occur in the semiconductor switches 134, 135, 136, which causes a reduction in efficiency. Therefore, when the phase of the current flowing through the semiconductor switch is not synchronized with the phase of the current flowing through the phase corrector 211 after the start-up, it is preferable that the semiconductor switches 134, 135, and 136 are not switched. Therefore, at the start of operation, as shown in fig. 5, in step S1, the semiconductor switches 134, 135, and 136 are turned on and the power supply to the load 15 is turned off before the phase synchronization is completed. Next, as step S2, it waits until synchronization by the phase corrector 211 is completed. If the synchronization is completed, the drive signal generation is started at step S3, and the drive signal generated after the completion of the phase synchronization is output and the power supply is started at step S4. This enables only the desired supply power to be transmitted.

Fig. 6 shows an example of waveforms in the operation of the circuit in the power receiving device 3 according to embodiment 1. This example is a waveform in the case where the modulation factor command value m is set to 0.25. The drive signal in the power receiving device of the present application has two features. The first characteristic is that the phase difference of the drive signals of the semiconductor switches is a time 1/3 of the repetition period of the drive signals. Since the power supply from each phase is performed at equal time intervals, it is possible to suppress a time shift between the power supply state and the non-power supply state and minimize the ripple voltage of the output. As a result, the capacitor of the filter 14 can be downsized. The second characteristic is that the pattern shape of the drive signal of each semiconductor switch is the same pattern shape accompanying the phase difference. According to this feature, the currents flowing through the branches have the same waveform with the phase difference, and the losses occurring in the elements constituting the branches are also the same. Therefore, the heat dissipation design of each branch can be shared, and local heat generation can be suppressed. In addition, theoretically, when the modulation rate command value m is 1/3 or 2/3, only a specific semiconductor switch is driven, and there is a possibility that a variation occurs in loss. However, in an actual control apparatus, 1/3 and 2/3 are cyclic fractions, and therefore represent finite fractions of approximate values. As a result, as described above, the drive signals of the respective semiconductor switches have the same shape with the phase difference. In this case, the drive signal repetition period can be adjusted by adjusting the effective number of the modulation rate command value m.

Fig. 7 shows an example of the circuit configuration of the control circuit 200 according to embodiment 1. As shown in fig. 7, the control circuit 200 includes a processing circuit having a processor 201 and a memory device 202 as cores, and the processing of each portion is realized by the processing circuit. The processing Circuit may include an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), various logic circuits, various signal processing circuits, and the like.

As described above, the power receiving device 3 according to embodiment 1 includes: a three-phase power receiving circuit 12 that receives power received from a coil provided for each phase and outputs the power to a power terminal for each phase via a resonant capacitor 123; a three-phase bridge circuit 13 connected to

power terminals

124a, 124b, 124c of a three-phase power receiving circuit 12, having

semiconductor switches

134, 135, 136 for each phase of the received power; a filter 14 for smoothing a dc output supplied from the three-phase bridge circuit 13 to the load 15; and a control circuit 200 for outputting a drive signal for turning on/off the semiconductor switches 134, 135, 136 periodically, and adjusting the power supplied to the load 15 by changing the period of the drive signal.

In this way, the power supplied to the load is adjusted by changing the cycle of the drive signal of the semiconductor switches 134, 135, 136, and therefore, the output voltage ripple can be reduced and the filter 14 can be downsized.

In addition, according to the power receiving device of the present application, since pulse density modulation is applied, switching loss is reduced, and highly efficient operation is possible. In addition, since the drive signals of the 3 semiconductor switches 134, 135, 136 are generated by the single drive signal generator 20, the controller design becomes easier than the case where the drive signals are generated individually for the respective phases. Further, since the phase difference of the generated drive signals is 1/3 of the total repetition period of the three phases of the drive signals, it is possible to minimize the ripple voltage while suppressing the temporal variation between the power feeding state and the non-power feeding state. As a result, the filter 14 for removing the ripple voltage can be downsized. Further, since the drive signals of the respective semiconductor switches are the same, the loss occurring in the respective branches becomes uniform, and there is an advantage that the heat dissipation design can be made common and local heat generation can be prevented.

Embodiment mode 2

Fig. 8 is a circuit diagram showing the power receiving device 3 according to embodiment 2. The same or corresponding portions as those in fig. 3 are denoted by the same reference numerals, and the description thereof will be omitted. Embodiment 2 is configured by adding the voltage detection means 18 to the configuration of embodiment 1. The voltage detected by the voltage detection means 18 is the load voltage Vdc, and the detected voltage information is input to the control circuit 200.

In embodiment 2, the drive signals for the semiconductor switches 134, 135, 136 are generated based on the current information detected by the

current detection sensors

16, 17 and the voltage information detected by the voltage detection means 18, and the load voltage Vdc is controlled. The voltage command value in the voltage control may be set to any desired target voltage, or may be set to an upper limit value and a lower limit value of any desired voltage range. The range of the target voltage may be set by only the upper limit value or only the lower limit value.

Fig. 9 is a diagram for explaining a method of generating a drive signal when the range of the target voltage in embodiment 2 is set to an arbitrary value (voltage command value Vdc) which is an upper limit value. The voltage command value Vdc may be a value arbitrarily set and may be changed during operation. The comparator 24 compares the voltage command value Vdc with the load voltage information obtained by the voltage detection unit 18. The multiplexer 25 determines the modulation rate command value m based on the output of the comparator 24. In fig. 9, modulation rate command value m is set to m1 when load voltage Vdc is equal to or greater than voltage command value Vdc, and is set to m2 when load voltage Vdc is less than voltage command value Vdc. Modulation rate command value m1 is selected such that the power supply power is smaller than the load power consumption, and load voltage Vdc is reduced. Modulation rate command value m2 is selected such that the power supply power is larger than the load consumption power, and load voltage Vdc is increased. Fig. 10 illustrates a schematic shape of an operation waveform in the control illustrated in fig. 9. For each voltage control cycle, load voltage Vdc is compared with voltage command value Vdc, modulation rate command value m is set, and load voltage Vdc is controlled to voltage command value Vdc. As the voltage control cycle is shorter, the error between load voltage Vdc and voltage command value Vdc can be smaller, but the number of times modulation rate command value m varies during control is also increased, and therefore, the influence of transient variation due to variation of the command value becomes larger. In order to smoothly control the voltage, a plurality of modulation rate command values m may be switched without being limited to 2, and the value of the modulation rate command value m may be switched according to the difference between the load voltage Vdc and the target voltage Vdc.

Fig. 11 is a diagram for explaining a method of generating a drive signal when the target voltage is set to an arbitrary range (Vdc 2 ≦ Vdc 1) in embodiment 2. The upper limit value Vdc1 and the lower limit value Vdc2 of the voltage range may be arbitrarily set values and may be changed during operation. The upper voltage limit Vdc1 or the lower voltage limit Vdc2 is compared with the load voltage information obtained from the voltage detection means 18, and the modulation factor command value m is determined based on the magnitude relationship. When the voltage range is set, the hysteresis comparator 26 is used, and the modulation rate command value m is set to m1 if the load voltage Vdc is greater than the upper voltage limit value Vdc1, and is set to m2 if the load voltage Vdc is less than the lower voltage limit value Vdc 2. Here, m1 and m2 are assumed to have the same characteristics as described above. Fig. 12 illustrates a schematic shape of an operation waveform in the control illustrated in fig. 11. When the voltage range is designated and the control is performed, the amplitude of the load voltage Vdc becomes larger than that when the voltage command value is designated as shown in fig. 8. On the other hand, since the number of times of fluctuation of the modulation rate command value m is reduced, there is an advantage that the influence of transient fluctuation due to fluctuation of the command value is reduced and the operation is easily stabilized.

As described above, the power receiving device 3 according to embodiment 2 has a function of changing the modulation factor command value in accordance with the load voltage Vdc, and can control the load voltage by generating the drive signal for the semiconductor switches 134, 135, 136.

While various exemplary embodiments and examples have been described herein, the various features, forms, and functions described in one or more embodiments are not limited to the application to a specific embodiment, and can be applied to the embodiments individually or in various combinations. Therefore, countless modifications not illustrated can be conceived within the scope of the technology disclosed in the present specification. For example, the case where at least one component is modified, added, or omitted is included, and the case where at least one component is extracted and combined with the components of other embodiments is also included.

Claims

1. A power receiving device that wirelessly transmits power using three-phase alternating current, comprising:

a three-phase power receiving circuit that receives power received from a coil provided for each phase and outputs the power to a power terminal for each phase via a resonant capacitor;

a three-phase bridge circuit connected to the power terminals of the three-phase power receiving circuit, having a semiconductor switch for each phase of the received power;

a filter that smoothes a direct current output supplied from the three-phase bridge circuit to a load; and

and a control circuit that outputs a drive signal for periodically turning on and off the semiconductor switch, and adjusts power supplied to the load by changing a period of the drive signal.

2. The power receiving device according to claim 1,

the three-phase bridge circuit includes branches that are separated for each phase and connected in parallel, a diode is provided in one arm of the branch, a semiconductor switch and a diode connected in parallel in the opposite direction to the semiconductor switch are provided in the other arm, one end of the branch is connected to a high-voltage side of the filter, the other end of the branch is connected to a low-voltage side of the filter, and the power terminals of each phase of the three-phase power receiving circuit are connected between the arms of the branch.

3. The power receiving device according to claim 1 or 2,

the semiconductor switch is turned on and off by the drive signal that is periodically repeated if the power supplied to the load is fixed, the pattern shape of the drive signal of each phase is the same shape with a phase shift of 1/3 of the repetition period of the entire three phases of the drive signal.

4. The power receiving device according to any one of claims 1 to 3,

the control circuit includes a current detection unit that detects an input current for each phase of the received power received from the three-phase power receiving circuit, and determines a timing at which the current of the semiconductor switch for each phase becomes zero based on the input current detected by the current detection unit, and turns on or off the semiconductor switch at the timing.

5. The power receiving device according to claim 4,

the control circuit includes:

a delta-sigma modulator that operates at each of the timings at which the current of the semiconductor switch becomes zero, and outputs a pulse signal at a cycle determined according to a modulation rate command value; and

and a shunt for outputting the output signal of the delta sigma modulator as an on/off drive signal to the semiconductor switch in which the current becomes zero.

6. The power receiving device according to claim 5,

the period of the drive signal for turning the semiconductor switch on and off is changed according to the modulation factor command value of the delta-sigma modulator provided in the control circuit, and the power supplied to the load is adjusted.

7. The power receiving device according to claim 5,

the current detection means provided in the control circuit includes a phase corrector that corrects a phase difference between an actual current and a detected current, and the output of the semiconductor switch is turned on until synchronization is achieved by the phase corrector after a power receiving device is started up, and the delta-sigma modulator starts to operate after the synchronization is achieved.

8. The power receiving device according to any one of claims 1 to 7,

the control circuit includes a voltage detection unit that detects an output voltage that is an output of the three-phase bridge circuit, and changes a cycle of the drive signal that turns the semiconductor switch on and off when the output voltage is out of a range of a target voltage.

9. The power receiving device according to claim 5,

the control circuit includes a voltage detection unit that detects an output voltage that is an output of the three-phase bridge circuit, and the control circuit switches the modulation rate command value when the output voltage deviates from a target voltage range by setting a plurality of the modulation rate command values of the delta-sigma modulator.

10. The power receiving device according to claim 9,

the modulation rate command value of the delta-sigma modulator is the modulation rate command value switched when the output voltage detected by the voltage detection means exceeds an upper limit value of the target voltage and the modulation rate command value switched when the output voltage is less than a lower limit value of the target voltage.