CN115754912A - Dual-channel synchronous radar frequency source and working method thereof - Google Patents

Abstract

The invention discloses a dual-channel synchronous radar frequency source and a working method thereof, wherein the dual-channel synchronous radar frequency source comprises a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module and an excitation frequency conversion module, wherein the crystal oscillator module is connected with the local oscillator module and provides a high-precision reference source for the local oscillator module; the local oscillation module receives a reference source from the crystal oscillation module, outputs a reference clock to the direct digital frequency synthesis DDS module, and outputs two paths of signals to the excitation frequency conversion module; the direct digital frequency synthesis DDS module generates four paths of signals, the two paths of signals are output to the local oscillation module for frequency mixing, and two paths of local oscillation signals are generated and output to the excitation frequency conversion module; the two paths of signals are directly output to an excitation frequency conversion module; the excitation frequency conversion module receives four local oscillation signals and two intermediate frequency waveform signals, and generates two radio frequency signals after frequency mixing. The invention shortens the frequency switching time, improves the anti-interference capability of the radar, reduces the detection blind area, the synchronous delay and the volume of a frequency source of the radar, and reduces the power consumption and the heat consumption of equipment.

Description

Dual-channel synchronous radar frequency source and working method thereof

Technical Field

The invention relates to the technical field of radio frequency signal sources, in particular to a dual-channel synchronous radar frequency source and a working method thereof.

Background

Along with the development of scientific technology, the electromagnetic environment is increasingly complex, the requirements on the functions and the performance of the radar are higher and higher at present, the phased array radar is not limited to the original single function design any more, the function design tends to be diversified, and the design of the multifunctional phased array system radar becomes an important direction for the development of the current phased array radar.

The frequency source is an important component of the radar system, provides signal sources such as radio frequency signals, local oscillator signals, coherent clocks and the like required by the radar system, and the performance of the frequency source directly influences the working performance of the radar. For the multifunctional phased array radar, higher requirements are put forward on parameters such as the number of channels, the synchronization performance, the waveform pattern and the like of radio frequency signals due to the increase of the radar function.

Disclosure of Invention

The invention aims to provide a dual-channel synchronous radar frequency source which is short in frequency switching time, strong in anti-interference capability, small in detection blind area, low in synchronous delay, small in size, low in power consumption and low in heat consumption and a working method thereof.

The technical solution for realizing the purpose of the invention is as follows: a dual-channel synchronous radar frequency source comprises a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module and an excitation frequency conversion module, wherein the local oscillator module comprises a comb spectrum generator, a filter and an amplifier, and the DDS module comprises a frequency multiplier, a switch filter bank and a frequency mixer;

the crystal oscillator module is connected with the local oscillator module through a radio frequency cable and provides a high-precision reference source for the local oscillator module;

the local oscillation module receives a reference source from the crystal oscillation module, and outputs a reference clock REF-CLK, a third local oscillation signal LO2-A and a fourth local oscillation signal LO2-B after passing through the comb spectrum generator, the filter and the amplifier, wherein the reference clock REF-CLK is output to the direct digital frequency synthesis DDS module, and the third local oscillation signal LO2-A and the fourth local oscillation signal LO2-B are output to the excitation frequency conversion module;

the direct digital frequency synthesis DDS module receives a reference clock REF-CLK from the local oscillator module, and under the control of an upper computer, the direct digital frequency synthesis DDS module generates a first path of point frequency continuous wave OUT1, a second path of point frequency continuous wave OUT2, a first path of intermediate frequency waveform signal OUT3 and a second path of intermediate frequency waveform signal OUT4, wherein the first path of point frequency continuous wave OUT1 and the second path of point frequency continuous wave OUT2 are output to the local oscillator module and are mixed with signals generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B which are output to the excitation frequency conversion module; the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module;

the excitation frequency conversion module receives Sub>A first local oscillation signal LO1-A, sub>A second local oscillation signal LO1-B, sub>A third local oscillation signal LO2-A, sub>A fourth local oscillation signal LO2-B, sub>A first intermediate frequency waveform signal OUT3 and Sub>A second intermediate frequency waveform signal OUT4, mixes the first local oscillation signal LO1-A, the third local oscillation signal LO2-A and the first intermediate frequency waveform signal OUT3, and generates Sub>A first radio frequency signal RF-A; the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 are mixed to generate a second radio frequency signal RF-B.

Furthermore, the dual-channel synchronous radar frequency source further comprises an upper computer, wherein the upper computer is communicated with the direct digital frequency synthesis DDS module through an SPI serial port, and issues a control instruction to the direct digital frequency synthesis DDS module to control the operation work of the local oscillator module and the excitation frequency conversion module.

Further, the direct digital frequency synthesis DDS module and the local oscillator module generate a first local oscillator signal LO1-a and a second local oscillator signal LO1-B of a broadband through the comb spectrum generator, the frequency multiplier, the switch filter bank and the frequency mixer in a manner of combining direct frequency synthesis and direct digital frequency synthesis.

Further, the direct digital frequency synthesis DDS controls fine step hopping frequency points, the frequency hopping precision is 0.1Hz, the direct frequency synthesis and the direct digital frequency synthesis can both ensure the phase consistency among channels, and the fine step hopping and the radio frequency synchronization of the first local oscillation signal LO1-A and the second local oscillation signal LO1-B are realized.

Further, the direct digital frequency synthesis DDS module comprises an FPGA chip and a four-channel DDS chip; the FPGA chip adopts XC4VLX25-10SFG363I type FPGA of XILINX company, communicates with an upper computer through an SPI serial port, and is configured with four channels of DDSs to generate four independent output signals; the model of the four-channel DDS chip is GM4943A.

Furthermore, the four-channel DDS chip is simultaneously used for fine step frequency hopping of a frequency source and generation of intermediate frequency, phase difference control among four channels is realized by adopting an on-chip synchronization mode, and the phase difference control is used for calibrating phase difference caused by hardware among the channels; and simultaneously, synchronous/asynchronous work of two paths of radio frequency signals is realized by adjusting the time sequence relation of two paths of trigger pulses.

Furthermore, the four-channel DDS chip has four independent DDS chips, each independent DDS chip has independently controlled phase, frequency and amplitude control words, and the maximum support is 2.5GHz sampling clock; the four-channel DDS chip supports the functions of multi-chip synchronization, linear scanning, nonlinear scanning, frequency keying, phase keying, amplitude control and RAM scanning.

Further, the direct digital frequency synthesis DDS module communicates with an upper computer through an SPI serial port, receives and analyzes a control instruction from the upper computer, controls a local oscillator module and a switch filter bank of an excitation frequency conversion module, configures a register of the direct digital frequency synthesis DDS module, starts to operate with REF-CLK as a sampling clock after receiving a working instruction, and outputs a first path of point frequency continuous wave OUT1, a second path of point frequency continuous wave OUT2, a first intermediate frequency waveform signal OUT3, and a second intermediate frequency waveform signal OUT4 according to the requirements of the whole machine.

Further, the excitation frequency conversion module receives signals of Sub>A first local oscillator signal LO1-A, sub>A third local oscillator signal LO2-A and Sub>A first intermediate frequency waveform signal OUT3, and outputs Sub>A first radio frequency signal RF-A after frequency mixing, filtering and amplifying; receiving second local oscillation signals LO1-B, fourth local oscillation signals LO2-B and second intermediate frequency waveform signal OUT4 signals, and outputting a second radio frequency signal RF-B after frequency mixing, filtering and amplifying; the first local oscillator signal LO1-A and the second local oscillator signal LO1-B are in phase synchronization, and the phases of the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are controllable, so that the radio frequency synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B is realized.

A working method of a two-channel synchronous radar frequency source is based on the two-channel synchronous radar frequency source and specifically comprises the following steps:

step 1, an upper computer sends related frequency information to an FPGA of a direct digital frequency synthesis DDS module according to a convention format in an SPI communication mode, wherein the information comprises information of frequency points, code patterns, amplitudes and initial phases of two channels;

step 2, the FPGA of the direct digital frequency synthesis DDS module analyzes the received control instruction;

step 3, after the analysis is completed, the FPGA sends out parallel communication signals according to the analysis result to control the switch filter banks in the local oscillation module and the excitation frequency conversion module to work;

step 4, the FPGA of the direct digital frequency synthesis DDS module is communicated with a four-channel DDS chip, a register of the four-channel DDS chip is correspondingly configured, and the time for configuring the register is far longer than the parallel communication time;

and 5, after the configuration is finished, the four-channel DDS chip is in Sub>A waiting state, when the four-channel DDS chip receives Sub>A corresponding channel trigger pulse sent by an upper computer, the four-channel DDS chip generates Sub>A corresponding signal, and the pulse generation interval time corresponding to the four-channel DDS chip channel is set according to specific requirements, so that the synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B is realized.

Compared with the prior art, the invention has the remarkable advantages that: (1) The invention adopts a mode of combining direct frequency synthesis and direct digital frequency synthesis, takes a high-precision constant-temperature crystal oscillator as a reference source, generates broadband radio-frequency signals in modes of frequency multiplication, frequency mixing and the like, uses a DDS chip to generate two paths of independently controlled broadband random waveform radio-frequency signals, and can realize functions of amplitude modulation, phase shift, double-channel synchronization and the like by a built-in FPGA; (2) The DDS is used for generating a single-point continuous signal, the frequency point fast switching is realized by matching with a switch filter bank, the frequency switching time is effectively shortened, the frequency switching time can be controlled within 250ns, signals such as shielding pulses and blind compensating pulses can be added in the working process of a pulse radar, the anti-jamming capability of the radar is improved, and the detection blind area of the radar is reduced; (3) A four-channel DDS chip is used as a fine step frequency hopping source and a waveform signal generating source, and an in-chip synchronization mode is adopted, so that the influence of external interference and signals between printed circuit boards on synchronization is reduced, the synchronization delay is reduced, the free switching of a synchronous/asynchronous mode between two channels of a frequency source is realized, the volume of the frequency source is reduced, and the power consumption and the heat consumption of equipment are reduced.

Drawings

Fig. 1 is a block diagram of a two-channel synchronous radar frequency source according to the present invention.

Fig. 2 is a schematic design diagram of a local oscillation module in the embodiment of the present invention.

Fig. 3 is a schematic diagram of the structure of GM4943A four channel DDS in an embodiment of the invention.

Fig. 4 is a schematic diagram of the design of a direct digital frequency synthesis DDS module in an embodiment of the invention.

Fig. 5 is a schematic design diagram of an excitation frequency conversion module in an embodiment of the present invention.

FIG. 6 is a diagram illustrating the timing diagram of the operation of the frequency source according to an embodiment of the present invention.

Detailed Description

The invention is described in further detail below with reference to the figures and the specific embodiments.

As shown in fig. 1, the dual-channel synchronous radar frequency source of the present invention includes a crystal oscillator module, a direct digital frequency synthesis DDS module, a local oscillator module, and an excitation frequency conversion module, wherein the local oscillator module includes a comb spectrum generator, a filter, and an amplifier, and the direct digital frequency synthesis DDS module includes a frequency multiplier, a switch filter bank, and a mixer;

the crystal oscillator module is connected with the local oscillator module through a radio frequency cable and provides a high-precision reference source for the local oscillator module;

the local oscillation module receives a reference source from the crystal oscillation module, and outputs a reference clock REF-CLK, a third local oscillation signal LO2-A and a fourth local oscillation signal LO2-B after passing through the comb spectrum generator, the filter and the amplifier, wherein the reference clock REF-CLK is output to the direct digital frequency synthesis DDS module, and the third local oscillation signal LO2-A and the fourth local oscillation signal LO2-B are output to the excitation frequency conversion module;

the direct digital frequency synthesis DDS module receives a reference clock REF-CLK from the local oscillator module, and under the control of an upper computer, the direct digital frequency synthesis DDS module generates a first path of point frequency continuous wave OUT1, a second path of point frequency continuous wave OUT2, a first path of intermediate frequency waveform signal OUT3 and a second path of intermediate frequency waveform signal OUT4, wherein the first path of point frequency continuous wave OUT1 and the second path of point frequency continuous wave OUT2 are output to the local oscillator module and are mixed with signals generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B which are output to the excitation frequency conversion module; the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module;

the excitation frequency conversion module receives Sub>A first local oscillation signal LO1-A, sub>A second local oscillation signal LO1-B, sub>A third local oscillation signal LO2-A, sub>A fourth local oscillation signal LO2-B, sub>A first intermediate frequency waveform signal OUT3 and Sub>A second intermediate frequency waveform signal OUT4, mixes the first local oscillation signal LO1-A, the third local oscillation signal LO2-A and the first intermediate frequency waveform signal OUT3, and generates Sub>A first radio frequency signal RF-A; the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 are mixed to generate a second RF signal RF-B.

Further, the dual-channel synchronous radar frequency source further comprises an upper computer, the upper computer is communicated with the direct digital frequency synthesis DDS module through an SPI (serial peripheral interface) serial port, and issues a control instruction to the direct digital frequency synthesis DDS module to control the operation work of the local oscillator module and the excitation frequency conversion module.

Further, the direct digital frequency synthesis DDS module and the local oscillator module generate a first local oscillator signal LO1-a and a second local oscillator signal LO1-B of a broadband through a comb spectrum generator, a frequency multiplier, a switch filter bank, and a mixer in a manner of combining direct frequency synthesis and direct digital frequency synthesis.

Further, the direct digital frequency synthesis DDS controls the fine step frequency hopping point, the frequency hopping precision is 0.1Hz, and both the direct frequency synthesis and the direct digital frequency synthesis can ensure phase consistency between channels, so that the first local oscillator signal LO1-a and the second local oscillator signal LO1-B can realize the fine step frequency hopping and the radio frequency synchronization.

Further, the direct digital frequency synthesis DDS module comprises an FPGA chip and a four-channel DDS chip; the FPGA chip adopts XC4VLX25-10SFG363I type FPGA of XILINX company, communicates with an upper computer through an SPI serial port, and is configured with four channels DDS to generate four paths of independent output signals; the model of the four-channel DDS chip is GM4943A.

Furthermore, the four-channel DDS chip is simultaneously used for fine step frequency hopping of a frequency source and generation of intermediate frequency, phase difference control among four channels is realized by adopting an on-chip synchronization mode, and the phase difference control is used for calibrating phase difference caused by hardware among the channels; and simultaneously, synchronous/asynchronous work of two paths of radio frequency signals is realized by adjusting the time sequence relation of two paths of trigger pulses.

Furthermore, the four-channel DDS chip has four independent DDS chips, each independent DDS chip has independently controlled phase, frequency and amplitude control words, and the maximum support is 2.5GHz sampling clock; the four-channel DDS chip supports the functions of multi-chip synchronization, linear scanning, nonlinear scanning, frequency keying, phase keying, amplitude control and RAM scanning.

Further, the direct digital frequency synthesis DDS module communicates with an upper computer through an SPI serial port, receives and analyzes a control instruction from the upper computer, controls a local oscillator module and a switch filter bank of an excitation frequency conversion module, configures a register of the direct digital frequency synthesis DDS module, starts to operate with REF-CLK as a sampling clock after receiving a working instruction, and outputs a first path of point frequency continuous wave OUT1, a second path of point frequency continuous wave OUT2, a first intermediate frequency waveform signal OUT3, and a second intermediate frequency waveform signal OUT4 according to the requirements of the whole machine.

Further, the excitation frequency conversion module receives signals of Sub>A first local oscillator signal LO1-A, sub>A third local oscillator signal LO2-A and Sub>A first intermediate frequency waveform signal OUT3, and outputs Sub>A first radio frequency signal RF-A after frequency mixing, filtering and amplifying; receiving a second local oscillation signal LO1-B, a fourth local oscillation signal LO2-B and a second intermediate frequency waveform signal OUT4 signal, and outputting a second radio frequency signal RF-B after frequency mixing, filtering and amplifying; the first local oscillator signal LO1-A and the second local oscillator signal LO1-B are in phase synchronization, and the phases of the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are controllable, so that the first radio frequency signal RF-A and the second radio frequency signal RF-B can realize radio frequency synchronization.

The invention also provides a working method of the double-channel synchronous radar frequency source, which specifically comprises the following steps:

step 1, an upper computer sends related frequency information to an FPGA of a direct digital frequency synthesis DDS module according to a convention format in an SPI communication mode, wherein the information comprises information of frequency points, code patterns, amplitudes and initial phases of two channels;

step 2, the FPGA of the direct digital frequency synthesis DDS module analyzes the received control instruction;

step 3, after the analysis is completed, the FPGA sends out parallel communication signals according to the analysis result to control the switch filter banks in the local oscillation module and the excitation frequency conversion module to work;

step 4, the FPGA of the direct digital frequency synthesis DDS module is communicated with a four-channel DDS chip, a register of the four-channel DDS chip is correspondingly configured, and the time for configuring the register is far longer than the parallel communication time;

and 5, after the configuration is finished, the four-channel DDS chip is in Sub>A waiting state, when the four-channel DDS chip receives Sub>A corresponding channel trigger pulse sent by an upper computer, the four-channel DDS chip generates Sub>A corresponding signal, and the pulse generation interval time corresponding to the four-channel DDS chip channel is set according to specific requirements, so that the synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B is realized.

Example 1

The synchronous dual-channel radar frequency source provided by the embodiment comprises a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module and an excitation frequency conversion module, wherein the local oscillator module comprises a comb spectrum generator, a filter and an amplifier, and the direct digital frequency synthesis (DDS) module comprises a frequency multiplier, a switch filter bank and a mixer;

the crystal oscillator module is connected with the local oscillator module through a radio frequency cable and provides a high-precision reference source for the local oscillator module;

the local oscillation module receives a reference source from the crystal oscillation module, and outputs a reference clock REF-CLK, a third local oscillation signal LO2-A and a fourth local oscillation signal LO2-B after passing through the comb spectrum generator, the filter and the amplifier, wherein the reference clock REF-CLK is output to the direct digital frequency synthesis DDS module, and the third local oscillation signal LO2-A and the fourth local oscillation signal LO2-B are output to the excitation frequency conversion module;

the direct digital frequency synthesis DDS module receives a reference clock REF-CLK from the local oscillator module, and under the control of an upper computer, the direct digital frequency synthesis DDS module generates a first path of point frequency continuous wave OUT1, a second path of point frequency continuous wave OUT2, a first path of intermediate frequency waveform signal OUT3 and a second path of intermediate frequency waveform signal OUT4, wherein the first path of point frequency continuous wave OUT1 and the second path of point frequency continuous wave OUT2 are output to the local oscillator module and are mixed with signals generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B which are output to the excitation frequency conversion module; the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module;

the excitation frequency conversion module receives Sub>A first local oscillation signal LO1-A, sub>A second local oscillation signal LO1-B, sub>A third local oscillation signal LO2-A, sub>A fourth local oscillation signal LO2-B, sub>A first intermediate frequency waveform signal OUT3 and Sub>A second intermediate frequency waveform signal OUT4, mixes the first local oscillation signal LO1-A, the third local oscillation signal LO2-A and the first intermediate frequency waveform signal OUT3, and generates Sub>A first radio frequency signal RF-A; the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 are mixed to generate a second RF signal RF-B.

Fig. 2 is a working schematic diagram of a local oscillation module, where the local oscillation module receives an externally input high-precision reference source, in this example, a 120MHz crystal oscillator of PF0C8-0110 is used as a reference source, and after passing through a comb spectrum generator, REF-CLK is generated and is output to a direct digital synthesis module after filtering as a DDS sampling clock, and in this example, the REF-CLK frequency is 2.4GHz; a 120MHz reference source frequency multiplication generated high-frequency signal is output as a third local oscillation signal LO2-A and a fourth local oscillation signal LO2-B after being filtered and power-divided and amplified; 120MHz is processed by a comb spectrum generator and a switch filter bank to generate a high-frequency signal Nf ₀ 、(N+a)f ₀ 、(N+2a)f ₀ 、(N+3a)f ₀ Wherein N, a is a positive integer, f ₀ For crystal frequencyThe rate, in this example, is 120MHz. When the switch filter bank selects channel 1, the output signal Nf ₀ The frequency is mixed with a first path of dot frequency continuous wave OUT1 output by a DDS channel, the OUT1 is used as a fine step hopping frequency point, the precision can reach 0.1Hz, the output bandwidth of OUT1 is af ₀ In the present example, a =3, and therefore the mixing produces a signal in the range f ₁ ～f ₁ +360MHz(f ₁ Is Nf ₀ Minimum value after mixing with OUT1 signal); when the switch filter bank selects channel 2, the signal range generated by mixing is f ₂ ～f ₂ +360MHz; when the switch filter bank selects channel 3, the signal range generated by mixing is f ₃ ～f ₃ +360MHz; when the switch filter bank selects the channel 4, the signal range generated by the mixing is f ₄ ～f ₄ +360MHz. According to the above definition f ₂ ＝f ₁ +360MHz，f ₃ ＝f ₂ +360MHz，f ₄ ＝f ₃ +360MHz, and the output range of the frequency point after final frequency mixing is f ₁ ～f ₁ And +1440MHz, which is amplified and output as a first local oscillator signal LO1-A and a second local oscillator signal LO1-B. Channel a works in the same way as channel B.

Fig. 3 is a block diagram of a four-channel DDS used in the example with four independent DDSs, each with independently controlled phase, frequency, amplitude control words, up to 2.5GHz sampling clock. The chip supports multi-chip synchronization, supports functions of linear scanning, nonlinear scanning, frequency keying, phase keying, amplitude control, RAM scanning and the like, fully utilizes the characteristics of the chip that four channels are independently adjustable, and the phase, frequency point and amplitude can be controlled, is applied to a multifunctional phased array radar frequency source, improves the integration level of the frequency source, effectively reduces the power consumption, and realizes the synchronous/asynchronous switching function between two channels.

Fig. 4 is a schematic structural diagram of a direct digital synthesis module, which communicates with an upper computer through an SPI serial port, receives a control instruction from the upper computer, analyzes the control instruction, controls a local oscillator module and a switch filter bank exciting a frequency conversion module, configures a DDS register, starts working with REF-CLK as a sampling clock after receiving a working instruction, and outputs a first channel of point-frequency continuous wave OUT1, a second channel of point-frequency continuous wave OUT2, a first intermediate-frequency waveform signal OUT3, and a second intermediate-frequency waveform signal OUT4 according to the requirements of the whole machine.

Fig. 5 is Sub>A schematic structural diagram of an excitation frequency conversion module, which receives LO1, LO2 and an intermediate frequency signal, and takes channel Sub>A as an example, first local oscillator signal LO 2-Sub>A and first intermediate frequency waveform signal OUT3 are mixed, filtered, and then the generated signal and first local oscillator signal LO 1-Sub>A are mixed, and after filtering and amplification, the resulting signal is output as Sub>A first radio frequency signal RF-Sub>A, and channel B is completely consistent with channel Sub>A.

FIG. 6 is an example of a design of the timing of the operation of the frequency source, by which the A, B channels can be switched between synchronous and asynchronous operation. The horizontal axis represents time period, and the vertical axis represents trigger timing of each signal. When the frequency source works, the upper computer sends related frequency information to the FPGA in an SPI communication mode according to a convention format, the information comprises information such as frequency points, code patterns, amplitudes and initial phases of two channels, the FPGA starts to analyze after transmission is completed, and the analyzing time is t ₁ In this example, the FPGA uses a 100MHz operating clock, t ₁ The clock period is 20 clock periods and is about 0.2 mu s, after the analysis is finished, the FPGA sends out parallel communication signals according to the analysis result to control a local oscillation module and a switch filter bank in an excitation frequency conversion module, meanwhile, the FPGA communicates with the DDS to correspondingly configure a DDS register, and the configuration time is t ₁ The time to configure the registers is much longer than for parallel communication, in this example, t ₁ The clock period is 100, about 1 mu s, the DDS is in a waiting state after configuration is finished, and when the DDS receives a corresponding channel trigger pulse sent by an upper computer, the DDS generates a corresponding signal. As shown in the figure, the DDS channels 1, 2, 3, 4 correspond to pulse generation intervals of time t ₃ 、t ₄ 、t ₅ 、t ₆ 。t ₃ 、t ₄ 、t ₅ 、t ₆ Can be set according to specific requirements, and when the working state is synchronized, t is set ₃ ＝t ₄ 、t ₅ ＝t ₆ Since the analog signal part is designed to be completely symmetrical and shares the reference source, the analog signal part is always in a synchronous state when t is ₃ ＝t ₄ LO1-A is synchronized with LO1-B, t ₅ ＝t ₆ And the synchronization of OUT3 and OUT4 can realize the synchronization of RF-A and RF-B. In the actual use process, a phase difference exists between the two links, the initial phase of the frequency point generated by the DDS can be adjusted, the error is compensated by solidifying in the program, and finally, the complete synchronization between the two channels is realized. And in the asynchronous working state, the trigger time sequence can be set at will according to the actual working requirement.

The above description is only a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that various modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be considered as the protection scope of the present invention.

Claims (10)

1. A dual-channel synchronous radar frequency source is characterized by comprising a crystal oscillator module, a direct digital frequency synthesis (DDS) module, a local oscillator module and an excitation frequency conversion module, wherein the local oscillator module comprises a comb spectrum generator, a filter and an amplifier, and the direct digital frequency synthesis (DDS) module comprises a frequency multiplier, a switch filter bank and a frequency mixer;

the crystal oscillator module is connected with the local oscillator module through a radio frequency cable to provide a high-precision reference source for the local oscillator module;

the local oscillation module receives a reference source from the crystal oscillation module, and outputs a reference clock REF-CLK, a third local oscillation signal LO2-A and a fourth local oscillation signal LO2-B after passing through the comb spectrum generator, the filter and the amplifier, wherein the reference clock REF-CLK is output to the direct digital frequency synthesis DDS module, and the third local oscillation signal LO2-A and the fourth local oscillation signal LO2-B are output to the excitation frequency conversion module;

the direct digital frequency synthesis DDS module receives a reference clock REF-CLK from the local oscillator module, and under the control of an upper computer, the direct digital frequency synthesis DDS module generates a first path of point frequency continuous wave OUT1, a second path of point frequency continuous wave OUT2, a first path of intermediate frequency waveform signal OUT3 and a second path of intermediate frequency waveform signal OUT4, wherein the first path of point frequency continuous wave OUT1 and the second path of point frequency continuous wave OUT2 are output to the local oscillator module and mixed with signals generated by the comb spectrum generator to generate a first local oscillator signal LO1-A and a second local oscillator signal LO1-B which are output to the excitation frequency conversion module; the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are directly output to the excitation frequency conversion module;

the excitation frequency conversion module receives Sub>A first local oscillation signal LO1-A, sub>A second local oscillation signal LO1-B, sub>A third local oscillation signal LO2-A, sub>A fourth local oscillation signal LO2-B, sub>A first intermediate frequency waveform signal OUT3 and Sub>A second intermediate frequency waveform signal OUT4, mixes the first local oscillation signal LO1-A, the third local oscillation signal LO2-A and the first intermediate frequency waveform signal OUT3, and generates Sub>A first radio frequency signal RF-A; the second local oscillator signal LO1-B, the fourth local oscillator signal LO2-B, and the second intermediate frequency waveform signal OUT4 are mixed to generate a second radio frequency signal RF-B.

2. The dual-channel synchronous radar frequency source according to claim 1, further comprising an upper computer, wherein the upper computer communicates with the direct digital frequency synthesis DDS module through an SPI serial port, and issues a control instruction to the direct digital frequency synthesis DDS module to control operation of the local oscillator module and the excitation frequency conversion module.

3. The dual-channel synchronous radar frequency source of claim 1, wherein the DDS module and the LO module generate wideband first LO1-a and second LO1-B local signals by a comb spectrum generator, a frequency multiplier, a switch filter bank, and a mixer by combining direct frequency synthesis and direct digital frequency synthesis.

4. The dual-channel synchronous radar frequency source of claim 3, wherein the DDS controls fine step hopping points, the frequency hopping precision is 0.1Hz, and both the direct frequency synthesis and the direct digital frequency synthesis ensure phase consistency between channels, thereby achieving fine step hopping and radio frequency synchronization of the first local oscillator signal LO1-A and the second local oscillator signal LO1-B.

5. The dual-channel synchronous radar frequency source according to claim 1, wherein the direct digital frequency synthesis (DDS) module comprises an FPGA chip and a four-channel DDS chip; the FPGA chip adopts XC4VLX25-10SFG363I type FPGA of XILINX company, communicates with an upper computer through an SPI serial port, and is configured with four channels DDS to generate four paths of independent output signals; the model of the four-channel DDS chip is GM4943A.

6. The dual-channel synchronous radar frequency source according to claim 5, wherein the four-channel DDS chip is used for fine step frequency hopping and intermediate frequency generation of the frequency source at the same time, and phase difference control among four channels is realized by adopting an on-chip synchronization mode, so as to calibrate phase difference caused by hardware among the channels; and simultaneously, synchronous/asynchronous work of two paths of radio frequency signals is realized by adjusting the time sequence relation of two paths of trigger pulses.

7. The dual-channel synchronous radar frequency source according to claim 6, wherein the four-channel DDS chip has four independent DDS chips, each independent DDS chip has independently controlled phase, frequency and amplitude control words, and supports a sampling clock of 2.5GHz at most; the four-channel DDS chip supports the functions of multi-chip synchronization, linear scanning, nonlinear scanning, frequency keying, phase keying, amplitude control and RAM scanning.

8. The dual-channel synchronous radar frequency source according to claim 1, wherein the DDS module is in communication with an upper computer through an SPI serial port, receives and parses a control command from the upper computer, controls a local oscillator module and a filter bank of a switch of an excitation frequency conversion module, and configures a register of the DDS module, and the DDS module starts to operate with REF-CLK as a sampling clock after receiving a working command, and outputs a first channel of point-frequency continuous waves OUT1, a second channel of point-frequency continuous waves OUT2, a first intermediate-frequency waveform signal OUT3, and a second intermediate-frequency waveform signal OUT4 according to a requirement of a complete machine.

9. The dual-channel synchronous radar frequency source of claim 1, wherein the excitation frequency conversion module receives Sub>A first local oscillator signal LO 1-Sub>A, sub>A third local oscillator signal LO 2-Sub>A and Sub>A first intermediate frequency waveform signal OUT3 signal, and outputs Sub>A first radio frequency signal RF-Sub>A after mixing, filtering and amplifying; receiving second local oscillation signals LO1-B, fourth local oscillation signals LO2-B and second intermediate frequency waveform signal OUT4 signals, and outputting a second radio frequency signal RF-B after frequency mixing, filtering and amplifying; the first local oscillator signal LO1-A and the second local oscillator signal LO1-B are in phase synchronization, and the phases of the first intermediate frequency waveform signal OUT3 and the second intermediate frequency waveform signal OUT4 are controllable, so that the radio frequency synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B is realized.

10. A method for operating a two-channel synchronous radar frequency source, the method being based on the two-channel synchronous radar frequency source described in any one of claims 1 to 9, comprising the steps of:

step 1, an upper computer sends related frequency information to an FPGA of a direct digital frequency synthesis DDS module according to a convention format in an SPI communication mode, wherein the information comprises information of frequency points, code patterns, amplitudes and initial phases of two channels;

step 2, the FPGA of the direct digital frequency synthesis DDS module analyzes the received control instruction;

step 3, after the analysis is completed, the FPGA sends out parallel communication signals according to the analysis result to control the switch filter banks in the local oscillation module and the excitation frequency conversion module to work;

step 4, the FPGA of the direct digital frequency synthesis DDS module is communicated with a four-channel DDS chip, a register of the four-channel DDS chip is correspondingly configured, and the time for configuring the register is far longer than the parallel communication time;

and 5, after the configuration is finished, the four-channel DDS chip is in Sub>A waiting state, when the four-channel DDS chip receives Sub>A corresponding channel trigger pulse sent by an upper computer, the four-channel DDS chip generates Sub>A corresponding signal, and the pulse generation interval time corresponding to the four-channel DDS chip channel is set according to specific requirements, so that the synchronization of the first radio frequency signal RF-A and the second radio frequency signal RF-B is realized.

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