CN115730541A - Multifunctional verification and demonstration device for packaged chip - Google Patents

Abstract

The invention relates to a multifunctional verification and demonstration device for a packaged chip, and belongs to the field of chip design. The device comprises a core verification demonstration chip, a 9054 bridging PCI interface chip, a set of 1/4M1553 bus transceiver and transformer and matched 1553 module, and an FMC interface circuit which is externally connected. The device can effectively reduce the complexity and maintenance degree of constructing the verification platform, enhance the reusability of the whole verification platform, reduce the verification difficulty and reduce the time.

Description

Multifunctional verification and demonstration device for packaged chip

Technical Field

The invention belongs to the field of chip design, and particularly relates to a multifunctional verification and demonstration device for a packaged chip.

Background

With the mass production and application of the multi-series and multi-model communication control SIP chips, higher application requirements are provided for the chips in application scenes of different models, a designer is required to enable a user to better know the advantages of the SIP chips of different types in a mode of fitting practical application, the usability of the communication control chip models can be clearly and accurately evaluated, and the invention can better perform multifunctional application verification on the chips of different types and provide hardware support for application verification of clients.

The demonstration device of traditional encapsulation chip can't integrate the application of multiple functions and verify, and the scheme demonstration and the verification need be carried out to multiple integrated circuit board to the chip of a type, consumes a large amount of funds to design the integrated circuit board of single type function on the one hand, and the integrated circuit board is comparatively complicated need be dismantled in the different function demonstration of on the other hand. The traditional method has the defects of large number of chips used for verification, insufficient resource utilization and poor reusability of the whole verification platform.

Disclosure of Invention

Technical problem to be solved

The invention aims to solve the technical problem of how to provide a multifunctional verification and demonstration device for a packaged chip so as to solve the problem that the traditional demonstration device for the packaged chip cannot integrate application verification of multiple functions.

(II) technical scheme

In order to solve the technical problem, the invention provides a multifunctional verification and demonstration device of a packaged chip, which comprises a core verification demonstration chip, a 9054 bridging PCI interface chip, a set of 1/4M1553 bus transceiver and transformer, a matched 1553 module and an FMC interface circuit which is externally connected, wherein the core verification demonstration chip is connected with the 1/4M1553 bus transceiver and the transformer;

the core verification demonstration chip is an SIP chip and comprises a DSP and an FPGA, the FPGA is connected with a 1/4M1553 bus transceiver, a transformer and a matched 1553 module and is simultaneously connected with a CAN network and a switching value module, the FPGA is also connected with an FMC interface circuit and an external power interface, double ports on the SIP chip are connected with a wiring board after being bridged by a 9054 bridging PCI interface chip, and the 1/4M1553 bus transceiver, the transformer and the matched 1553 module are connected with the wiring board after being connected by a CPCI bus.

Further, the device is designed in a 6UCPCI bus mode, and the size of a 6U standard board card is used.

Furthermore, the board card adopts a design mode of a motherboard, and chips with different types and similar functions are replaced by disassembling the daughter board socket.

Furthermore, according to the type of the chip, a specified IP core is moved in through a built-in FPGA of the chip to provide standard 1M and 4M1553B bus functions for a user.

Furthermore, a numbered switching value and a digital-to-analog conversion IP core are shifted into the FPGA in the chip, so that the device realizes the switching value and AD conversion function logic of the demonstrated chip.

Furthermore, the device introduces power supply to the chip through a front-end external power supply port, and 5V power supply is provided for the device through a built-in FPGA.

Furthermore, the device supplies power to the device in a CPCI bus connection mode at the rear end, and the device adopts a dual-power protection module.

Furthermore, the device also comprises a JTAG interface, a DSP and an FPGA simulator which are used for realizing online debugging and software programming of related circuits.

Further, the device adopts SM9054 type PCI bridge circuit, programmable local bus, 32-bit address/data supporting non-multiplexing and 8-bit, 16-bit or 32-bit local bus slave operation; the support serial EEPROM interface is used for loading configuration information; the VPD function is supported, and a configuration mode except for expanding the ROM is provided.

Furthermore, one section of the FMC interface is connected to the FPGA port of the chip through the general IO interface of the device, and the other end of the FMC interface can be connected to the CPCI bus to achieve the function of multiple general IO interfaces.

(III) advantageous effects

The invention provides a multifunctional verification and demonstration device for a packaged chip, which can effectively reduce the complexity and maintenance degree of constructing a verification platform, enhance the reusability of the whole verification platform, reduce the verification difficulty and reduce the time.

Drawings

FIG. 1 is a block diagram of a multi-functional verification and demonstration apparatus for a packaged chip according to the present invention;

FIG. 2 is a diagram of the hardware effect of the integrated board card of the device of the present invention;

FIG. 3 is a schematic diagram of the FMC interface hardware of the apparatus of the present invention;

FIG. 4 is a schematic diagram of the voltage control of the power supply chip of the device of the present invention;

fig. 5 is a schematic diagram of a device backplane CPCI connector of the present invention.

Detailed Description

In order to make the objects, contents and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.

The invention provides a multifunctional verification and demonstration method of an SIP chip, which fully considers the application scene of the SIP chip and can independently verify peripheral equipment of a DSP and an IP interface commonly used by an FPGA.

The invention relates to a standard board card for multifunctional verification of an SIP chip, which is developed based on a case capable of inserting a 6U board card, the whole structure is designed in a 6UCPCI bus form, and the size of the 6U standard board card is used, so that the standard board card can be easily adapted to an external application case. The adaptability of the board card is enhanced, and the design risk of an external case is reduced.

The invention provides a chip verification method and a chip verification device, and further solves the problems of poor reusability and difficult maintenance of a traditional chip verification demonstration function board.

The schematic structure block diagram of the device is shown in fig. 1, and the 6U board card comprises a core verification demonstration chip, a 9054 bridging PCI interface chip, a set of 1/4M1553 bus transceiver and transformer, a matched 1553 module and an FMC interface circuit which is externally connected.

The core verification demonstration chip is an SIP chip and comprises a DSP and an FPGA, the FPGA is connected with a 1/4M1553 bus transceiver, a transformer and a matched 1553 module and is simultaneously connected with a CAN network and a switching value module, the FPGA is also connected with an FMC interface circuit and an external power interface, double ports on the SIP chip are connected with a wiring board after being bridged by a 9054 bridging PCI interface chip, and the 1/4M1553 bus transceiver, the transformer and the matched 1553 module are connected with the wiring board after being connected by a CPCI bus.

The integrated circuit board of the device can adopt the design mode of the motherboard, can change different types, similar chip of function through dismantling daughter board socket, can effectively improve the device's rate of reusability, reduces the development and development risk, reduces the research and development cost, avoids receiving the chip type to the integrated circuit board and brings too much restriction.

The invention develops design and development by fully depending on practical application, can provide standard 1M and 4M1553B bus functions for users by integrally moving the chip into a specified IP core through the FPGA built in the chip according to the type of the chip, can clearly demonstrate the similar functions of the chip, and can facilitate the verification of the functions by the users.

The device can also realize the functional logics of the switching value, the AD conversion and the like of the demonstrated chip by transferring the numbered switching value and the IP core of the digital-to-analog conversion into the FPGA in the chip, thereby increasing the diversity of the scheme verification.

The device adopts two types of power supply modes, the first mode is that a front-end external power supply port is introduced into a chip, 5V power supply can be realized for the device through a built-in FPGA, and the second mode can be used for supplying power for the device through a CPCI bus connection mode at the rear end.

The device is to avoid irreversible damage to the chip caused by simultaneous operation of two power supply modes, and also to adopt a dual-power protection module to avoid the chip damage possibly caused by overlarge power supply voltage at the same time.

The device can also provide a standard JTAG interface, comprising an emulator of DSP and FPGA, for realizing the online debugging and software programming functions of related circuits.

The device CAN lead out universal serial interfaces such as a CAN bus, RS232 and the like, so that a user CAN conveniently verify the performance of the chip in various aspects.

Sufficient IO interface also is left to the device's built-in chip, through FMC interface connection to the built-in FPGA of chip, configuration external logic that can relax, the many IO of FMC quantity is sufficient simultaneously, closely arranges, and the space occupies fewly, and convenience of customers self-defined function integrated circuit board uses rather than the butt joint.

The device can ensure that part of built-in functions are verified and regulated by the configuration mode of the CPCI bus and the configuration of FPGA codes directly through an external case connected with the board card.

The device adopts an SM9054 PCI bridging circuit, a programmable local bus, supports non-multiplexing 32-bit address/data and 8-bit, 16-bit or 32-bit local bus slave operation; data transmission between the PCI and the local bus is up to 132Mb/s; the system supports a serial EEPROM interface and can be used for loading configuration information; the VPD function is supported, and a configuration mode except for expanding the ROM is provided.

The general IO interface of the device adopts an FMC middle layer board card, one section of the FMC interface is connected to an FPGA port of a chip, and the other end of the FMC interface can be connected to a CPCI bus to realize the function of multiple general IO interfaces.

The device can change the type of the verification chip in a mother-son board mode, a single device can verify various chips, the reusability of the device is improved, and the development time and the fund of board cards with different chip types are reduced.

The device has small component size, low power consumption, high flexibility and capability of performing advanced function expansion according to different chip types

The device CAN realize the verification of various functions such as 1553, switching value, CAN and the like of different types of chips by one single chip.

The device can be matched with an external specific case to realize power supply and logic control on 1553, switching value, AD conversion and the like in a CPCI bus mode, and the influence of an external environment on the demonstration and verification of the whole chip is simplified.

The power supply is realized in two ways, so that the verification development of the chip under multiple environments is effectively enhanced.

The FMC interface led out by the device is directly mounted in an IO interface mode, functions of logic writing, data monitoring and the like can be performed on a chip to be verified through the FPGA, experience and resources of design can be reduced to the maximum extent, functional verification demonstration except for set functions is added, and multi-angle verification on the chip is enhanced.

The device can effectively reduce the complexity and maintenance degree of constructing the verification platform, enhance the reusability of the whole verification platform, reduce the verification difficulty and reduce the time.

The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (10)

1. A multifunctional verification and demonstration device for a packaged chip is characterized by comprising a core verification demonstration chip, a 9054 bridging PCI interface chip, a set of 1/4M1553 bus transceiver and transformer and matched 1553 module, and an FMC interface circuit which is externally connected;

the core verification demonstration chip is an SIP chip and comprises a DSP and an FPGA, the FPGA is connected with a 1/4M1553 bus transceiver, a transformer and a matched 1553 module and is simultaneously connected with a CAN network and a switching value module, the FPGA is also connected with an FMC interface circuit and an external power interface, double ports on the SIP chip are connected with a wiring board through a 9054 bridging PCI interface chip, and the 1/4M1553 bus transceiver, the transformer and the matched 1553 module are connected with the wiring board through a CPCI bus.

2. The packaged chip multi-functional verification and demonstration device of claim 1 wherein the device is designed using a 6U CPCI bus format using 6U standard board card size.

3. The packaged chip multifunctional verification and demonstration apparatus according to claim 2 wherein the board card is designed as a motherboard, and different types of chips with similar functions are replaced by disassembling the daughter board socket.

4. The packaged chip multi-function verification and demonstration device of claim 1 wherein standard 1M, 4M1553B bus functions are provided to the user by the on-chip FPGA being moved into a designated IP core according to the chip type.

5. The packaged chip multifunctional verification and demonstration device according to claim 1, wherein numbered switching values and digital-to-analog conversion IP cores are shifted in the on-chip FPGA, so that the device realizes the switching values and AD conversion function logic of the demonstrated chip.

6. The packaged chip multifunctional verification and demonstration device according to claim 1, wherein the device is powered by introducing power to the chip through a front end external power port, and 5V power supply is provided to the device through a built-in FPGA.

7. The packaged-chip multifunctional verification and demonstration device of claim 6 wherein the device is powered by means of a CPCI bus connection at the back end and employs a dual power protection module.

8. The packaged chip multifunctional verification and demonstration device of claim 1, further comprising JTAG interface, DSP and FPGA emulators for implementing online debugging and software programming of related circuits.

9. The packaged-chip multi-function verification and demonstration device of claim 1 wherein the device employs a SM9054 PCI bridge, a programmable local bus, supports non-multiplexed 32-bit address/data, and 8-bit, 16-bit or 32-bit local bus slave operations; the support serial EEPROM interface is used for loading configuration information; the VPD function is supported, and a configuration mode except for expanding the ROM is provided.

10. The packaged chip multifunctional verification and demonstration device according to claim 1, wherein the device general IO interface connects one section of the FMC interface to the FPGA port of the chip, and the other end of the FMC interface can be connected to the CPCI bus to realize the function of the multiple general IO interfaces.

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