CN115729859A

CN115729859A - Method and corresponding device for managing dynamic library

Info

Publication number: CN115729859A
Application number: CN202111022840.4A
Authority: CN
Inventors: 林强敏; 周康; 李修昶
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2021-09-01
Filing date: 2021-09-01
Publication date: 2023-03-03
Also published as: WO2023030173A1

Abstract

The application discloses a method for managing a dynamic library, which is applied to a computer system. The method comprises the following steps: applying for at least one large page memory for the application program marked as the large page mode; mapping a dynamic library depended by an application program to a virtual address space corresponding to at least one large-page memory; and loading the dynamic library to at least one large-page memory when the application program is operated. According to the scheme provided by the embodiment of the application, the dynamic library is loaded by using the large-page memory, so that the hit rate of inquiring the TLB can be improved.

Description

Method and corresponding device for managing dynamic library

Technical Field

The application relates to the technical field of computers, in particular to a method and a corresponding device for managing a dynamic library.

Background

With the development of software technology, software architecture in the field of Communication Technology (CT) is also turning to service. The core competitiveness in the communication technology field is performance, and in order to facilitate software development and deployment, many applied software is based on a dynamic library to realize the dynamic editing capability of service.

The dynamic library is usually provided by a third party and is generally stored in a dynamic library resource pool, and when compiling the software of the application, the required dynamic library can be loaded from the dynamic library resource pool to complete the software development of the application. When the software of the application is developed, the dynamic library is not compiled into the object code of the application by a generic product, but only marked, and the corresponding dynamic library is loaded into the internal memory of the application after the software of the application is started and operated.

The loaded dynamic library is stored in a plurality of 4K physical pages of the memory, and when the computer system calls the dynamic library, the computer system needs to query the page table entry of the physical page where the dynamic library is located, so as to access the corresponding physical page. The page table entry of the physical page is stored in the page table, but the page table entry of the physical page that has been accessed recently is also cached in the address translation buffer (TLB), because the query overhead of the page table is very large, the computer system will query the TLB first, and if the query hits, that is, the TLB includes the queried page table entry, the corresponding physical page can be directly accessed according to the queried page table entry, and the dynamic library to be invoked is invoked. If the query is not hit (TLB miss), the page table needs to be queried, which may cause a large query overhead and affect the memory access performance.

Disclosure of Invention

The application provides a method for managing a dynamic library, which is used for improving the hit rate of querying a Translation Lookaside Buffer (TLB). Corresponding apparatus, computer device, computer readable storage medium and computer program product, etc. are also provided.

The present application provides a method for managing a dynamic library, which is applied to a computer system, where the computer system may be a server, a terminal device, a Virtual Machine (VM) or a container (container). The method comprises the following steps: applying for at least one large page memory for the application program marked as the large page mode; mapping a dynamic library which is depended by an application program to a virtual address space corresponding to at least one large-page memory; and loading the dynamic library into at least one large-page memory when the application program is operated.

In this application, a dynamic library is also called a Dynamic Link Library (DLL), where a DLL is a library containing code and data that can be used by multiple programs simultaneously, and a dynamic library can also be understood as a file or a function in an Executable and Linkable Format (ELF). Dll is suffixed to Windows, and so is the dynamic library under linux.

In this application, an application refers to executable code configured to implement an application or implement a service.

In this application, a large page (also called a large page memory) refers to a physical page that is many times larger than 4K, such as: page 2M, page 1G. The large page mode may be an indication that the application needs to use large page memory.

In this application, the dynamic library on which an application depends refers to the dynamic library that the application will use when running.

In this application, a virtual address space refers to a range of virtual addresses corresponding to at least one large page of memory.

In the present application, loading a dynamic library into at least one large-page memory refers to loading/copying the code and data of the dynamic library into at least one large-page memory.

In the first aspect, a large-page memory is used for storing the dynamic library, so that the number of large pages occupied by the dynamic library with the same size is much smaller than the number of 4K physical pages, after page table entries of the large pages are cached in the TLB, the page table entries of the dynamic library can not be deleted quickly because of excessive page table entries in the TLB, when the application program or other application programs call the dynamic library, the page table entries of the dynamic library can be inquired in the TLB, and the hit rate of inquiring the TLB is improved.

In the application, the TLB includes an instruction translation buffer (TLB) and a data translation buffer (dTLB), and the dynamic library includes a code segment and a data segment, where a page table entry of the code segment may be cached in the TLB, and a large-page memory is used to store the code segment, so that a hit rate for querying the TLB may be improved.

In a possible implementation manner of the first aspect, when there are at least two dynamic libraries on which the application depends, the foregoing steps: mapping a dynamic library relied on by an application program to a virtual address space corresponding to at least one large-page memory, comprising: and mapping at least two dynamic libraries depended by the application program to a virtual address space corresponding to at least one large-page memory in sequence, wherein the end address of the first dynamic library in the virtual address space and the start address of the second dynamic library in the virtual address space are continuous or are positioned in two continuous 4K virtual pages of the virtual address space, and the first dynamic library and the second dynamic library are two dynamic libraries continuously mapped to the virtual address space in the at least two dynamic libraries.

The steps are as follows: loading a dynamic library into at least one large-page memory while running an application, comprising: when the application program is running, at least two dynamic libraries are loaded to at least one large-page memory in sequence, wherein the ending address of the first dynamic library in the at least one large-page memory and the starting address of the second dynamic library in the at least one large-page memory are continuous or are positioned in two continuous 4K physical pages of the at least one large-page memory.

In this possible implementation manner, when there are at least two dynamic libraries relied on by the application program, the at least two dynamic libraries are mapped to the virtual address space first according to the sequence of calling the dynamic libraries when the application program runs, and the addresses in the virtual address space of the two dynamic libraries adjacent to each other in the mapping sequence may be consecutive, or the end address of the first dynamic library in the virtual address space and the start address of the second dynamic library in the virtual address space are located in two consecutive 4K virtual pages. According to the method and the device, the mapping addresses are continuous or positioned in two continuous 4K virtual pages, so that the splicing of at least two dynamic libraries in the large-page memory is realized, and the utilization rate of the large-page memory is improved.

In a possible implementation manner of the first aspect, each of the at least two dynamic libraries includes a code segment and a data segment, and the steps of: sequentially loading at least two dynamic libraries into at least one large-page memory, including:

when the code segment and the data segment of each dynamic library are loaded into at least one large-page memory, the code segment of each dynamic library is continuously stored in the at least one large-page memory, and the data segment of each dynamic library is continuously stored in the at least one large-page memory.

In this possible implementation, each dynamic library may include a code segment (@ text), a data segment (@ data), and a BSS segment (@ BSS). A code segment (. Text) is a collection of executable instructions; the data segment (# data) and BSS segment (# BSS) are collections of data, where the data segment (# data) represents data that has been initialized and the BSS segment (# BSS) represents data that has not been initialized. From an executable point of view, if a piece of data is not initialized, there is no need to allocate space for it, so the difference between data and bss is that bss do not occupy the size of the executable file, only recording how much space is needed to store these uninitialized data, and do not allocate real space.

In the present application, the data segment includes a data segment (# data) and a BSS segment (# BSS).

In the application, the code segments of each dynamic library are continuously stored in at least one large-page memory, and the data segments of each dynamic library are continuously stored in at least one large-page memory, so that when the code segments in a certain large page are loaded into the cache, the probability that the continuous code segments are simultaneously loaded into the instruction cache is improved.

In a possible implementation manner of the first aspect, the method further includes: according to the function address of a first dynamic library, modifying an original address of a calling initiation position of a calling function calling the first dynamic library, wherein the first dynamic library is one of dynamic libraries depended by an application program, and the calling function is contained in the application program or other dynamic libraries depended by the application program; and when the first dynamic library is called by running the calling function, calling the first dynamic library according to the function address of the first dynamic library at the calling initiating position.

In this possible implementation, the call function (call function) is used to initiate a call to the first dynamic library, and the call initiation position refers to a position in the call function where the call is initiated to the first dynamic library. In the prior art, an original address of a call initiation location of a call function is usually an address of a Process Link Table (PLT), and then, the call initiation location of the call function jumps to the PLT through the address of the PLT, jumps to a Global Offset Table (GOT) through the PLT, and calls to a corresponding dynamic library through the GOT, so that the execution efficiency of a processor on an instruction is influenced through two jumps. In the application, the function address of the first dynamic library is directly modified to the call initiation position of the call function to replace the original address of the call initiation position, so that when the call function is executed to call the first dynamic library, the function address of the first dynamic library at the call initiation position can be directly called to the first dynamic library, which is equivalent to realizing the direct connection from the call function to the first dynamic library function, and two jumps of PLT and GOT are not needed, thereby improving the execution efficiency of the processor on the instruction.

In a possible implementation manner of the first aspect, the method further includes: and determining the calling initiation position of the calling function to the first dynamic library by using a relocation table, wherein the relocation table comprises the calling initiation position of the calling function calling the first dynamic library.

In this possible implementation manner, the call initiation positions of all call functions in the application program or the corresponding dynamic library to the respective dynamic libraries are recorded in the relocation table, and therefore, the call initiation positions can be quickly determined by using the relocation table.

In a possible implementation manner of the first aspect, the method further includes:

when compiling the calling function, saving the calling initiation position of the calling function calling the first dynamic library into the relocation table.

In this possible implementation manner, in the application program compiling stage or the dynamic library compiling stage, when the calling function is compiled into the dynamic library, the calling initiation position of the calling function is saved into the relocation table.

In a possible implementation manner of the first aspect, the method further includes: when a calling function is operated, the position information of the next instruction of the calling function calling the first dynamic library for the first time is pressed into a stack; determining a calling initiation position for calling a function to call a first dynamic library according to the position information of the next instruction in the stack; and saving the calling initiation position of the calling function to the first dynamic library into the relocation table.

In this possible implementation manner, the application program may also be referred to as an application process in the operation stage, and in the application program operation stage, when the call function is run, the location information of the next instruction of the call function is pushed into the stack, so that the call initiation location where the call function calls the first dynamic library may be determined according to the location information of the next instruction in the stack, and the call initiation location where the call function calls the first dynamic library is stored in the relocation table.

In a possible implementation manner of the first aspect, the method further includes: when the calling function is loaded, scanning a code segment of the calling function to acquire a calling initiating position of the calling function for calling the first dynamic library; and saving the calling initiation position of the calling function to the first dynamic library into a relocation table.

In this possible implementation manner, the code segment of the calling function is scanned to determine the calling initiation position of the calling function for calling the first dynamic library, so as to obtain the relocation table including the calling initiation position of the calling function for calling the first dynamic library.

In a possible implementation manner of the first aspect, the method further includes: uninstalling a second dynamic library of the dynamic libraries on which the application depends; and clearing a plurality of 4K virtual pages corresponding to the second dynamic library on the bitmap, wherein the bitmap records the mapping positions of the dynamic libraries depended by the application program in the virtual address space by taking the 4K virtual pages as granularity.

In this possible implementation manner, in the application program running phase, the unloading and loading of the dynamic library also frequently occur, and in order to facilitate management of the use of the dynamic library for the virtual address space and the large-page memory, the dynamic library is managed by using a bitmap of a 4K virtual page in the present application. In the bitmap, the virtual addresses occupied by the dynamic libraries are recorded for 4K as granularity, and after the second dynamic library is unloaded, the bitmap is emptied of the recording information of the second dynamic library on the 4K virtual page corresponding to the second dynamic library.

In a possible implementation manner of the first aspect, the method further includes: mapping a third dynamic library in a virtual address space which is vacant by the second dynamic library; and recording the mapping relation between the third dynamic library and the corresponding virtual address space on the bitmap.

In this possible implementation manner, after the second dynamic library is unloaded, a blank virtual address space is left, and when a new third dynamic library is loaded, the third dynamic library may be mapped to the virtual address space left by unloading of the second air conditioner library, so that the utilization rate of the virtual address space may be improved.

In a possible implementation manner of the first aspect, the method further includes: and when the virtual address space corresponding to any large-page memory in the at least one large-page memory is completely in an idle state, releasing any large-page memory.

In this possible implementation manner, when the virtual address space corresponding to one or more large-page memories is all in an idle state, the one or more large-page memories may be released, thereby improving the utilization rate of the large-page memories.

A second aspect of the present application provides an apparatus for managing a dynamic library, which has a function of implementing the method according to the first aspect or any one of the possible implementation manners of the first aspect. The function can be realized by hardware, and can also be realized by executing corresponding software by hardware. The hardware or software includes one or more modules corresponding to the above functions, such as: a first processing unit, a second processing unit, a third processing unit and a fourth processing unit, which may be implemented by one processing unit or a plurality of processing units.

A third aspect of the present application provides a computer device, which includes at least one processor, a memory, an input/output (I/O) interface, and computer-executable instructions stored in the memory and executable on the processor, wherein when the computer-executable instructions are executed by the processor, the processor performs the method according to the first aspect or any one of the possible implementation manners of the first aspect.

A fourth aspect of the present application provides a computer-readable storage medium storing one or more computer-executable instructions that, when executed by a processor, cause the one or more processors to perform a method according to the first aspect or any one of the possible implementations of the first aspect.

A fifth aspect of the present application provides a computer program product storing one or more computer-executable instructions that, when executed by one or more processors, cause the one or more processors to perform a method according to the first aspect or any one of the possible implementations of the first aspect.

A sixth aspect of the present application provides a chip system, where the chip system includes at least one processor, and the at least one processor is configured to support an apparatus for managing a dynamic library to implement the functions recited in the first aspect or any one of the possible implementations of the first aspect. In one possible design, the system-on-chip may further include a memory, the memory being for storing program instructions and data necessary for the means for managing the dynamic library. The chip system may be formed by a chip, or may include a chip and other discrete devices.

Drawings

FIG. 1 is a schematic diagram of an embodiment of a computer system provided in the embodiments of the present application;

FIG. 2 is a schematic diagram of an embodiment of a method for managing a dynamic library provided in an embodiment of the present application;

FIG. 3 is a schematic diagram illustrating a scenario of a method for managing a dynamic library according to an embodiment of the present disclosure;

FIG. 4A is a schematic diagram of an example of a method for managing a dynamic library according to an embodiment of the present application;

FIG. 4B is a schematic diagram illustrating another example of a method for managing a dynamic library provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of another example of a method for managing a dynamic library provided in an embodiment of the present application;

FIG. 6A is a schematic diagram of another example of a method for managing a dynamic library according to an embodiment of the present application;

FIG. 6B is a diagram illustrating another example of a method for managing a dynamic library according to an embodiment of the present application;

FIG. 7A is a schematic diagram of another example of a method for managing a dynamic library according to an embodiment of the present application;

FIG. 7B is a diagram illustrating another example of a method for managing a dynamic library according to an embodiment of the present application;

FIG. 8 is a schematic diagram of another example of a method for managing a dynamic library provided by an embodiment of the present application;

FIG. 9 is a schematic diagram of another example of a method for managing a dynamic library provided by an embodiment of the present application;

FIG. 10 is a schematic diagram of another example of a method for managing a dynamic library provided by an embodiment of the present application;

FIG. 11 is a block diagram of an apparatus for managing dynamic libraries according to an embodiment of the present disclosure;

fig. 12 is a schematic structural diagram of a computer device provided in an embodiment of the present application.

Detailed Description

Embodiments of the present application will now be described with reference to the accompanying drawings, and it is to be understood that the described embodiments are merely illustrative of some, but not all, embodiments of the present application. As can be known to those skilled in the art, with the development of technology and the emergence of new scenes, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

The terms "first," "second," and the like in the description and in the claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be implemented in other sequences than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The embodiment of the present application provides a method for managing a dynamic library, which is used to improve the hit rate of querying a Translation Lookaside Buffer (TLB). The application also provides a corresponding apparatus, a computer device, a computer readable storage medium, a computer program product and the like. The following are detailed below.

The method for managing a dynamic library provided in the embodiment of the present application is applied to a computer system, where the computer system may be a server, a terminal device, or a Virtual Machine (VM) or a container (container).

A terminal device (also referred to as User Equipment (UE)) is a device with a wireless transceiving function, and can be deployed on land, including indoors or outdoors, and handheld or vehicle-mounted; can also be deployed on the water surface (such as a ship and the like); and may also be deployed in the air (e.g., airplanes, balloons, satellites, etc.). The terminal may be a mobile phone (mobile phone), a tablet computer (pad), a computer with a wireless transceiving function, a Virtual Reality (VR) terminal, an Augmented Reality (AR) terminal, a wireless terminal in industrial control (industrial control), a wireless terminal in self driving (self driving), a wireless terminal in remote medical (remote medical), a wireless terminal in smart grid (smart grid), a wireless terminal in transportation safety (transportation safety), a wireless terminal in smart city (smart city), a wireless terminal in smart home (smart home), and the like.

The architecture of the computer system can be understood with reference to fig. 1. FIG. 1 is a schematic diagram of an architecture of a computer system.

As shown in FIG. 1, the architecture of the computer system includes a user layer 10, an operating system 20, and a hardware layer 30.

The user layer 10 includes a plurality of Applications (APPs), each of which may include one or more business microservices, and each business microservice may correspond to an operation, such as: an application related to a user login scene comprises two micro services, wherein the first service micro service can be used for processing user login and modifying the state of a user into a login state, and the second service micro service can be a service micro service for recording flow and recording the flow used for modifying the state of the user at this time.

An Operating System (OS) 20 is used to load and run application programs for each application. The operating system 20 includes a user mode and a kernel mode, and when the operating system 20 loads an application program, the kernel mode applies for a memory for the application program, loads a file in an Executable and Linkable Format (ELF) of the application program, and then switches to a process in which the user mode executes a dynamic library interpreter to load a dynamic library. When the dynamic library interpreter loads the dynamic library, the dynamic library is mapped to the virtual address space, and then the dynamic library is loaded to the physical memory when the application program runs.

The dynamic library is also called a Dynamic Link Library (DLL), where the DLL is a library containing code and data that can be used by multiple programs simultaneously, and the dynamic library can also be understood as a file or a function in an Executable and Linkable Format (ELF). The suffix of the dynamic library under Windows is.dll, and the suffix of the dynamic library under linux is.so.

The hardware layer 30 includes a communication interface, a processor, a physical memory, a Memory Management Unit (MMU), a bus, and the like. The communication interface, processor, physical memory, and MMU are connected by a bus. The processor may comprise, among other things, any type of general purpose computing circuitry or special purpose logic circuitry, such as: a field-programmable gate array (FPGA) or an Application Specific Integrated Circuit (ASIC). Or may be one or more processors, such as a Central Processing Unit (CPU), coupled to one or more semiconductor substrates. The physical memory may be configured as multiple memory spaces.

An MMU is a piece of computer hardware responsible for processing memory access requests from a Central Processing Unit (CPU). Its functions include virtual to physical address translation, memory protection, control of the CPU cache, etc.

Based on the computer system, the embodiment of the application provides a method for managing a dynamic library. As shown in fig. 2, an embodiment of the method for managing a dynamic library provided in the embodiment of the present application includes:

101. the computer system applies for at least one large page of memory for the application marked as large page mode.

In the embodiments of the present application, an application refers to executable code configured to implement an application or implement a service.

In the embodiment of the present application, a large page (also called a large page memory) refers to a physical page that is larger than 4K times, for example: page 2M, page 1G. The large page mode may be an indication that the application needs to use large page memory.

102. The computer system maps the dynamic library relied on by the application program to a virtual address space corresponding to at least one large page memory.

In the embodiment of the present application, the dynamic library on which the application depends refers to a dynamic library to be used by the application when the application runs.

In the embodiment of the present application, the virtual address space refers to a range of virtual addresses corresponding to at least one large page memory.

103. When the computer system runs the application program, the dynamic library is loaded to at least one large-page memory.

The process of steps 101 to 103 described above can also be understood with reference to the scenario example shown in fig. 3. As shown in fig. 3, the computer system is to load an application a, and recognizes that the application is marked as a big page mode, where the marking may be an identifier that sets the big page mode at a specified position of the application, such as: the label of the Hugepage may be other labels indicating a large page. The computer system applies for a large page memory from the MMU for the application A in the kernel mode, and the MMU reserves a plurality of 2M physical pages for the application A in the physical memory. Then, the computer system maps the dynamic library depended by the application program to the virtual address space corresponding to the multiple 2M physical pages, and loads the dynamic library into one or multiple 2M physical pages when the application program runs.

In the embodiment of the application, the large-page memory is used for storing the dynamic library, so that the number of large pages occupied by the dynamic library with the same size is much smaller than the number of 4K physical pages, after the page table entries of the large pages are cached in the TLB, the page table entries of the dynamic library can not be quickly deleted because of excessive page table entries in the TLB, when the application program or other application programs call the dynamic library, the page table entries of the dynamic library can be inquired in the TLB, and the hit rate of inquiring the TLB is improved.

Optionally, when there are at least two dynamic libraries on which the application depends, the solution of the embodiment of the present application includes:

and mapping at least two dynamic libraries depended by the application program to a virtual address space corresponding to at least one large-page memory in sequence, wherein the end address of the first dynamic library in the virtual address space and the start address of the second dynamic library in the virtual address space are continuous or are positioned in two continuous 4K virtual pages of the virtual address space, and the first dynamic library and the second dynamic library are two dynamic libraries continuously mapped to the virtual address space in the at least two dynamic libraries.

And when the application program is operated, sequentially loading at least two dynamic libraries into at least one large-page memory, wherein the ending address of the first dynamic library in the at least one large-page memory and the starting address of the second dynamic library in the at least one large-page memory are continuous or are positioned in two continuous 4K physical pages of the at least one large-page memory.

The mapping of at least two dynamic banks to the virtual address space may be a sequential mapping of two adjacent dynamic banks, as shown in fig. 4A, after a first dynamic bank is mapped to a plurality of 4K virtual pages of a plurality of virtual address spaces, an end address of the first dynamic bank is located in a middle position of the 4K virtual page 40, and a start address of a second dynamic bank may map the second dynamic bank from an address sequential to the middle position of the 4K virtual page 40. The continuous mapping mode can improve the utilization rate of the virtual address space.

The mapping of the at least two dynamic banks into the virtual address space may be performed such that the end address and the start address of two adjacent dynamic banks are located in two adjacent 4K virtual pages, as shown in fig. 4B, after the first dynamic bank is mapped to the plurality of 4K virtual pages of the plurality of virtual address spaces, the end address of the first dynamic bank is located in the 4K virtual page 40, and the second dynamic bank may map the second dynamic bank from the 4K virtual page 50 adjacent to the 4K virtual page 40, that is, the start address of the second dynamic bank is located in the 4K virtual page 50. The method of mapping the dynamic library according to the integral multiple of the 4K virtual page is beneficial to improving the convenience of virtual address space management.

When there are multiple dynamic libraries, the multiple dynamic libraries may be mapped by using any one of the mapping manners shown in fig. 4A or fig. 4B, or by using a combination of the two mapping manners.

The process of sequentially loading at least two dynamic libraries into at least one large page memory while running an application can be understood with reference to fig. 5. As shown in fig. 5, a first dynamic library is loaded into a 2M physical page, the first dynamic library occupies 2M physical page 1 and a part of 2M physical page 2, and the second dynamic library can be loaded from 2M physical page 2 by using any one of the methods shown in fig. 4A and 4B. According to the method and the device, the mapping addresses are continuous or positioned in two continuous 4K physical pages, so that the splicing of at least two dynamic libraries in the large-page memory is realized, and the utilization rate of the large-page memory is improved.

Optionally, each of the at least two dynamic libraries includes a code segment (·) and a data segment, in an embodiment of the present application, the code segment (·) is a set of executable instructions, and the data segment is a set of data, and in an embodiment of the present application, the data segment includes a data segment (·) and a BSS segment (·) where the data segment (·) represents initialized data and the BSS segment (·) represents uninitialized data. From an executable point of view, if a piece of data is not initialized, there is no need to allocate space for it, so the difference between data and bss is that the bss do not take up the size of the executable file, just recording how much space is needed to store these uninitialized data, and do not allocate real space.

In the embodiment of the present application, when loading the code segment and the data segment of each dynamic library into at least one large-page memory, the code segment and the data segment of each dynamic library may be loaded according to a loading sequence of the dynamic libraries, and the process may be understood with reference to the example shown in fig. 6A, as shown in fig. 6A, when loading the dynamic libraries 1 and 2 into at least one large-page memory, the code segment of the dynamic library 1, that is, the dynamic library 1.Text, may be loaded in sequence, and then the data segment of the dynamic library 1, that is, the dynamic library 1.Data, may be loaded. Then, when loading the dynamic library 2, the code segment of the dynamic library 2, i.e. the dynamic library 2.Text, is loaded in sequence, and then the data segment of the dynamic library 2, i.e. the dynamic library 2.Data, is loaded. If other dynamic libraries are loaded subsequently, the recording sequence of the code segments and the data segments is analogized according to the mode of loading the dynamic libraries 1 and 2. It should be noted that, in at least one large-page memory, for the memory areas where the dynamic library is not loaded, the actual physical space of these memory areas is not occupied.

Optionally, when loading the code segment and the data segment of each dynamic library into the at least one large-page memory, continuously storing the code segment of each dynamic library in the at least one large-page memory, and continuously storing the data segment of each dynamic library in the at least one large-page memory. The process can be understood by referring to the example shown in fig. 6B, as shown in fig. 6B, when loading the dynamic library 1 and the dynamic library 2 in at least one large-page memory, the code segment of the dynamic library 1, i.e., the dynamic library 1.Text, is loaded in sequence, then the code segment of the dynamic library 2, i.e., the dynamic library 2.Text, is loaded, then the data segment of the dynamic library 1, i.e., the dynamic library 1.Data, is loaded, and then the data segment of the dynamic library 2, i.e., the dynamic library 2.Data, is loaded. If other dynamic libraries are loaded subsequently, the recording order of the code segments and the data segments is analogized in the way of loading the dynamic library 1 and the dynamic library 2. In the embodiment of the present application, in the manner of continuously storing code segments of multiple dynamic libraries, when code segments in a certain large page are loaded into a cache, the probability that continuous code segments are simultaneously loaded into an instruction cache is increased.

In this embodiment, when the computer system runs the application program, the dynamic library may be called by a call function (call function) in the application program, and in addition, the dynamic library loaded into the application program may also call other dynamic libraries by the call function of the dynamic library itself.

In the embodiment of the present application, a call function (call function) is used to initiate a call to a first dynamic library, and a call initiation position refers to a position in the call function where the call is initiated to the first dynamic library.

The process of calling a function to call a dynamic library, in the prior art, is as follows: the original address of the call initiation location of the call function is usually the address of a Procedure Link Table (PLT), and then the call initiation location jumps to the PLT through the address of the PLT, jumps to a Global Offset Table (GOT) through the PLT, and calls to a corresponding dynamic library through the GOT, so that the execution efficiency of the processor on the instruction is affected through two jumps.

In the embodiment of the application, the original address of the call initiation position of the first dynamic library called by the call function is modified according to the function address of the first dynamic library, the first dynamic library is one of the dynamic libraries depended on by the application program, and the call function is contained in the application program or other dynamic libraries depended on by the application program; and when the first dynamic library is called by running the calling function, calling the first dynamic library according to the function address of the first dynamic library at the calling initiating position. In the embodiment of the application, when the calling function is executed to call the first dynamic library, the first dynamic library can be directly called according to the function address of the first dynamic library at the calling initiating position, which is equivalent to realizing the direct connection from the calling function to the function of the first dynamic library, and the two jumps of PLT and GOT are not needed, so that the execution efficiency of the processor to the instruction is improved.

The above-described process with respect to the prior art can be understood with reference to fig. 7A. As shown in fig. 7A, the executable file of the application program includes a call function call, where the start address of the call initiation location of the call function is: when the call function is executed, jumping to the PLT according to the printf @ PLT, finding out jmp @ printf @ go through the printf @ PLT in the PLT, jumping to the GOT according to the printf @ go, finding out the function address of the dynamic library through the printf @ go in the GOT: 0Xf7e835f0, then, according to the function address of the dynamic library: 0Xf7e835f0 calls to the corresponding dynamic library.

Compared with the process shown in fig. 7A, as shown in fig. 7B, in the present application, the start address of the call initiation position of call of the call function is the function address of the dynamic library: 0Xf7e835f0, PLT and GOT can be directly connected, and the corresponding dynamic library can be directly called.

In the embodiment of the application, the mode that the original address of the calling initiating position of the calling function is modified into the function address of the dynamic library is adopted, the dynamic library is directly called without the need of further processing PLT and GOT, so that the PLT and the GOT can be eliminated, and the performance overhead caused by maintaining the PLT and the GOT is reduced.

In the embodiment of the application, before the original address of the call initiation position is modified into the function address of the dynamic library, the call initiation position of the call function to the first dynamic library needs to be determined by using the relocation table, and the relocation table comprises the call initiation position of the call function calling the first dynamic library. Generally, the call initiation positions of all call functions in the application program or the corresponding dynamic libraries are recorded in the relocation table for each dynamic library, so that the call initiation positions can be quickly determined by using the relocation table.

The following three ways of generating the relocation table in the embodiment of the present application may be used, which are described below respectively.

The first method comprises the following steps: a relocation table is generated during the compilation stage.

When compiling the application program or compiling each dynamic library, when compiling the calling function in the dynamic library, saving the calling initiating position of the calling function to the dynamic library in the relocation table. When the calling function calls the first dynamic library, the calling initiation position of the calling function calling the first dynamic library is saved in the relocation table.

Therefore, the dynamic library interpreter can modify the original address in the calling function into the function address of the first dynamic library by using the relocation table, so that when the calling function calls the first dynamic library, the PLT and the GOT can be skipped, and the first dynamic library can be directly called.

And the second method comprises the following steps: a relocation table is generated during the run phase.

When a calling function is operated, the position information of the next instruction of the first dynamic library called by the calling function for the first time is pressed into a stack; determining a calling initiation position for calling a function to call a first dynamic library according to the position information of the next instruction in the stack; and saving the calling initiation position of the calling function to the first dynamic library into a relocation table.

And the third is that: a relocation table is generated by scanning the code segments.

When the dynamic library interpreter loads a calling function, scanning a code segment of the calling function to acquire a calling initiating position of the calling function for calling a first dynamic library; and saving the calling initiation position of the calling function to the first dynamic library into the relocation table.

Because the dynamic library may be frequently loaded or unloaded during the running process of the application program, in order to facilitate management of the virtual address space, in the embodiment of the present application, the virtual address space during the loading or unloading process of the dynamic library is managed by using a bitmap. The bitmap records the mapping positions of the dynamic libraries relied on by the application program in the virtual address space with 4K virtual pages as granularity.

In the embodiment of the present application, the bitmap may be understood by referring to fig. 8, as shown in fig. 8, the address length of a 4K virtual page is identified by 0 or 1, where 0 indicates that the virtual address space is in a space state, and 1 indicates that the virtual address space is occupied.

Optionally, in the process of unloading the dynamic library, the embodiment of the present application further includes: uninstalling a second dynamic library of the dynamic libraries on which the application depends; and emptying a plurality of 4K virtual pages corresponding to the second dynamic library on the bitmap.

In this embodiment of the application, as shown in fig. 9, when the second dynamic library is not unloaded, the identifiers of the virtual address spaces corresponding to the second dynamic library on the bitmap are all represented by 1, and after the second dynamic library is unloaded, the identifiers on the bitmap are all modified to 0.

Optionally, in the process of loading the dynamic library, the embodiment of the present application further includes: mapping a third dynamic library in a virtual address space left by the unloaded second dynamic library; and recording the mapping relation between the third dynamic library and the corresponding virtual address space on the bitmap.

In this embodiment of the application, the process may be understood with reference to fig. 10, as shown in fig. 10, when the third dynamic library is not loaded, the identifiers of the virtual address spaces left on the bitmap due to the unloading of the second dynamic library are all represented by 0, and after the third dynamic library is loaded, the corresponding identifiers are all modified to 1 on the bitmap.

According to the scheme provided by the embodiment of the application, after the second dynamic library is unloaded, a blank virtual address space is left, and when a new third dynamic library is loaded, the third dynamic library can be mapped to the virtual address space left due to unloading of the second air conditioner library, so that the utilization rate of the virtual address space can be improved.

Optionally, the embodiment of the present application further includes: and when the virtual address space corresponding to any large-page memory in the at least one large-page memory is completely in an idle state, releasing any large-page memory.

According to the scheme provided by the embodiment of the application, when the virtual address space corresponding to one or more large-page memories is in an idle state, the one or more large-page memories can be released, so that the utilization rate of the large-page memories is improved.

The method for managing a dynamic library is described above, and an apparatus for managing a dynamic library provided in an embodiment of the present application is described below with reference to the accompanying drawings.

As shown in fig. 11, an embodiment of the apparatus 70 for managing a dynamic library provided in the embodiment of the present application includes:

the first processing unit 701 is configured to apply for at least one large-page memory for an application marked as a large-page mode. The first processing unit 701 may perform step 101 of the above-described method embodiment part.

The second processing unit 702 is configured to map the dynamic library depended on by the application program to a virtual address space corresponding to at least one large-page memory applied by the first processing unit 701. The second processing unit 702 may perform step 102 of the above-described method embodiment part.

The third processing unit 703 is configured to load the dynamic library into at least one large-page memory applied by the first processing unit 701 when the application program is running. The third processing unit 703 may perform step 103 of the above-mentioned method embodiment part.

Optionally, the second processing unit 702 is configured to, when there are at least two dynamic libraries relied on by the application program, sequentially map the at least two dynamic libraries relied on by the application program to a virtual address space corresponding to the at least one large-page memory, where an end address of the first dynamic library in the virtual address space is consecutive to a start address of the second dynamic library in the virtual address space or located in two consecutive 4K virtual pages of the virtual address space, and the first dynamic library and the second dynamic library are two dynamic libraries consecutively mapped to the virtual address space in the at least two dynamic libraries.

The third processing unit 703 is configured to, when the application program is running, sequentially load at least two dynamic libraries into at least one large-page memory, where an ending address of the first dynamic library in the at least one large-page memory and a starting address of the second dynamic library in the at least one large-page memory are consecutive or located in two consecutive 4K physical pages of the at least one large-page memory.

Optionally, each of the at least two dynamic libraries includes a code segment and a data segment, and the third processing unit 703 is configured to continuously store the code segment of each dynamic library in the at least one large-page memory and continuously store the data segment of each dynamic library in the at least one large-page memory when the code segment and the data segment of each dynamic library are loaded into the at least one large-page memory.

Optionally, the apparatus 70 further includes a fourth processing unit 704, where the fourth processing unit 704 is configured to: according to the function address of a first dynamic library, modifying an original address of a calling initiation position of a calling function calling the first dynamic library, wherein the first dynamic library is one of dynamic libraries depended on by an application program, and the calling function is contained in the application program or other dynamic libraries depended on by the application program; and when the first dynamic library is called by running the calling function, calling the first dynamic library according to the function address of the first dynamic library at the calling initiating position.

Optionally, the fourth processing unit 704 is further configured to determine a call initiation location of the calling function to the first dynamic library using a relocation table, where the relocation table includes the call initiation location of the calling function calling the first dynamic library.

Optionally, the fourth processing unit 704 is further configured to save the call initiation location of the calling function calling the first dynamic library into the relocation table when the calling function is compiled.

Optionally, the fourth processing unit 704 is further configured to, when the calling function is executed, push location information of a next instruction, where the calling function calls the first dynamic library for the first time, into the stack; determining a calling initiation position for calling a function to call a first dynamic library according to the position information of the next instruction in the stack; and saving the calling initiation position of the calling function to the first dynamic library into a relocation table.

Optionally, the fourth processing unit 704 is further configured to, when the calling function is loaded, scan a code segment of the calling function to obtain a call initiation location where the calling function calls the first dynamic library; and saving the calling initiation position of the calling function to the first dynamic library into a relocation table.

Optionally, the third processing unit 703 is further configured to uninstall a second dynamic library of the dynamic libraries on which the application depends.

The second processing unit 702 is further configured to empty multiple 4K virtual pages corresponding to the second dynamic library on the bitmap, where the bitmap records, with the 4K virtual pages as granularity, mapping positions of the dynamic library in the virtual address space, where the application depends on the bitmap.

Optionally, the second processing unit 702 is further configured to map a third dynamic library in a virtual address space left by the unloaded second dynamic library; and recording the mapping relation between the third dynamic library and the corresponding virtual address space on the bitmap.

Optionally, the third processing unit 703 is further configured to release any one of the large-page memories when all of the virtual address spaces corresponding to any one of the large-page memories in the at least one large-page memory are in an idle state.

The above-described apparatus for managing a dynamic library can be understood by referring to the corresponding content of the foregoing method for managing a dynamic library, and is not repeated herein.

Fig. 12 is a schematic diagram illustrating a possible logical structure of a computer device 80 according to an embodiment of the present application. The computer device 80 includes: a processor 801, a memory management unit 802, a physical memory 803, and a bus 804. The processor 801, the memory management unit 802, and the physical memory 803 are connected to each other by a bus 804. In an embodiment of the application, the processor 801 is configured to control and manage actions of the computer device 80, for example, the processor 801 is configured to perform steps in the method embodiment of fig. 1 to 7B. The memory management unit 802 is used to manage physical memory. Physical memory 803 is used to store program code and data for dynamic libraries. Of course, the computer device 80 provided in the embodiment of the present application further includes other components, such as: communication interfaces, disks, etc., not shown one by one in fig. 12.

The processor 801 may be, among other things, a central processing unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic device, transistor logic, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure. The processor 801 may also be a combination implementing computing functionality, e.g., a combination comprising one or more microprocessors, a digital signal processor and a microprocessor, or the like. The bus 804 may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 12, but this is not intended to represent only one bus or type of bus.

In another embodiment of the present application, a computer-readable storage medium is further provided, in which computer-executable instructions are stored, and when the processor of the device executes the computer-executable instructions, the device executes the steps executed by the computer system in fig. 1 to 10.

In another embodiment of the present application, there is also provided a computer program product comprising computer executable instructions stored in a computer readable storage medium; when the processor of the device executes the computer-executable instructions, the device performs the steps performed by the computer system of fig. 1-10 described above.

In another embodiment of the present application, a chip system is further provided, where the chip system includes a processor, and the apparatus for supporting memory management implements the steps executed by the computer systems in fig. 1 to 10. In one possible design, the system-on-chip may further include a memory, for storing program instructions and data necessary for the means for data writing. The chip system may be constituted by a chip, or may include a chip and other discrete devices.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the embodiments of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the embodiments of the present application, it should be understood that the disclosed system, apparatus, and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present application, which are essential or part of the technical solutions contributing to the prior art, may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, an optical disk, or other various media capable of storing program codes.

The above description is only a specific implementation of the embodiments of the present application, but the scope of the embodiments of the present application is not limited thereto.

Claims

1. A method for managing a dynamic library for use in a computer system, the method comprising:

applying for at least one large page memory for the application program marked as the large page mode;

mapping the dynamic library depended by the application program to a virtual address space corresponding to the at least one large-page memory;

and loading the dynamic library to the at least one large-page memory when the application program is operated.

2. The method according to claim 1, wherein when there are at least two dynamic libraries relied upon by the application program, the mapping the dynamic libraries relied upon by the application program to the virtual address space corresponding to the at least one large-page memory comprises:

sequentially mapping at least two dynamic libraries depended by the application program to a virtual address space corresponding to the at least one large-page memory, wherein an ending address of a first dynamic library in the virtual address space and a starting address of a second dynamic library in the virtual address space are continuous or are positioned in two continuous 4K virtual pages of the virtual address space, and the first dynamic library and the second dynamic library are two dynamic libraries continuously mapped to the virtual address space in the at least two dynamic libraries;

loading the dynamic library into the at least one large-page memory while running the application, including:

and when the application program is operated, sequentially loading the at least two dynamic libraries to the at least one large-page memory, wherein the ending address of the first dynamic library in the at least one large-page memory and the starting address of the second dynamic library in the at least one large-page memory are continuous or are positioned in two continuous 4K physical pages of the at least one large-page memory.

3. The method according to claim 2, wherein each of the at least two dynamic libraries includes a code section and a data section, and the loading the at least two dynamic libraries into the at least one large page memory in sequence comprises:

when the code segment and the data segment of each dynamic library are loaded into the at least one large-page memory, continuously storing the code segment of each dynamic library in the at least one large-page memory, and continuously storing the data segment of each dynamic library in the at least one large-page memory.

4. The method according to any one of claims 1-3, further comprising:

according to a function address of a first dynamic library, modifying an original address of a calling initiation position of a calling function for calling the first dynamic library, wherein the first dynamic library is one of dynamic libraries depended by the application program, and the calling function is contained in the application program or other dynamic libraries depended by the application program;

and when the first dynamic library is called by operating the calling function, calling the first dynamic library according to the function address of the first dynamic library at the calling initiating position.

5. The method of claim 4, further comprising:

and determining the calling initiation position of the calling function to the first dynamic library by using a relocation table, wherein the relocation table comprises the calling initiation position of the calling function calling the first dynamic library.

6. The method of claim 5, further comprising:

and when the calling function is compiled, saving the calling initiation position of the calling function calling the first dynamic library into the relocation table.

7. The method of claim 5, further comprising:

when the calling function is operated, the position information of the next instruction of the first dynamic library called by the calling function for the first time is pressed into a stack;

determining a calling initiation position of the calling function for calling the first dynamic library according to the position information of the next instruction in the stack;

and saving the calling initiation position of the calling function to the first dynamic library into the relocation table.

8. The method of claim 5, further comprising:

when the calling function is loaded, scanning a code segment of the calling function to acquire a calling initiating position of the calling function for calling the first dynamic library;

9. The method according to any one of claims 1-8, further comprising:

uninstalling a second dynamic library of the dynamic libraries on which the application depends;

and clearing a plurality of 4K virtual pages corresponding to the second dynamic library on a bitmap, wherein the bitmap records the mapping positions of the dynamic libraries depended by the application program in the virtual address space by taking the 4K virtual pages as granularity.

10. The method of claim 9, further comprising:

mapping a third dynamic library in the virtual address space which is vacant by the second dynamic library;

and recording the mapping relation between the third dynamic library and the corresponding virtual address space on the bitmap.

11. The method of claim 9, further comprising:

and when the virtual address space corresponding to any large-page memory in the at least one large-page memory is completely in an idle state, releasing the any large-page memory.

12. An apparatus for managing a dynamic library, comprising:

the first processing unit is used for applying for at least one large-page memory for the application program marked as the large-page mode;

the second processing unit is used for mapping the dynamic library depended by the application program to a virtual address space corresponding to at least one large page memory applied by the first processing unit;

and the third processing unit is used for loading the dynamic library to at least one large-page memory applied by the first processing unit when the application program is operated.

13. The apparatus of claim 12,

the second processing unit is configured to, when there are at least two dynamic libraries relied on by the application program, sequentially map the at least two dynamic libraries relied on by the application program to a virtual address space corresponding to the at least one large-page memory, where an end address of a first dynamic library in the virtual address space and a start address of a second dynamic library in the virtual address space are consecutive or located in two consecutive 4K virtual pages of the virtual address space, and the first dynamic library and the second dynamic library are two dynamic libraries continuously mapped to the virtual address space in the at least two dynamic libraries;

the third processing unit is configured to sequentially load the at least two dynamic libraries into the at least one large-page memory when the application program is running, where an ending address of the first dynamic library in the at least one large-page memory and a starting address of the second dynamic library in the at least one large-page memory are consecutive or located in two consecutive 4K physical pages of the at least one large-page memory.

14. The apparatus of claim 13, wherein each of the at least two dynamic libraries comprises a code section and a data section,

the third processing unit is configured to, when the code segment and the data segment of each dynamic library are loaded into the at least one large-page memory, continuously store the code segment of each dynamic library in the at least one large-page memory, and continuously store the data segment of each dynamic library in the at least one large-page memory.

15. The apparatus according to any of the claims 12-14, characterized in that the apparatus further comprises a fourth processing unit,

the fourth processing unit is configured to:

16. The apparatus of claim 15,

the fourth processing unit is further configured to determine a call initiation position of the calling function to the first dynamic library by using a relocation table, where the relocation table includes the call initiation position where the calling function calls the first dynamic library.

17. The apparatus of claim 16,

the fourth processing unit is further configured to, when compiling the calling function, store a call initiation position where the calling function calls the first dynamic library in the relocation table.

18. The apparatus of claim 16,

the fourth processing unit is further configured to:

19. The apparatus of claim 16,

the fourth processing unit is further configured to:

20. The apparatus of any one of claims 12-19,

the third processing unit is further configured to uninstall a second dynamic library of the dynamic libraries on which the application depends;

the second processing unit is further configured to empty multiple 4K virtual pages corresponding to the second dynamic library on a bitmap, where the bitmap records, with the 4K virtual pages as a granularity, mapping positions of the dynamic library, which is relied by the application program, in the virtual address space.

21. The apparatus of claim 20,

the second processing unit is further configured to map a third dynamic library in a virtual address space left by unloading the second dynamic library; and recording the mapping relation between the third dynamic library and the corresponding virtual address space on the bitmap.

22. The apparatus of claim 20,

the third processing unit is further configured to release any one of the large-page memories when all of the virtual address spaces corresponding to the any one of the large-page memories is in an idle state.

23. A computing device comprising one or more processors and a computer-readable storage medium storing a computer program;

the computer program, when executed by the one or more processors, implements the method of any of claims 1-11.

24. A chip system comprising one or more processors, the one or more processors being invoked to perform the method of any one of claims 1-11.

25. A computer-readable storage medium, on which a computer program is stored, the computer program, when executed by one or more processors, implementing the method of any one of claims 1-11.

26. A computer program product, comprising a computer program which, when executed by one or more processors, is adapted to carry out the method of any one of claims 1-11.