CN115712057A - Method for fault detection of analog board and related product - Google Patents

Abstract

The present disclosure discloses a method for fault detection of an analog board and a related product thereof, wherein the analog board comprises a plurality of functional modules and a plurality of detection switches. The method comprises the steps of controlling the detection switch to execute preset switching so as to connect the functional module to be detected into the corresponding transmission channel; inputting associated test data to the functional module accessed to the corresponding transmission channel to obtain a test result of the functional module to be detected, wherein the test result is used for judging whether the functional module to be detected has a fault; and outputting the test result through the corresponding transmission channel so as to determine whether the functional module to be detected has a fault or not based on the test result. Through the scheme, the fault point of the simulation board can be quickly and accurately positioned, so that the fault point of the acquisition system can be quickly and accurately positioned.

Description

Method for fault detection of analog board and related product

Technical Field

The present disclosure relates generally to the field of fault detection technology for devices. More particularly, the present disclosure relates to a method of fault detection for a mock board for data acquisition, an apparatus for fault detection for a mock board for data acquisition, a computer-readable storage medium and an acquisition system for data acquisition.

Background

The data acquisition system usually utilizes a detector to detect transmission parameters of incident light such as X-rays and make corresponding judgment and execution according to a test result, and also can utilize an industrial camera for detection to detect surface parameters of an object and make corresponding judgment and execution according to the test result. In addition, other signals can be detected, and the above-mentioned judgment and correlation operations can be performed according to the test result. For a linear detector, typically only a few centimeters in length, the pixels are 2.5mm/1.6mm/0.8mm/0.4mm/0.2mm/0.1mm/0.05mm. In a security inspection machine or a sorting device, especially a large-scale sorting equipment or a sorting machine, in order to ensure the sorting yield requirement, several, dozens or even hundreds of linear detectors are required to be cascaded so as to detect and identify objects in a larger width range at the same time. Such a data acquisition system therefore comprises a plurality of cascaded detectors.

The existing data acquisition system generally comprises a digital board and a plurality of analog boards, wherein the digital board and the analog boards can be arranged in a linear, U-shaped and L-shaped mode to form single/dual-energy line scanning cameras with different lengths and resolutions, which can be used for safety inspection of luggage and food and defect detection of welding seams of tires, casting parts and pipelines, can also be used for garbage classification, industrial CT and the like, and is particularly suitable for occasions such as high-speed online detection and the like. Fig. 1 exemplarily shows an X-ray data acquisition system, which is an L-shaped camera formed by arranging a digital board card and a plurality of analog board cards in an L-shaped manner, wherein a detector of each analog board card is directly opposite to an X-ray source to ensure that X-rays are vertically incident, all the analog board cards are arranged in an L-shaped manner, the digital board cards are optionally installed inside or outside a linear array formed by the analog boards, and the scheme can be used in the fields of baggage safety inspection and the like.

The analog board in the data acquisition system usually includes a plurality of functional modules, and when the functional modules are connected in series, the functional modules can sequentially forward instructions and data. The fault detection of the functional modules can ensure normal data processing of the analog board card, so that normal operation of a data acquisition system can be ensured, but no equipment or method can quickly and accurately detect fault points of the functional modules at present.

In view of the above, it is desirable to provide a method for performing fault detection on a simulation board for data acquisition, a device for performing fault detection on a simulation board for data acquisition, a computer-readable storage medium and an acquisition system for data acquisition, which can quickly and accurately locate a fault point of the simulation board, and thus can quickly and accurately locate a fault point of the acquisition system.

Disclosure of Invention

To address at least one or more of the technical problems noted above, the present disclosure proposes, in various aspects, a method of fault detection for a simulation board for data acquisition, an apparatus of fault detection for a simulation board for data acquisition, a computer-readable storage medium, and an acquisition system for data acquisition.

In a first aspect, the present disclosure provides a method of fault detection for a mock board for data acquisition, wherein the mock board comprises a plurality of functional modules and a plurality of detection switches, the method comprising: controlling the detection switch to execute preset switching so as to access the functional module to be detected into the corresponding transmission channel; inputting relevant test data to the functional module accessed to the corresponding transmission channel to obtain a test result of the functional module to be detected, wherein the test result is used for judging whether the functional module to be detected has a fault; and outputting the test result through the corresponding transmission channel so as to determine whether the functional module to be detected has a fault or not based on the test result.

In a second aspect, the present disclosure also provides a simulation board for data acquisition, comprising: a plurality of functional modules, wherein each functional module is operative to perform a corresponding function of the simulation board; a plurality of detection switches, each of which is connected to a corresponding functional module and operates to switch in the functional module to be detected into a corresponding transmission path by performing a preset switching in the fault detection of the analog board; and the input/output interface is operated to input the associated test data to the functional module to be detected and output the test result of the functional module to be detected through the corresponding transmission channel so as to determine whether the functional module to be detected has a fault or not based on the test result.

In a third aspect, the present disclosure also provides an apparatus for fault detection of a mock board for data acquisition, comprising: a processor; and a memory storing program instructions for fault detection of a mock board for data acquisition, which when executed by the processor, causes the method according to any of the preceding embodiments to be carried out.

In a fourth aspect, the present disclosure also provides a computer readable storage medium for failure detection of a mock board for data acquisition, storing program instructions for failure detection of a mock board for data acquisition, which when executed by a processor, causes the implementation of the method according to any of the preceding embodiments.

In a fifth aspect, the present disclosure also provides an acquisition system for data acquisition, comprising: a plurality of analog boards according to any one of the preceding embodiments, the plurality of analog boards being connected in series via respective input and output interfaces to enable progressive communication; and an upper computer including: an upper computer communication interface operative to communicatively couple with a first one of the plurality of simulation boards to enable communicative interaction with the plurality of simulation boards; the upper computer processor is operated to control the plurality of simulation boards through the upper computer communication interface and perform data processing on the data acquired by the simulation boards; and a graphic user interface operative to graphically display processing results of the data and related information regarding the simulation board via control of the upper computer processor.

By the method for fault detection of the simulation board for data acquisition, the equipment for fault detection of the simulation board for data acquisition, the computer-readable storage medium and the acquisition system for data acquisition, the fault point of the simulation board can be quickly and accurately positioned, so that the fault point of the acquisition system can be quickly and accurately positioned, and the problem that the simulation board and the acquisition system cannot be accurately and quickly fault detection at present is solved.

Drawings

The above and other objects, features and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to like or corresponding parts and in which:

FIG. 1 is a schematic diagram of a data acquisition system using a cascade of an analog board and a digital board;

FIG. 2 shows a schematic of an acquisition system for data acquisition;

fig. 3 shows a schematic structural diagram of an acquisition system according to an embodiment of the present disclosure;

FIG. 4 shows a schematic flow diagram of a method of fault detection for a mock board for data acquisition according to an embodiment of the present disclosure;

FIG. 5 shows a schematic flow diagram of a method of fault detection for a mock board for data acquisition according to an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of a simulation board for data acquisition according to an embodiment of the present disclosure;

FIG. 7 is a block diagram of an apparatus for fault detection of a mock board for data acquisition, in accordance with an embodiment of the present disclosure;

FIG. 8 shows a schematic structural diagram of an acquisition system according to an embodiment of the present disclosure;

fig. 9a-9c are schematic diagrams of a fault detection interface provided in accordance with some embodiments of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in the embodiments of the present disclosure, and it is obvious that the described embodiments are some, but not all embodiments of the present disclosure. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the disclosure herein is for the purpose of describing particular embodiments only, and is not intended to be limiting of the disclosure. As used in the specification and claims of this disclosure, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should be further understood that the term "and/or" as used in the specification and claims of this disclosure refers to any and all possible combinations of one or more of the associated listed items and includes such combinations.

Specific embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. For clarity of describing aspects of embodiments of the present disclosure, the basic structure and principles of an acquisition system for data acquisition are first described herein with reference to fig. 2.

Fig. 2 shows a structure in which a plurality of functional modules in the analog board are connected in series. As shown in fig. 2, the acquisition system 200 may include a simulation board 201 and an upper computer 202, and the simulation board 201 may include three functional modules connected in sequence, which may be a first functional module 210, a second functional module 211, and a detection module 212 shown in the figure. The detection module 212 may be configured to detect incident light (such as X-rays) and obtain related data (such as X-ray data), and the second functional module 211 and the first functional module 210 may sequentially process the data and transmit the processed signals to the upper computer 202 for further analysis and processing.

In the acquisition system 200, the first functional module 210 may be in communication with the line 4 and the line 5, the second functional module 211 may be in communication with the line 1 and the line 4, and the detection module 212 may be in communication with the line 1, through which connection the detection module 212, the second functional module 211, the first functional module 210, and the upper computer 202 may be accessed to a normal operation path for data acquisition.

The functions of the first functional module 210 and the second functional module 211 may be specifically set according to the data processing mode of the acquisition system 200, for example, the first functional module 210 may include a processor module capable of performing data control and processing, the processor module may be, for example, an FPGA module, and further, the processor module may be an FPGA module with a high-speed serial transceiver, through which rapid data processing and control may be performed. The second functional module 211 may comprise an analog-to-digital conversion module (ADC module), and the detection module 212 may comprise a detector.

When the first functional module 210 includes an FPGA module, the second functional module 211 includes an ADC module, and the detection module 212 includes a detector, during data acquisition, the detector may receive incident light, convert the incident light into a weak current signal, integrate the current signal to form a voltage signal, and then digitize the voltage signal through the ADC module to form a digital signal carrying data. Then, the FPGA module can process the digitized data so as to obtain an original numerical value of the detected signal. Further, the FPGA module can transmit the processed data to the upper computer 202 in the form of a data packet, and the upper computer 202 can further process the data after receiving the data transmitted by the analog board.

In addition, the simulation board 201 may also receive various instructions (for example, a fault test instruction and a data acquisition instruction of the simulation board) issued by the upper computer 202, and after receiving the instruction issued by the upper computer 202, the simulation board 201 may perform operations such as fault detection and data acquisition according to the instruction.

It is understood that the structure of the acquisition system 200 is merely exemplary and not restrictive, and that a person skilled in the art may select a different number (e.g., 2, 4 or 5) of functional modules and different functions according to different requirements. In addition, the functional modules in the analog board 201 may be connected in parallel. Further, the present acquisition system may be used for other types of data acquisition, such as one or more of vibration data, pressure data, and temperature data, in addition to the optical signal data, such as X-rays, described above.

Further illustrated in fig. 3 is an acquisition system 300 for fault detection of the present disclosure that is an improvement of the acquisition system 200 of fig. 2, wherein the same or similar structure as in the acquisition system 200 can be referred to the description of fig. 2, and the description thereof is omitted here.

As shown in fig. 3, the analog board 301 may further include a plurality of detection switches in addition to the first function module 310, the second function module 311, and the detection module 312. The number of the detection switches may be equal to or different from the number of the functional modules (e.g. less or more than the number of the functional modules) based on different application scenarios, and fig. 3 exemplarily shows that the detection switches and the functional modules are equal in number, that is, a first detection switch 313 and a second detection switch 314 are included, the first functional module 310 is connected to the first detection switch 313, and the second functional module 311 is connected to the second detection switch 314.

In order to connect the functional modules to a source of test data for fault detection, each of the other functional modules in addition to the probing module 312 may also include a third line. As shown in fig. 3, each of the first detection switch 313 and the second detection switch 314 may include an immovable end and a movable end, the immovable end may be connected to a line of the corresponding functional module, which is close to the upper computer, and the movable end may be connected to another two lines of the corresponding functional module in a switchable manner, so as to implement switching of the transmission path.

As shown in fig. 3, the third line corresponding to the first functional module 310 is a line 3, one end of the line is used for connecting the first test data source 315, and the fixed end of the first detection switch 313 may be connected to a line 5, and the movable end thereof may be connected between a line 4 and the line 3 in a switching manner, so as to switch the transmission path. The third line corresponding to the second functional module 311 is line 2, one end of the line 2 is used for connecting the second test data source, the fixed end of the second detection switch 314 can be connected to line 4, and the movable end of the second detection switch can be connected between lines 1 and 2 in a switching manner, so as to switch the transmission path. In this case, the detection switch may be a single-pole double-throw switch.

FIG. 4 shows a schematic flow chart diagram of a method 400 of fault detection for a mock board for data acquisition according to an embodiment of the present disclosure.

As shown in fig. 4, the method 400 may include controlling the detection switch to perform preset switching so as to insert the functional module to be detected into the corresponding transmission path at step S401. The following description will take the acquisition system 300 shown in fig. 3 as an example to illustrate a method for accessing a functional module to a corresponding transmission channel. To illustrate the operation of the acquisition system 300, a first data source 315 and a second test data source 316 are also shown.

For the first function module 310, the first detection switch 313 may be controlled to connect the lines 3 and 5 (the connection relationship shown by the solid line in fig. 3), and the second detection switch 2 may be controlled to connect the lines 1 and 4 or the lines 2 and 4 (the connection relationship shown by the solid line in fig. 3), that is, the position of the moving end thereof is not limited, so that the first function module 310 is connected to the first transmission path formed by the lines 3 and 5.

For the second function module 311, it is possible to control the first detection switch 313 to communicate with the lines 4 and 5 (connection relationship shown by a dotted line in fig. 3), and the second detection switch 2 to communicate with the lines 2 and 4, so that the second function module 311 is switched into the second transmission path constituted by the lines 2, 4, and 5.

When the first functional module 310 comprises a processor module, the first test data source 315 may be a Device test data source; when the second functional module 311 comprises a processor module, the second test data source 316 may be an Asic test data source. The asicutest test data source and the Devicetest test data source have artificially preset characteristics, and when the two data are taken as test data, the upper computer 302 can accurately distinguish the correctness of the test data, so that whether the first functional module 310 and the second functional module 311 have faults or not can be accurately judged.

For the probing module 312, the first detection switch 313 may be controlled to connect the lines 4 and 5, and the second detection switch 314 may be controlled to connect the lines 1 and 4, so that the probing module 312 is connected to the third transmission path formed by the lines 1, 4 and 5.

In order to facilitate simple control, a working mode for performing fault detection on each functional module may be preset and a corresponding mode instruction may be configured, so that a line switching operation for performing fault detection may be controlled and executed through the mode instruction. As the analog board 301 shown in fig. 3, three operation modes may be set, wherein the first operation mode is used for switching the line of the first functional module 310 (corresponding to a first mode instruction), the second operation mode is used for switching the line of the second functional module 311 (corresponding to a second mode instruction), and the third operation mode is used for switching the line of the detection module 312 (corresponding to a third mode instruction).

Based on this, the analog board 301 may receive a mode instruction for controlling the plurality of detection switches to perform the preset switching, where different mode instructions correspond to different preset switching, and control the switching of the plurality of detection switches according to the mode instruction, so as to access the functional module to be detected into the corresponding transmission path.

In the embodiment shown in fig. 3, in response to receiving a first mode command for detecting the first functional module 310, the analog board 301 may control the first detection switch 313 and the second detection switch 314 to perform a first preset switching so as to switch the first functional module 310 into the first transmission path. The first preset switch here may be to put the first detection switch 313 in communication with the lines 3 and 5, and the second detection switch 314 in communication with the lines 2 and 4 or in communication with the lines 1 and 4. At this time, the first test data may be input to the first functional module 310 to obtain a first test result of the first functional module 310. In addition, the first test result may be output through the first transmission path to determine whether the first functional module 310 has a failure based on the first test result.

Similarly, in response to receiving the second mode instruction for detecting the second functional module 311, the analog board 301 may perform a second preset switching on the first detection switch 313 and the second detection switch 314 so as to switch the second functional module 311 into the second transmission path. The second preset switching here may be to have the first detection switch 313 communicate the lines 4 and 5 and the second detection switch 314 communicate the lines 2 and 4. At this time, the second test data may be input to the second functional module 311 to obtain a second test result of the second functional module 311. In addition, a second test result is output through the second transmission path to determine whether there is a failure in the second functional module 311 based on the second test result.

It is understood that when a plurality of functional modules of the simulation board are connected in series, the first functional module and the second functional module can be continuously executed, for example, for the simulation board 301 shown in fig. 3, the fault detection of the second functional module 311 can be directly executed after the fault detection of the first functional module 310 is executed and determined to be normal. In the embodiment shown in fig. 3, the mode instruction may be sent in each functional module stage by stage through the upper computer 302 in the acquisition system. As shown in fig. 3, the plurality of functional modules may further include a detection module 312 for collecting data through detection, in which case the mode instruction may further include a third mode instruction. In response to receiving the third mode command of the detection module 312, the analog board 301 performs a third preset switching on the first detection switch 313 and the second detection switch 314 so as to switch the detection module 312 into the third transmission path. The third preset switch here may be such that the first detection switch 313 communicates the lines 4 and 5 and the second detection switch 314 communicates the lines 1 and 4. At this time, the detection module 312 may be controlled to collect data, and determine whether the detection module 312 has a fault according to the collected data.

After the method for accessing the functional module to the corresponding transmission path is described, it is now continued to fig. 4. At step S402, the method 400 may input the associated test data to the functional module accessed to the corresponding transmission path to obtain a test result of the functional module to be detected, where the test result may be used to determine whether the functional module to be detected has a fault. For example, when the first functional module 310 is accessed to the first transmission path, first test data may be input thereto, and when the second functional module 311 is accessed to the second transmission path, second test data may be input thereto. When the detection module 312 is connected to the third transmission channel, data is collected.

Next, at step S403, the method 400 may output the test result through the corresponding transmission path so as to determine whether the functional module to be detected has a fault based on the test result. In one embodiment, the test result may be output to an upper computer directly or indirectly connected to the analog board through a corresponding transmission path, so that the upper computer determines whether the function module to be detected has a fault based on the test result. The corresponding transmission paths may be transmission paths corresponding to the respective functional modules, for example, a first transmission path corresponding to the first functional module 310, a second transmission path corresponding to the second functional module 311, and a third transmission path corresponding to the detection module 312.

For the first functional module 310 in fig. 3, it may directly output its first test result to the upper computer 302 through the first transmission path, the second functional module 311 may forward the second test result to the upper computer 302 step by step through the second transmission path, and the detection module 312 may forward the third test result (the fault test result of the detection module 312) to the upper computer 302 step by step through the third transmission path.

When the functional modules in the analog board are connected in series, the failure detection of the analog board can be performed in the following manner. Still taking the simulation board 301 in the acquisition system 300 in fig. 3 as an example, the first functional module 310 is first connected to the first transmission path, and is operated to obtain a first test result and transmit the first test result to the upper computer 302. Then, the upper computer 302 can judge whether the first test result meets expectations; if yes, determining that the first functional module 310 is normal; accordingly, if the first test result is not expected, it is determined that the first functional module 310 is malfunctioning.

When the first functional module 310 is determined to be normal, the second functional module 311 is connected to the second transmission path, and a second test result is obtained through operation and is transmitted to the upper computer 302. Then, the upper computer 302 can judge whether the second test result meets the requirements; if yes, determining that the second functional module 311 is normal; accordingly, if the second test result is not in accordance with the expectation, it is determined that the second functional module 311 is malfunctioning.

When it is determined that the second function module 311 is normal, the detection module 312 is further connected to a third transmission path, and a third test result is obtained through operation and is transmitted to the upper computer 302. Then, the upper computer 302 can judge whether the third test result meets expectations; if so, determining that the detection module 312 is normal; accordingly, if the third test result is not expected, the detection module 312 is determined to be malfunctioning.

In the following, the present disclosure takes the first functional module 310 in fig. 3 as an FPGA module, the second functional module 311 as an ADC module, and the detecting module 312 as a detector, for example, and with reference to fig. 5, a fault detection method for the analog board 301 is described in detail. FIG. 5 shows a schematic flow diagram of a method of fault detection for a mock board for data acquisition according to an embodiment of the present disclosure. As shown in fig. 5, at step 501, the working mode of the simulation board 301 is first configured to be a Device Test mode, at this time, the FPGA module is controlled to be connected to the first transmission path, device Test data is transmitted to the FPGA module, and at step 502, the simulation board 301 collects data and performs fault detection to obtain a first Test result. Next, at step 503, it is determined whether the first test result is normal. If the first test result is judged to be abnormal, step 504 is entered to determine that the FPGA module is faulty. If the first test result is normal, step 505 is entered.

At step 505, the working mode of the analog board 301 is configured to be the Asic Test mode, at this time, the ADC module is controlled to be connected to the second transmission path, asic Test data is transmitted to the ADC module, and at step 506, the analog board 301 collects data and performs fault detection to obtain a second Test result. Next, at step 507, it is determined whether the first test result is normal. If the second test result is abnormal, step 508 is entered to determine that the ADC module is faulty. If the second test result is normal, go to step 509.

At step 509, the working mode of the simulation board 301 is configured to be a Normal mode, at this time, the probe is controlled to be connected to the third transmission path, the probe is controlled to collect data, and at step 510, the probe collects data, and performs fault detection to obtain a third test result. Then, step 511 is performed to determine whether the third test result is normal. If the third test result is judged to be abnormal, step 512 is performed to determine that the detector is faulty. If the third test result is normal, step 513 is executed to determine that the simulation board 301 has no abnormality. Therefore, the method and the device can determine whether each functional module is normal step by step, so that the fault point of the simulation board 301 can be accurately positioned.

In one embodiment, the test result of each functional module may include the test data itself, and the upper computer may store target data corresponding to each test data, for example, when the test data source includes a Device test data source and an AsicTest data source, the upper computer may store the Device test target data and the AsicTest target data in advance. In the acquisition system 300 shown in fig. 3, when receiving the test data (first test result) of the Device test transmitted by the first transmission path, the upper computer 302 may compare the test data with the pre-stored target data of the Device test, and if the test data and the target data are not matched, it indicates that the first functional module 310 has a fault; if the two are matched, the first functional module 310 is normal. The judgment modes of other functional modules are the same, and are not described one by one here.

As can be seen from the above description, the method of the embodiment of the present disclosure can perform fault detection on each functional module in the simulation board, so that a fault point of the simulation board can be quickly and accurately located, and the problem that the fault detection on the simulation board cannot be accurately and quickly performed at present is solved.

The method for detecting a fault of an analog board including three functional modules is described above by taking fig. 3 as an example only. It is understood that the person skilled in the art can also perform fault detection on an analog board comprising more or fewer functional modules in a similar manner as described above, and will not be described in detail here.

The method for detecting a fault of a simulation board of an acquisition system is described above with reference to various embodiments, and the following description will describe in detail the simulation board that executes the method with reference to various embodiments.

As can be seen from the foregoing description of the embodiments, the analog board may include a plurality of functional modules, a plurality of detection switches, and an input-output interface. The number of functional modules may be different, for example, 3 or 4, and the number of detection switches may be equal to or different from the number of functional modules (e.g., less or more than the number of functional modules), based on different application scenarios.

Fig. 6 is a schematic structural diagram of a simulation board 601 for data acquisition according to an embodiment of the present disclosure. To describe the relationship between the simulation board 601, the upper computer, and the test data sources, the upper computer 602, the first test data source 615, and the second test data source 616 are also shown in the figure. As shown in fig. 6, the analog board 601 may include three functional modules of a first functional module 610, a second functional module 611, and a detection module 612, which further includes a first detection switch 613 and a second detection switch 614. In addition, the first functional module 610 may include a processor module (e.g., an FPGA module), while the second functional module 611 may include an analog-to-digital conversion module (ADC module), and the detection module 612 may include a detector. Since the structures of fig. 6 and 3 are similar, the foregoing description of fig. 3 also applies to fig. 6.

In one embodiment, each of the plurality of detection switches may be connected with a corresponding functional module, and in the fault detection of the analog board, it is operated to switch in the functional module to be detected into the corresponding transmission path by performing a preset switching. As shown in fig. 6, the first detection switch 613 is connected to the first functional module 610, the second detection switch 614 is connected to the second functional module 611, and the manner of accessing the functional module to be detected to the corresponding transmission path by performing the preset switching has been described in detail in the foregoing with reference to the embodiments shown in fig. 3 and fig. 4, and is not described again here.

In one embodiment, the input/output interface may be operable to input associated test data to the functional module to be detected, and output a test result of the functional module to be detected through the corresponding transmission path, so as to determine whether the functional module to be detected has a fault based on the test result. In the simulation board 601 shown in fig. 6, the input/output interface connected to the line 3, the input/output interface connected to the line 2, and the input/output interface communicated with the light-receiving end of the detection module 612 are input/output interfaces of the simulation board 601 that transmit test data, the first test data source 615 and the second test data source 616 may input the first test data and the second test data to the first function module 610 and the second function module 611 through the corresponding input/output interfaces, and incident light may be transmitted to the detection module 612 through the input/output interface of the simulation board 601 communicated with the light-receiving end of the detection module 612.

In one embodiment, the input/output interface may be operable to output the test result to the upper computer 602 directly or indirectly connected to the analog board 601 through the corresponding transmission path, so that the upper computer 602 determines whether the function module to be detected has a fault based on the test result. The transmission paths corresponding to the first functional module 610, the second functional module 611, and the third functional module 612 may be the aforementioned first transmission path, the second transmission path, and the third transmission path.

For the first functional module 610 in fig. 6, it may directly output its first test result to the upper computer 602 through the first transmission path, the second functional module 611 may forward the second test result to the upper computer 602 step by step through the first functional module 610, and the detection module 612 may forward the third test result (the fault test result of the detection module 612) to the upper computer 602 step by step through the second functional module 611 and the first functional module 610.

As can be seen from the above description, the simulation board 601 of the embodiment of the present disclosure is provided with a corresponding control mode to perform fault detection on each functional module therein, so that a fault point of the simulation board 601 can be quickly and accurately located, and a problem that the simulation board 601 cannot be accurately and quickly subjected to fault detection at present is solved.

As can be seen from the foregoing description of the embodiments, the corresponding functional module can be set to be in the failure detection mode by setting the operation mode of the analog board. As shown in fig. 6, the plurality of functional modules may include a first functional module 610, which may be operable to control the detection switch to perform a preset switching according to different mode instructions (e.g., a first mode instruction and a second mode instruction) so as to access the functional module to be detected into the corresponding transmission path, where the different mode instructions correspond to different preset switchings.

For example, the first functional module 610 may control the first detection switch 613 to connect the lines 3 and 5, and control the second detection switch 614 to connect the lines 2 and 4 or connect the lines 1 and 4 according to the first mode command, and at this time, the first functional module 610 may be connected to the first transmission path. In addition, the first functional module 610 may also control the first detection switch 613 to connect the lines 4 and 5 (as shown by the connection relationship shown by the solid line in the figure) and control the second detection switch 614 to connect the lines 2 and 4 (as shown by the connection relationship shown by the solid line in the figure) according to the second mode command, and at this time, the second functional module 611 may be switched into the second transmission path. As can be seen, in this embodiment, the first detection switch 613 and the second detection switch 614 can be controlled to be switched by the control function of the first functional module 610, so that the switching of the paths can be performed. The first functional module 610 here may include, but is not limited to, various modules having control and processing functions, such as an FPGA module.

In order to facilitate fast data reading operation and thus improve the switching speed of the analog board, in the embodiment shown in fig. 6, the analog board 601 may further include a mode instruction register 617 operable to receive and store mode instructions (for example, the aforementioned first mode instruction and second mode instruction), and the first functional module 610 may be operable to control the switching of a plurality of detection switches (such as the two detection switches described in the figure) according to the mode instructions stored in the mode instruction register 617, so as to connect the functional module to be detected into the corresponding transmission path.

In the embodiment shown in fig. 6, the plurality of functional modules may further include a second functional module 611, the plurality of detection switches may include the first detection switch 613 and the second detection switch 614, and the associated test data may include first test data for detecting the first functional module 610 and second test data for detecting the second functional module 611.

The mode command may include a first mode command and a second mode command, wherein the first functional module 610 may be operable to access the first functional module 610 to the first transmission path according to the first mode command, and control input of the first test data to the first functional module 610 so as to output the first test result through the first transmission path.

For example, the first functional module 610 may access the first functional module 610 to the first transmission channel according to the first mode instruction, and control the first test data source 615 to input the first test data to the first functional module 610 through the first transmission channel (e.g., when the first functional module 610 includes an FPGA module, it may receive the first data source 615 to send Device test data), and output the first test result through the first transmission channel. Similarly, the present solution may further access the second functional module 611 into the second transmission path according to the second mode instruction, and control to input the second test data to the second functional module 611, so as to output the second test result through the second transmission path. For example, the second functional module 611 may access the second functional module 611 to the second transmission path according to the second mode instruction, and control the second test data source 616 to input the second test data to the second functional module 616 through the second transmission path (for example, when the second functional module 611 includes an analog-to-digital conversion module, it may receive the Asic test data sent by the second data source 616), and output the second test result through the second transmission path.

It will be appreciated that when a plurality of functional modules of the simulation board are connected in series, the first functional module and the second functional module can be made to execute continuously, for example, after the failure detection of the first functional module is executed and it is determined that it is normal, the failure detection of the second functional module is executed directly. In the embodiment shown in fig. 6, the mode command may be sent by the host computer 602.

In order to detect incident light, thereby obtaining an acquired signal to be processed, as shown in fig. 6, the above-mentioned plurality of functional modules may further include a detection module 612 for acquiring data by detection. Based on this, the mode instructions may further include a third mode instruction, wherein the processor module may be operative to perform a third preset switching on the first detection switch and the second detection switch according to the third mode instruction so as to switch the probe module into the third transmission path. For example, in fig. 6, the processor module may connect the probing module 612 to the line 1, the second functional module to the lines 1 and 4, and the first functional module to the lines 4 and 5 according to the third mode command, i.e. the lines formed by the lines 1, 4, and 5 are the third transmission channel, and the probing module may be connected to the third transmission channel.

Fig. 7 is a block diagram of an apparatus 700 for fault detection of a mock board for data acquisition according to an embodiment of the present disclosure.

As shown in fig. 7, the device 700 of the present disclosure may include a processor 701 and a memory 702, wherein the processor 701 and the memory 702 communicate over a bus 703. The memory 702 stores program instructions for fault detection of a mock board for data acquisition, which when executed by the processor 701, cause the implementation of the method steps according to the previous description in connection with the figures.

According to the description, the fault detection can be carried out on each functional module in the simulation board through the equipment disclosed by the embodiment of the disclosure, so that the fault point of the simulation board can be quickly and accurately positioned, and the problem that the fault detection on the simulation board cannot be accurately and quickly carried out at present is solved.

Those of ordinary skill in the art will understand that: all or part of the steps of implementing the above method embodiments may be implemented by hardware associated with program instructions, and the foregoing program may be stored in a computer-readable storage medium, and when executed, performs the steps including the above method embodiments.

Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a necessary general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.

It is understood that the acquisition system in the present embodiment may include one analog board, or may include a plurality of analog boards, and the present embodiment will be described with reference to fig. 8, 9a, 9b, and 9c for an acquisition system for data acquisition that includes a plurality of analog boards connected in series.

As shown in FIG. 8, an acquisition system may include n number of simulation boards (e.g., simulation board 821, simulation board 822, simulation boards 823, \ 8230; simulation board 82n in the figure) according to any of the embodiments described above and an upper computer 830.

In one embodiment, the n analog boards may be connected in series through respective input/output interfaces to implement the step-by-step communication. n may be a natural number greater than or equal to 2. The specific number of the simulation boards can be specifically set according to requirements, and for example, the number of the simulation boards can be 3, 4 or 5. The structure, operation principle and the like of the simulation board have been described in detail in the foregoing with reference to various embodiments, and are not described in detail herein. In this embodiment, the n analog boards may be connected in cascade through a serial interface, so as to perform information interaction between the n analog boards, for example, forwarding of instructions and data.

In one embodiment, the host computer 830 may include a host computer communication interface, a host computer processor, and a graphical user interface. The upper computer communication interface can be operated to be in communication connection with a first analog board of the n analog boards, so that communication interaction with the n analog boards is realized. The upper computer communication interface can comprise a wired communication interface (such as a fiber-optic interface or a USB interface) and/or a wireless communication interface (such as a WIFI interface). The first simulation board can sequentially forward various instructions issued by the upper computer 830 to other simulation boards through communication interaction with the upper computer, and transmit acquired data, test results and the like sequentially forwarded by the plurality of simulation boards to the upper computer 830.

In one embodiment, the upper computer processor may be operable to control the n simulation boards via the upper computer communication interface and perform data processing on data collected by the simulation boards. Here, the upper computer processor may control the fault detection of the n analog boards, for example, may control to send each mode instruction to each analog board and receive a test result returned by each analog board. The specific processing mode for processing the data acquired by the simulation board can be set according to the specific requirements of the acquisition system, for example, the data can be analyzed and displayed.

As can be seen from the foregoing description of the embodiments, different functional modules can be enabled to perform fault detection by sending different mode commands to the analog board. Based on this, as shown in fig. 9a-9c, options related to the operation mode may be set on the software interface, and the user may generate and transmit corresponding mode instructions of the respective simulation boards by manipulating the tabs. It is understood that the mode commands may be sent simultaneously or separately.

It should be understood that the same test data may be provided for the same functional block of different analog boards when performing fault detection (e.g., the same Devicetest test data is provided for the FPGA block of each analog board and the same asitest data is provided for the ADC block of each analog board). This allows each simulation board to use the same plurality of test data sources, thereby facilitating the recording and comparison of data.

In one embodiment, during fault detection, all the simulation boards in the acquisition system can be synchronously switched to the same working mode, for example, each simulation board can be switched to a Devicetest working mode, at this time, data acquired by each simulation board comes from a Devicetest test data source, and therefore, data received and displayed by the upper computer when each simulation board is normal should be theoretically the same. Similarly, all the simulation boards in the acquisition system can also be synchronously switched to the Asictest working mode, at the moment, the data acquired by each simulation board is from an Asictest data source, and the data received and displayed by the upper computer when each simulation board is normal should be the same theoretically. Therefore, in any working mode, which simulation board is abnormal can be clearly and intuitively displayed, and the functional module with the fault in the abnormal simulation board can be further determined.

In order to make the operator more intuitively understand the processing result of the related information and data of each simulation board, the upper computer 830 can display the information and data through images. Thus, the graphical user interface described above may be operable to graphically display, via control of the upper computer processor, processing results of the relevant information and data regarding the simulation board. The information related to the simulation board may be, for example, whether the simulation board is faulty, which simulation board is faulty, and which function module of the simulation board is faulty.

Therefore, the acquisition system in the embodiment of the present disclosure can control each simulation board to perform fault detection through interaction between the upper computer 830 and each simulation board, so that the faulty simulation board and the fault function module in the simulation board can be quickly and accurately positioned, and the problem that accurate and quick fault detection cannot be performed at present is solved. In addition, the scheme can also visually display the relevant information and data processing results of the simulation board, so that the operator can conveniently perform subsequent processing based on the data.

As can be seen from the foregoing description of the related embodiments of the simulation board, the simulation board may perform corresponding fault detection operations according to the mode command, and the mode command may be generated and issued by the upper computer, and may further receive the test result of the simulation board. Based on this, the above-mentioned host computer processor can be operated in mode instruction of mode of production, and send the mode instruction to the first simulation board in a plurality of simulation boards via host computer communication interface for the mode instruction is forwarded step by step between a plurality of simulation boards. Then, in response to receiving the mode instructions, the analog board may be operative to perform fault detection and to output test results to the upper computer stage by stage. The upper computer processor may then be operable to receive the test results via the upper computer communication interface and determine a failed fault simulation board based on the test results.

The method for determining the failed analog board may refer to the method described above, that is, it may be determined whether a first analog board (e.g., analog board 821 in fig. 8) fails, and when it is determined that it fails, it is determined that it is a failed analog board, and when it is determined that it is normal, it is determined that a second analog board (e.g., analog board 822 in fig. 8) connected to the first analog board fails. When the second simulation board is determined to be in fault, when the second simulation board is determined to be in normal, a third simulation board (such as the simulation board 823 in fig. 8) connected with the second simulation board is determined to be in fault, 8230, and the like, the fault simulation board can be determined or all the simulation boards can be determined to be in normal. The graphical user interface may then be operable to graphically display information relating to the failure simulation panel under control of the upper computer processor.

In order to more accurately determine the failure point in the failure simulation board, in one embodiment, the upper computer processor may be further operable to determine a failed functional module in the failure simulation board according to the test result, and the graphical user interface may be further operable to image information about the failed functional module.

It is understood that the initially formed image may be blurred and noisy due to the influence of equipment and the like. In order to solve the problem, the pixels in the image can be corrected, for example, the offset and the gain of the pixels in the image can be corrected, so that the gray values of the pixels in the image are consistent, and the image is clear, fine and free of noise when the real object is imaged.

In one implementation scenario, the simplest linear correction method may be used to perform image correction, i.e., using the linear relationship between the input (initial gray-scale value of a pixel) and the output (target gray-scale value of a pixel) as described below

y=kx+b

Wherein y is the target gray-scale value of the pixel, x is the initial gray-scale value of the pixel, k is a constant, and b is a constant.

When x =0, y =0, it indicates that the detector is completely shielded and does not receive any light signal. For the acquisition system, the incident light is input at maximum light intensity, the initial gray scale value of the image pixel is x1, and the target gray scale value of the pixel is y1= V. In the actual scanning process, the initial gray value of each pixel in the acquired initial image is converted through the formula, and then the target gray value meeting the expectation can be obtained, so that a clear, fine and noiseless image is formed.

Based on the obtained different images, the graphical user interface can be further operated to display the acquired data in an original state and/or a corrected state in the first graphical area and display the noise value of the corresponding pixel in the second graphical area according to the instruction of the upper computer processor.

Because the number of simulation boards in the acquisition system of the present disclosure is large, and the simulation boards may further include a plurality of function modules, in order to clearly display the related information of the simulation boards, in an embodiment, the graphical user interface may be further operable to graphically display the related information of the plurality of simulation boards in the form of entries with reference to the positional relationship of the plurality of simulation boards according to an instruction of the upper computer processor. Through the display mode, the operator can quickly find the relevant information of the relevant simulation board through the corresponding position relation, so that the information processing efficiency can be improved.

With respect to the image display portion, the present disclosure will be described in detail in conjunction with the display interface for image display shown in fig. 9a to 9 c. 9a-9c show schematic diagrams of display interfaces for image display according to embodiments of the present disclosure.

As shown in fig. 9a to 9c, in the upper half of the display interface, the data collected from the simulation board (the original state of the data) or the corrected data (the corrected state of the data) can be displayed, so that the data can be visually reflected. And in the lower half part of the display interface, a noise value corresponding to each pixel in the image can be displayed, and the quality of the current pixel point can be evaluated through the noise value.

As an optimal scheme, the corresponding relation between the data displayed on the upper half part of the display interface and the noise data displayed on the lower half part of the display interface can be visually presented, so that the imaging quality and the measured data of the detection module can be visually felt, and an operator can directly and visually perceive the working state and the data quality of the detection module. It should be understood that the display interface is not limited in particular, and the display interface may be various screens or media for displaying or having display effects in the prior art.

In order to display more conveniently and intuitively, the detection data (data) can be displayed in a combined manner on the display interface according to the spatial sequence or the position relation of the simulation boards, and the data acquisition system comprising a plurality of simulation boards can display the data of a plurality of channels simultaneously through the combined display. The arrangement enables the difference effect of each channel to be amplified through comparison, so that problems can be positioned intuitively and quickly.

The above-mentioned combined display mode may specifically include: the detection data from each simulation board is displayed in sequence according to the position relation of the plurality of simulation boards by using the spliced abscissa. For example, in some embodiments, the inspection data from the first simulation board 821 may be displayed in a first region on the left side, and the inspection data from the second simulation board 822 may be displayed in a second region adjacent to the first region, which may be located on the right side of the first region, with both display regions sharing the same vertical axis coordinate. In addition, the detection data from the third simulation panel 823 may be presented in a third area, which is immediately adjacent to and to the right of the second area, and which may share the same vertical axis coordinates as the first and second areas, \8230;, and so on, and the detection data of all simulation panels in the cascade may be presented in combination. Because the vertical coordinates used for displaying the detection data of each simulation board are the same, and the horizontal coordinates are sequentially extended, the detection data of the detection modules of all the simulation boards can be visually, obviously and intensively displayed, and an operator can sense the detection data more visually through a display interface.

In addition, data acquired by a plurality of or all simulation boards in the acquisition system at the same time can be displayed on the upper computer in a gray scale image form, a continuous image can be formed on the upper computer along with the movement of the object to be measured, and information such as the material, the shape and the like of the object to be measured can be reflected through the image. By the method, when the hardware working state of the acquisition system is tested, the specific fault point of the acquisition system can be diagnosed, for example, when data from the nth simulation board is abnormal (no signal or obvious signal is abnormal), the abnormal information can be visually displayed through the display interface, the simulation board which is abnormal can be quickly positioned, and the abnormal information can be approximately corresponding to the position of the simulation board, so that a monitor can quickly respond.

The structure and operation of an acquisition system are described above with reference to the accompanying drawings. In other embodiments, the acquisition system may further include a digital board, which may be connected in series between the upper computer and the first analog board, so that the instructions and the acquired data may be forwarded between the upper computer and the first analog board.

In the acquisition system, a digital board (also referred to as a digital board card) and an analog board (also referred to as an analog board card) are basic constituent units of the acquisition system. As can be seen from the foregoing description, the simulation board is mainly responsible for: receiving X-rays and converting the X-rays into current signals; integrating the current signal and digitizing the current signal through an ADC module; and packaging the X-ray data, sending the X-ray data to a digital board or an adjacent analog board, and forwarding/executing the instruction from the upper computer and the data packet of the adjacent analog board. Furthermore, the system can monitor information such as temperature, voltage and the like, and can realize different resolutions by bearing different detectors and form various line scanning cameras by different arrangements. It should be understood that whether the final arrangement is a straight line, or a U-shape, or an L-shape, the cascading relationship of the analog boards and the digital boards is the same in the basic cascading relationship, i.e., the analog boards are arranged in sequence.

The structure and the operation principle of the above-described acquisition system including the digital board according to the embodiment of the present disclosure are explained below.

When fault detection is performed based on the acquisition system, the upper computer may be configured to generate a fault test instruction including a working mode indicator, and may perform fault detection based on a detection response packet sent by each analog board step by step to generate a fault detection result (test result).

The digital board can be used for sending a fault test instruction generated by the upper computer to a first analog board in the plurality of analog boards so as to send the fault test instruction step by step from the first analog board in the plurality of analog boards until the fault test instruction is sent to a last analog board in the plurality of analog boards, and receiving a plurality of detection data packets sent by the plurality of analog boards step by step from the first analog board.

Each of the simulation panels may include: the device comprises a control module, a detection module, an analog-to-digital conversion module, a processor module, a data sending module and a data receiving module. The data receiving module may be configured to receive a fault test instruction from a connected upper-level analog board, and may receive a detection data packet from a connected lower-level analog board. The control module may be configured to parse the fault test instruction received from the detection data packet to obtain the operation mode indicator, and may determine a current operation mode of the simulation board based on the operation mode indicator, so that the simulation board performs fault detection corresponding to the current operation mode.

In addition, the detection module can be used for generating a current signal capable of representing a detection parameter value in a normal working mode, the analog-to-digital conversion module can be used for converting the current signal into a voltage signal, then converting the voltage signal into a digital signal, and meanwhile, detection data capable of representing a certain test mode can be generated. Further, the processor module may be operative to add the analog board identifier and the operating mode indicator to the digital signal to generate a detection response packet. The data sending module can be used for sending the detection response data packet to the connected upper-level simulation board and sending the fault test instruction to the connected lower-level simulation board.

It is understood that the above-described functional arrangement of modules in the simulation board is merely exemplary and not limiting, and those skilled in the art can re-divide and combine the functions by integrating, splitting, etc. For example, the functions of the control module, the data receiving module and the data sending module may be implemented by the processor module, the analog-to-digital conversion module and the detection module, respectively, and the specific splitting manner may be specifically set as required, which is not further described herein.

For the above acquisition system, the simulation board 821, the simulation board 822 \8230andthe simulation board 82n are connected in series in sequence, which may include two command transmission modes, mode one and mode two. Wherein, the mode one: the nth analog board in the n analog boards receives the instruction forwarded by the digital board and forwards the instruction to the upper-level analog board in sequence, each of the n analog boards can receive the instruction in sequence, the data acquisition task of the upper-level analog board can be completed according to the received instruction, the acquired data can be further forwarded to the lower-level analog board in sequence, and finally the data are sent to the digital board through the nth analog board. The second method comprises the following steps: the 1 st analog board in the n analog boards receives the instruction sent by the digital board and forwards the instruction to the next-level analog board in sequence, each of the n analog boards can receive the instruction in sequence, the data task of the analog boards is completed according to the received instruction, the collected data is forwarded to the previous-level analog board in sequence, and finally the collected data is sent to the digital board through the 1 st analog board.

In any transmission mode, because each simulation board is connected in series, the instruction and the data collected by the simulation boards are forwarded step by step. For the first approach described above, the instructions may be forwarded from nth simulation board 82n to 82 (n-1), 82 (n-2) \ 8230 \ 8230, up to level one to level 1 to the first simulation board 821. For the second approach, the instructions may be forwarded from the 1 st simulation board 821 to 822, 823 \8230, 8230, up to one level and to the nth simulation board 82n. Each analog board has a unique analog board identifier, such as an ID number, which may correspond to its address, by which it is possible to quickly and accurately locate which analog board has failed and determine the location of the analog board.

According to the information transmission mode of the acquisition system, after the upper computer sends out the fault test instruction, the fault test instruction can be transmitted to the analog boards through the digital boards and is forwarded in a first-stage mode between the analog boards. After receiving the failure test instruction, each analog board needs to respond, and the response information may include the ID number of the analog board. For example, the digital board sends out a command of "hear please answer", the analog board 821 needs to reply to "821 hear" after receiving the command, then the command of "hear please answer" is forwarded to the analog board 822, the analog board 822 needs to reply to "822 to hear" after receiving the command, then the command of "hear please answer" is forwarded to the analog board 823, and the analog board 823 needs to reply to "823 to hear" and further forward \8230.

In order to facilitate the identification and position determination of the analog boards, the digital boards may store in advance an ID list and a position information list of the analog boards after the concatenation. The ID address of each analog board can be determined in the following manner. The upper computer can send an addressing instruction after being electrified, and the digital board receiving the addressing instruction can set the address to be 821. The digital board may then forward the addressing command to the first analog board (first analog board) and upon receipt the first analog board may address itself as 821. Then, the analog board with address 821 forwards the addressing command, the analog board receiving the addressing command can set its own address as 822, \ 8230, and so on, through the successive forwarding of one command, the addresses of all analog cards are addressed as: digital board 821, analog boards 822, \8230, and analog board 82n.

After receiving all the reply signals, the digital board can judge according to the reply result, the reply result can include the ID information of each analog board, and the ID information can be compared with the determined address addressing list, so that the ID information and the position information of the analog board without the reply signal can be determined, and the fault point of the analog board can be rapidly determined.

It should be understood that the above-mentioned failure test command may be any command capable of helping to confirm a failure, and the response message or response result may include a package message containing detection data of each analog board in response to the failure test command and identification information of the analog board, where the identification information may be an ID number, an SN number, or the like, as long as the identification information uniquely identifies the corresponding analog board. In this way, the failure data can be correlated to the identity and location of the simulation board from which it came without requiring an excessive increase in data traffic.

After each simulation board in the acquisition system receives the fault test instruction, the fault test instruction can be analyzed to obtain a working mode indicator, a current working mode is determined based on the working mode indicator, and fault detection is performed according to the current working mode to obtain detection data.

In addition, as can be seen from the foregoing description, each analog board may add a corresponding analog board identifier and an operation mode indicator to the respective detection data to generate a detection response packet, and may perform fault detection based on the detection response packet sent by each analog board in a stage-by-stage manner to generate a fault detection result (test result). In one implementation scenario, a current signal capable of characterizing a detection parameter value in a normal operation mode may be generated first, the current signal is converted into a voltage signal, the voltage signal is converted into a digital signal, and detection data capable of characterizing a certain test mode is generated.

As can be seen from the foregoing description, the acquisition system may perform fault detection based on the detection response data packets sent by each analog board stage by stage to generate a fault detection result. In one implementation, the following operations may be performed: and analyzing the detection response data packet sent by each analog board step by step to obtain detection data, an analog board identifier and a working mode indicator, and then determining the current working mode of the analog board according to the working mode indicator. And then, carrying out fault detection on the detection data based on the current working mode to determine whether the simulation board has faults or not. When it is determined that there is a failure, a failure type of the simulation board is determined, and position information of the simulation board is determined based on the simulation board identifier.

Next, the present solution may generate a display entry indicating an operational failure based on the simulation board identifier, the position information of the simulation board, the failure type, and the detection data. For example, when it is determined that the simulation board is not faulty, it is possible to determine position information of the simulation board based on the simulation board identifier, and generate a display entry indicating normal operation based on the simulation board identifier, the position information of the simulation board, and the detection data.

Compared with the traditional parallel bus cascade mode, the response information can reach the digital board only through a plurality of connectors of different channels, the reply signals are concurrent, if a certain analog board does not reply, the analog board and all analog boards before the analog board have problems, and the method is not beneficial to quickly positioning the specific analog board with faults. The problem of fault diagnosis of a traditional cascade mode is solved through the scheme, a specific certain simulation board can be quickly positioned through the response signal, and other interference factors which possibly influence the judgment result are eliminated.

As can be seen from the above description about the acquisition system, the embodiments of the present disclosure may monitor the working states of the digital board and the analog board inside the acquisition system and the data transmission state inside the acquisition system, and have excellent fault diagnosis capability, so as to facilitate field debugging and fault analysis. In addition, the scheme can carry out visual display and has the capability of faster, more accurate and more careful fault diagnosis, so that field debugging and fault analysis can be excellently and quickly completed, and the shutdown loss caused by equipment fault detection is reduced at the lowest cost.

While various embodiments of the present disclosure have been shown and described herein, it will be obvious to those skilled in the art that such embodiments are provided by way of example only. Numerous modifications, changes, and substitutions will occur to those skilled in the art without departing from the spirit and scope of the present disclosure. It should be understood that various alternatives to the embodiments of the disclosure described herein may be employed in practicing the disclosure. It is intended that the following claims define the scope of the disclosure and that equivalents or alternatives within the scope of these claims be covered thereby.

Claims (20)

1. A method of fault detection for an analog board for data acquisition, wherein the analog board includes a plurality of functional modules and a plurality of detection switches, the method comprising:

controlling the detection switch to execute preset switching so as to access the functional module to be detected into the corresponding transmission channel;

inputting associated test data to the functional module accessed to the corresponding transmission channel to obtain a test result of the functional module to be detected, wherein the test result is used for judging whether the functional module to be detected has a fault; and

and outputting the test result through the corresponding transmission channel so as to determine whether the functional module to be detected has a fault or not based on the test result.

2. The method according to claim 1, wherein controlling the detection switch to perform preset switching so as to connect the functional module to be detected to the corresponding transmission path comprises:

receiving mode instructions for controlling a plurality of detection switches to execute preset switching, wherein different mode instructions correspond to different preset switching; and

and controlling the switching of the plurality of detection switches according to the mode command so as to connect the functional module to be detected into the corresponding transmission channel.

3. The method of claim 1 or 2, wherein the plurality of functional modules includes a first functional module and a second functional module, the plurality of detection switches includes a first detection switch and a second detection switch, and the associated test data includes first test data for detecting the first functional module and second test data for detecting the second functional module, the method comprising:

in response to receiving a first mode instruction for detecting the first functional module, executing a first preset switching on the first detection switch and the second detection switch so as to access the first functional module into a first transmission path;

inputting first test data to the first functional module to obtain a first test result of the first functional module;

outputting the first test result through the first transmission path so as to determine whether a first functional module has a fault or not based on the first test result;

and/or

In response to receiving a second mode instruction for detecting the second functional module, performing second preset switching on the first detection switch and the second detection switch so as to access the second functional module into a second transmission path;

inputting second test data to the second functional module to obtain a second test result of the second functional module;

outputting the second test result through the second transmission path to determine whether a second functional module has a fault based on the second test result.

4. The method of claim 3, wherein the first functional module comprises a processor module and the second functional module comprises an analog-to-digital conversion module.

5. The method of claim 3, wherein the plurality of functional modules includes a detection module for collecting data by detection, the mode instructions further include a third mode instruction, the method comprising:

and responding to the received third mode instruction, and executing third preset switching on the first detection switch and the second detection switch so as to connect the detection module into a third transmission path.

6. The method of claim 1 or 2, wherein outputting the test result via the corresponding transmission path comprises:

and outputting the test result to an upper computer directly or indirectly connected with the simulation board through the corresponding transmission channel so that the upper computer can determine whether the functional module to be detected has a fault or not based on the test result.

7. A simulation board for data acquisition, comprising:

a plurality of functional modules, wherein each functional module is operative to perform a corresponding function of the simulation board;

a plurality of detection switches, each of which is connected to a corresponding functional module and operates to switch in the functional module to be detected into a corresponding transmission path by performing a preset switching in the fault detection of the analog board; and

the input and output interface is operated to input the associated test data to the functional module to be detected and output the test result of the functional module to be detected through the corresponding transmission channel so as to determine whether the functional module to be detected has a fault or not based on the test result.

8. The analog board according to claim 7, wherein the plurality of functional modules includes a first functional module operative to control the detection switch to perform a predetermined switching according to different mode commands so as to access the functional module to be detected into the corresponding transmission path, wherein different mode commands correspond to different predetermined switching.

9. The analog board of claim 8, further comprising a mode instruction register operative to receive and store the mode instruction, and wherein the first functional module is operative to control switching of the plurality of detection switches according to the mode instruction stored in the mode instruction register so as to switch the functional module to be detected into the corresponding transmission path.

10. The analog board of claim 8, wherein the plurality of functional modules further includes a second functional module, the plurality of detection switches includes a first detection switch and a second detection switch, the associated test data includes first test data for detecting the first functional module and second test data for detecting the second functional module, the mode instruction includes a first mode instruction and a second mode instruction, wherein the first functional module is operative to:

according to the first mode instruction, a first functional module is connected into a first transmission path, and first test data is controlled to be input into the first functional module, so that a first test result is output through the first transmission path;

and/or

And accessing the second functional module into a second transmission channel according to the second mode instruction, and controlling to input second test data to the second functional module so as to output a second test result through the second transmission channel.

11. The simulation board of claim 9, wherein the first functional module comprises a processor module and the second functional module comprises an analog-to-digital conversion module.

12. The simulation board of claim 11, wherein the plurality of functional modules comprises a probe module for collecting data by probing, the mode instructions further comprising third mode instructions, wherein the processor module is operative to perform a third preset switch on the first detection switch and the second detection switch in accordance with the third mode instructions to switch the probe module into a third transmission path.

13. The simulation board according to any one of claims 7 to 12, wherein the input/output interface is operable to output the test result to an upper computer directly or indirectly connected to the simulation board through the corresponding transmission path, so that the upper computer determines whether the functional module to be detected has a fault based on the test result.

14. An apparatus for fault detection of a mock board for data acquisition, comprising:

a processor; and

memory storing program instructions for fault detection of a mock board, which when executed by a processor, causes the implementation of the method according to any of claims 1-6.

15. A computer readable storage medium for failure detection of a mock board for data acquisition, storing program instructions for failure detection of a mock board for data acquisition, which when executed by a processor, causes the implementation of the method according to any of claims 1-6.

16. An acquisition system for data acquisition, comprising:

a plurality of the analog boards according to any one of claims 7-13, the plurality of analog boards being connected in series via respective input/output interfaces to enable progressive communication; and

host computer, it includes:

an upper computer communication interface operative to communicatively couple with a first one of the plurality of simulation boards to enable communicative interaction with the plurality of simulation boards;

the upper computer processor is operated to control the plurality of simulation boards through the upper computer communication interface and perform data processing on the data acquired by the simulation boards; and

a graphical user interface operative to graphically display, via control of the upper computer processor, processing results of the relevant information and data about the simulation board.

17. The acquisition system of claim 16, wherein:

the upper computer processor is operated to generate a mode instruction and send the mode instruction to a first simulation board in the plurality of simulation boards through the upper computer communication interface so that the mode instruction can be forwarded step by step among the plurality of simulation boards;

in response to receiving the mode instruction, the simulation board operates to execute the fault detection and output a test result to the upper computer step by step;

the upper computer processor is operative to receive the test results via the upper computer communication interface and determine a failed fault simulation board based on the test results; and

the graphical user interface is operative to graphically display information associated with the fault simulation panel under control of the upper computer processor.

18. The acquisition system according to claim 16, wherein the upper computer processor is further operative to determine a malfunctioning functional module in the failure simulation board based on the test results, and the graphical user interface is further operative to graphically display information related to the malfunctioning functional module.

19. The acquisition system according to claim 16, wherein the graphical user interface is operative to display the acquired data in a raw state and/or a corrected state in the first graphical area and to display the noise values of the corresponding pixels in the second graphical area as directed by the upper computer processor.

20. The acquisition system according to any one of claims 16 to 19 wherein the graphical user interface is further operative to graphically display information relating to the plurality of simulation panels in the form of entries with reference to the positional relationship of the plurality of simulation panels as directed by the host computer processor.

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