CN115706056A - Semiconductor structure and preparation method thereof - Google Patents
Semiconductor structure and preparation method thereof Download PDFInfo
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- CN115706056A CN115706056A CN202110936471.3A CN202110936471A CN115706056A CN 115706056 A CN115706056 A CN 115706056A CN 202110936471 A CN202110936471 A CN 202110936471A CN 115706056 A CN115706056 A CN 115706056A
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Abstract
The application relates to a semiconductor structure and a preparation method thereof, comprising a first passivation layer and a laminated structure; the laminated structure is positioned on the upper surface of the first passivation layer and comprises a second passivation layer and a hydrogen absorption layer which are sequentially laminated from bottom to top; wherein hydrogen elements are generated in the formation process of the second passivation layer, and the hydrogen absorption layer adsorbs the hydrogen elements generated in the formation process of the second passivation layer and/or in the subsequent passivation heat treatment process. According to the semiconductor structure, hydrogen elements generated in the second passivation layer forming process and/or the subsequent passivation heat treatment process are adsorbed by the hydrogen absorption layer, the problem of unstable negative bias temperature caused by the fact that the hydrogen elements enter the device interface to form a large number of unstable covalent bonds is avoided, and the stability and reliability of the performance of the semiconductor structure are improved.
Description
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to a semiconductor structure and a method for fabricating the same.
Background
As semiconductor technology has been developed, many devices need to be assembled on a single crystalline substrate, the devices need to be wired to each other, and as integration has been increased and feature sizes have been reduced, wiring density has to be increased, so that a passivation layer for electrical isolation between devices and between wires is very important; in addition, due to the difference between the surface and the internal structure of the semiconductor, the surface and the internal properties are different, the surface condition of the semiconductor plays an important role in the performance of the device, and the electrical properties of the surface of the device can be affected by only a trace amount of contamination on the surface. Therefore, in order to improve the stability and reliability of the device performance, it is necessary to isolate the device from the surrounding atmosphere, to enhance the blocking capability of the device against foreign ion contamination, to control and stabilize the characteristics of the semiconductor surface, to protect the interconnections inside the device, and to prevent the device from mechanical and chemical damage, and thus, the requirement of passivation of the surface of the semiconductor device has been proposed. The existing semiconductor device usually uses a silicon dioxide layer as a surface passivation layer, but the silicon dioxide layer can not completely block the diffusion of harmful impurities (such as sodium ions) to the silicon surface, which seriously affects the stability of the semiconductor device.
Conventionally, various surface passivation film growth processes have been used to address the above problems, in which silicon nitride (Si) is deposited by chemical vapor deposition 3 N 4 ) Is most suitable. The silicon nitride has compact structure and good chemical stability, and can effectively block the diffusion of water vapor and movable ions.
However, silicon nitride is formed using Silane (SiH) 4 ) And ammonia (NH) 3 ) The chemical reaction is completed in the environment of about 400 ℃, and a large amount of hydrogen elements are released; moreover, the passivation heat treatment after the deposition of the silicon nitride can also cause the release of a large amount of hydrogen elements existing in the silicon nitride; these hydrogen elements can enter the device interface to form a large number of unstable covalent bonds, resulting in a serious negative bias temperature instability problem.
Disclosure of Invention
In view of the foregoing, it is an object of the present invention to provide a semiconductor structure and a method for fabricating the same that can solve the above-mentioned problems.
According to some embodiments, in one aspect the present application provides a semiconductor structure comprising:
a first passivation layer;
the laminated structure is positioned on the upper surface of the first passivation layer and comprises a second passivation layer and a hydrogen absorption layer which are sequentially laminated from bottom to top; wherein the content of the first and second substances,
hydrogen is generated in the process of forming the second passivation layer;
the hydrogen absorption layer absorbs the hydrogen element generated during the formation of the second passivation layer and/or during the subsequent passivation heat treatment.
In one embodiment, the bottom layer and the top layer of the stacked structure are both the second passivation layer.
In one embodiment, the semiconductor structure further comprises a third passivation layer;
the third passivation layer is located on the upper surface of the laminated structure.
In one embodiment, the second passivation layer has a thickness greater than a thickness of the hydrogen absorption layer.
In one embodiment, the second passivation layer comprises a silicon nitride layer; the hydrogen-absorbing layer includes a titanium layer.
In one embodiment, the first passivation layer comprises a silicon dioxide layer.
According to some embodiments, another aspect of the present application provides a method for manufacturing a semiconductor structure, comprising:
providing a first passivation layer;
forming a laminated structure on the upper surface of the first passivation layer, wherein the laminated structure comprises a second passivation layer and a hydrogen absorption layer which are sequentially laminated from bottom to top; wherein the content of the first and second substances,
hydrogen elements are generated during the formation of the second passivation layer, and the hydrogen absorption layer adsorbs the hydrogen elements generated during the formation of the second passivation layer and/or during a subsequent passivation heat treatment.
In one embodiment, the forming a stacked structure on the upper surface of the first passivation layer includes:
forming the second passivation layer on the upper surface of the first passivation layer;
forming the hydrogen absorption layer on the upper surface of the second passivation layer;
and forming the second passivation layer on the upper surface of the hydrogen absorption layer.
In one embodiment, after the step of forming the second passivation layer on the upper surface of the hydrogen absorption layer, the method further includes the steps of:
forming the hydrogen absorption layer on the upper surface of the second passivation layer formed in the previous step;
forming the second passivation layer on the upper surface of the hydrogen absorption layer formed in the previous step;
repeating the above steps at least once.
In one embodiment, the second passivation layer comprises a silicon nitride layer.
In one embodiment, the second passivation layer is formed by a chemical vapor deposition process; the reaction gas in the chemical vapor deposition process comprises silane and ammonia gas, and the reaction temperature is 200-600 ℃.
In one embodiment, the hydrogen-absorbing layer comprises a titanium layer.
In one embodiment, the first passivation layer comprises a silicon dioxide layer.
In one embodiment, the stacked-layer structure is formed such that the second passivation layer has a thickness greater than that of the hydrogen absorption layer.
In one embodiment, after the step of forming the stacked structure on the upper surface of the first passivation layer, the method further includes the steps of:
and forming a third passivation layer on the upper surface of the laminated structure.
The disclosed embodiments provided by the present application have at least the following advantages:
according to the semiconductor structure, hydrogen elements generated in the second passivation layer forming process and/or the subsequent passivation heat treatment process are adsorbed by the hydrogen absorption layer, the problem of unstable negative bias temperature caused by the fact that the hydrogen elements enter the device interface to form a large number of unstable covalent bonds is avoided, and the stability and reliability of the performance of the semiconductor structure are improved.
According to the preparation method of the semiconductor structure, the hydrogen absorption layer is formed, and hydrogen elements generated in the second passivation layer forming process and/or the subsequent passivation heat treatment process are absorbed, so that the problem of unstable negative bias temperature caused by the fact that the hydrogen elements enter the interface of a device to form a large number of unstable covalent bonds is avoided, and the stability and the reliability of the performance of the semiconductor structure are improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic cross-sectional view of a conventional semiconductor structure;
FIG. 2 is a flow chart of a method of fabricating a semiconductor structure provided in one embodiment of the present application;
fig. 3 is a schematic cross-sectional view of the structure obtained in step S1 in a method for manufacturing a semiconductor structure according to an embodiment of the present application;
fig. 4 is a flowchart of step S2 in a method for fabricating a semiconductor structure according to an embodiment of the present application;
fig. 5 is a schematic cross-sectional view illustrating a structure obtained in step S201 in a method for manufacturing a semiconductor structure according to an embodiment of the present application;
fig. 6 is a schematic cross-sectional view illustrating the structure obtained in step S202 in the method for fabricating a semiconductor structure according to an embodiment of the present application;
fig. 7 is a schematic cross-sectional view of the structure obtained in step S203 in the method for manufacturing a semiconductor structure according to an embodiment of the present application;
fig. 8 is a schematic cross-sectional view of the structure obtained in step S2 in the method for manufacturing a semiconductor structure according to an embodiment of the present application;
fig. 9 is a schematic cross-sectional view of the structure obtained in step S3 in the method for manufacturing a semiconductor structure according to an embodiment of the present application; fig. 9 is also a schematic cross-sectional view of a semiconductor structure provided in some embodiments of the present application.
Description of reference numerals:
1', 1, a first passivation layer; 2', passivating the film layer; 2. a laminated structure; 201. a second passivation layer; 202. a hydrogen-absorbing layer; 3. and a third passivation layer.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are set forth in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layer or intervening elements or layers may be present. It will be understood that, although the terms first or second may be used to describe various elements, components, regions, layers, doping types and/or sections, these elements, components, regions, layers, doping types and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or section from another element, component, region, layer, doping type or section. Thus, a first element, component, region, layer, doping type or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention; for example, the first passivation layer may be referred to as a second passivation layer, and similarly, the second passivation layer may be referred to as a first passivation layer; the first passivation layer and the second passivation layer are different passivation layers, for example, the first passivation layer may include a silicon dioxide layer, and the second passivation layer may include a silicon nitride layer; or the first passivation layer may comprise a silicon nitride layer and the second passivation layer may comprise a silicon dioxide layer.
Spatial relationship terms, such as "in.. Above," may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, in this specification, the term "and/or" includes any and all combinations of the associated listed items.
Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention, such that variations from the shapes shown are to be expected, for example, due to manufacturing techniques and/or tolerances. Thus, embodiments of the present invention should not be limited to the particular shapes of regions illustrated herein, but are to include deviations in shapes that result, for example, from manufacturing techniques. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present invention.
In order to avoid the influence on the device caused by the diffusion of the impurities in the external environment into the integrated circuit and improve the stability and reliability of the performance of the device, a layer of surface passivation protective film is usually deposited in the chip manufacturing process to block the diffusion of water vapor and movable ions; wherein silicon nitride (Si) 3 N 4 ) It is most suitable because of its compact structure and good chemical stability. As shown in FIG. 1, the conventional semiconductor structure comprises a first semiconductor layer stacked from bottom to topA passivation layer 1 'and a surface passivation film layer 2'. However, silicon nitride is formed using Silane (SiH) 4 ) And ammonia (NH) 3 ) The chemical reaction is completed in the environment of about 400 ℃, and a large amount of hydrogen elements are released; moreover, the passivation heat treatment after the deposition of the silicon nitride can also cause the release of a large amount of hydrogen elements existing in the silicon nitride; these hydrogen elements can enter the device interface to form a large number of unstable covalent bonds, resulting in a severe negative bias temperature instability effect.
Referring to fig. 2, to solve the above problems or other problems, according to some embodiments, a method for fabricating a semiconductor structure is provided, which may include:
s1: providing a first passivation layer;
s2: and forming a laminated structure on the upper surface of the first passivation layer, wherein the laminated structure comprises a second passivation layer and a hydrogen absorption layer which are sequentially laminated from bottom to top.
Wherein, hydrogen elements are generated in the process of forming the second passivation layer, and the hydrogen absorption layer can absorb the hydrogen elements generated in the process of forming the second passivation layer and/or the process of subsequent passivation heat treatment.
In the method for manufacturing a semiconductor structure according to the embodiment, the hydrogen absorption layer is formed, and hydrogen elements generated in the second passivation layer forming process and/or the subsequent passivation heat treatment process are absorbed, that is, hydrogen elements generated in the second passivation layer forming process, hydrogen elements generated in the subsequent passivation heat treatment process, or hydrogen elements generated in the second passivation layer forming process and the subsequent passivation heat treatment process are absorbed, so that a negative bias temperature instability effect caused by a large number of unstable covalent bonds formed when hydrogen elements enter the device interface is avoided, and the stability and reliability of the performance of the semiconductor structure are improved.
In step S1, please refer to S1 in fig. 2 and fig. 3, a first passivation layer 1 is provided.
The material of the first passivation layer 1 may include, but is not limited to, silicon dioxide (SiO) 2 ) Aluminum oxide (Al) 2 O 3 ) Borosilicate glass, phosphosilicate glass (PSG), semi-insulating polysilicon, etc., for the first passivation layer 1The specific material and structure of the film are not limited; specifically, in this embodiment, the material of the first passivation layer 1 is silicon dioxide. The silicon dioxide can control and stabilize the electrical property of the surface of the semiconductor device, control and fix positive charges and reduce the surface recombination speed, so that the device can stably work.
In one example, the first passivation layer 1 may be formed on a surface of a substrate (not shown); the substrate may include, but is not limited to, a silicon substrate, a germanium substrate, a silicon carbide substrate, a gallium nitride substrate, or the like.
Referring to step S2 and fig. 4 to 7 in fig. 2, in one embodiment, step S2 may include the following steps:
s201: forming a second passivation layer 201 on the upper surface of the first passivation layer 1, as shown in fig. 5; specifically, the second passivation layer 201 may be formed by, but not limited to, a physical vapor deposition process or a chemical vapor deposition process;
s202: forming a hydrogen absorption layer 202 on the upper surface of the second passivation layer 201, as shown in fig. 6; specifically, the hydrogen absorption layer 202 may be formed by, but not limited to, a physical vapor deposition process or a chemical vapor deposition process;
s203: a second passivation layer 201 is formed on the upper surface of the hydrogen absorption layer 202, as shown in fig. 7.
Specifically, the second passivation layer 201 may include, but is not limited to, silicon nitride (Si) 3 N 4 ) A layer, the material and structure of the second passivation layer 201 are not limited in this application; more specifically, in one embodiment, the second passivation layer 201 comprises a silicon nitride layer. The silicon nitride is an inert medium, the chemical stability is good, the dielectric property is superior to that of silicon dioxide, the sodium resistance is strong, the thermal stability is good, the structure is compact, the embodiment can effectively block the diffusion of water vapor and movable ions through the silicon nitride layer, and the reliability and the stability of the device can be obviously improved.
Specifically, the hydrogen absorption layer 202 may include, but is not limited to, a titanium (Ti) layer, the material and structure of the hydrogen absorption layer 202 are not limited in this application, and any material having a characteristic of absorbing hydrogen is suitable; more specifically, in one embodiment, the hydrogen-absorbing layer 202 comprises a titanium layer, which proves to be a material that is effective in absorbing hydrogen elements, and the above-described embodiment can effectively adsorb hydrogen elements generated during the formation of the second passivation layer and/or during the subsequent passivation heat treatment through the titanium layer.
Specifically, in one embodiment, the second passivation layer 201 is formed using a chemical vapor deposition process.
By adopting the chemical vapor deposition process, the deposition film-forming device is simple, the reaction source material required by film formation is easy to obtain, and the cost can be reduced; meanwhile, the nitride film layer can be manufactured at a deposition temperature which is greatly lower than the melting point or the decomposition temperature of the nitride film layer by adopting a chemical vapor deposition process; and the chemical vapor deposition process is adopted, so that the deposition process can be accurately controlled through vapor doping, and the flexibility is higher.
Specifically, in one embodiment in which the second passivation layer 201 is formed by a chemical vapor deposition process, the reaction gas in the chemical vapor deposition process may include, but is not limited to, silane (SiH) 4 ) And ammonia (NH) 3 ) The reaction gas of the chemical vapor deposition process is not limited in the present application; more specifically, the reaction gases in the chemical vapor deposition process of the present embodiment include silane and ammonia.
Specifically, in one embodiment in which the second passivation layer 201 is formed by a chemical vapor deposition process, the reaction temperature is 200 ℃ to 600 ℃, such as 200 ℃, 300 ℃, 400 ℃, 500 ℃, or 600 ℃, and the like, and the reaction temperature for forming the second passivation layer 201 by a chemical vapor deposition process is not limited in the present application.
In one embodiment, as shown in fig. 8, step S202 and step S203 may be repeated at least once after step S203; that is, the following steps may also be repeated at least once after step S203: forming a hydrogen absorption layer 202 on the upper surface of the second passivation layer 201 formed in step S203; a second passivation layer 201 is formed on the upper surface of the hydrogen absorption layer 202 formed in the previous step.
The semiconductor manufacturing method provided by the above embodiment can form a multilayer structure in which the plurality of second passivation layers 201 and the hydrogen absorption layers 202 are sequentially stacked, wherein the plurality of second passivation layers 201 can further improve the reliability and stability of the device, and the plurality of hydrogen absorption layers 202 can fully absorb hydrogen elements generated in the process of forming the second passivation layers and/or the subsequent passivation heat treatment process from top to bottom, so that the situation that the hydrogen absorption layers 202 cannot be fully absorbed due to too many hydrogen elements generated in the reaction process because the hydrogen absorption layers 202 are single can be avoided.
The specific number of times of sequentially repeating steps S202 and S203 after step S203 may be set according to needs, and is not limited in the present application, for example, after step S203, the steps S202 and S203 may be sequentially repeated one, two, five, ten, fifty or more times.
In the stacked-layer structure 2 formed in one embodiment, the second passivation layer 201 has a thickness greater than that of the hydrogen absorption layer 202.
Referring to fig. 9, in one embodiment, the following steps may be further included after step S2:
s3: a third passivation layer 3 is formed on the upper surface of the stacked structure 2.
It should be understood that, although the steps in the flowcharts of fig. 2 and 4 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 2 and 4 may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the steps or stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least a portion of the steps or stages in other steps.
With continued reference to fig. 8 to 9, the present application further provides a semiconductor structure according to some embodiments, which includes a first passivation layer 1 and a stacked structure 2, wherein the stacked structure 2 is located on an upper surface of the first passivation layer 1.
Specifically, the stacked structure 2 includes a second passivation layer 201 and a hydrogen absorption layer 202 stacked in sequence from bottom to top; wherein, hydrogen element is generated during the formation of the second passivation layer 201; the hydrogen absorption layer 202 is capable of absorbing hydrogen elements generated during the formation of the second passivation layer 201 and/or during the subsequent passivation heat treatment.
In the semiconductor structure provided by the above embodiment, the hydrogen absorbing layer absorbs hydrogen elements generated in the second passivation layer forming process and/or the subsequent passivation heat treatment process, that is, the hydrogen absorbing layer absorbs hydrogen elements generated in the second passivation layer forming process, hydrogen elements generated in the subsequent passivation heat treatment process, or hydrogen elements generated in the second passivation layer forming process and the subsequent passivation heat treatment process, so that the problem of unstable negative bias temperature caused by a large amount of unstable covalent bonds formed when hydrogen elements enter the device interface is avoided, and the stability and reliability of the performance of the semiconductor structure are improved.
In one embodiment, the material of the first passivation layer 1 may include, but is not limited to, silicon dioxide (SiO) 2 ) Alumina (Al) 2 O 3 ) Any one or more of borosilicate glass, phosphosilicate glass (PSG), semi-insulating polysilicon and the like, and the specific material and structure of the first passivation layer 1 are not limited in the application; specifically, in this embodiment, the material of the first passivation layer 1 is silicon dioxide. The silicon dioxide can control and stabilize the electrical property of the surface of the semiconductor device, control and fix positive charges and reduce the surface recombination speed, so that the device can stably work.
In one example, the first passivation layer 1 may be formed on a surface of a substrate (not shown); the substrate may include, but is not limited to, a silicon substrate, a germanium substrate, a silicon carbide substrate, a gallium nitride substrate, or the like.
In one embodiment, the second passivation layer 201 may include, but is not limited to, a silicon nitride layer, and the material and structure of the second passivation layer 201 are not limited herein; more specifically, in one of the embodiments, the second passivation layer 201 includes a silicon nitride layer. The silicon nitride is an inert medium, the chemical stability is good, the medium property is superior to that of silicon dioxide, the sodium resistance is strong, the thermal stability is good, the structure is compact, the embodiment can effectively block the diffusion of water vapor and movable ions through the silicon nitride layer, and the reliability and the stability of the device can be obviously improved.
In one embodiment, the hydrogen absorption layer 202 may include, but is not limited to, a titanium layer, and the material and structure of the hydrogen absorption layer 202 are not limited herein; more specifically, in one embodiment, the hydrogen-absorbing layer 202 comprises a titanium layer, which proves to be a material that is effective in absorbing hydrogen elements, and the above-described embodiment can effectively adsorb hydrogen elements generated during the formation of the second passivation layer and/or during the subsequent passivation heat treatment through the titanium layer.
With continued reference to fig. 9, in one embodiment, the stacked structure 2 may include a plurality of hydrogen absorption layers 202 and second passivation layers 201 stacked from bottom to top, and the plurality of hydrogen absorption layers 202 and second passivation layers 201 stacked from bottom to top are located on the upper surface of the second passivation layer 201 near the first passivation layer 1.
The semiconductor structure provided by the above embodiment has a multilayer structure in which a plurality of second passivation layers 201-hydrogen absorption layers 202 are sequentially stacked, wherein the plurality of second passivation layers 201 can further improve the reliability and stability of the device, and the plurality of hydrogen absorption layers 202 can fully absorb hydrogen elements generated in the process of forming the second passivation layers and/or the process of subsequent passivation heat treatment from top to bottom, so that the situation that the hydrogen absorption layers 202 cannot be fully absorbed due to too many hydrogen elements generated in the reaction process because the hydrogen absorption layers 202 are single can be avoided.
As shown in fig. 8 to 9, in one embodiment, the bottom layer and the top layer of the stacked structure 2 may be both the second passivation layer 201.
The semiconductor structure provided by the above embodiment uses the second passivation layer 201 as the top layer of the stacked structure 2, so that the reliability and stability of the device can be further ensured.
The thickness of the second passivation layer 201 may be greater than the thickness of the hydrogen absorption layer 202, or may be less than or equal to the thickness of the hydrogen absorption layer 202, and the size relationship between the thickness of the second passivation layer 201 and the thickness of the hydrogen absorption layer 202 is not limited in the present application; specifically, in one embodiment, the thickness of the second passivation layer 201 may be greater than the thickness of the hydrogen absorption layer 202.
With continued reference to fig. 9, in one embodiment, the semiconductor structure may further include a third passivation layer 3; specifically, the third passivation layer 3 is located on the upper surface of the stacked structure 2.
The material of the third passivation layer 3 may include, but is not limited to, silicon dioxide (SiO) 2 ) Alumina (Al) 2 O 3 ) Any one or more of borosilicate glass, phosphosilicate glass (PSG), semi-insulating polysilicon, etc., and the specific material and structure of the third passivation layer 3 are not limited in this application.
In the description herein, reference to the description of the term "one of the embodiments" or "some of the embodiments" or the like means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one of the embodiments or examples of the application. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features of the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (15)
1. A semiconductor structure, comprising:
a first passivation layer;
the laminated structure is positioned on the upper surface of the first passivation layer and comprises a second passivation layer and a hydrogen absorption layer which are sequentially laminated from bottom to top; wherein the content of the first and second substances,
hydrogen element is generated during the formation of the second passivation layer;
the hydrogen absorption layer absorbs the hydrogen element generated during the formation of the second passivation layer and/or during the subsequent passivation heat treatment.
2. The semiconductor structure of claim 1, wherein the bottom layer and the top layer of the stacked structure are both the second passivation layer.
3. The semiconductor structure of claim 2, further comprising a third passivation layer;
the third passivation layer is located on the upper surface of the laminated structure.
4. The semiconductor structure of claim 1, wherein a thickness of the second passivation layer is greater than a thickness of the hydrogen-absorbing layer.
5. The semiconductor structure of claim 1, wherein the second passivation layer comprises a silicon nitride layer; the hydrogen-absorbing layer includes a titanium layer.
6. The semiconductor structure of claim 5, wherein the first passivation layer comprises a silicon dioxide layer.
7. A method for manufacturing a semiconductor structure, comprising the steps of:
providing a first passivation layer;
forming a laminated structure on the upper surface of the first passivation layer, wherein the laminated structure comprises a second passivation layer and a hydrogen absorption layer which are sequentially laminated from bottom to top; wherein, the first and the second end of the pipe are connected with each other,
hydrogen elements are generated during the formation of the second passivation layer, and the hydrogen absorption layer adsorbs the hydrogen elements generated during the formation of the second passivation layer and/or during a subsequent passivation heat treatment.
8. The method for fabricating a semiconductor structure according to claim 7, wherein the step of forming a stacked structure on the upper surface of the first passivation layer comprises the steps of:
forming the second passivation layer on the upper surface of the first passivation layer;
forming the hydrogen absorption layer on the upper surface of the second passivation layer;
and forming the second passivation layer on the upper surface of the hydrogen absorption layer.
9. The method of claim 8, further comprising the step of, after the step of forming the second passivation layer on the upper surface of the hydrogen absorption layer:
forming the hydrogen absorption layer on the upper surface of the second passivation layer formed in the previous step;
forming the second passivation layer on the upper surface of the hydrogen absorption layer formed in the previous step;
repeating the above steps at least once.
10. The method of claim 8 or 9, wherein the second passivation layer comprises a silicon nitride layer.
11. The method of claim 10, wherein the second passivation layer is formed by a chemical vapor deposition process; the reaction gas in the chemical vapor deposition process comprises silane and ammonia gas, and the reaction temperature is 200-600 ℃.
12. The method of claim 10, wherein the hydrogen-absorbing layer comprises a titanium layer.
13. The method of claim 12, wherein the first passivation layer comprises a silicon dioxide layer.
14. The method for manufacturing a semiconductor structure according to claim 8 or 9, wherein the stacked structure is formed such that the thickness of the second passivation layer is greater than the thickness of the hydrogen absorption layer.
15. The method for fabricating a semiconductor structure according to claim 7, further comprising, after the step of forming the stacked structure on the upper surface of the first passivation layer:
and forming a third passivation layer on the upper surface of the laminated structure.
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