CN115701658A - Image sensor and forming method thereof - Google Patents

Image sensor and forming method thereof Download PDF

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Publication number
CN115701658A
CN115701658A CN202110881916.2A CN202110881916A CN115701658A CN 115701658 A CN115701658 A CN 115701658A CN 202110881916 A CN202110881916 A CN 202110881916A CN 115701658 A CN115701658 A CN 115701658A
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China
Prior art keywords
layer
forming
semiconductor substrate
isolation
dielectric
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CN202110881916.2A
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Chinese (zh)
Inventor
杨瑞坤
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Galaxycore Shanghai Ltd Corp
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Galaxycore Shanghai Ltd Corp
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Priority to CN202110881916.2A priority Critical patent/CN115701658A/en
Publication of CN115701658A publication Critical patent/CN115701658A/en
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Abstract

The invention provides a method for forming an image sensor, which comprises the following steps: providing a semiconductor substrate; before the grid is formed, an isolation medium layer with a hollow gap is formed in the semiconductor substrate; and after the back of the wafer is thinned, selectively etching to expose the isolation dielectric layer to a preset height on the back of the semiconductor substrate to form a dielectric grid, wherein the color filter of the image sensor is arranged in the dielectric grid, and the dielectric grid realizes the optical isolation of the adjacent color filters. The invention also provides an image sensor formed by adopting the forming method. Through the scheme, the forming process of the pixel grid can be simplified, and the isolation effect is improved.

Description

Image sensor and forming method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to an image sensor and a forming method thereof.
Background
For the existing back-illuminated image sensor, the PN junction structure of the image sensor is usually completed before the device process (FSI), and deep trenches are made after the wafer is thinned (BSI), so as to form isolation between pixels. However, when a deep trench structure is formed in the rear section, the depth of the trench is different due to the limitation of the size difference between the line width of the pixel intersection and the line width of the adjacent pixel intersection. In addition, because the previous device and metal process are completed, the high-temperature process cannot be endured, and the damage caused by etching cannot be eliminated, thereby affecting the image effect. Similarly, the alignment of the deep trench structure is affected by the wafer distortion of the thinning process and the photolithography process, and the alignment deviation with the previous PN junction also affects the image effect.
In the conventional process, when the color filter of the pixel unit is disposed, the metal material is usually etched again on the substrate to form the metal grid, and the color filter and the like are disposed therein, which complicates the process steps.
Disclosure of Invention
The invention aims to provide an image sensor and a forming method thereof, which have simple process and easy realization.
Specifically, the present invention provides an image sensor forming method including:
providing a semiconductor substrate;
before the grid is formed, an isolation medium layer with a hollow gap is formed in the semiconductor substrate;
and after the back of the wafer is thinned, selectively etching to expose the isolation dielectric layer to a preset height on the back of the semiconductor substrate to form a dielectric grid, wherein the color filter of the image sensor is arranged in the dielectric grid, and the dielectric grid realizes the optical isolation of the adjacent color filters.
Further, the forming of the isolation dielectric layer with a hollow gap in the semiconductor substrate includes:
forming a first trench in the semiconductor substrate according to a first lithography pattern;
forming a first epitaxial layer on the surface of the first groove through epitaxy so as to reduce the line width of the first groove;
forming a first dielectric layer uniformly covering the bottom and the side wall of the first groove on the surface of the first epitaxial layer by a thermal oxidation and/or atomic layer deposition process;
filling a medium on the surface of the first medium layer by a chemical vapor deposition process, and controlling the filling speed and direction to quickly close the opening of the first groove to form the isolation medium layer with a hollow gap.
Further, the first epitaxial layer comprises a doping layer with the type opposite to that of the semiconductor substrate.
Further, the forming a first epitaxial layer on the surface of the first trench by epitaxy includes:
epitaxially forming an intrinsic semiconductor layer on the surface of the first groove;
and forming a doped epitaxial layer with the type opposite to that of the semiconductor substrate on the surface of the intrinsic semiconductor layer through epitaxy, and forming the first epitaxial layer with the intrinsic semiconductor layer.
Further, the chemical vapor deposition process includes any one of high concentration plasma deposition, high aspect ratio chemical vapor deposition, or flowable chemical vapor deposition.
Further, the forming a dielectric grid by exposing the isolation dielectric layer to a predetermined height on the back surface of the semiconductor substrate through selective etching includes:
thinning the back surface of the semiconductor substrate until the surface of the isolation dielectric layer is exposed;
and selectively etching the semiconductor substrate to expose the isolation dielectric layer to a preset height on the back surface of the semiconductor substrate to form the dielectric grid.
Further, after the forming the dielectric mesh, the method further includes:
forming a charged dielectric layer and/or an optical anti-reflection layer on the surface of the dielectric grid;
and the charged dielectric layer and/or the optical anti-reflection layer are/is filled with the color filters, and the adjacent color filters are laterally optically isolated by the dielectric grids.
Further, after the forming of the isolation dielectric layer with the hollow gap in the semiconductor substrate, the method further includes:
and forming a device layer on the surfaces of the semiconductor substrate and the isolation medium layer through epitaxy.
Further, the forming a device layer on the surface of the semiconductor substrate and the surface of the isolation medium layer through epitaxy includes:
epitaxially forming a first epitaxial layer above the semiconductor substrate and the isolation medium layer;
and flattening the surface of the first epitaxial layer by chemical mechanical polishing.
The invention also provides an image sensor formed by the forming method.
According to the scheme, the isolation grids of the color filter are formed simultaneously when the pixel unit isolation region is formed, and are formed through etching in the follow-up process. The process steps are effectively simplified, and compared with the original process, the process stability, the consistency of the chip and the yield are improved.
Drawings
Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments thereof, which proceeds with reference to the accompanying drawings.
Fig. 1 to 3 are schematic structural diagrams of an image sensor in an image sensor forming process according to the present invention.
In the drawings, like or similar reference numbers indicate like or similar devices (modules) or steps throughout the different views.
Detailed Description
In the present invention, specifically, an image sensor forming method is provided in the present invention, including the steps of:
step S1: providing a semiconductor substrate 100;
step S2: before forming a gate, forming an isolation dielectric layer 200 with a hollow gap 122 in the semiconductor substrate 100;
in an alternative embodiment, as shown in fig. 1, the step S2 of forming the isolation dielectric layer 200 having the hollow gap 122 may be implemented by the following steps:
step S21: forming a first trench 120 in the semiconductor substrate 100 according to a first photolithography pattern;
step S22: forming a first epitaxial layer 121 on the surface of the first trench 120 by epitaxy, so that the line width of the first trench 120 can be reduced, and the line width of the trench can be more easily controlled by epitaxy;
preferably, a doped layer 124 of the opposite type to the semiconductor substrate 100 is included in the first epitaxial layer 121, thereby forming a lateral PN junction structure.
Further, as shown in fig. 1, the formation of the first epitaxial layer 121 on the surface of the first trench 120 by epitaxy may be achieved by:
step S221: epitaxially forming an intrinsic semiconductor layer 123 on the surface of the first trench 120;
step S222: a doped epitaxial layer 124 of the type opposite to that of the semiconductor substrate 100 is formed on the surface of the intrinsic semiconductor layer 123 by epitaxy, and the first epitaxial layer 121 is formed with the intrinsic semiconductor layer 123.
A doped epitaxial layer 124 of the opposite type to the semiconductor substrate 100 may form a lateral PN junction structure with the semiconductor substrate 100.
Step S23: as shown in fig. 1, a first dielectric layer 130 is formed on the surface of the first epitaxial layer 121 by thermal oxidation and/or atomic layer deposition to uniformly cover the bottom and sidewalls of the first trench 120.
Step S24: filling a medium on the surface of the first medium layer 130 by a chemical vapor deposition process, and controlling the filling rate and direction to rapidly close the opening of the first trench 120, thereby forming the isolation medium layer 200 with the hollow gap 122. Preferably, the chemical vapor deposition process includes any one of high concentration plasma deposition, high aspect ratio chemical vapor deposition, or flowable chemical vapor deposition, and the present invention is not particularly limited thereto.
And step S3: after the back of the wafer is thinned, the isolation dielectric layer 200 is exposed to a predetermined height on the back of the semiconductor substrate 100 through selective etching to form a dielectric grid 210, the color filter 300 of the image sensor is arranged in the dielectric grid 210, and the dielectric grid 210 realizes optical isolation of the adjacent color filters 300.
In an alternative embodiment, in step S3, by selectively etching, the isolation dielectric layer 200 is exposed to a predetermined height on the back surface of the semiconductor substrate 100, and the formation of the dielectric grid 210 may be implemented by:
step S31: thinning the back surface of the semiconductor substrate 100 until the surface of the isolation dielectric layer 200 is exposed;
step S32: and selectively etching the semiconductor substrate 100 to expose the isolation dielectric layer 200 to a predetermined height on the back surface of the semiconductor substrate 100, thereby forming the dielectric grid 210.
In an alternative embodiment of the present invention, after forming the dielectric mesh 210 in step S3, the method further includes:
step S41: forming a charged dielectric layer 211 and/or an optical anti-reflection layer 212 on the surface of the dielectric grid 210;
step S42: the color filters 300 are filled in the charged dielectric layer 211 and/or the optical anti-reflection layer 222, and the adjacent color filters 300 are laterally optically isolated by the dielectric grids 210.
Then, a grating 310 and a microlens 320 may be disposed on the anti-reflection layer 212 to form an image sensor structure, as shown in fig. 3.
In an alternative embodiment of the present invention, after the isolation dielectric layer 200 having the hollow gap 122 is formed in step S2, as shown in fig. 2, the following steps may be further performed:
step S5: and forming a device layer 400 on the surfaces of the semiconductor substrate 100 and the isolation dielectric layer 200 through epitaxy.
On this basis, it is preferable that step S5 includes:
step S51: epitaxially forming a first epitaxial layer above the semiconductor substrate 100 and the isolation dielectric layer 200;
step S52: the surface of the first epitaxial layer is planarized by chemical mechanical polishing to form the device layer 400.
In the device layer 400, a photosensitive region and an isolation region may be formed in the device layer 400 by ion implantation or the like, electrically connected to the photosensitive region and the isolation region in the semiconductor substrate 100, respectively, and the device may be disposed.
The invention also provides an image sensor formed by the forming method. The metal isolation grid of the pixel unit color filter is formed in an etching mode, so that the process difficulty is simplified, and the isolation effect is improved.
By combining the steps, the invention can realize the forming process of the image sensor, and the invention also comprises the image sensor which is realized by adopting the steps of the method.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive. Furthermore, it will be obvious that the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. Several elements recited in the apparatus claims may also be implemented by one element. The terms first, second, etc. are used to denote names, but not any particular order.

Claims (10)

1. A method of forming an image sensor, comprising:
providing a semiconductor substrate;
before the grid is formed, an isolation medium layer with a hollow gap is formed in the semiconductor substrate;
and after the back of the wafer is thinned, selectively etching to expose the isolation dielectric layer to a preset height on the back of the semiconductor substrate to form a dielectric grid, wherein the color filter of the image sensor is arranged in the dielectric grid, and the dielectric grid realizes the optical isolation of the adjacent color filters.
2. The method of claim 1, wherein forming an isolation dielectric layer having a hollow gap in the semiconductor substrate comprises:
forming a first trench in the semiconductor substrate according to a first lithography pattern;
forming a first epitaxial layer on the surface of the first groove through epitaxy so as to reduce the line width of the first groove;
forming a first dielectric layer uniformly covering the bottom and the side wall of the first groove on the surface of the first epitaxial layer by a thermal oxidation and/or atomic layer deposition process;
filling a medium on the surface of the first medium layer by a chemical vapor deposition process, and controlling the filling speed and direction to quickly close the opening of the first groove to form the isolation medium layer with a hollow gap.
3. The method of claim 2, wherein the first epitaxial layer comprises a doped layer of a type opposite to the semiconductor substrate.
4. The image sensor forming method of claim 2, wherein the forming a first epitaxial layer on the first trench surface by epitaxy comprises:
epitaxially forming an intrinsic semiconductor layer on the surface of the first groove;
and forming a doped epitaxial layer with the type opposite to that of the semiconductor substrate on the surface of the intrinsic semiconductor layer through epitaxy, and forming the first epitaxial layer with the intrinsic semiconductor layer.
5. The method of claim 2, wherein the chemical vapor deposition process comprises any one of high density plasma deposition, high aspect ratio chemical vapor deposition, or flowable chemical vapor deposition.
6. The method as claimed in claim 1, wherein said forming a dielectric grid by selectively etching to expose said isolation dielectric layer to a predetermined height on the back side of said semiconductor substrate comprises:
thinning the back surface of the semiconductor substrate until the surface of the isolation dielectric layer is exposed;
and selectively etching the semiconductor substrate to expose the isolation dielectric layer to a preset height on the back surface of the semiconductor substrate to form the dielectric grid.
7. The method of forming an image sensor of claim 1, further comprising, after said forming a media grid:
forming a charged dielectric layer and/or an optical anti-reflection layer on the surface of the dielectric grid;
and the charged dielectric layer and/or the optical anti-reflection layer are/is filled with the color filters, and the adjacent color filters are laterally optically isolated by the dielectric grids.
8. The method of claim 1, wherein after forming the isolation dielectric layer having the hollow gap in the semiconductor substrate, further comprising:
and forming a device layer on the surfaces of the semiconductor substrate and the isolation medium layer through epitaxy.
9. The method of claim 8, wherein the forming a device layer on the surface of the semiconductor substrate and the isolation dielectric layer by epitaxy comprises:
epitaxially forming a first epitaxial layer above the semiconductor substrate and the isolation medium layer;
and flattening the surface of the first epitaxial layer by chemical mechanical polishing.
10. An image sensor formed by the forming method according to claims 1 to 10.
CN202110881916.2A 2021-08-02 2021-08-02 Image sensor and forming method thereof Pending CN115701658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110881916.2A CN115701658A (en) 2021-08-02 2021-08-02 Image sensor and forming method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110881916.2A CN115701658A (en) 2021-08-02 2021-08-02 Image sensor and forming method thereof

Publications (1)

Publication Number Publication Date
CN115701658A true CN115701658A (en) 2023-02-10

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110881916.2A Pending CN115701658A (en) 2021-08-02 2021-08-02 Image sensor and forming method thereof

Country Status (1)

Country Link
CN (1) CN115701658A (en)

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