CN115701035A - Data transmission method and device and automobile - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 230000005540 biological transmission Effects 0.000 title claims abstract description 47
- 238000006243 chemical reaction Methods 0.000 claims abstract description 33
- 238000003860 storage Methods 0.000 claims description 28
- 238000012545 processing Methods 0.000 claims description 15
- 238000004364 calculation method Methods 0.000 claims description 2
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- 238000004891 communication Methods 0.000 abstract description 2
- 238000004590 computer program Methods 0.000 description 10
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- 230000003287 optical effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000005429 filling process Methods 0.000 description 2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/46—Interconnection of networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/66—Arrangements for connecting between networks having differing types of switching systems, e.g. gateways
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Abstract
The application discloses a data transmission method, a data transmission device and an automobile, and relates to the technical field of automobile communication. The method of the present application comprises: receiving a target data packet sent by first target equipment; carrying out format conversion on the target data packet to obtain a target VLAN data packet; and sending the target VLAN data packet to a second target device. The method and the device are suitable for the process that one device in the automobile sends the data packet to the other device.
Description
Technical Field
The invention relates to the technical field of automobile communication, in particular to a data transmission method and device and an automobile.
Background
In recent years, with the development of society, people have more and more demand for automobiles, and automobiles become an indispensable part of people's daily life. In order to ensure the normal running of the automobile, data interaction is required among all sensors, actuators and a core processor in the automobile.
At present, when one device in an automobile needs to send a data packet to another device, the device usually sends the data packet to an MCU first, the MCU converts the received data packet into UDP/TCP data format, and then sends the data packet after format conversion to another device based on UDP/TCP protocol. However, since the MCU transmits the format-converted data packet to another device based on the UDP/TCP protocol, the format-converted data packet is substantially transmitted to another device in the transport layer, so that the transmission process of the whole data packet is delayed more and the transmission efficiency is lower.
Disclosure of Invention
The embodiment of the application provides a data transmission method, a data transmission device and an automobile, and mainly aims to improve the transmission efficiency of sending a data packet from one device to another device in the automobile.
In order to solve the above technical problem, an embodiment of the present application provides the following technical solutions:
in a first aspect, the present application provides a data transmission method, where the method is applied in an FPGA (Field Programmable Gate Array) chip, and the method includes:
receiving a target data packet sent by first target equipment;
carrying out format conversion on the target data packet to obtain a target VLAN data packet;
and sending the target VLAN data packet to a second target device.
Optionally, before performing format conversion on the target packet to obtain a target VLAN packet, the method further includes:
determining the data bit width corresponding to the target data packet;
judging whether the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value or not;
if so, filling the target data packet by using preset data;
the format conversion of the target data packet to obtain the target VLAN data packet includes:
and performing format conversion on the target data packet subjected to filling processing to obtain the target VLAN data packet.
Optionally, the determining a data bit width corresponding to the target data packet includes:
calculating the data size of the target data packet;
and determining the data bit width corresponding to the target data packet according to the data volume of the target data packet.
Optionally, the sending the target VLAN data packet to a second target device includes:
and sending the target VLAN data packet to the second target device based on a VLAN protocol.
Optionally, the sending the target VLAN data packet to a second target device includes:
setting a transmission protocol corresponding to the target VLAN data packet as an AXI-Streaming protocol;
transmitting the target VLAN packet to the second target device based on the AXI-Streaming protocol.
Optionally, the target data packet is specifically: any one of a CAN data packet, an I2C data packet and a serial port data packet.
In a second aspect, the present application further provides an FPGA chip, including:
a receiving unit, configured to receive a target data packet sent by a first target device;
the conversion unit is used for carrying out format conversion on the target data packet so as to obtain a target VLAN data packet;
and the sending unit is used for sending the target VLAN data packet to second target equipment.
Optionally, the FPGA chip further includes:
a determining unit, configured to determine a data bit width corresponding to the target data packet before the converting unit performs format conversion on the target data packet to obtain a target VLAN data packet;
the judging unit is used for judging whether the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value or not;
the filling unit is used for filling the target data packet by using preset data when the judging unit judges that the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value;
the conversion unit is specifically configured to perform format conversion on the target data packet subjected to the padding processing to obtain the target VLAN data packet.
Optionally, the determining unit includes:
the calculation module is used for calculating the data volume of the target data packet;
and the determining module is used for determining the data bit width corresponding to the target data packet according to the data size of the target data packet.
Optionally, the sending unit includes:
and the first sending module is used for sending the target VLAN data packet to the second target equipment based on a VLAN protocol.
Optionally, the sending unit includes:
the setting module is used for setting the transmission protocol corresponding to the target VLAN data packet as an AXI-Streaming protocol;
a second sending module for sending the target VLAN packet to the second target device based on the AXI-Streaming protocol.
Optionally, the target data packet specifically includes: any one of a CAN data packet, an I2C data packet and a serial port data packet.
In a third aspect, an embodiment of the present application provides an automobile, where the automobile includes the FPGA chip of the second aspect.
In a fourth aspect, an embodiment of the present application provides a storage medium, where the storage medium includes a stored program, and when the program runs, a device in which the storage medium is located is controlled to execute the data transmission method according to the first aspect.
In a fifth aspect, an embodiment of the present application provides a data transmission apparatus, which includes a storage medium; and one or more processors, the storage medium coupled with the processors, the processors configured to execute program instructions stored in the storage medium; the program instructions when executed perform the data transmission method of the first aspect.
By means of the technical scheme, the technical scheme provided by the application at least has the following advantages:
the application provides a data transmission method, a data transmission device and an automobile, and can convert a format of a target data packet into a data packet in a VLAN data format by an FPGA chip after the FPGA chip receives the target data packet sent by a first target device so as to obtain the target VLAN data packet, and send the target VLAN data packet to a second target device in a network layer, so that the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is far shorter than the time consumed by an MCU to send the target data packet after format conversion to the second target device in a transmission layer, and the transmission efficiency of the first target device to send the target data packet to the second target device can be effectively improved.
The above description is only an overview of the technical solutions of the present application, and the present application may be implemented in accordance with the content of the description so as to make the technical means of the present application more clearly understood, and the detailed description of the present application will be given below in order to make the above and other objects, features, and advantages of the present application more clearly understood.
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The above and other objects, features and advantages of exemplary embodiments of the present application will become readily apparent from the following detailed description, which proceeds with reference to the accompanying drawings. Several embodiments of the present application are illustrated by way of example and not by way of limitation in the figures of the accompanying drawings and in which like reference numerals refer to similar or corresponding parts and in which:
fig. 1 is a flowchart illustrating a data transmission method provided by an embodiment of the present application;
fig. 2 is a flowchart illustrating another data transmission method provided in an embodiment of the present application;
fig. 3 shows a block diagram of an FPGA chip according to an embodiment of the present disclosure;
fig. 4 shows a block diagram of another FPGA chip provided in the embodiment of the present application.
Detailed Description
Exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which this application belongs.
An embodiment of the present application provides a data transmission method, as shown in fig. 1, where the method is applied to an FPGA chip, and the method includes:
101. and receiving a target data packet sent by the first target device.
In the embodiment of the application, the execution subject in each step is an FPGA chip preset in the target automobile.
The first target device may specifically be: any one of the devices such as the sensors, actuators, and core processors in the target vehicle is not specifically limited in this embodiment of the present application; the second target device may specifically be: any one of devices such as sensors, actuators, and core processors in the target vehicle is not specifically limited in this embodiment of the present application; the destination packet may specifically be: any one of low-speed data packets such as a CAN data packet, an I2C data packet, a serial port data packet and the like.
In the embodiment of the application, when a first target device needs to perform data interaction with a second target device, that is, the first target device needs to send a target data packet to the second target device, the first target device first needs to send the target data packet to an FPGA chip, and at this time, the FPGA chip can receive the target data packet sent by the first target device.
Specifically, in this step, the FPGA chip may receive the target data packet sent by the first target device through a preset AXI-Lite interface, but is not limited thereto.
102. And converting the format of the target data packet to obtain a target VLAN data packet.
In the embodiment of the application, after receiving the target data packet sent by the first target device, the FPGA chip may perform format conversion on the target data packet, that is, convert the target data packet into a data packet in a VLAN data format, thereby obtaining the target VLAN data packet.
103. And sending the target VLAN data packet to a second target device.
In the embodiment of the application, after the target data packet is converted into the target VLAN data packet, the FPGA chip may send the target VLAN data packet to the second target device. Specifically, in this step, the FPGA chip may send the target VLAN data packet to the second target device based on the VLAN protocol, but is not limited thereto. Because the FPGA chip sends the target VLAN data packet to the second target device in the network layer, time consumed by the FPGA chip to send the target VLAN data packet to the second target device is much shorter than time consumed by the MCU to send the format-converted target data packet to the second target device in the transport layer, so that transmission efficiency of the first target device sending the target data packet to the second target device can be effectively improved.
The embodiment of the application provides a data transmission method, and the FPGA chip can convert the format of a target data packet after receiving the target data packet sent by a first target device, namely, the target data packet is converted into a data packet in a VLAN data format, so as to obtain the target VLAN data packet, and the target VLAN data packet is sent to a second target device in a network layer.
To explain in more detail below, an embodiment of the present application provides another data transmission method, specifically as shown in fig. 2, where the method is applied to an FPGA chip, and the method includes:
201. and receiving a target data packet sent by the first target device.
In step 201, for receiving the target data packet sent by the first target device, reference may be made to the description of the corresponding part in fig. 1, and details of this embodiment of the present application will not be described here again.
202. And filling the target data packet.
The data bit width corresponding to the target data packet may be, but is not limited to: 4 bytes, 8 bytes, 16 bytes, etc.; presetting a data bit width threshold as an integral multiple of 4 bytes, such as 32 bytes, 36 bytes, 40 bytes and the like; and the preset data bit width threshold is greater than or equal to the data bit width corresponding to the target data packet.
In this embodiment of the present application, after receiving a target data packet sent by a first target device, an FPGA chip needs to determine whether to perform a filling process on the target data packet, where a specific process of determining whether to perform the filling process on the target data packet by the FPGA chip is as follows:
firstly, calculating the data volume of a target data packet, and determining the data bit width corresponding to the target data packet according to the data volume of the target data packet; secondly, judging whether the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value or not; when the data bit width corresponding to the target data packet is judged to be smaller than the preset data bit width threshold value, filling the target data packet by using preset data, wherein the preset data is data without any practical significance; and when the data bit width corresponding to the target data packet is judged to be equal to the preset data bit width threshold value, the target data packet does not need to be filled.
203. And carrying out format conversion on the target data packet subjected to filling processing to obtain a target VLAN data packet.
In the embodiment of the application, after the target data packet is filled by the FPGA chip, format conversion can be performed on the filled target data packet, that is, the filled target data packet is converted into a data packet in a VLAN data format, so as to obtain the target VLAN data packet.
Further, in the embodiment of the present application, the FPGA chip may output and display a process of converting the target data packet into the target VLAN data packet through a preset state machine program.
Further, in this embodiment of the application, when the sum of the data bit widths corresponding to the N target data packets is still less than or equal to the preset data bit width threshold, the N target data packets may be spliced to obtain spliced data packets, the spliced data packets may be filled according to the above method, and format conversion is performed on the spliced data packets that are filled, so as to obtain target VLAN data packets, where N is a positive integer greater than 1.
204. And sending the target VLAN data packet to the second target device based on the VLAN protocol.
In the embodiment of the application, after the target data packet subjected to the filling processing is converted into the target VLAN data packet, the FPGA chip may send the target VLAN data packet to the second target device based on the VLAN protocol. Because the FPGA chip sends the target VLAN data packet to the second target device in the network layer, time consumed for the FPGA chip to send the target VLAN data packet to the second target device is much shorter than time consumed for the MCU to send the format-converted target data packet to the second target device in the transport layer, so that transmission efficiency of the first target device sending the target data packet to the second target device can be effectively improved.
Further, in this embodiment of the application, after the FPGA chip converts the target data packet subjected to the padding processing into the target VLAN data packet, the transmission protocol corresponding to the target VLAN data packet may also be set to be an AXI-Streaming protocol, and the target VLAN data packet is sent to the second target device based on the AXI-Streaming protocol, that is, the target VLAN data packet is sent to the second target device in a link layer (i.e., an MAC layer) based on the AXI-Streaming protocol, so that time consumed for sending the target VLAN data packet to the second target device may be further reduced, and transmission efficiency of the first target device sending the target data packet to the second target device may be further improved. Specifically, in this step, the FPGA chip may execute, through a TSN (Time Sensitive Network) functional module, an operation of sending the target VLAN data packet to the second target device based on the AXI-Streaming protocol, but is not limited thereto.
Further, as an implementation of the method shown in fig. 1 and fig. 2, another embodiment of the present application further provides an FPGA chip. The embodiment of the apparatus corresponds to the embodiment of the method, and for convenience of reading, details in the embodiment of the apparatus are not repeated one by one, but it should be clear that the FPGA chip in the embodiment can correspondingly implement all the contents in the embodiment of the method. The FPGA chip is applied to improve the transmission efficiency of transmitting a data packet from one device to another device in an automobile, and specifically, as shown in fig. 3, the FPGA chip includes:
a receiving unit 31, configured to receive a target data packet sent by a first target device;
a converting unit 32, configured to perform format conversion on the target data packet to obtain a target VLAN data packet;
a sending unit 33, configured to send the target VLAN data packet to a second target device.
Further, as shown in fig. 4, the FPGA chip further includes:
a determining unit 34, configured to determine a data bit width corresponding to the target data packet before the converting unit 32 performs format conversion on the target data packet to obtain a target VLAN data packet;
the judging unit 35 is configured to judge whether a data bit width corresponding to the target data packet is smaller than a preset data bit width threshold;
a filling unit 36, configured to perform filling processing on the target data packet by using preset data when the determining unit 35 determines that the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold;
the converting unit 32 is specifically configured to perform format conversion on the target data packet subjected to the padding processing to obtain the target VLAN data packet.
Further, as shown in fig. 4, the determination unit 34 includes:
a calculating module 341, configured to calculate a data size of the target data packet;
the determining module 342 is configured to determine a data bit width corresponding to the target data packet according to the data size of the target data packet.
Further, as shown in fig. 4, the transmitting unit 33 includes:
the first sending module 331 is configured to send the target VLAN data packet to the second target device based on a VLAN protocol.
Further, as shown in fig. 4, the transmitting unit 33 includes:
a setting module 332, configured to set a transmission protocol corresponding to the target VLAN data packet to an AXI-Streaming protocol;
a second sending module 333, configured to send the target VLAN data packet to the second target device based on the AXI-Streaming protocol.
Further, as shown in fig. 4, the target data packet specifically includes: any one of a CAN data packet, an I2C data packet and a serial port data packet.
The embodiment of the application provides a data transmission method, a data transmission device and an automobile, the FPGA chip can convert the format of a target data packet into a data packet in a VLAN data format after receiving the target data packet sent by a first target device, so as to obtain the target VLAN data packet, and the target VLAN data packet is sent to a second target device in a network layer, therefore, the time consumed by the FPGA chip to send the target VLAN data packet to the second target device is far shorter than the time consumed by an MCU to send the target data packet after format conversion to the second target device in a transmission layer, and the transmission efficiency of the first target device to send the target data packet to the second target device can be effectively improved.
The FPGA chip comprises a processor and a memory, the receiving unit, the converting unit, the sending unit and the like are stored in the memory as program units, and the processor executes the program units stored in the memory to realize corresponding functions.
The processor comprises a kernel, and the kernel calls the corresponding program unit from the memory. One or more than one kernel can be set, and the transmission efficiency of sending a data packet from one device to another device in the automobile is improved by adjusting the kernel parameters.
The embodiment of the application also provides an automobile, and the automobile comprises the FPGA chip.
The embodiment of the application provides a storage medium, which comprises a stored program, wherein when the program runs, a device where the storage medium is located is controlled to execute the data transmission method.
The embodiment of the application also provides a data transmission device, which comprises a storage medium; and one or more processors, the storage medium coupled with the processors, the processors configured to execute program instructions stored in the storage medium; the program instructions execute the data transmission method when running.
The embodiment of the application provides equipment, the equipment comprises a processor, a memory and a program which is stored on the memory and can run on the processor, and the following steps are realized when the processor executes the program:
receiving a target data packet sent by first target equipment;
carrying out format conversion on the target data packet to obtain a target VLAN data packet;
and sending the target VLAN data packet to a second target device.
Further, before the format conversion is performed on the target packet to obtain the target VLAN packet, the method further includes:
determining the data bit width corresponding to the target data packet;
judging whether the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value or not;
if so, filling the target data packet by using preset data;
the format conversion of the target data packet to obtain the target VLAN data packet includes:
and performing format conversion on the target data packet subjected to filling processing to obtain the target VLAN data packet.
Further, the determining a data bit width corresponding to the target data packet includes:
calculating the data size of the target data packet;
and determining the data bit width corresponding to the target data packet according to the data size of the target data packet.
Further, the sending the target VLAN data packet to a second target device includes:
and sending the target VLAN data packet to the second target device based on a VLAN protocol.
Further, the sending the target VLAN data packet to a second target device includes:
setting a transmission protocol corresponding to the target VLAN data packet as an AXI-Streaming protocol;
transmitting the target VLAN packet to the second target device based on the AXI-Streaming protocol.
Further, the target data packet specifically includes: any one of a CAN data packet, an I2C data packet and a serial port data packet.
The present application further provides a computer program product adapted to perform program code for initializing the following method steps when executed on a data processing device: receiving a target data packet sent by first target equipment; carrying out format conversion on the target data packet to obtain a target VLAN data packet; and sending the target VLAN data packet to a second target device.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement or the like made within the spirit and principle of the present application shall be included in the scope of the claims of the present application.
Claims (15)
1. A data transmission method is applied to a field programmable gate array chip and comprises the following steps:
receiving a target data packet sent by first target equipment;
carrying out format conversion on the target data packet to obtain a target VLAN data packet;
and sending the target VLAN data packet to a second target device.
2. The method of claim 1, wherein prior to said format converting said destination packet to obtain a destination VLAN packet, said method further comprises:
determining the data bit width corresponding to the target data packet;
judging whether the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value or not;
if so, filling the target data packet by using preset data;
the format conversion of the target data packet to obtain the target VLAN data packet includes:
and performing format conversion on the target data packet subjected to filling processing to obtain the target VLAN data packet.
3. The method according to claim 2, wherein the determining a data bit width corresponding to the target packet comprises:
calculating the data size of the target data packet;
and determining the data bit width corresponding to the target data packet according to the data size of the target data packet.
4. The method of claim 1, wherein sending the target VLAN data packet to a second target device comprises:
and sending the target VLAN data packet to the second target device based on a VLAN protocol.
5. The method of claim 1, wherein sending the target VLAN data packet to a second target device comprises:
setting a transmission protocol corresponding to the target VLAN data packet as an AXI-Streaming protocol;
transmitting the target VLAN packet to the second target device based on the AXI-Streaming protocol.
6. The method according to any of claims 1-5, wherein the destination data packet is specifically: any one of a CAN data packet, an I2C data packet and a serial port data packet.
7. A field programmable gate array chip, comprising:
a receiving unit, configured to receive a target data packet sent by a first target device;
the conversion unit is used for carrying out format conversion on the target data packet so as to obtain a target VLAN data packet;
and the sending unit is used for sending the target VLAN data packet to second target equipment.
8. The field programmable gate array chip of claim 7, further comprising:
a determining unit, configured to determine a data bit width corresponding to the target data packet before the converting unit performs format conversion on the target data packet to obtain a target VLAN data packet;
the judging unit is used for judging whether the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value or not;
the filling unit is used for filling the target data packet by using preset data when the judging unit judges that the data bit width corresponding to the target data packet is smaller than a preset data bit width threshold value;
the conversion unit is specifically configured to perform format conversion on the target data packet subjected to the padding processing to obtain the target VLAN data packet.
9. The field programmable gate array chip of claim 8, wherein the determining unit comprises:
the calculation module is used for calculating the data size of the target data packet;
and the determining module is used for determining the data bit width corresponding to the target data packet according to the data size of the target data packet.
10. The field programmable gate array chip of claim 7, wherein the sending unit comprises:
and the first sending module is used for sending the target VLAN data packet to the second target equipment based on a VLAN protocol.
11. The field programmable gate array chip of claim 7, wherein the sending unit comprises:
the setting module is used for setting the transmission protocol corresponding to the target VLAN data packet as an AXI-Streaming protocol;
a second sending module for sending the target VLAN packet to the second target device based on the AXI-Streaming protocol.
12. The field programmable gate array chip according to any of claims 7 to 11, wherein the target data packet is specifically: any one of a CAN data packet, an I2C data packet and a serial port data packet.
13. An automobile, characterized in that the automobile comprises: the field programmable gate array chip of any one of claims 7-12.
14. A storage medium, characterized in that the storage medium comprises a stored program, wherein when the program runs, a device where the storage medium is located is controlled to execute the data transmission method according to any one of claims 1 to 6.
15. A data transmission apparatus, characterized in that the apparatus comprises a storage medium; and one or more processors, the storage medium coupled with the processors, the processors configured to execute program instructions stored in the storage medium; the program instructions when executed perform the data transmission method of any one of claims 1 to 6.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110800889.1A CN115701035A (en) | 2021-07-15 | 2021-07-15 | Data transmission method and device and automobile |
| PCT/CN2022/105836 WO2023284842A1 (en) | 2021-07-15 | 2022-07-14 | Data transmission method, device, and automobile |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110800889.1A CN115701035A (en) | 2021-07-15 | 2021-07-15 | Data transmission method and device and automobile |
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| WO (1) | WO2023284842A1 (en) |
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