CN115692426A - Display panel - Google Patents

Abstract

The embodiment of the application provides a display panel, display panel includes thin film transistor, and thin film transistor includes: a gate electrode; an active portion having a channel region; a source electrode electrically connected to the active portion; and a drain electrode electrically connected to the active portion; at least one electrode of the gate electrode, the source electrode and the drain electrode comprises a metal layer, a first blocking layer and a second blocking layer, and the second blocking layer is made of a material different from that of the first blocking layer. Through with the gate electrode, at least one electrode in source electrode and the drain electrode sets up to including the metal level, the structure of first barrier layer and second barrier layer, first barrier layer and second barrier layer can block off the metal level and be oxidized, and can prevent the diffusion of metal level ion, thereby can reduce the metal level and combine to form the phenomenon of oxidation metallics and reduce the conductive efficiency of metal level with the oxygen of active part, also can prevent metal ion diffusion between the layer, and then avoid forming the route of leaking electricity between the layer, promote thin film transistor's reliability.

Description

Display panel

Technical Field

The application belongs to the technical field of display, and particularly relates to a display panel.

Background

Thin film transistors are the core devices of flat panel Display panels, and are mainly applied to Liquid Crystal Displays (LCDs), organic Light Emitting Semiconductors (OLEDs), and Mini light emitting diodes (Mini-LEDs). Whether an LCD display, an OLED display, or a Mini-LED display, each pixel relies on a thin film transistor for switching and driving.

Among them, oxide thin film transistors generally adopt three structures of an Etching Stopper Layer (ESL), back Channel Etching (BCE) and Top Gate (Top Gate) in mass production. In order to improve the stability of the oxide thin film transistor, an ESL structure is widely adopted, and the ESL structure can effectively reduce the influence of external environment factors and etching damage of a source electrode and a drain electrode on a back channel. However, the thin film transistor with the ESL structure requires a large number of masks, and increases the size and parasitic capacitance of the thin film transistor. The thin film transistor with the BCE structure does not need to etch a barrier layer, a channel can be reduced compared with an ESL structure, but a back channel is easily damaged in the etching process of a source electrode and a drain electrode, and the stability of the thin film transistor is greatly influenced. The thin film transistor with the Top Gate structure has small overlap between the Gate and the source and drain electrodes, can obviously reduce parasitic capacitance, is protected by the insulating protective layer, cannot be influenced by etching of the source and drain electrodes, and has good stability.

However, since the active portion of the thin film transistor is made of an oxide material, the electrode of the thin film transistor easily reacts with the oxide material, which causes a problem of lowering the reliability of the thin film transistor.

Disclosure of Invention

The embodiment of the application provides a thin display panel to reduce the phenomenon that the metal electrode has a conductive effect due to the action between the metal electrode and a semiconductor active part, so that the reliability of a thin film transistor is improved.

In a first aspect, an embodiment of the present application provides a display panel, including:

an array substrate including a plurality of thin film transistors;

the pixel layer is arranged on the array substrate and is connected with the thin film transistor;

wherein the thin film transistor includes:

a gate electrode;

the active part is arranged at a distance from the gate electrode, the active part is provided with a channel region, and the material of the active part is an oxide material;

a source electrode electrically connected to the active portion; and

the drain electrode is electrically connected with the active part, and is arranged at the same layer as and at intervals with the source electrode;

wherein at least one of the gate electrode, the source electrode, and the drain electrode includes a metal layer, a first barrier layer disposed above the metal layer, and a second barrier layer disposed below the metal layer, the second barrier layer being different from the first barrier layer in material.

Optionally, the material of the first barrier layer includes a boronized metal material, and the material of the second barrier layer is an alloy material.

Optionally, the first barrier layer is made of lanthanum boride, and the second barrier layer is made of molybdenum-titanium alloy, molybdenum-tungsten alloy, or titanium-tungsten alloy.

Optionally, the thickness of the first barrier layer is greater than or equal to 100 angstroms and less than or equal to 500 angstroms.

Optionally, the gate electrode includes a metal layer, a first blocking layer disposed above the metal layer, and a second blocking layer disposed below the metal layer;

in the thickness direction of the thin film transistor, the gate electrode is located above the active portion, and an orthographic projection of the gate electrode on the active portion is located in the active portion.

Optionally, the source electrode and the drain electrode each include a metal layer, a first blocking layer disposed above the metal layer, and a second blocking layer disposed below the metal layer;

the source electrode and the drain electrode are both arranged above the active part, and are respectively spaced from the gate electrode.

Optionally, the gate electrode includes a metal layer, a first blocking layer disposed above the metal layer, and a second blocking layer disposed below the metal layer;

in the thickness direction of the thin film transistor, the active part is arranged above the gate electrode, and the projection of the active part on the gate electrode is at least partially overlapped with the gate electrode.

Optionally, the source electrode and the drain electrode each include a metal layer, a first blocking layer disposed above the metal layer, and a second blocking layer disposed below the metal layer;

the source electrode covers one end of the active part;

the drain electrode covers the other end of the active portion.

In a second aspect, an embodiment of the present application further provides a display panel, including:

an array substrate including a plurality of thin film transistors;

the pixel layer is arranged on the array substrate and is connected with the thin film transistor;

wherein the thin film transistor includes:

a gate electrode;

the active part is arranged at a distance from the gate electrode, the active part is provided with a channel region, and the material of the active part is an oxide material;

a source electrode electrically connected to the active portion; and

the drain electrode is electrically connected with the active part, and is arranged at the same layer as and at intervals with the source electrode;

at least one electrode of the gate electrode, the source electrode and the drain electrode comprises a metal layer and a first barrier layer arranged above the metal layer, and the first barrier layer is made of a boronized metal material or an alloy material.

Optionally, at least one of the gate electrode, the source electrode, and the drain electrode further includes:

and the second barrier layer is arranged below the metal layer, and the material of the second barrier layer is the same as that of the first barrier layer.

Optionally, the material of the first barrier layer and the material of the second barrier layer are both lanthanum boride, molybdenum-titanium alloy, molybdenum-tungsten alloy, or titanium-tungsten alloy.

In the display panel of this application embodiment, through with the gate electrode, at least one electrode in source electrode and the drain electrode sets up to including first barrier layer, the range upon range of composite construction of metal level and second barrier layer, first barrier layer and second barrier layer can block off the metal level and oxidized, and can prevent metal level ion diffusion, thereby can reduce the phenomenon that the metal level combines to form the oxidation metallics and reduce the conduction efficiency of metal level with the oxygen of active part, also can prevent metal ion diffusion between the layer, and then avoid forming leakage path between the layer, promote thin film transistor's reliability.

Drawings

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present application.

Fig. 2 is a schematic diagram of a first structure of a thin film transistor in the display panel shown in fig. 1.

Fig. 3 is a schematic structural diagram of a composite layer structure in the thin film transistor shown in fig. 2.

Fig. 4 is a schematic diagram of a second structure of the thin film transistor in the display panel shown in fig. 1.

Fig. 5 is a schematic diagram of a third structure of the thin film transistor in the display panel shown in fig. 1.

Fig. 6 is a schematic diagram of a fourth structure of the thin film transistor in the display panel shown in fig. 1.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It should be apparent that the described embodiments are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure. The embodiment of the present application provides a display panel 1, where the display panel 1 may include an array substrate 10 and a pixel layer 20, and when the display surface of the display panel 1 faces upward, in the thickness direction of the display panel, the pixel layer 20 is disposed above the array substrate 10, that is, the pixel layer 20 is closer to the display surface side of the display panel 1. The array substrate 10 may include a plurality of thin film transistors 100, and the plurality of thin film transistors 100 may be arranged in an array on a substrate or a glass substrate. The pixel layer 20 may include a plurality of pixel units, each pixel unit may be correspondingly connected to at least one thin film transistor 100, and the pixel layer 20 operates under the driving of the thin film transistor 100, so that the display panel 1 displays different colors and pictures.

For example, the display panel 1 may be a liquid crystal display LCD type panel, the LCD is configured by placing a liquid crystal cell between two parallel glass substrates, a Thin Film Transistor (TFT) is disposed on the lower substrate glass, and a color filter is disposed on the upper substrate glass, and the rotation direction of liquid crystal molecules is controlled by changing signals and voltages on the TFT, so as to control whether polarized light of each pixel point is emitted or not to achieve the display purpose. The display panel 1 may also be an organic light emitting semiconductor OLED type panel, which is a current type organic light emitting device and is a phenomenon of emitting light by injection and recombination of carriers, and the intensity of light emission is proportional to the injected current. Under the action of an electric field, holes generated by an anode and electrons generated by a cathode move, are respectively injected into a hole transport layer and an electron transport layer, and migrate to a light emitting layer. When the two meet at the light emitting layer, energy excitons are generated, thereby exciting the light emitting molecules to finally generate visible light. The display panel 1 may also be a Mini-LED type panel, mini-LED, just an upgrade of the LCD screen backlighting technology, essentially still an LCD screen. The Mini-LED makes the LED lamp beads Mini of the backlight layer of the LCD screen, and the size of each LED lamp bead is about 50-200 mu m, so that more backlight lamp beads can be plugged in the backlight layer, and the screen can obtain better brightness and brightness uniformity.

Whether an LCD display, an OLED display, or a Mini-LED display, each pixel relies on a thin film transistor for switching and driving. Among them, the oxide thin film transistor is widely used in flat panel displays due to its advantages of high mobility, good uniformity of large area, low temperature of fabrication process, etc. The oxide thin film transistor has various structural forms, and mass production uses an Etch Stop Layer (ESL) type, a Back Channel Etch (BCE) type, and a Top Gate (TG) type. In order to improve the stability of the oxide thin film transistor, the thin film transistor with the ESL structure is widely adopted, and the structure can effectively reduce the influence of external environmental factors and etching damage of a source electrode and a drain electrode on a back channel. However, the thin film transistor of the ESL structure requires more mask times and significantly increases the size and parasitic capacitance of the thin film transistor. The thin film transistor with the BCE structure does not need to etch the barrier layer, the channel can be obviously reduced compared with the ESL structure, but the back channel is easily damaged in the etching process of the source electrode and the drain electrode, and the stability of the thin film transistor is greatly influenced. The overlap between the gate electrode and the source and drain electrodes of the thin film transistor with the TG structure is small, parasitic capacitance can be obviously reduced, meanwhile, the back channel of the thin film transistor is protected by the insulating layer, the influence of etching of the source and drain electrodes is avoided, and the thin film transistor with the TG structure has good stability.

In any structure of the thin film transistor, the conductive material used for the gate electrode, the source electrode, and the drain electrode is generally a metal having high thermal and electrical conductivity and low resistivity, such as copper Cu and aluminum Al. However, metals are easily combined with oxygen into metal oxides in high temperature or humid environments, increasing the conductive resistance of the electrodes. In addition, metal ions are also easily diffused into the channel of the active portion, which causes a problem of deterioration in reliability of the thin film transistor. In other words, in the process of manufacturing the thin film transistor, an action is easily generated between the metal electrode and the semiconductor active portion, the conductive effect of the metal electrode is reduced, and the performance of the active portion is affected, thereby causing the performance of the thin film transistor to be deteriorated.

In order to solve the above problem, the thin film transistor 100 is improved in the embodiments of the present application, and the composition structure of the thin film transistor 100 will be described below with reference to the drawings.

For example, referring to fig. 2 and fig. 3 in conjunction with fig. 1, fig. 2 is a schematic diagram of a first structure of a thin film transistor in the display panel shown in fig. 1, and fig. 3 is a schematic diagram of a structure of a composite layer in the thin film transistor shown in fig. 2. The thin film transistor 100 may include a gate electrode G, an active portion ACT, a source electrode S, and a drain electrode D. The active portion ACT may be spaced from the gate electrode G in the thickness direction of the thin film transistor 100, and for example, a gate insulating layer GI may be provided between the active portion ACT and the gate electrode G to space the active portion ACT from the gate electrode G. The active portion ACT is provided with a channel region, and the material of the active portion ACT is an oxide material. The source electrode S is electrically connected with the active portion ACT, the drain electrode D is electrically connected with the active portion ACT, and the source electrode S and the drain electrode D are arranged at the same layer and at intervals. The channel region is for carrier flow to connect the source electrode S with the drain electrode D or to space the source electrode S from the drain electrode D. At least one electrode 101 of the gate electrode G, the source electrode S, and the drain electrode D includes a metal layer 1011, a first barrier layer 1013 disposed above the metal layer 1011, and a second barrier layer 1015 disposed below the metal layer 1011, and the first barrier layer 1013 and the second barrier layer 1015 are made of different materials. The first barrier layer 1013 and the second barrier layer 1015 can prevent the metal layer 1011 from being oxidized and can prevent ions of the metal layer 1011 from diffusing.

For the electrode 101 including the metal layer 1011, the first barrier layer 1013 disposed above the metal layer 1011, and the second barrier layer 1015 disposed below the metal layer 1011, for convenience of description, at least one electrode 101 among the gate electrode G, the source electrode S, and the drain electrode D is a composite layer structure, that is, a structure including the metal layer 1011, the first barrier layer 1013 disposed above the metal layer 1011, and the second barrier layer 1015 disposed below the metal layer 1011.

By setting at least one electrode 101 of the gate electrode G, the source electrode S, and the drain electrode D to be a stacked composite structure including the first barrier layer 1013, the metal layer 1011, and the second barrier layer 1015, the first barrier layer 1013 and the second barrier layer 1015 can prevent the metal layer 1011 from being oxidized and prevent ions of the metal layer 1011 from diffusing, so that a phenomenon that the metal layer 1011 and oxygen of the active portion ACT combine to form an oxidized metal object to reduce the conductive efficiency of the metal layer 1011 can be reduced, metal ions can be prevented from diffusing between layers, a leakage path is prevented from being formed between layers, and the reliability of the thin film transistor 100 is improved.

Illustratively, the material of the first barrier layer 1013 includes a boronated metal material, which may be a lanthanide. For example, the material of the first barrier layer 1013 may be lanthanum boride LnB. The first barrier layer 1013 is a combination of a lanthanide metal element and a boron element, and lanthanum boride can be changed from a semiconductor to a conductor by adjusting the proportion of the boron element, and the first barrier layer is used as a barrier layer for the metal layer 1011 by taking advantage of the high melting point, the ion bombardment resistance, the oxidation resistance, the thermal conductivity, and the chemical stability of the lanthanum boride. The thickness of the first barrier layer 1013 may be greater than or equal to 100 angstroms and less than or equal to 500 angstroms. The material of the second barrier layer 1015 is different from that of the first barrier layer 1013, and the material of the second barrier layer 1015 may be an alloy material, for example, the material of the second barrier layer 1015 may be a mo-ti MoTi alloy, a mo-w MoW alloy, a ti-w TiW alloy, or the like. The thickness of the second barrier layer 1015 may be set with reference to the thickness of the first barrier layer 1013, and for example, the thickness of the second barrier layer 1015 may be any value within a range of 100 angstroms to 500 angstroms. In the process of manufacturing the thin film transistor 100, the metal structure of the first layer metal and/or the second layer metal is changed into a MoTi/Cu/LnB composite layer structure, and LnB can be used as an upper layer metal.

Since the material of the first barrier layer 1013 is different from the material of the second barrier layer 1015, and the first barrier layer 1013 and the second barrier layer 1015 are used to block the metal layer 1011 from being oxidized and to block the metal layer 1011 from being diffused, the material of the first barrier layer 1013 and the material of the second barrier layer 1015 are not limited to the above combination of materials, for example, the material of the first barrier layer 1013 may be an alloy material, and the material of the second barrier layer 1015 may be a boronized metal material. Of course, the materials of the first barrier layer 1013 and the second barrier layer 1015 may be of other types, which are not illustrated here.

The material of the metal layer 1011 may be selected from metals having high thermal and electrical conductivity and low resistivity, such as copper Cu, aluminum Al, and the like. The thickness of the metal layer 1011 is greater than the thickness of the first barrier layer 1013 or the second barrier layer 1015, so as to reduce the impedance of the metal layer 1011 and improve the conductivity of the metal layer 1011.

As for the above-described composite layer structure, it may be applied to at least one electrode 101 of the gate electrode G, the source electrode S, and the drain electrode D of the thin film transistor 100.

For example, referring to fig. 4 in combination with fig. 1 to fig. 3, fig. 4 is a schematic diagram of a second structure of the thin film transistor in the display panel shown in fig. 1. The gate electrode G may have a composite layer structure, and may be applied to the thin film transistor 100 having a top gate structure. In the thickness direction of the thin film transistor 100, the gate electrode G is located above the active portion ACT, and a projection of the gate electrode G on the active portion ACT is located within the active portion ACT. The gate electrode G has a composite layer structure, which can prevent the metal of the gate electrode G from being oxidized or prevent the metal ions of the gate electrode G from diffusing to form a leakage path, thereby affecting the performance of the thin film transistor 100.

The gate electrode G is arranged corresponding to a channel region of the active portion ACT, the source electrode S and the drain electrode D are both arranged above the active portion ACT, and the source electrode S and the drain electrode D are respectively spaced from the gate electrode G to reduce the generation of parasitic capacitance. The source electrode S and the drain electrode D may be disposed on the same layer as the gate electrode G, and a layer of metal may be uniformly laid during fabrication, and then the source electrode S, the drain electrode D, and the gate electrode G are divided by etching or patterning, so as to simplify the fabrication of the thin film transistor 100.

For example, an interlayer insulating layer ILD and a passivation layer PV may be sequentially disposed over the gate electrode G to space the gate electrode G from the source and drain electrodes S and D and from other devices, thereby preventing interference between conductive portions. A test part CT, a bottom layer standby metal part LS and a Barrier layer Barrier can be arranged below the active part ACT in sequence.

For example, the electrode 101 or the combination of the electrodes 101 in the composite layer structure may be: the source electrode S adopts a composite layer structure, the drain electrode D adopts a composite layer structure, the gate electrode G adopts a composite layer structure, the source electrode S adopts a composite layer structure, the gate electrode G adopts a composite layer structure, and the drain electrode D adopts a composite layer structure, the gate electrode G, the source electrode S and the drain electrode D all adopt a multiplex layer structure. The metal layer 1011 of the electrode is prevented from being oxidized to form an oxidized metal to lower the conductivity of the metal layer 1011, and the ion diffusion of the metal layer 1011 of the electrode is reduced to form a leakage path in the interlayer structure to lower the performance of the thin film transistor 100.

For example, please refer to fig. 5 and fig. 6 in combination with fig. 1 to fig. 4, in which fig. 5 is a schematic diagram of a third structure of the thin film transistor in the display panel shown in fig. 1, and fig. 6 is a schematic diagram of a fourth structure of the thin film transistor in the display panel shown in fig. 1. The gate electrode G may have a composite layer structure, and may be applied to the thin film transistor 100 having a back channel structure. In the thickness direction of the thin film transistor 100, the active portion ACT is provided above the gate electrode G, and a projection of the active portion ACT on the gate electrode G overlaps the gate electrode G. The source electrode S covers one end of the active portion ACT, and a portion of the source electrode S is located above the active portion ACT, that is, the source electrode S and the gate electrode G are disposed on different sides of the active portion ACT. The drain electrode D covers the other end of the active portion ACT, and a part of the drain electrode D is located above the active portion ACT, that is, the drain electrode D and the gate electrode G are also disposed on different sides of the active portion ACT. To prevent interference between the source electrode G, the drain electrode D, and the gate electrode G.

A gate insulating layer GI is disposed between the active portion ACT and the gate electrode G to space the active portion ACT from the gate electrode G. The side of the gate electrode G away from the active portion ACT is provided with a base layer, which serves as a flat fabrication bottom when fabricating the thin film transistor 100. The source electrode G, the drain electrode D, and the active portion ACT are covered with a passivation layer PV to prevent the source electrode G, the drain electrode D, and the active portion ACT from being attacked by external water and oxygen.

For example, the electrode 101 or the combination of the electrodes 101 in the composite layer structure may be: the source electrode S adopts a composite layer structure, the drain electrode D adopts a composite layer structure, the gate electrode G adopts a composite layer structure, the source electrode S adopts a composite layer structure, the gate electrode G adopts a composite layer structure, and the drain electrode D adopts a composite layer structure, the gate electrode G, the source electrode S and the drain electrode D all adopt a multiplexing layer structure. The metal layer 1011 of the electrode is prevented from being oxidized to form an oxidized metal to lower the conductivity of the metal layer 1011, and the ion diffusion of the metal layer 1011 of the electrode is reduced to reduce the phenomenon that a leakage path is formed in the interlayer structure to lower the performance of the thin film transistor 100.

For example, the composite layer structure may also be applied to the electrode structure of the thin film transistor 100 of the etch barrier layer type, and the application manner thereof may refer to the description of the above case, which is not described herein again.

In some embodiments, the materials of the first barrier layer 1013 and the second barrier layer 1015 may be the same, and both the first barrier layer 1013 and the second barrier layer 1015 can prevent the metal layer 1011 from being oxidized, thereby preventing the metal oxide from being formed and reducing the conductive performance of the electrode. The first barrier layer 1013 and the second barrier layer 1015 can also block ion diffusion of the metal layer 1011, and prevent a leakage path from being formed to affect the performance of the thin film transistor 100. For example, the material of the first barrier layer 1013 and the second barrier layer 1015 may be a boronized metal material or an alloy material, and the metal material in the boronized metal material may be a lanthanide, for example, the material of the first barrier layer 1013 and the second barrier layer 1015 may be lanthanum boride. The alloy material may be a molybdenum-titanium alloy.

In the display panel 1 provided in the embodiment of the present application, at least one electrode 101 of the gate electrode G, the source electrode S, and the drain electrode D is configured to be a stacked composite structure including the first barrier layer 1013, the metal layer 1011, and the second barrier layer 1015, the first barrier layer 1013 and the second barrier layer 1015 can prevent the metal layer 1011 from being oxidized, and can prevent ions of the metal layer 1011 from diffusing, so that a phenomenon that the metal layer 1011 and oxygen of the active portion ACT combine to form an oxidized metal substance to reduce the conductive efficiency of the metal layer 1011 can be reduced, and metal ions can be prevented from diffusing between layers, thereby avoiding a leakage path from being formed between layers, and improving the reliability of the thin film transistor 100.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features.

The display panel provided by the embodiment of the present application is described in detail above, and the principle and the implementation of the present application are explained in this document by applying specific examples, and the description of the above embodiment is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (11)

1. A display panel, comprising:

an array substrate including a plurality of thin film transistors;

the pixel layer is arranged on the array substrate and is connected with the thin film transistor;

wherein the thin film transistor includes:

a gate electrode;

an active portion arranged at an interval from the gate electrode, the active portion having a channel region, the active portion being made of an oxide material;

a source electrode electrically connected to the active portion; and

the drain electrode is electrically connected with the active part, and is arranged at the same layer as and at intervals with the source electrode;

wherein at least one of the gate electrode, the source electrode, and the drain electrode includes a metal layer, a first barrier layer disposed above the metal layer, and a second barrier layer disposed below the metal layer, the second barrier layer being different from the first barrier layer in material.

2. The display panel according to claim 1, wherein a material of the first barrier layer comprises a boronized metal material, and a material of the second barrier layer is an alloy material.

3. The display panel according to claim 2, wherein the material of the first barrier layer is lanthanum boride, and the material of the second barrier layer is a molybdenum-titanium alloy, a molybdenum-tungsten alloy, or a titanium-tungsten alloy.

4. The display panel according to claim 3, wherein a thickness of the first barrier layer is greater than or equal to 100 angstroms and less than or equal to 500 angstroms.

5. The display panel according to any one of claims 1 to 4, wherein the gate electrode comprises a metal layer, a first barrier layer disposed over the metal layer, and a second barrier layer disposed under the metal layer;

in the thickness direction of the thin film transistor, the gate electrode is located above the active portion, and an orthographic projection of the gate electrode on the active portion is located in the active portion.

6. The display panel according to claim 5, wherein each of the source electrode and the drain electrode comprises a metal layer, a first barrier layer provided over the metal layer, and a second barrier layer provided under the metal layer;

the source electrode and the drain electrode are both arranged above the active part, and are respectively spaced from the gate electrode.

7. The display panel according to any one of claims 1 to 4, wherein the gate electrode comprises a metal layer, a first barrier layer disposed over the metal layer, and a second barrier layer disposed under the metal layer;

in the thickness direction of the thin film transistor, the active part is arranged above the gate electrode, and the projection of the active part on the gate electrode is at least partially overlapped with the gate electrode.

8. The display panel according to claim 7, wherein each of the source electrode and the drain electrode comprises a metal layer, a first barrier layer disposed over the metal layer, and a second barrier layer disposed under the metal layer;

the source electrode covers one end of the active part;

the drain electrode covers the other end of the active portion.

9. A display panel, comprising:

an array substrate including a plurality of thin film transistors;

the pixel layer is arranged on the array substrate and is connected with the thin film transistor;

wherein the thin film transistor includes:

a gate electrode;

an active portion arranged at an interval from the gate electrode, the active portion having a channel region, the active portion being made of an oxide material;

a source electrode electrically connected to the active portion; and

the drain electrode is electrically connected with the active part, is arranged at the same layer as the source electrode and is spaced from the source electrode;

at least one electrode of the gate electrode, the source electrode and the drain electrode comprises a metal layer and a first barrier layer arranged above the metal layer, and the first barrier layer is made of a boronized metal material or an alloy material.

10. The display panel according to claim 9, wherein at least one of the gate electrode, the source electrode, and the drain electrode further comprises:

and the second barrier layer is arranged below the metal layer, and the material of the second barrier layer is the same as that of the first barrier layer.

11. The display panel according to claim 10, wherein a material of the first barrier layer and a material of the second barrier layer are each lanthanum boride, a molybdenum-titanium alloy, a molybdenum-tungsten alloy, or a titanium-tungsten alloy.

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