CN115689181A

CN115689181A - Method, system and non-transitory computer readable medium for error proofing of power system

Info

Publication number: CN115689181A
Application number: CN202211303769.1A
Authority: CN
Inventors: 黄伟; 王浩
Original assignee: Alibaba Cloud Computing Ltd
Current assignee: Alibaba Cloud Computing Ltd
Priority date: 2022-10-24
Filing date: 2022-10-24
Publication date: 2023-02-03

Abstract

The application relates to a method and a system for preventing error check of a power system, a non-transient computer readable medium and computer equipment. Wherein, the method comprises the following steps: acquiring a scheduling topological graph of the power system; matching preset bodies in a preset body library on a scheduling topological graph, wherein the preset bodies comprise equipment structures and wiring modes, and each preset body corresponds to a preset error prevention rule; fusing the equipment structure, the wiring mode and the preset error prevention rule corresponding to the matched preset body to a scheduling topological graph to obtain an error prevention knowledge graph; and performing error-proof check on the operation ticket of the power system according to the error-proof knowledge graph. Through the method and the device, the problem that the error checking prevention system in the related technology needs a large amount of manual workload to operate and maintain is solved, the operation and maintenance manual workload of the error checking prevention system is reduced, and meanwhile the problem that checking of complex logics such as direct current state judgment is difficult to achieve through a rule writing-down mode is solved.

Description

Method, system and non-transitory computer readable medium for error proofing of power system

Technical Field

The present application relates to the field of power dispatching technologies, and in particular, to a method, a system, a computer device, and a non-transitory computer readable medium for performing an error checking operation on a power system.

Background

In the field of power dispatching, operation tickets are used for power dispatching. The operation ticket is checked and ordered according to a specific rule, so as to ensure that the operation does not violate the power related rule. These rules are derived from the relevant procedures and specification documents in the schedule, called anti-error rules. The correctness and the error-free check of the operation ticket are the error check prevention.

The checking of the operation order is one of the core works of each level of dispatching departments of the power grid, and the correctness of the operation order in the operation order is directly related to the normal operation of the power grid overhaul work, and even the operation safety of the power grid and the personal safety of operators are influenced. Therefore, in the scheduling service of each power level, the operation ticket needs to be checked.

In the related technology, basic information and rules of each device are constructed based on a relational database to perform error-proof check on operation tickets. The rules of the equipment are checked through the rules configured one by one and the real-time state. However, the solution has a huge workload of custom development and maintenance of the relational database, and has no reproducibility, and is difficult to popularize.

Disclosure of Invention

The embodiment provides an anti-error check method, an anti-error check system, computer equipment and a non-transitory computer readable medium for a power system, so as to solve the problem that the anti-error check system needs a large amount of manual workload to operate and maintain in the related art.

An anti-error check method of an electric power system comprises the following steps:

the method comprises the steps of obtaining a scheduling topological graph of the power system, wherein the scheduling topological graph comprises an abstract model of equipment and real-time data of the equipment;

matching preset bodies in a preset body library on the scheduling topological graph, wherein the preset bodies comprise equipment structures and wiring modes, and each preset body corresponds to a preset error prevention rule;

fusing the equipment structure, the wiring mode and the preset error prevention rule corresponding to the matched preset body to the scheduling topological graph to obtain an error prevention knowledge graph;

and performing error-proof check on the operation order of the power system according to the error-proof knowledge graph.

In some of these embodiments, obtaining the dispatch topology map of the power system comprises:

acquiring a power general information model of the power system, and simplifying and stipulating the power general information model to obtain a simplified power general information model, wherein the simplified power general information model comprises an abstract model of equipment;

acquiring remote signaling data and remote measuring data of each device in the power system;

and fusing the remote signaling data and the remote measuring data with the equipment in the simplified electric power general information model to obtain the dispatching topological graph.

In some of these embodiments, matching a preset ontology in a preset ontology library on the scheduling topology comprises:

searching and matching subgraphs isomorphic with the preset ontology in the preset ontology library on the scheduling topological graph, and establishing a corresponding relation between the successfully matched preset ontology and the subgraphs of the scheduling topological graph.

In some embodiments, the performing anti-error check on the operation ticket of the power system according to the anti-error knowledge map comprises:

acquiring an operation ticket of the power system, analyzing the operation ticket and acquiring equipment to be operated and a target action;

linking the error-prevention knowledge graph with the equipment to be operated, and acquiring a target preset error-prevention rule and target real-time data of the equipment to be operated;

determining a target operation result of the equipment to be operated according to the target real-time data and the target action;

carrying out rule reasoning on the target preset error-preventing rule to obtain a judgment condition;

and performing error-proof check on the operation ticket according to the target operation result and the judgment condition.

In some embodiments, the performing rule inference on the target preset error prevention rule further includes:

and (4) visualizing the rule reasoning process.

In some embodiments, the language representation of the preset error prevention rule includes a logic element, an equipment element and a status element, wherein the logic element includes a hierarchical logic of an entity equipment object and a hierarchical logic of a rule, and the status element includes: the switching value state of the root device and the intermediate state of the leaf device.

and carrying out recursive analysis on the language representation of the preset error prevention rule according to the hierarchy topology of the equipment in the error prevention knowledge graph to obtain a judgment condition corresponding to the preset error prevention rule.

In some embodiments, recursively analyzing the language representation of the preset anti-error rule according to a hierarchical topology of devices in the anti-error knowledge graph, and obtaining the determination condition corresponding to the preset anti-error rule includes:

analyzing the equipment to be operated corresponding to the operation ticket;

judging whether the equipment to be operated is root equipment or not;

under the condition that the equipment to be operated is root equipment, acquiring a preset error prevention rule of leaf equipment on the upper layer of the equipment to be operated from the error prevention knowledge graph as a target preset error prevention rule, otherwise acquiring the preset error prevention rule of the equipment to be operated as the target preset error prevention rule;

analyzing each judgment condition in the target preset anti-error rule one by one according to the language expression of the target preset anti-error rule, and determining equipment to be judged corresponding to each judgment condition;

and in the case that the state element is in the intermediate state in the language representation of the judgment condition, performing recursive analysis on the equipment to be judged as the equipment to be operated.

An anti-error check system of an electric power system, comprising:

the system comprises a graph database, a data processing module and a data processing module, wherein the graph database is used for acquiring a scheduling topological graph of the power system, and the scheduling topological graph comprises an abstract model of equipment and real-time data of the equipment;

the system comprises a preset body library, a user interface library and a user interface, wherein the preset body library is used for storing preset bodies and preset error prevention rules, the preset bodies comprise equipment structures and wiring modes, and each preset body corresponds to the preset error prevention rule;

the map fusion module is used for matching a preset body in a preset body library on the scheduling topological map, and fusing an equipment structure, a wiring mode and a preset error prevention rule corresponding to the matched preset body to the scheduling topological map to obtain an error prevention knowledge map;

and the error-proof checking module is used for performing error-proof checking on the operation ticket of the power system according to the error-proof knowledge map.

In some embodiments, the mis-check prevention module comprises:

the analysis unit is used for acquiring an operation ticket of the power system, analyzing the operation ticket and acquiring equipment to be operated and a target action;

the link unit is used for linking the device to be operated in the error-preventing knowledge graph and acquiring a target preset error-preventing rule and target real-time data of the device to be operated;

the determining unit is used for determining a target operation result of the equipment to be operated according to the target real-time data and the target action;

the reasoning unit is used for carrying out rule reasoning on the target preset error-preventing rule to obtain a judgment condition;

and the checking unit is used for performing error-proof checking on the operation ticket according to the target operation result and the judgment condition.

In some embodiments, the operation result of the operation ticket and the preset error prevention rule are expressed by the same language, and the language includes a logic element, an equipment element and a status element, wherein the logic element includes a hierarchical logic of an entity equipment object and a hierarchical logic of a rule, and the status element includes: the switching value state of the root device and the intermediate state of the leaf device.

A computer device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the method of error checking prevention of an electrical power system.

A non-transitory computer readable medium having stored therein a computer program, wherein the computer program is arranged to perform the method of error checking prevention of a power system when run.

Compared with the related art, the method, the system, the computer device and the non-transitory computer readable medium for preventing the error check of the power system provided in the embodiment obtain the scheduling topological graph of the power system, wherein the scheduling topological graph comprises the abstract model of the device and the real-time data of the device; matching preset bodies in a preset body library on a scheduling topological graph, wherein the preset bodies comprise equipment structures and wiring modes, and each preset body corresponds to a preset error prevention rule; fusing the equipment structure, the wiring mode and the preset error prevention rule corresponding to the matched preset body to a scheduling topological graph to obtain an error prevention knowledge graph; the method and the device have the advantages that the error-proof check is performed on the operation tickets of the power system according to the error-proof knowledge graph, the problem that the error-proof check system in the related technology needs a large amount of manual workload for operation and maintenance is solved, and the operation and maintenance manual workload of the error-proof check system is reduced.

The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the application.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application. In the drawings:

fig. 1 is a flowchart of an error checking prevention method of the power system of the present embodiment.

Fig. 2 is a schematic diagram of a visualized image of the process of rule inference of the present embodiment.

Fig. 3 is a flowchart of the generation of the anti-error rule base and the verification of the anti-error rule according to the embodiment.

Fig. 4 is a flowchart of recursive resolution of the present embodiment.

Fig. 5 is a schematic structural diagram of the error checking prevention system of the power system of the present embodiment.

Fig. 6 is a system block diagram of an alternative configuration of the error checking prevention system of the electric power system of the present embodiment.

Fig. 7 is a system block diagram of another alternative configuration of the anti-error check system of the electric power system of the present embodiment.

Fig. 8 is a schematic diagram of a hardware configuration of the computer device of the present embodiment.

Fig. 9 is a schematic diagram of the operation state rule of the present embodiment.

Detailed Description

For a clearer understanding of the objects, aspects and advantages of the present application, reference is made to the following description and accompanying drawings.

The embodiment provides an anti-error checking method of an electric power system, which is applied to the electric power system. The method may be performed at a service end of the power system. The server can be implemented as a distributed server cluster consisting of a plurality of servers, or can be implemented as a single server. The server may be a server of a distributed system or a server incorporating a blockchain. The server may also be a cloud server or an intelligent cloud host that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, web services, cloud communication, middleware services, domain name services, security services, content Delivery Networks (CDNs), and big data and artificial intelligence platforms.

Fig. 1 is a flowchart of an anti-error checking method of an electric power system of the present embodiment, and as shown in fig. 1, the flowchart includes the following steps:

step S101, a scheduling topological graph of the power system is obtained, wherein the scheduling topological graph comprises an abstract model of equipment and real-time data of the equipment.

Step S102, matching preset bodies in a preset body library on a scheduling topological graph, wherein the preset bodies comprise equipment structures and wiring modes, and each preset body corresponds to a preset error prevention rule.

And S103, fusing the equipment structure, the wiring mode and the preset error prevention rule corresponding to the matched preset body into a scheduling topological graph to obtain an error prevention knowledge graph.

And step S104, performing error prevention check on the operation ticket of the power system according to the error prevention knowledge map.

Different from a relational database adopted in the related technology, the steps adopt a mode of matching a preset body to fuse preset error-prevention rules on a scheduling topological graph, so that an error-prevention knowledge graph is formed. Compared with the prior art that a large amount of manual workload is needed for generating a relational database for a new power system, by adopting the steps and presetting the ontology base, the error-proof knowledge graph can be generated quickly and easily automatically based on the scheduling topological graph, and the input of manual workload is reduced. And the formed preset ontology base can also be used for generating an error-proof knowledge graph for a later power system. In addition, when the information such as the topological structure of the power system is changed or a new ontology appears, the steps can be adopted to realize the rapid evolution of the error-proof knowledge graph.

In addition, the error-proof checking method is based on the scheduling topological graph and the error-proof body, the knowledge data and the calculation decoupling of the power are realized by using the matching algorithm, and the knowledge is loaded into the graph through offline matching to form the error-proof knowledge graph, so that the real-time checking efficiency is improved.

The scheduling topological graph comprises a topological graph formed by abstract models of the devices and real-time data of each device in the topological graph. In the power system, a Common Information Model (CIM) is generally used to represent the topology of the power system. The power CMI is an object-oriented data model, which includes common classes, attributes, relationships, etc., and is an abstract model representing all major devices of a power enterprise. The power CIM represents the public classes and properties of the devices, and the relationships between them. The CIM model is described by adopting a Universal Modeling Language (UML), and a traditional entity-relation diagram (ER diagram) is mapped into a complete object-oriented expression mode, so that the unification of a data model is ensured, and the openness of the model is improved. The CIM model describes the static relationship among the devices and does not contain dynamic information such as the real-time state of the devices.

The above devices refer to each participant in the power system, and include, but are not limited to, objects of various conductive devices, such as reactors, capacitors, switches, loads, lines, buses, transformers, generators, and the like. In addition, the devices of the CIM may also include objects for describing the content of companies, areas, transactions, profiles, and links, etc.

Real-time data of a device refers to data representing the real-time status of the status of an entity. For example, real-time data for a device may include telemetry data and telemetry data. The remote communication data is a switching amount of remote communication data, for example, an on/off state of a circuit breaker or a disconnector, an operation/reset state of a protection signal, an on/off state of an Automatic power Generation Control (AGC) function, an Automatic Voltage Control (AVC) function, and the like, and is generally represented by 1 or 2 binary bits. Telemetry data refers to real-time data received by a telemetry terminal via a sensor, the telemetry data being from a telemetry object and reflecting a digital characteristic or state of the telemetry object.

The dispatch topology map is a topology map including the static relationship between the devices of the power system and the real-time data of each device. In some of these embodiments, the dispatch topology map may be obtained by the power CIM model in conjunction with telemetry and telemetry data. For example, a power general information model of a power system is obtained, and the power general information model is simplified and reduced to obtain a simplified power general information model, wherein the simplified power general information model comprises an abstract model of equipment; acquiring remote signaling data and remote measuring data of each device in the power system; and fusing the remote signaling data and the remote measuring data with the equipment in the simplified electric power general information model to obtain a scheduling topological graph.

By the above manner, the scheduling topological graph can be automatically obtained. In the above embodiment, the simplification and reduction of the power general information model refers to performing topology calculation on the power general information model and removing devices (such as objects describing companies, areas, transactions and the like) which are not related to error proofing, so as to reduce the size of the scheduling topological graph and shorten the time required for the subsequent matching process.

In the matching process in step S102, algorithms such as graph simulation and sub-graph isomorphism may be used. For example, the subgraph isomorphism algorithm may be the UIImann algorithm. For the graph isomorphism problem, UIImann's algorithm finds subgraph isomorphism by means of enumeration, and aims at finding all subgraphs in the original graph and the preset graph isomorphism for a given preset graph. In this embodiment, the preset map is each preset ontology in the preset ontology library, and the original map is the scheduling topology map. In some of these embodiments, matching a preset ontology in a preset ontology library on the scheduling topology comprises: searching and matching subgraphs isomorphic with the preset ontology in the preset ontology library on the scheduling topological graph, and establishing a corresponding relation between the successfully matched preset ontology and the subgraphs of the scheduling topological graph.

The preset ontology library is composed of preset ontologies and preset error prevention rules appointed for each ontology. The body of the embodiment includes an equipment structure and a wiring mode, wherein the equipment structure is also composed of a plurality of pieces of equipment and static relations of the equipment, and therefore, the equipment structure is also a topological graph as well as the electric CIM. The preset body is generally composed of a typical device structure, and the power CIM of an actual power system can be regarded as being composed of the typical device structure as a constituent unit.

In some embodiments, in step S104, performing error-proof check on the operation ticket of the power system according to the error-proof knowledge graph includes: acquiring an operation ticket of the power system, analyzing the operation ticket and acquiring equipment to be operated and a target action; linking the device to be operated with the anti-error knowledge map, and acquiring a target preset anti-error rule and target real-time data of the device to be operated; determining a target operation result of the equipment to be operated according to the target real-time data and the target action; carrying out rule reasoning on a target preset error-preventing rule to obtain a judgment condition; and performing error-proof check on the operation ticket according to the target operation result and the judgment condition.

In analyzing the operation ticket, in this embodiment, accurate analysis and representation of the operation ticket are realized by using a Natural Language Processing (NLP) algorithm training model + known rule in combination with algorithms such as relationship extraction and event extraction. And training an analysis model by collecting historical operation ticket texts, and then calibrating by combining with a known analysis rule. The scheme has better generalization and universality compared with general regular and regular extraction while accurately analyzing the operation ticket, and can also accurately analyze some changed texts.

In the above embodiment, the operation ticket includes the device to be operated and the target action of the device to be operated, and the device to be operated and the target action thereof may be obtained through parsing of the operation ticket. After the to-be-operated device is obtained through analysis, according to the identification information of the to-be-operated device, the corresponding to-be-operated device is linked in the error-prevention knowledge graph generated in the step S103, the preset error-prevention rule corresponding to the to-be-operated device is read as the target preset error-prevention rule, and meanwhile, the target real-time data of the to-be-operated device is read from the error-prevention just graph. Thereafter, by combining the target real-time data with the target action, a new real-time status of the power system after the application of the operation ticket, which is called a target operation result, can be obtained. The target operation result is not actually executed at this time, and is calculated only by the system. And then, for the target preset error prevention rule, rule reasoning can be carried out through the reasoning unit to obtain a judgment condition. The determination condition is a determination condition of a device to be determined, and the device to be determined may be a device to be operated or a device related to the device to be operated. And finally, carrying out logical operation on each judgment condition and the target operation result to obtain a final error checking prevention result, thereby realizing error checking prevention of the operation ticket.

In some embodiments, when the rule inference is performed on the target preset error prevention rule, the rule inference process can be visualized. For example, fig. 2 is a schematic diagram of a visualized image of the process of rule inference in the embodiment, and as shown in fig. 2, the process of rule inference is displayed in a node-edge manner, showing the whole process of checking. In fig. 2, the device numbered 20 is the device to be operated, and its target action is closing. The target default error prevention rule of the device with the number 20 is 'no knife switch can be pulled and closed with load'. After regular reasoning, three devices to be judged with the numbers of 21, 22 and 23 are obtained, and all judgment conditions of the three devices to be judged should be on. If the target operation result of the operation ticket at this time is that the object to be operated with the number of 20 is directly closed and the devices with the numbers of 21, 22 and 23 are all closed, a check result that the error-proof check of the operation ticket does not pass is output.

The checking of the operation ticket needs to rely on a series of anti-error rules, which are related to the wiring mode and the topological structure of the power grid. In the related art, the error-prevention rule corresponding to each device is usually set in a code-dead-writing mode, and such modes have the problems of being incapable of copying and popularizing, large in configuration workload, incapable of automatically updating the rule along with the development of business, difficult to adapt to a complex rule scene and the like. However, the language representation of the current error prevention rule cannot represent complex rules with multiple devices, multiple rules and multiple levels, so that the current error prevention rule cannot represent a complex alternating current operation ticket or a current direct current operation ticket rule.

For example, the related art provides a linguistic representation of interval-based anti-error rules, which is designed based on information of typical intervals. The bays in the power system refer to closely connected, functionally shared parts of the substation. The identification of these sections is important for service (which sections are disconnected with minimal impact on the rest of the substation) or for extension planning (which sections have to be added if a new line is added). These parts are called intervals and are managed by devices, collectively referred to as "interval controllers", equipped with a set of protections, called "interval protections". The electrical interval in the transformer substation is a complete loop and comprises a circuit breaker, a disconnecting switch, a mutual inductor, a lightning arrester and the like, all electrical units with complete functions are called an interval, such as an incoming and outgoing line interval and a bus equipment interval, and for 3/2 wiring, a complete string comprises 3 electrical intervals.

In the above-described language representation of the related art, the device common number "0" represents a device-divided operation condition, the device common number "1" represents a device-combined operation condition, ": "represents a separator,", "represents an AND operation," + "represents an OR operation," = "represents an equal compare operation,"! Indicating the end of the sentence. The above-mentioned scheme of the related art cannot be applied to the structure in which the atypical interval exists but the error prevention rule exists, for example: a line two-sided state, a line one-sided state, a state of a direct current device, and the like. In addition, the above language representation of the error prevention rule in the related art also only represents the and or operation in the condition level, and can only be used for representing simple rules, and cannot process the and or operation in the multi-rule and multi-condition.

In this embodiment, a language representation of the error prevention rule is provided, which is used to implement the multi-device, multi-rule, multi-level representation of the preset error prevention rule. The language representation of the preset error prevention rule comprises a logic element, an equipment element and a state element, wherein the logic element comprises the hierarchical logic of an entity equipment object and the hierarchical logic of the rule, and the state element comprises: the switching value state of the root device and the intermediate state of the leaf device. The language representation provided by the embodiment can be used for general representation of the device state rule and the device operation rule.

For example, the logic elements, the device elements, and the status elements of the language representation of the anti-error rule provided in this embodiment may be:

logic elements:

"{}": logic and relationships between different rules.

"; ": the logical or relationship of different sub-rules within the same rule.

":": hierarchical device relationships.

",": different decision conditions and relationships in the same sub-rule.

"|": different decision conditions or relationships in the same sub-rule.

"=": equal to.

"! ": not equal.

The equipment element is as follows: the names of the devices in the structure are encoded.

The state elements are as follows:

"1": and (5) closing.

"0": and (4) pulling apart.

"running": and (4) operating state.

"hot": hot standby state.

"cold" means cold standby.

"repair": and (5) maintenance state.

"ac _ hot": the alternating current side is in a standby state.

"isocyanate": a bypass state.

"ground": a ground state.

The differences between the above-described language representation and the language representation of the related art include: there are defined symbols of representation between different rules, between devices at different levels, and also intermediate states such as running, hot, etc.

Based on the elements, the accurate description of the operation error prevention rule, the alternating current state check rule and the direct current state check rule in the scheduling field can be realized. Taking the operating state rule shown in fig. 9 as an example, the operating state rule is expressed as:

[{'KG1＝1；KG2＝hot'},{'DZ1＝1,DZ2＝1|DZ3＝1'},{'DD1＝0,DD2＝0'}]

in the rule, "KG1", "KG2", "DZ1", "DZ2", "DD1", "DD2", "DZ3" are device elements, and represent a specific device under the structure; "1", "0", and "hot" are state elements representing the constraint state of a device.

The rule may be interpreted as: three rules are satisfied simultaneously:

(1) KG1 is closed or KG2 is in a hot standby state;

(2) DZ1 is closed, and one of DZ2 or DZ3 is closed;

(3) DD1 is pulled apart and DD2 is pulled apart.

It should be noted that the expression symbols used in the above language expression are only exemplary descriptions, and the logic elements, the device elements, and the state elements in the above regular language may be replaced by other symbols or forms. For example, "()" represents rule and relationship, "or" represents condition or relationship, etc., and "100" represents operation state, etc.

Fig. 3 is a flowchart of the generation of the anti-error rule base and the verification of the anti-error rule base in this embodiment, and the anti-error rule base may be a part of the preset ontology base in the above embodiment, for example. As shown in fig. 3, the error-prevention rule language is designed based on the device structure, and the language can support various rule representations in the scheduling error-prevention scenario; and then expressing relevant rules in the scheduling based on a designed rule language, and constructing an anti-error rule base. In an online checking scene, acquiring a corresponding error checking prevention rule according to input operation and equipment, and performing recursive analysis on the rule based on hierarchical topological structure information; and finally, checking and judging by combining the real-time equipment state and the analyzed rule, and outputting a result.

The method for constructing the corresponding anti-error rule base aiming at the typical equipment in alternating current and direct current comprises the following steps: basic switch rules, series compensation rules, double-bus switch rules, 3/2 series rules, 4/3 series rules, outgoing disconnecting link rules, special 6 disconnecting link rules, high-impedance disconnecting link rules, line single-side state rules, line double-side state rules, pole rules, converter rules, pole bus rules, direct current line rules, direct current neutral bus rules, grounding electrode line rules, metal return switch rules, direct current operation mode rules and the like.

In the above language representation, "1" and "0" are device root states, and the others are intermediate states. The determination of the intermediate state requires a further conversion into the device root state in combination with the recursion of the tree structure. In this embodiment, by applying the linguistic representations, the linguistic representations of the preset anti-error rules can be recursively analyzed according to the hierarchical topology of the devices in the anti-error knowledge graph, so as to obtain the determination conditions corresponding to the preset anti-error rules.

For example, analyzing the device to be operated corresponding to the operation ticket; judging whether the equipment to be operated is root equipment or not; under the condition that the equipment to be operated is root equipment, acquiring a preset error prevention rule of leaf equipment on the upper layer of the equipment to be operated from an error prevention knowledge graph as a target preset error prevention rule, and otherwise acquiring the preset error prevention rule of the equipment to be operated as the target preset error prevention rule; analyzing each judgment condition in the target preset anti-misoperation rule one by one according to the language expression of the target preset anti-misoperation rule, and determining equipment to be judged corresponding to each judgment condition; and in the case that the state element is in the intermediate state in the language representation of the judgment condition, performing recursive analysis on the equipment to be judged as the equipment to be operated.

Fig. 4 is a flowchart of recursive resolution of the present embodiment, and as shown in fig. 4, the flowchart includes: firstly, judging whether a device to be operated is a root device or not, and if the device to be operated is the root device, acquiring an upper leaf device of the root device; then acquiring rules from a rule base based on the identification information of the leaf equipment; analyzing each judgment condition of the rule one by one, and acquiring corresponding equipment to be judged according to the equipment elements of the condition; if the state element in the condition is not 0 or 1, the equipment to be determined and the state element are taken as new equipment to be operated and target action, and recursive analysis is carried out; if the status element is 0 or 1 in the condition, the determination is made in conjunction with the real-time status of the device to be determined. And finally, performing logical operation on the judgment result of each condition according to the rule logical elements, and outputting a final checking result.

By adopting the recursive analysis method, not only can various rules composed of general and NOR logic be automatically judged, but also equipment at different levels in the topology can be flexibly combined and judged by combining topology information, so that the rules and analysis can be suitable for various complex judgment scenes, such as AC line single-side state judgment, AC line double-side body judgment, DC pole state judgment, DC operation mode judgment and the like.

Through the language expression of the error-prevention rule of the embodiment, the rule is automatically analyzed and judged by using the hierarchical topological information and based on the recursive algorithm based on the error-prevention knowledge map, so that the rule and the analysis can be suitable for various complex judgment scenes, such as single-side state judgment of an alternating current circuit, double-side body judgment of the alternating current circuit, direct current pole state judgment, direct current operation mode judgment and the like.

The embodiment also provides an anti-error check system of the power system. Fig. 5 is a schematic structural diagram of an anti-error check system of the power system of the present embodiment, and as shown in fig. 5, the system includes:

the map database 51 is used for acquiring a scheduling topological graph of the power system, wherein the scheduling topological graph comprises an abstract model of the equipment and real-time data of the equipment.

And the preset body library 52 is used for storing preset bodies and preset error prevention rules, the preset bodies comprise equipment structures and wiring modes, and each preset body corresponds to the preset error prevention rule respectively.

And the map fusion module 53 is configured to match a preset body in the preset body library on the scheduling topological map, and fuse an equipment structure, a wiring mode and a preset error prevention rule corresponding to the matched preset body to the scheduling topological map to obtain an error prevention knowledge map.

And the error-proof checking module 54 is used for performing error-proof checking on the operation ticket of the power system according to the error-proof knowledge graph.

Fig. 6 is a system block diagram of an alternative structure of the mis-check prevention system of the power system of the present embodiment, and as shown in fig. 6, the system includes: the method comprises five parts of data access, body design, map construction, map fusion and error proofing.

The data access portion primarily provides data to the aforementioned graph database 51. And the data intervention part accesses and analyzes data related to the error-proof check of the operation order into the system, wherein the data comprises a power CIM (common information model), remote signaling data, telemetering data and the like.

The map construction section is used to construct data of the above-described map database 51. The map building part analyzes the electric power CIM model to a map database to build a basic dispatching equipment topology base (namely a dispatching topology map), and simultaneously analyzes remote signaling and remote measuring data in real time to ensure the real-time property of the topology base.

The ontology design part is used for generating the preset ontology library 52 and is a preset error prevention rule in each preset ontology association error prevention rule library in the preset ontology library 52. And the anti-error body is designed by the body design part, and the topological structure and the rules are abstracted and fused. And respectively creating error prevention ontologies aiming at a typical equipment structure and a wiring mode of the power system, and constructing an error prevention ontology library. The anti-error ontology library does not contain any specific equipment information, and is a universal topological structure and rules.

And the map fusion part is realized by the map fusion module 53, and is used for matching and instantiating the error-prevention ontology base in the current actual scheduling topology based on algorithms such as graph simulation and subgraph isomorphism, updating the knowledge and information after equipment matching on the topology base, and simultaneously mounting the rules into specific equipment to form the fused error-prevention knowledge map base.

And the map fusion part and the error proofing part respectively comprise corresponding algorithm engines. The algorithm engine layer is mainly some general algorithm engines applied in the system, such as algorithms of Entity identification (NER), relationship extraction, event extraction, entity linking, depth recursive traversal, rule inference, depth First Search (DFS) and the like. The algorithms are used for links of operation ticket analysis, paradigm text analysis, graph entity linkage, rule analysis, checking and the like in support application.

The error checking prevention part is realized by the error checking prevention module 54, and the error checking prevention module is positioned on an upper application layer. The module firstly analyzes an input operation order, and entity linkage and error prevention rule acquisition are carried out on an error prevention knowledge map base based on the analyzed result. Checking the alternating current operation ticket and the direct current operation ticket through regular reasoning, and finally visualizing a reasoning process based on a map. The method can also support a user to input logic operation rules in a self-defined mode, automatically analyze and express the rules through an NLP algorithm, and automatically check the rules by using an anti-error map base and rule inference.

In some embodiments, the graph database 51 is configured to obtain a power general information model of the power system, and simplify and reduce the power general information model to obtain a simplified power general information model, where the simplified power general information model includes an abstract model of a device; acquiring remote signaling data and remote measuring data of each device in the power system; and fusing the remote signaling data and the remote measuring data with the equipment in the simplified electric power general information model to obtain a scheduling topological graph.

In some embodiments, the map fusion module 53 is configured to search and match sub-graphs isomorphic with a preset ontology in the preset ontology library on the scheduling topological graph, and establish a corresponding relationship between the successfully matched preset ontology and the sub-graphs of the scheduling topological graph.

Fig. 7 is a system block diagram of another alternative configuration of the anti-error check system of the electric power system of the present embodiment. As shown in FIG. 7, in some of these embodiments, the mis-check prevention module 54 includes: the analysis unit 541 is configured to acquire an operation ticket of the power system, analyze the operation ticket, and acquire a device to be operated and a target action; the link unit 542 is configured to link the device to be operated with the error-prevention knowledge graph, and obtain a target preset error-prevention rule and target real-time data of the device to be operated; the determining unit 543, configured to determine a target operation result of the device to be operated according to the target real-time data and the target action; the inference unit 544 is configured to perform rule inference on the target preset error prevention rule to obtain a determination condition; and the checking unit 545 is used for performing error-proof checking on the operation ticket according to the target operation result and the judgment condition.

In some of these embodiments, the mis-proof check module 54 further includes a visualization unit for visualizing the process of rule reasoning.

In some embodiments, the language representation of the preset error prevention rule includes a logic element, an equipment element and a status element, wherein the logic element includes a hierarchical logic of the entity equipment object and a hierarchical logic of the rule, and the status element includes: the switching value state of the root device and the intermediate state of the leaf device.

In some embodiments, the anti-error checking module 54 is configured to perform recursive analysis on the language representation of the preset anti-error rule according to the hierarchical topology of the device in the anti-error knowledge graph, so as to obtain a determination condition corresponding to the preset anti-error rule.

In some embodiments, the error checking prevention module 54 is configured to analyze a device to be operated corresponding to the operation ticket; judging whether the equipment to be operated is root equipment or not; under the condition that the equipment to be operated is root equipment, acquiring a preset error prevention rule of leaf equipment on the upper layer of the equipment to be operated from an error prevention knowledge graph as a target preset error prevention rule, and otherwise acquiring the preset error prevention rule of the equipment to be operated as the target preset error prevention rule; analyzing each judgment condition in the target preset anti-misoperation rule one by one according to the language expression of the target preset anti-misoperation rule, and determining equipment to be judged corresponding to each judgment condition; and in the case that the state element is in the intermediate state in the language representation of the judgment condition, performing recursive analysis on the equipment to be judged as the equipment to be operated.

The embodiment also provides the computer equipment. Fig. 8 is a schematic diagram of a hardware structure of the computer device of the embodiment, and as shown in fig. 8, the computer device may include a processor 81 and a memory 82 storing computer program instructions.

Specifically, the processor 81 may include a Central Processing Unit (CPU), or A Specific Integrated Circuit (ASIC), or may be configured to implement one or more Integrated circuits of the embodiments of the present Application.

Memory 82 may include, among other things, mass storage for data or instructions. By way of example, and not limitation, the memory 82 may include a Hard Disk Drive (Hard Disk Drive, abbreviated HDD), a floppy Disk Drive, a Solid State Drive (SSD), flash memory, an optical Disk, a magneto-optical Disk, tape, or a Universal Serial Bus (USB) Drive or a combination of two or more of these. Memory 82 may include removable or non-removable (or fixed) media, where appropriate. The memory 82 may be internal or external to the data processing apparatus, where appropriate. In a particular embodiment, the memory 82 is a Non-Volatile (Non-Volatile) memory. In particular embodiments, memory 82 includes Read-Only Memory (ROM) and Random Access Memory (RAM). The ROM may be mask-programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically Erasable PROM (EEPROM), electrically rewritable ROM (EAROM), or FLASH Memory (FLASH), or a combination of two or more of these, where appropriate. The RAM may be a Static Random-Access Memory (SRAM) or a Dynamic Random-Access Memory (DRAM), where the DRAM may be a Fast Page Mode Dynamic Random-Access Memory (FPMDRAM), an Extended data output Dynamic Random-Access Memory (EDODRAM), a Synchronous Dynamic Random-Access Memory (SDRAM), and the like.

The memory 82 may be used to store or cache various data files for processing and/or communication use, as well as possibly computer program instructions for execution by the processor 82.

In some of these embodiments, the computer device may also include a communication interface 83 and a bus 80. As shown in fig. 8, the processor 81, the memory 82, and the communication interface 83 are connected via the bus 80 to complete communication therebetween.

The communication interface 83 is used for implementing communication between various modules, apparatuses, units and/or devices in the embodiments of the present application. The communication interface 83 may also enable communication with other components such as: the data communication is carried out among external equipment, image/data acquisition equipment, a database, external storage, an image/data processing workstation and the like.

Bus 80 includes hardware, software, or both to couple the components of the computer device to each other. Bus 80 includes, but is not limited to, at least one of the following: data Bus (Data Bus), address Bus (Address Bus), control Bus (Control Bus), expansion Bus (Expansion Bus), and Local Bus (Local Bus). By way of example and not limitation, bus 80 may include an Accelerated Graphics Port (AGP) or other Graphics Bus, an Enhanced Industry Standard Architecture (EISA) Bus, a Front-Side Bus (FSB), a Hyper Transport (HT) Interconnect, an ISA (ISA) Bus, an InfiniBand (InfiniBand) Interconnect, a Low Pin Count (LPC) Bus, a memory Bus, a microchannel Architecture (MCA) Bus, a PCI (Peripheral Component Interconnect) Bus, a PCI-Express (PCI-X) Bus, a Serial Advanced Technology Attachment (SATA) Bus, a vlslave Bus, a Video Bus, or a combination of two or more of these suitable electronic buses. Bus 80 may include one or more buses, where appropriate. Although specific buses are described and shown in the embodiments of the application, any suitable buses or interconnects are contemplated by the application.

The computer device executes the computer program through the processor 81 to realize the error checking prevention method of the power system of the above embodiment.

It should be noted that, for specific examples in this embodiment, reference may be made to the examples described in the foregoing embodiment and optional implementation manners, and details are not described in this embodiment again.

In addition, in combination with the method for preventing error checking of the power system provided in the foregoing embodiment, a non-transitory computer readable medium may also be provided to implement this embodiment. The medium has a computer program stored thereon; the computer program, when executed by a processor, implements the method for performing mis-check protection of an electrical power system of any of the above embodiments.

It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to be limiting. All other embodiments, which can be derived by a person skilled in the art from the examples provided herein without any inventive step, shall fall within the scope of protection of the present application.

It is obvious that the drawings are only examples or embodiments of the present application, and it is obvious to those skilled in the art that the present application can be applied to other similar cases according to the drawings without creative efforts. Moreover, it should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another.

The term "embodiment" is used herein to mean that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is to be expressly and implicitly understood by one of ordinary skill in the art that the embodiments described in this application may be combined with other embodiments without conflict.

Unless defined otherwise, technical or scientific terms referred to herein shall have the same general meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The use of the terms "a" and "an" and "the" and similar referents in the context of describing the invention (including a reference to the context of the specification and claims) are to be construed to cover both the singular and the plural, as well as the singular and plural. The terms "comprises," "comprising," "has," "having," and any variations thereof, as referred to in this application, are intended to cover non-exclusive inclusions; for example, a process, method, and system, article, or apparatus that comprises a list of steps or modules (elements) is not limited to the listed steps or modules, but may include other steps or modules (elements) not listed or inherent to such process, method, article, or apparatus. Reference throughout this application to "connected," "coupled," and the like is not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Reference to "a plurality" in this application means two or more. "and/or" describes an association relationship of associated objects, meaning that three relationships may exist, for example, "A and/or B" may mean: a exists alone, A and B exist simultaneously, and B exists alone. In general, the character "/" indicates a relationship in which the objects associated before and after are an "or". The terms "first," "second," "third," and the like in this application are used for distinguishing between similar items and not necessarily for describing a particular sequential or chronological order.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the patent protection. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. An anti-error check method of an electric power system is characterized by comprising the following steps:

fusing the equipment structure, the wiring mode and the preset anti-error rule corresponding to the matched preset body to the scheduling topological graph to obtain an anti-error knowledge graph;

2. The method of claim 1, wherein obtaining the dispatch topology map for the power system comprises:

3. The method of claim 1, wherein matching a preset ontology in a preset ontology library on the scheduling topology comprises:

4. The method of claim 1, wherein performing anti-error checking on the operation tickets of the power system according to the anti-error knowledge graph comprises:

5. The method of claim 4, wherein performing rule reasoning on the target preset anti-error rule further comprises:

and (4) visualizing the process of rule reasoning.

6. The method according to any one of claims 1 to 5, wherein the language representation of the preset error prevention rule comprises a logic element, an equipment element and a status element, wherein the logic element comprises a hierarchical logic of an entity equipment object and a hierarchical logic of a rule, and the status element comprises: the switching value state of the root device and the intermediate state of the leaf device.

7. The method of claim 6, wherein performing error proofing of the operation tickets of the power system according to the error proofing knowledge graph comprises:

8. The method according to claim 7, wherein performing recursive analysis on the linguistic representation of the preset anti-error rule according to a hierarchical topology of devices in the anti-error knowledge graph, and obtaining a determination condition corresponding to the preset anti-error rule comprises:

analyzing the equipment to be operated corresponding to the operation ticket;

judging whether the equipment to be operated is root equipment or not;

analyzing each judgment condition in the target preset anti-misoperation rule one by one according to the language expression of the target preset anti-misoperation rule, and determining equipment to be judged corresponding to each judgment condition;

9. An electric power system prevents mistake check system, its characterized in that includes:

10. The system of claim 9, wherein the mis-check prevention module comprises:

11. The system according to claim 9, wherein the operation result of the operation ticket and the preset error prevention rule are expressed by the same language, and the language includes a logic element, an equipment element and a status element, wherein the logic element includes a hierarchical logic of an entity equipment object and a hierarchical logic of a rule, and the status element includes: the switching value state of the root device and the intermediate state of the leaf device.

12. A computer arrangement comprising a memory and a processor, wherein the memory has stored therein a computer program, and the processor is arranged to run the computer program to perform the method of error checking protection of an electrical power system of any of claims 1 to 8.

13. A non-transitory computer-readable medium, in which a computer program is stored, wherein the computer program is configured to execute the method for error checking prevention of a power system according to any one of claims 1 to 8 when the computer program runs.