CN115687104A

CN115687104A - Algorithm verification method and electronic equipment

Info

Publication number: CN115687104A
Application number: CN202211309729.8A
Authority: CN
Inventors: 徐森
Original assignee: Alibaba China Co Ltd
Current assignee: Alibaba China Co Ltd
Priority date: 2022-10-25
Filing date: 2022-10-25
Publication date: 2023-02-03

Abstract

The embodiment of the application discloses an algorithm verification method and electronic equipment, wherein the method comprises the following steps: in a first verification stage, performing degradation processing on the calculated amount of a target algorithm on the basis of completely executing the code logic of the target algorithm so as to verify the code stability of the target algorithm; the code stability includes: whether a condition that the running link is interrupted due to a code defect or an exception exists; and after the code stability verification is passed, entering a second verification stage, and in the second verification stage, executing the code logic after the verification of the first verification stage is passed so as to verify the data processing effect of the target algorithm. By the embodiment of the application, the efficiency of algorithm verification can be improved.

Description

Algorithm verification method and electronic equipment

Technical Field

The present application relates to the field of algorithm verification technologies, and in particular, to an algorithm verification method and an electronic device.

Background

Data processing based on a machine learning algorithm model is widely applied in many fields, for example, when a shooting object is three-dimensionally reconstructed based on a video image, a corresponding algorithm model can be used to complete a three-dimensional reconstruction process. Under the trend that a specific algorithm model is continuously iterated and optimized, new codes are prepared, and verification preparation before the algorithm is online is needed, so that verification is performed on whether Bug (defect) is introduced into newly added iteration logic or not, whether the updated algorithm model really improves the processing effect or not and the like, and normal online iteration can be guaranteed without influencing the stability of online data processing.

However, for some more complex algorithm models, the verification procedure usually takes a longer time. For example, the three-dimensional reconstruction algorithm belongs to the above-mentioned relatively complex algorithm model, and the amount of data to be processed is relatively large, so that it usually takes two or three days or even longer to verify the three-dimensional reconstruction algorithm once.

Therefore, how to improve the verification efficiency of the algorithm model is a technical problem to be solved by those skilled in the art.

Disclosure of Invention

The application provides an algorithm verification method and electronic equipment, which can improve the efficiency of algorithm verification.

The application provides the following scheme:

an algorithm verification method comprising:

in a first verification stage, performing degradation processing on the calculated amount of a target algorithm on the basis of completely executing the code logic of the target algorithm so as to verify the code stability of the target algorithm; the code stability includes: whether a condition that an operating link is interrupted due to a code defect or an exception exists;

and after the code stability verification is passed, entering a second verification stage, and in the second verification stage, executing the code logic after the verification of the first verification stage is passed so as to verify the data processing effect of the target algorithm.

Wherein, still include:

determining multiple input data and algorithm iteration times required for verifying the data processing effect of a target algorithm;

the step of performing degradation processing on the calculated amount of the target algorithm on the basis of the code logic of the completely executed target algorithm comprises the following steps:

degrading the calculated amount of the target algorithm by reducing the data amount of the multiple input data and/or the iteration times of the algorithm;

the executing, in the second verification stage, the code logic verified in the first verification stage comprises:

and in the second verification stage, executing the code logic which passes the verification in the first verification stage by using the multiple pieces of input data and the iteration times of the algorithm so as to verify the data processing effect of the target algorithm.

Wherein the target algorithm comprises an algorithm for three-dimensional reconstruction based on the same subject contained in a plurality of input images;

wherein the degradation processing of the data amount of the input data includes:

reducing the resolution of the input images, and/or reducing the number of input images.

Wherein the target algorithm comprises a plurality of data processing modules;

and performing degradation processing on the calculated amount of the plurality of data processing modules on the basis of the code logic of the completely executed target algorithm.

Wherein the performing degradation processing on the calculated amount of the plurality of data processing modules comprises:

and performing degradation processing on the calculated amount of the plurality of data processing modules through a pre-degradation processing module which is added before the plurality of data processing modules and is shared by the plurality of modules.

Wherein, the plurality of data processing modules are internally provided with a dedicated degradation processing logic inside the modules;

the performing degradation processing on the calculated amount of the plurality of data processing modules comprises:

when the code logic for running the target algorithm is started, a degradation processing identifier is added in a starting instruction, so that the plurality of data processing modules finish degradation processing on input data and/or algorithm iteration times by executing the special degradation processing logic configured in the data processing modules according to the degradation processing identifier.

The special degradation processing logic in the module configured in the data processing module is configured individually according to the data processing logic in the data processing module.

Wherein, still include:

in the first verification stage, if a condition that a running link is interrupted due to code defects or exceptions occurs, a notification message is provided for a code development system, so that after the code logic is repaired, the verification in the first verification stage is carried out again until the repaired code logic can finish running without interruption.

A three-dimensional reconstruction algorithm verification method comprises the following steps:

determining a three-dimensional reconstruction algorithm to be verified, a plurality of input images required by verifying the data processing effect and the iteration times of the algorithm; the three-dimensional reconstruction algorithm is used for performing three-dimensional reconstruction based on the same main body contained in the multiple input images and outputting point cloud coordinates in a three-dimensional space;

in a first verification stage, after degradation processing is carried out on the multiple input images and/or the iteration times of the algorithm, executing code logic of the three-dimensional reconstruction algorithm so as to verify the code stability of the three-dimensional reconstruction algorithm; the code stability includes: whether a condition that the running link is interrupted due to a code defect or an exception exists;

and after the code stability verification is passed, entering a second verification stage, and in the second verification stage, executing the code logic after the verification is passed in the first verification stage by using the plurality of input images and the algorithm iteration times so as to verify the data processing effect of the three-dimensional reconstruction algorithm after a visualized three-dimensional model is rendered based on the point cloud coordinates output by the three-dimensional reconstruction algorithm.

Wherein the degradation processing of the input image comprises:

An algorithm verification device comprising:

the first verification unit is used for performing degradation processing on the calculated amount of the target algorithm on the basis of completely executing the code logic of the target algorithm in a first verification stage so as to verify the code stability of the target algorithm; the code stability includes: whether a condition that an operating link is interrupted due to a code defect or an exception exists;

and the second verification unit is used for entering a second verification stage after the code stability verification is passed, and executing the code logic after the verification of the first verification stage in the second verification stage so as to verify the data processing effect of the target algorithm.

A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method of any of the preceding claims.

An electronic device, comprising:

one or more processors; and

a memory associated with the one or more processors for storing program instructions that, when read and executed by the one or more processors, perform the steps of the method of any of the preceding claims.

According to the specific embodiments provided herein, the present application discloses the following technical effects:

according to the method and the device, the algorithm verification process can be divided into two stages, the first verification stage is mainly used for verifying the stability of the codes, and the data processing effect of the algorithm is verified after the code stability verification is passed. In the first verification stage, the calculated amount of the algorithm can be degraded, so that the running time of the code is shortened, the stability problem in the code can be found more quickly, and the code can be repaired in time. And then, the second verification stage can execute the code logic which passes the verification of the first verification stage, so that the codes can be operated and completed without interruption, and the data processing effect is verified after the data processing result is obtained. By the method, the time required by algorithm verification can be shortened on the whole, and for some time-consuming algorithms, the efficiency of algorithm verification can be effectively improved.

Of course, it is not necessary for any product to achieve all of the above-described advantages at the same time for practicing the present application.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required in the embodiments will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic diagram of a system architecture provided by an embodiment of the present application;

FIG. 2 is a flow chart of a first method provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of an implementation of demotion logic provided by an embodiment of the present application;

FIG. 4 is a schematic diagram of an implementation of another destage logic provided by an embodiment of the application;

FIG. 5 is a flow chart of a second method provided by embodiments of the present application;

FIG. 6 is a schematic view of an apparatus provided by an embodiment of the present application;

fig. 7 is a schematic diagram of an electronic device provided in an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments that can be derived from the embodiments given herein by a person of ordinary skill in the art are intended to be within the scope of the present disclosure.

First, it should be noted that, in the process of implementing the present application, the inventor of the present application finds that, when an algorithm is verified, it is generally necessary to verify two aspects, namely, the stability of the logic of a code (after the algorithm is designed, the algorithm logic is expressed by the code of a computer language so as to become a computer executable program), and the data processing effect of the algorithm itself (for example, for a three-dimensional reconstruction algorithm, the reality of an object three-dimensional model output by the algorithm is verified). In the prior art, the stability of a code is verified in the process of verifying the data processing effect of an algorithm. For example, when the algorithm is verified, some data needs to be input into the algorithm, specific codes need to be started to run, and after all the codes are run, the output result of the algorithm is judged. However, if there is a problem in the stability of the code, for example, there is Bug (Bug) or exception in the code, the running process of the code is interrupted, and then after Bug or exception repair is performed by a code developer, the specific code is run again from the beginning, and so on, until all bugs or exceptions in the code are repaired, the code can run completely from the beginning to the end, and then the specific data processing result cannot be output, and the data processing effect of the algorithm is verified.

It can be seen that the time required to verify the algorithm is longer because both the code stability and the data processing results need to be verified. For example, it is assumed that the code of an algorithm needs two days to run completely once without Bug or exception, but after the first verification is started, the algorithm may be interrupted when running for about one day, so as to prove that Bug or exception exists in the code, and at this time, the algorithm has to stop to repair the code and then starts running again from the beginning. In a new round of verification, if the operation is interrupted again when the operation is about half a day, other bugs or exceptions exist in the proof code, and the operation is started again from the beginning after the code is repaired again. Until the third verification, the code running link is not interrupted, and the running of the complete code is completed within about two days, so as to obtain a data processing result, and at this time, the data processing result can be verified. Thus, the whole verification process needs to be completed after 1+1.5+2=4.5 days.

In view of the above situation, the embodiment of the present application provides a solution that can improve the algorithm verification efficiency, and specifically, in the solution, the algorithm verification process can be divided into two stages, and in the first verification stage, the stability of the code is mainly verified, that is, the method is mainly used for discovering the problems of Bug, abnormality and the like existing in the code without paying attention to the data processing effect of the algorithm. And after bugs or exceptions are found, timely repairing, and after the code stability is verified through the first verification stage, entering a second verification stage to verify the data processing effect of the algorithm.

Since the first verification stage does not need to verify the data processing effect, the requirements on the quality of input data, the iteration times of the algorithm and the like can be reduced, and only the code can run. Based on this, in the first verification stage, the input data of the algorithm, the iteration number of the algorithm, and the like may be subjected to degradation processing, for example, for the three-dimensional reconstruction algorithm, the resolution of the input image may be reduced, or the number of input images may be reduced, or the iteration number of the algorithm may be reduced, and the like. Therefore, the calculation amount in the running process of the code is reduced, so that the running time of the code can be shortened, but all the codes can be run at the same time, and therefore, if the codes have the problems of Bug or abnormity and the like, the codes can also be reflected in the running process. For example, for the algorithm in the foregoing example, if a plurality of sets of input data without degradation processing and the number of iterations are used to run a specific code, it takes about two days, but the algorithm may run completely within several hours after performing degradation processing on the input data and/or the number of iterations according to the scheme provided by the embodiment of the present application. Therefore, if the code has Bug or abnormal problems, the problem can be found in a shorter time, and the code can be repaired in time until the code logic can be completely run, and the first stage of verification can be finished.

After the verification and repair of the code stability is completed by the first verification stage, a second verification stage may be entered, which may focus on verifying the data processing effect. Specifically, in the second verification stage, multiple sets of input data which are not subjected to degradation processing and the number of iterations may be used to formally run the code logic corresponding to the specific algorithm, and since there is no Bug or exception in the code, the running link is not interrupted until the code runs completely, and a specific data processing result may be input. And then, the data processing result is sent to a downstream processing module or a manual mode to judge the data processing effect.

By the method, the code stability problem can be found more quickly so as to be repaired in time, and then the data processing effect of the algorithm is verified, so that the verification efficiency of the algorithm can be improved on the whole.

From the perspective of system architecture, referring to fig. 1, the embodiment of the present application mainly improves an existing algorithm verification system, in which an algorithm verification process can be divided into two stages. In the first verification stage, a degradation processing logic is added, and specifically, the degradation processing logic may be implemented by adding a pre-degradation processing module to the algorithm code, or may be implemented in multiple modules of the algorithm, respectively, at this time, a degradation processing identifier may be added to an instruction for starting code operation in the algorithm verification system, so that the data processing module in the specific algorithm can execute the specific degradation processing logic based on the identifier. During the period, if the condition of code link interruption is found, a notification message can be sent to a code development system and the like, so that a code developer can timely perform problem troubleshooting and code repair and other processing, and then the repaired code can be returned to an algorithm verification system to continue verification in the first stage. The verification process of the first verification stage may be repeatedly executed for multiple rounds, and as long as the running link is interrupted in a certain execution process, the next round is restarted until all the problems in the code are repaired. And then, entering a second verification stage, and running the repaired code logic in the state without degradation processing so as to verify the data processing effect of the algorithm.

The following describes in detail specific implementations provided in embodiments of the present application.

Example one

First, the embodiment provides an algorithm verification method from the perspective of the aforementioned algorithm verification system, and referring to fig. 2, the method may include:

s201: in a first verification stage, performing degradation processing on the calculated amount of a target algorithm on the basis of completely executing the code logic of the target algorithm so as to verify the code stability of the target algorithm; the code stability includes: whether there is a situation where the running link is interrupted due to a code defect or an exception.

The target algorithm may include the three-dimensional reconstruction algorithm (i.e., an algorithm for performing three-dimensional reconstruction based on the same subject included in the plurality of input images) described above, or other algorithms, especially some time-consuming algorithms, may be verified by using the scheme provided in the embodiment of the present application. Specifically, after the development of the relevant code of a target algorithm is completed, or after module updating is completed, and before the relevant code is specifically released to the online operation, a relevant verification link can be performed.

In the embodiment of the application, a specific verification process can be divided into two stages, wherein in the first verification stage, the stability of the code is mainly verified, and in the second verification stage, the data processing effect of the algorithm is verified. In the first verification stage, in order to save time, the calculated amount of the target algorithm can be degraded on the basis of the code logic of the completely executed target algorithm. That is to say, complete operation of all code logics can be realized with a small amount of computation, and in the process, defects or abnormalities and other conditions existing in the code can be quickly discovered.

In order to achieve the purpose of performing degradation processing on the calculated amount of the target algorithm on the basis of completely executing the code logic of the target algorithm, various implementation manners are available. For ease of understanding, the basic knowledge involved in the algorithm verification is briefly described below.

Firstly, when a target algorithm is verified, a plurality of input data and algorithm iteration times required for verifying the data processing effect of the target algorithm can be determined. For example, for a three-dimensional reconstruction algorithm, it may be determined how many images need to be input, e.g., N, the resolution that each image pixel needs to achieve, e.g., X × Y pixels, how many times the algorithm needs to be iterated, e.g., M, etc. That is, the data in each dimension at least needs to reach the order of magnitude, so that the three-dimensional reconstruction effect of the algorithm based on the input data can be tested. Thus, corresponding images can be prepared as a plurality of input data according to the above conditions.

Among them, the number of iterations is also referred to as an Epoch number. Wherein an Epoch is said to occur when a complete data set passes through the algorithmic model (e.g., neural network) once and returns once. In other words, epoch is that all input data are operated once in an algorithm model such as a neural network. In practical cases, in the constructed algorithm model of the neural network type and the like, the parameter of the Epoch times is often set to be greater than 1. The reason for this is that: in an algorithmic model of the neural network type or the like, since a limited data set is used and an iterative process, i.e. a gradient descent method, is used to optimize the learning process, it is not sufficient to transfer the complete data set once, but rather the complete data set needs to be transferred in the same neural network multiple times. And as the number of epochs is increased, the updating times of the weight matrix in the algorithm model are increased, and the curve is over-fitted from under-fitting. In addition, the values of the Epoch parameter settings may also be different for different data sets. That is, the diversity of the input data may also affect the selection of the appropriate number of epochs. In short, in a specific implementation, an appropriate number of epochs can be selected according to the actual input data. The specific selection method is not the focus of the embodiments of the present application, and is not described in detail here.

In order to implement degradation processing on the calculated amount of the code on the basis of ensuring the complete execution of the code logic of the algorithm, in a specific implementation mode, the method can be implemented by reducing the data amount of a plurality of input data and/or the iteration times of the algorithm after acquiring a plurality of specific input data and determining the required iteration times of the algorithm. That is, under the condition of ensuring that the code logic of the target algorithm is not changed, the calculation amount of the algorithm can be reduced by reducing the data amount of the input data or reducing the iteration times of the algorithm, so that the running time of the algorithm is shortened, but the complete execution of all the code logic can be ensured. In other words, due to the fact that the degradation processing is carried out on the multiple input data and/or the iteration number of the algorithm, the calculation amount of the code can be reduced, the complete running of the code is not affected, and if Bug or exception exists in the code, the running process can still be interrupted, namely the detection of the Bug or the exception of the code can be achieved, and therefore the verification of the stability of the code can be completed in a shorter time.

Specifically, when the degradation processing is performed on multiple sets of input data and/or the number of iterations of the algorithm, the degradation processing mode of the input data may be various, and may be specifically determined according to the characteristics of the input data of the specific algorithm, and the like. For example, for a three-dimensional reconstruction algorithm, the specific input data is usually a plurality of images, and in particular, the images may be from a video, and the video may be generated by shooting a certain object for 360 degrees, so as to obtain the visual characteristics of the specific object at 360 degrees. For such an algorithm, when performing the degradation processing on the input data, the resolution of the input image may be specifically reduced, and/or the number of input images may be reduced. For example, the multiple sets of input data may be high definition data with relatively high resolution, which is advantageous for obtaining a good three-dimensional reconstruction effect, but when testing the stability of the code, such high resolution is not required, and therefore, the resolution of such input data may be reduced to reduce the amount of calculation of the code. In addition, the number of input images can be reduced by sampling a plurality of images in a plurality of input data sets. For example, in multiple input data, each image frame in a certain video may be used as one input data, so that the number of images is large, and similarly, such data can obtain a better three-dimensional reconstruction effect, but is unnecessary for testing the stability of the code. Therefore, the number of input images can be reduced by averaging out the decimated samples, or the like. For example, sampling every n frames in a plurality of videos to make the number of degraded images 1/n of the original number, thereby reducing the calculation amount of algorithm codes, and the like.

With respect to the degradation process of the number of iterations, as described above, the number of epochs is usually greater than 1 in order to achieve the desired data processing effect of the target algorithm, but thus the code executed each time an Epoch is the same, and therefore, in order to verify the code stability, the number of epochs can be reduced as long as the complete code can be run through.

In specific implementation, a plurality of modules may be generally included in the same algorithm model, and each module may be in a cascade or parallel relationship. In the embodiment of the present application, the degradation processing may be performed on the algorithm calculation amount of the plurality of data processing modules.

For example, in one mode, a pre-degradation processing module shared by multiple modules is added before the multiple data processing modules, so that the calculated amount of the algorithm is degraded. For example, as shown in fig. 3, assume that an algorithm includes a module a, a module B, and a module C, and the three are in a cascade relationship. Under a conventional link, multiple copies of input data firstly enter the module A, output data processed by the module A is used as input of the module B, the module B continues to process the input data, output data processed by the module B is used as input of the module C, and the module C continues to process the output data to obtain a final data processing result. However, in the embodiment of the present application, in the first verification stage, a degradation processing module may be inserted before the above module, and the degradation processing module performs degradation processing on multiple pieces of input data and/or iteration times, and then performs calculation processing by each specific module.

In addition, the degradation processing only needs to be executed once, and the implementation mode is simple. However, since the destaging process is performed before all modules, the consistency requirements of a plurality of modules need to be considered during the destaging process, so that the processing which can be performed may be limited. For example, some modules may be able to accept a relatively low input data sampling rate, some modules may not be able to accept input data, and in this case, the amount of input data may need to be downgraded in the future, and so on.

To this end, for some algorithms, dedicated degradation processing logic within a module may also be configured within a particular data processing module. That is, as shown in fig. 4, it is also assumed that a module a, a module B, and a module C are included in a certain algorithm, and at this time, the modules a, B, and C may respectively add degradation processing logic to normal logic code inside the modules. In an alternative implementation manner, the degradation processing logic implemented inside each module may be different, and a code developer of each module may perform personalized degradation processing logic according to the data processing logic inside each module. For example, in the degradation processing logic of module a and module B, the degree of degradation to the resolution or number of images of the input image may be different, and so on. By the method, more sufficient degradation processing logic can be performed in the specific module without considering the influence of other modules, so that the degradation processing degree is promoted on the whole, the calculation amount of the code is further reduced, and the running time of the code is shortened.

In the above manner, when the specific algorithm verification system starts the code logic for running the target algorithm, a degradation processing identifier may be added to the start instruction, so that after the specific data processing module receives the start instruction, if the specific data processing module finds that the start instruction includes the degradation processing identifier, the degradation processing on the input data and/or the iteration number of the algorithm, and the like, may be completed by executing the degradation processing logic configured inside the data processing module, and then executing the specific code logic.

In summary, since the amount of data and/or the number of iterations of input data is reduced, thereby realizing degradation processing of the amount of calculation of the algorithm, the running time can be shortened. Of course, the code integrity of the target algorithm is not affected due to the degradation of the input data and/or the number of iterations, that is, in the first verification stage, the complete operation of all code logic of the target algorithm can be completed in a short time through a low calculation amount. In the process of executing the code logic of the target algorithm after the degradation processing, if a Bug or an exception exists in the code logic, the running process is also interrupted, and at this time, the code development system can be notified to repair the code problem. However, the running time of the code is shortened, so that the stability problems of Bug, abnormity and the like existing in the code can be discovered more timely. For example, it is assumed that conventionally, if the degradation processing is not performed, the code needs two days for completely running once, but after the degradation processing is performed in the manner provided in the embodiment of the present application, the code may only need four or five hours for completely running once, so that if the code has stability problems such as Bug and anomaly, the code may be discovered within four or five hours, and does not need to wait for more than one day before being discovered.

When the interruption occurs in the running process of the code, the notification message can be timely pushed to the code development system, so that the code developer can timely repair the code. The repaired code can be provided to the verification system again for verification, at this time, the verification in the first verification stage can be continued, if the code can be completely run, it is proved that Bug or exception does not exist in the code, otherwise, if the code is interrupted again, the code development system can be informed again to repair, until the repaired code can be run without interruption, and the code stability verification is passed.

S202: and after the code stability verification is passed, entering a second verification stage, and executing the code logic which is verified in the first verification stage in the second verification stage so as to verify the data processing effect of the target algorithm.

After the code stability verification is passed, the method can enter a second verification stage, in the second verification stage, the calculated amount of the algorithm can not be degraded, and on the premise of ensuring that the data processing effect of the algorithm can be verified, the code logic which is verified in the first verification stage is executed. Because the stability of the code logic is verified in the first verification stage, when the code logic is executed again, the running of all codes can be completed without interruption until a specific data processing result is obtained, and further, the data processing effect of the target algorithm can be verified by judging of a downstream module or manually comparing and the like. For example, for a three-dimensional reconstruction algorithm, the input data may be a video or a picture, and the like, and the data processing result output by the three-dimensional reconstruction algorithm may be point cloud coordinates (i.e., a set of a plurality of points in a three-dimensional space and three-dimensional coordinates of each point in the three-dimensional space) of a subject in the video or the picture in the three-dimensional space. When the data processing effect is specifically verified, a visual three-dimensional model may be drawn and rendered based on the point cloud coordinates, and then the data processing effect of the three-dimensional reconstruction model may be determined by comparing the three-dimensional model with a body shape in input data, and the like.

In a word, through the embodiment of the application, the algorithm verification process can be divided into two stages, the first verification stage is mainly used for verifying the stability of the code, and after the code stability verification is passed, the data processing effect of the algorithm is verified. In the first verification stage, the calculated amount of the algorithm can be degraded, so that the running time of the code is shortened, the stability problem in the code can be found more quickly, and the code can be repaired in time. And then, in the second verification stage, the code logic which passes the verification in the first verification stage can be executed under the condition of no degradation, so that the code can be operated and completed without interruption, and the data processing effect is verified after a data processing result is obtained. By the method, the time required by algorithm verification can be shortened on the whole, and for some time-consuming algorithms, the efficiency of algorithm verification can be effectively improved.

Example two

The second embodiment mainly provides a three-dimensional reconstruction algorithm verification method for the application of the method in the first embodiment in a specific three-dimensional reconstruction algorithm, and referring to fig. 5, the method may include:

s501: determining a three-dimensional reconstruction algorithm to be verified, a plurality of input images required by verifying the data processing effect and the iteration times of the algorithm; the three-dimensional reconstruction algorithm is used for performing three-dimensional reconstruction based on the same main body contained in the multiple input images and outputting point cloud coordinates in a three-dimensional space;

s502: in a first verification stage, after degradation processing is carried out on the multiple input images and/or the iteration times of the algorithm, executing code logic of the three-dimensional reconstruction algorithm so as to verify the code stability of the three-dimensional reconstruction algorithm; the code stability includes: whether a condition that an operating link is interrupted due to a code defect or an exception exists;

wherein the resolution of the input images is reduced and/or the number of input images is reduced.

S503: and after the code stability verification is passed, entering a second verification stage, and in the second verification stage, executing the code logic after the verification is passed in the first verification stage by using the plurality of input images and the algorithm iteration times so as to verify the data processing effect of the three-dimensional reconstruction algorithm after a visualized three-dimensional model is rendered based on the point cloud coordinates output by the three-dimensional reconstruction algorithm.

For the parts of the second embodiment that are not described in detail, reference may be made to the descriptions of the first embodiment and other parts of the present specification, which are not described herein again.

It should be noted that, in the embodiments of the present application, the user data may be used, and in practical applications, the user-specific personal data may be used in the scheme described herein within the scope permitted by the applicable law, under the condition of meeting the requirements of the applicable law and regulations in the country (for example, the user explicitly agrees, the user is informed, etc.).

Corresponding to the first embodiment, an algorithm verifying apparatus is further provided in the embodiments of the present application, and referring to fig. 6, the apparatus may include:

a first verification unit 601, configured to perform degradation processing on a calculation amount of a target algorithm on the basis of completely executing a code logic of the target algorithm in a first verification stage, so as to verify code stability of the target algorithm; the code stability includes: whether a condition that the running link is interrupted due to a code defect or an exception exists;

a second verifying unit 602, configured to enter a second verifying stage after the code stability verification passes, and in the second verifying stage, execute the code logic after the verification passes in the first verifying stage, so as to verify the data processing effect of the target algorithm.

In a specific implementation, the apparatus may further include:

the data determining unit is used for determining multiple input data and algorithm iteration times required by data processing effect verification of a target algorithm;

at this time, the first verification unit may specifically be configured to: degrading the calculated amount of the target algorithm by reducing the data amount of the multiple input data and/or the iteration times of the algorithm;

the second verification unit may specifically be configured to: and in the second verification stage, executing the code logic which passes the verification in the first verification stage by using the multiple pieces of input data and the iteration times of the algorithm so as to verify the data processing effect of the target algorithm.

reducing the resolution of the input images, and/or reducing the number of input images

Wherein the target algorithm comprises a plurality of data processing modules;

the first verification unit may specifically be configured to:

Specifically, the first verification unit may be configured to:

Or, a dedicated degradation processing logic in the module is configured inside the plurality of data processing modules;

at this time, the first authentication unit may be configured to:

The dedicated degradation processing logic in the module configured inside the data processing module may be configured individually according to the data processing logic in the data processing module.

Wherein the first authentication unit is further operable to:

Wherein the degradation processing of the input image comprises:

In addition, the present application also provides a computer readable storage medium, on which a computer program is stored, which when executed by a processor implements the steps of the method described in any of the preceding method embodiments.

And an electronic device comprising:

one or more processors; and

a memory associated with the one or more processors for storing program instructions that, when read and executed by the one or more processors, perform the steps of the method of any of the preceding method embodiments.

Fig. 7 illustrates an architecture of an electronic device, which may include, in particular, a processor 710, a video display adapter 711, a disk drive 712, an input/output interface 713, a network interface 714, and a memory 720. The processor 710, the video display adapter 711, the disk drive 712, the input/output interface 713, the network interface 714, and the memory 720 may be communicatively coupled via a communication bus 730.

The processor 710 may be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits, and is configured to execute related programs to implement the technical solution provided in the present Application.

The Memory 720 may be implemented in the form of a ROM (Read Only Memory), a RAM (Random Access Memory), a static storage device, a dynamic storage device, or the like. The memory 720 may store an operating system 721 for controlling operation of the electronic device 700, and a Basic Input Output System (BIOS) for controlling low-level operation of the electronic device 700. In addition, a web browser 723, a data storage management system 724, an algorithm validation processing system 725, and the like may also be stored. The algorithm verification processing system 725 may be an application program that implements the operations of the foregoing steps in this embodiment. In summary, when the technical solution provided by the present application is implemented by software or firmware, the relevant program codes are stored in the memory 720 and called for execution by the processor 710.

The input/output interface 713 is used for connecting an input/output module to realize information input and output. The i/o module may be configured as a component in a device (not shown) or may be external to the device to provide a corresponding function. The input devices may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output devices may include a display, a speaker, a vibrator, an indicator light, etc.

The network interface 714 is used for connecting a communication module (not shown in the figure) to realize communication interaction between the device and other devices. The communication module can realize communication in a wired mode (such as USB, network cable and the like) and also can realize communication in a wireless mode (such as mobile network, WIFI, bluetooth and the like).

Bus 730 includes a path that transfers information between the various components of the device, such as processor 710, video display adapter 711, disk drive 712, input/output interface 713, network interface 714, and memory 720.

It should be noted that although the above-mentioned devices only show the processor 710, the video display adapter 711, the disk drive 712, the input/output interface 713, the network interface 714, the memory 720, the bus 730, etc., in a specific implementation, the devices may also include other components necessary for normal operation. In addition, it will be understood by those skilled in the art that the above-described apparatus may also include only the components necessary to implement the embodiments of the present application, and need not include all of the components shown in the figures.

From the above description of the embodiments, it is clear to those skilled in the art that the present application can be implemented by software plus necessary general hardware platform. Based on such understanding, the technical solutions of the present application may be essentially or partially implemented in the form of a software product, which may be stored in a storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments or some parts of the embodiments of the present application.

The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the system or system embodiments, which are substantially similar to the method embodiments, are described in a relatively simple manner, and reference may be made to some descriptions of the method embodiments for relevant points. The above-described system and system embodiments are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.

The algorithm verification method and the electronic device provided by the present application are introduced in detail, and specific examples are applied in the text to explain the principles and embodiments of the present application, and the descriptions of the above embodiments are only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, the specific embodiments and the application range may be changed. In view of the above, the description should not be taken as limiting the application.

Claims

1. An algorithm verification method, comprising:

in a first verification stage, performing degradation processing on the calculated amount of a target algorithm on the basis of completely executing the code logic of the target algorithm so as to verify the code stability of the target algorithm; the code stability includes: whether a condition that the running link is interrupted due to a code defect or an exception exists;

2. The method of claim 1, further comprising:

determining a plurality of input data and algorithm iteration times required for verifying the data processing effect of a target algorithm;

and in the second verification stage, executing the code logic after the verification in the first verification stage is passed by using the multiple input data and the iteration times of the algorithm so as to verify the data processing effect of the target algorithm.

3. The method of claim 2,

the target algorithm includes an algorithm for three-dimensional reconstruction based on the same subject contained in a plurality of input images;

4. The method of claim 1,

the target algorithm comprises a plurality of data processing modules;

and performing degradation processing on the calculated amount of the plurality of data processing modules on the basis of the code logic of the complete execution target algorithm.

5. The method of claim 4,

6. The method of claim 4,

the plurality of data processing modules are internally provided with special degradation processing logic in the modules;

7. The method of claim 6,

8. The method of any one of claims 1 to 7, further comprising:

9. A three-dimensional reconstruction algorithm verification method is characterized by comprising the following steps:

and after the code stability verification is passed, entering a second verification stage, and in the second verification stage, executing a code logic verified in the first verification stage by using the plurality of input images and the algorithm iteration times so as to verify the data processing effect of the three-dimensional reconstruction algorithm after a visualized three-dimensional model is rendered based on the point cloud coordinates output by the three-dimensional reconstruction algorithm.

10. The method of claim 9,

the degradation processing of the input image includes:

11. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 10.

12. An electronic device, comprising:

one or more processors; and

a memory associated with the one or more processors for storing program instructions that, when read and executed by the one or more processors, perform the steps of the method of any of claims 1 to 10.