CN115679396A - Electroplating process of single crystal copper and application thereof - Google Patents

Electroplating process of single crystal copper and application thereof Download PDF

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Publication number
CN115679396A
CN115679396A CN202110858342.7A CN202110858342A CN115679396A CN 115679396 A CN115679396 A CN 115679396A CN 202110858342 A CN202110858342 A CN 202110858342A CN 115679396 A CN115679396 A CN 115679396A
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China
Prior art keywords
copper
pulse current
electroplating process
substrate
grain
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CN202110858342.7A
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Chinese (zh)
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黄保钦
黄钏杰
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Liding Semiconductor Technology Qinhuangdao Co ltd
Liding Semiconductor Technology Shenzhen Co ltd
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Liding Semiconductor Technology Shenzhen Co ltd
Qi Ding Technology Qinhuangdao Co Ltd
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Priority to CN202110858342.7A priority Critical patent/CN115679396A/en
Publication of CN115679396A publication Critical patent/CN115679396A/en
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Abstract

The invention discloses a single crystal copper electroplating process, which comprises the following steps: providing a substrate and placing the substrate in a copper-containing electrolyte, wherein an additive is added into the copper-containing electrolyte, the additive comprises a grain regulator, and the grain regulator is used for inhibiting grain refinement; the method comprises the following steps of applying pulse current with a pulse period T to a substrate by taking the substrate as a cathode to prepare and obtain the single crystal copper, wherein the pulse current comprises positive pulse current and negative pulse current, each pulse period T comprises positive pulse time T1 for continuously applying the positive pulse current and negative pulse time T2 for continuously applying the negative pulse current, and the ratio range of the T1 to the T2 is 20-200: 1 to 10. The invention also discloses a manufacturing method of the printed circuit board applying the electroplating process. The invention prepares and forms single crystal copper with few crystal boundaries and large lattice size by regulating the proportion of positive pulse period and negative pulse period and adding a crystal grain regulator.

Description

Electroplating process of single crystal copper and application thereof
Technical Field
The invention relates to the technical field of electroplating, in particular to an electroplating process of single crystal copper.
Background
The preparation of copper grains is generally carried out in the following manner: the method comprises the following steps of (1) baking a copper plate for 72 hours at high temperature by nitrogen to form a large amount of single crystals, (2) sputtering copper (Sputter) and (3) cold rolling. The above-mentioned preparation process is complicated, and the recent electroplating process for forming copper grains is concerned because of its high preparation efficiency. Referring to fig. 1 and 2, it can be seen from SEM (scanning electron microscope) and EBSD (back scattered electron diffraction) images of the conventional electroplated copper crystal grains that the crystal lattices and grain boundaries of the currently prepared electroplated copper crystal grains are very large compared to single crystal grain boundaries, and the subsequent signal transmission and electrical properties are greatly affected. In addition, the electroplated copper grains are typically extremely small, about 0.37 (+ -0.12) μm, and with 5h annealing the grains grow to 0.54 (+ -0.15) μm, and 22h the grains grow to a stable size of 1.41 (+ -0.44) μm, which is still to be increased.
Disclosure of Invention
In view of the above, it is desirable to provide a single crystal copper electroplating process that can solve the above problems.
The first aspect of the present application provides a single crystal copper electroplating process, comprising the steps of:
providing a substrate and placing the substrate in a copper-containing electrolyte, wherein additives are added into the copper-containing electrolyte, the additives comprise a grain regulator, a carrying agent, a leveling agent and a brightening agent, and the grain regulator is used for inhibiting grain refinement;
taking the substrate as a cathode, connecting an anode, and applying a pulse current with a pulse period T to the substrate to prepare the single crystal copper, wherein the pulse current comprises a positive pulse current and a negative pulse current, each pulse period T comprises a positive pulse time T1 for continuously applying the positive pulse current and a negative pulse time T2 for continuously applying the negative pulse current, and the ratio of the positive pulse time T1 to the negative pulse time T2 is in a range of 20-200: 1 to 10.
According to some embodiments of the present application, the grain modifier comprises a mixture of elements of Fe, zr, cr, V, al
According to some embodiments of the present application, the forward pulse current has a current density of 1 to 30ASD.
According to some embodiments of the invention the negative-going pulsed current has a current density of 2 to 50ASD.
According to some embodiments of the present application, the single crystal copper has a lattice size greater than 15 μm.
According to some embodiments of the present application, the carrier is selected from at least one of polyethylene glycol, polypropylene glycol, stearyl alcohol polyethylene glycol ether, capryl alcohol polyalkylene glycol ether.
According to some embodiments of the present application, the leveling agent is at least one of a nitrogen-containing heterocyclic compound, a tertiary amine-containing organic heterocyclic compound.
According to some embodiments of the present application, the brightener is at least one of 2-mercaptobenzimidazole, ethylenethiourea.
According to some embodiments of the present application, the material of the anode is selected from any one of a titanium plate, a titanium mesh.
A second aspect of the present application provides a method for manufacturing a printed circuit board, including the steps of:
forming a copper plating layer on the circuit substrate by adopting the electroplating process;
and etching the copper plating layer to form a circuit.
According to the electroplating process of the single crystal copper, the pulse current with the positive pulse current and the negative pulse current is applied to the substrate, the proportion of the positive pulse time T1 to the negative pulse time T2 is regulated and controlled in the electroplating process, so that the stress in the formed coating is released, the effect of crystal grain growth is achieved while electroplating is achieved, the size of the formed single crystal copper crystal grains is large, hydrogen brittleness is reduced, and the physical characteristics of the coating are enhanced. In addition, a grain regulator is added in the electroplating process, so that grain refinement is inhibited, and the effect of controlling the grain size of the coating is achieved. According to the method, the proportion of the positive pulse period to the negative pulse period is regulated, and the crystal grain regulator is added in a combined manner, so that the single crystal copper with few crystal boundaries and large lattice size is prepared, the signal distortion and attenuation caused by reflection and refraction of signals can be reduced by using the single crystal copper, and the method has extremely high signal transmission performance. When a circuit is formed on the copper plating layer formed by the electroplating process, the crystal grain boundary of the copper plating layer is attacked by etching liquid, the crystal grain boundary of the copper plating layer is extremely few due to the fact that the copper plating layer is made of single crystal copper, the etching uniformity is better when the crystal grain boundary is less, and therefore the surface roughness of the etched copper plating layer is improved.
Drawings
FIG. 1 is an SEM image of electroplated copper grains prepared by a conventional electroplating process;
FIG. 2 is an EBSD picture of electroplated copper grains prepared by the prior electroplating process;
FIG. 3 is a schematic diagram of electroplating for preparing single crystal copper according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a pulse method used in an electroplating process according to an embodiment of the present application;
FIG. 5 (a) is an SEM image of a copper layer formed by electroplating according to an embodiment of the present application;
FIG. 5 (a') is an EBSD picture of a copper layer plated according to an embodiment of the present application;
FIG. 6 is a graph illustrating the grain boundary distribution of a copper layer formed by an electroplating process after a lattice modifier is added according to an embodiment of the present invention;
FIG. 7 is a graph showing the distribution of grain boundaries of a copper layer formed by electroplating without adding a lattice modifier to a comparative example of the present invention.
Description of the main elements
Substrate 100
Copper-containing electrolyte 200
Anode 300
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Referring to fig. 3, the present application provides a process for electroplating single crystal copper, comprising the steps of:
providing a substrate 100 in a copper-containing electrolyte 200;
taking the substrate 100 as a cathode, connecting the substrate 100 to an anode 300, and applying a pulse current with a pulse period T to the substrate 100 to prepare the single crystal copper, wherein the pulse current comprises a positive pulse current and a negative pulse current, each pulse period T comprises a positive pulse time T1 for continuously applying the positive pulse current and a negative pulse time T2 for continuously applying the negative pulse current, and the ratio of the positive pulse time T1 to the negative pulse time T2 is in the range of 20-200: 1 to 10.
In some embodiments, the substrate 100 is at least one of a silicon substrate, a quartz substrate, a metal substrate, a glass substrate, a plastic substrate, a printed circuit substrate, a group iii-v material substrate.
For a non-conductive substrate 100, in order to plate copper on the surface of the non-conductive substrate, a conductive seed layer is first formed on the non-conductive surface to perform an initial copper plating. Typically, the conductive seed layer is conductive, provides adhesion and allows exposed portions of its upper surface to be electroplated, such as by electroless deposition of copper.
The anode 300 is an anode material conventionally used for electroplating, and includes but is not limited to a titanium plate and a titanium mesh, and can be selected according to actual requirements.
As used herein, a copper-containing electrolyte 200 is an electrolyte that contains copper ions from sources including, but not limited to, copper sulfate, copper methanesulfonate, and the like, that are capable of ionizing the copper ions.
In some embodiments, the copper containing electrolyte 200 can have additives added to improve the effectiveness of the electroplated copper. Types of additives include, but are not limited to, carriers, levelers, grain modifiers, brighteners. Wherein, the grain regulator is used for inhibiting grain refinement, thereby controlling the grain size of the copper plating. The grain regulator used in the present application is a mixture containing elements of Fe, zr, cr, V, and Al.
As the carrier in the additive, polyethylene glycol, polypropylene glycol, stearyl alcohol polyethylene glycol ether, octyl alcohol polyethylene glycol ether are exemplified. Examples of the leveling agent include nitrogen-containing heterocyclic compounds and tertiary amine-containing organic heterocyclic compounds, and specifically, the leveling agent may be selected from ethylenethiourea, 2-mercaptobenzimidazole, polyethyleneimine, alkoxylated polyethyleneimine, polyvinyl pyrrole, diethylenetriamine and hexamethylenetetramine. As the brightener, 2-mercaptobenzimidazole and ethylenethiourea may be exemplified.
In some embodiments, the amount of grain regulator is 25 to 300ml/L.
In some embodiments, the current density of the forward pulse current is 1 to 30ASD, preferably 1 to 4ASD.
The current density of the negative pulse current is larger than that of the positive pulse current. In some embodiments, the negative-going pulse current has a current density of 2 to 50ASD, preferably 20 to 30ASD.
In some embodiments, the ratio of the positive-going pulse time T1 to the negative-going pulse time T2 is 20 to 200:1 to 10, such as can be set to 20ms:1ms,100ms:5ms,200ms:10ms, etc. By adjusting the period ratio of the positive pulse and the negative pulse, the stress in the coating can be released, so that the effect of grain growth in the electroplating process is achieved, the grain size of the single crystal copper is improved, the hydrogen embrittlement is reduced, and the physical properties of the coating are enhanced.
The embodiment of the present application further provides a method for manufacturing a printed circuit board, which includes the following steps: and forming a copper plating layer on the surface of the circuit substrate by adopting the electroplating process, and etching the copper plating layer to form a circuit.
The following will be described with reference to specific preparation examples, in which the substrate used is a metal substrate and the anode is a titanium plate.
Example 1 provides an electroplating process, a metal substrate is placed in a copper-containing electrolyte, the substrate is used as a cathode, a titanium plate is connected as an anode, and electroplating is performed by applying pulses as shown in fig. 4, wherein the applied pulse current includes a positive pulse current and a negative pulse current, the current density of the positive pulse current is 4ASD, the current density of the negative pulse current is 20ASD, a positive pulse time T1 of continuously applying the positive pulse current is 200ms, a negative pulse time T2 of continuously applying the negative pulse current is 10ms, and a ratio of T1 to T2 is 20. The used copper-containing electrolyte comprises 85 to 90 percent of copper sulfate, 3 to 6 percent of crystal lattice regulator and 5 to 10 percent of carrier, leveling agent and brightener, wherein the crystal lattice regulator is a mixture of elements of Fe, zr, cr, V and Al.
Comparative example 1 used the same electroplating process as in example 1, except that no grain modifier was added to the copper-containing electrolyte.
Fig. 5 (a) shows an SEM (scanning electron microscope) image of the copper plating layer obtained by the electroplating in example 1, and fig. 5 (a') shows an EBSD (back scattered electron diffraction) image of the copper plating layer obtained by the electroplating in example 1. It can be seen from fig. 5 (a) that the crystal lattice and grain boundary in the SEM image are less than those of the prior art electroplated copper crystal grain. In fig. 5 (a'), the uppermost layer is purple in the region a, green in the region B, and the region B is divided into left and right sides by lines C, and it can be seen that the close or uniform lattice colors represent the uniform grain orientation, and although the green (lower layer) and the purple (uppermost layer) have different colors, there is no grain boundary, and thus the grain orientation is close, and only slight deviation in grain angle or interference during slice polishing can be represented. The small lines in FIG. 5 (a') are small angle grain boundaries, and there is only one distinct yellow line (line at C) in the entire coating, but here it can be seen that the yellow line boundary is left and right of the same color level (same grain orientation), so it can be determined that the boundary is caused by scratches during slicing and is not an actual grain boundary. According to fig. 5 (a) and 5 (a'), it can be seen that the single crystal copper is prepared by the electroplating process provided by the present application, and by adjusting the ratio of T1 to T2 to 20, the stress in the copper plating layer can be released (the internal stress of the copper plating layer is reduced), and the purpose of performing electroplating and grain growth is achieved, the grain size of the single crystal copper prepared by the embodiment of the present application is greater than 15 μm and much higher than the grain size prepared in the prior art, and hydrogen embrittlement can be reduced, so that the effect of enhancing the physical properties of the copper plating layer is achieved. In addition, the single crystal limit of the single crystal copper prepared by the method is extremely small, signal distortion and attenuation caused by reflection and refraction generated by signals can be reduced, and the method has extremely high signal transmission performance. When the single crystal copper is subsequently used for etching, the micro-etching liquid mainly attacks grain boundaries, the smaller the grain boundaries are, the better the micro-etching uniformity is, and because the grain boundaries of the single crystal copper prepared by the method are extremely few, the uniformity of the micro-etching surface roughness can be increased when the single crystal copper prepared by the method is used for etching.
FIG. 6 is a graph showing a distribution of grain boundaries of the copper plating layer obtained after the grain control agent was added in example 1, and FIG. 7 is a graph showing a distribution of grain boundaries of the copper plating layer obtained without the grain control agent in comparative example 1. As is apparent from comparison between fig. 6 and fig. 7, in comparative example 1, the crystal lattice of the copper plating layer formed without adding the crystal grain modifier is disordered and fine, and a single crystal cannot be obtained, whereas the single crystal copper can be obtained by adding the crystal grain modifier.
Although the present invention has been described with reference to the above preferred embodiments, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (10)

1. The electroplating process of the single crystal copper is characterized by comprising the following steps of:
providing a substrate and placing the substrate in a copper-containing electrolyte, wherein additives are added into the copper-containing electrolyte, the additives comprise a grain regulator, a carrying agent, a leveling agent and a brightening agent, and the grain regulator is used for inhibiting grain refinement;
taking the substrate as a cathode, connecting an anode, and applying a pulse current with a pulse period T to the substrate to prepare and obtain the single crystal copper, wherein the pulse current comprises a positive pulse current and a negative pulse current, each pulse period T comprises a positive pulse time T1 for continuously applying the positive pulse current and a negative pulse time T2 for continuously applying the negative pulse current, and the ratio of the positive pulse time T1 to the negative pulse time T2 is 20-200: 1 to 10.
2. The electroplating process of claim 1, wherein the grain modifier comprises a mixture of elements of Fe, zr, cr, V, al.
3. The electroplating process of claim 1, wherein the forward pulse current has a current density of 1-30 ASD.
4. The electroplating process of claim 1, wherein the negative-going pulse current has a current density of 2-50 ASD.
5. Electroplating process according to any of claims 1 to 4, characterized in that the lattice size of the single-crystal copper is larger than 15 μm.
6. The electroplating process of claim 1, wherein the carrier is selected from at least one of polyethylene glycol, polypropylene glycol, stearyl alcohol polyethylene glycol ether, and capryl alcohol polyethylene glycol ether.
7. The electroplating process of claim 1, wherein the leveler is at least one of a nitrogen-containing heterocyclic compound and a tertiary amine-containing organic heterocyclic compound.
8. The plating process according to claim 1, wherein the brightener is at least one of 2-mercaptobenzimidazole and ethylenethiourea.
9. The electroplating process according to any one of claims 1 to 4, wherein the material of the anode is selected from any one of a titanium plate and a titanium mesh.
10. A method for manufacturing a printed circuit board is characterized by comprising the following steps:
forming a copper plating layer on a circuit substrate by using the plating process according to any one of claims 1 to 9;
and etching to form a circuit on the copper plating layer.
CN202110858342.7A 2021-07-28 2021-07-28 Electroplating process of single crystal copper and application thereof Pending CN115679396A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110858342.7A CN115679396A (en) 2021-07-28 2021-07-28 Electroplating process of single crystal copper and application thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110858342.7A CN115679396A (en) 2021-07-28 2021-07-28 Electroplating process of single crystal copper and application thereof

Publications (1)

Publication Number Publication Date
CN115679396A true CN115679396A (en) 2023-02-03

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Effective date of registration: 20240204

Address after: 066004 No. 18-2, Tengfei Road, Qinhuangdao Economic and Technological Development Zone, Hebei Province

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Applicant before: Liding semiconductor technology (Shenzhen) Co.,Ltd.