CN115663909B - Adaptive stable control method and system for phase-locked loop type inverter - Google Patents

Adaptive stable control method and system for phase-locked loop type inverter Download PDF

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CN115663909B
CN115663909B CN202211705110.9A CN202211705110A CN115663909B CN 115663909 B CN115663909 B CN 115663909B CN 202211705110 A CN202211705110 A CN 202211705110A CN 115663909 B CN115663909 B CN 115663909B
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phase
locked loop
inverter
impedance
power grid
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CN115663909A (en
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陈波
熊华强
潘本仁
汪硕承
刘柳
周煦光
戈田平
周毅
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State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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Abstract

The invention discloses a self-adaptive stable control method and a system of a phase-locked loop type inverter, comprising the following steps: generating a three-valued periodic signal related to time t; superposing the three-valued periodic signal on a first d-axis current reference signal of a phase-locked loop type inverter current loop to obtain a second d-axis current reference signal; performing three-phase/two-phase conversion and Park conversion on the obtained three-phase voltage and three-phase current to obtain d-axis current and d-axis voltage under a dq coordinate system; calculating the resistance value and the equivalent inductance value of the power grid equivalent impedance according to the current average value and the voltage average value; and establishing an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and feeding the real-time power grid equivalent inductance value back to the adaptive control rate so as to perform adaptive control on the phase-locked loop inverter. The method solves the problem that the equivalent impedance of the power grid cannot be calculated on the premise that harmonic waves are not injected into the power grid.

Description

Adaptive stable control method and system for phase-locked loop type inverter
Technical Field
The invention belongs to the technical field of stable control of a new energy grid-connected system of a phase-locked loop type converter, and particularly relates to a self-adaptive stable control method and a self-adaptive stable control system of a phase-locked loop type inverter.
Background
The phase-locked loop is one of the most important control loops in the new energy grid-connected inverter and is used for realizing the synchronization of the frequency and the phase of an inversion unit of wind and light power generation and a power grid. However, since wind and light resources in China are mostly distributed in areas far away from a load center, the output end of new energy needs to be integrated into a large power grid through a longer transmission line, and the equivalent impedance of the power grid is larger, so that a scene that a large number of phase-locked loop type inverters are integrated into a weak power grid is formed. In recent years, a great deal of literature reports that the interaction of a phase-locked loop type inverter and a weak current network causes system oscillation and instability, so that a new energy unit is off-line, and the operation safety of a power grid is seriously threatened.
Currently, research results have shown that: the mechanism of the interaction instability of the phase-locked loop type inverter and the weak current network is that the phase-locked loop brings a negative resistance effect of a medium-low frequency band to the grid-connected inverter, and the larger the bandwidth of the phase-locked loop is, the larger the frequency range of negative resistance distribution is, and the instability phenomenon is easily generated due to the fact that the impedance of the phase-locked loop type inverter and the weak current network are not matched when the phase-locked loop type inverter and the weak current network are in coupling interaction. At present, methods for suppressing the oscillation mainly comprise two types, one is to install an active damping device on the power grid side or improve a grid structure, so that the strength of the power grid is enhanced, but the cost is higher; secondly, the parameters and the control structure of the phase-locked loop type inverter are optimized, and the phase-locked loop type inverter is low in cost and easy to implement. For the second class of inhibition methods, mainly comprising: 1) Reducing the bandwidth of the phase-locked loop; 2) Adding an active damping control loop; 3) A nonlinear control method is adopted. Wherein, directly reducing the bandwidth of the phase-locked loop or adding an active damping control loop can lead to slow dynamic response of the system under normal working conditions, while nonlinear control is very sensitive to parameter setting and is difficult to be applied to engineering practice. Therefore, in order to balance the dynamic performance and stability of the system, expert students have also proposed adaptive control methods based on grid impedance measurements. However, the currently existing methods suffer from two drawbacks: 1) When the impedance of the power grid is estimated, harmonic disturbance needs to be injected into the power grid, and the power grid impedance is measured by extracting harmonic response, so that the method can influence the power quality of the power system; 2) Due to the strong coupling characteristic of the phase-locked loop and the power grid impedance, the power grid impedance and the bandwidth of the phase-locked loop are in a nonlinear mapping relation, and the self-adaptive control rate suitable for real-time control is difficult to give.
Disclosure of Invention
The invention provides a self-adaptive stable control method and a self-adaptive stable control system for a phase-locked loop type inverter, which are used for solving the technical problem that the equivalent impedance of a power grid cannot be calculated on the premise that harmonic waves are not injected into the power grid.
In a first aspect, the present invention provides a method for adaptive stability control of a phase locked loop inverter, including: generating a three-valued periodic signal with period T, which is related to time T
Figure 879986DEST_PATH_IMAGE001
Wherein each period is T and is provided with 4 subintervals
Figure 330559DEST_PATH_IMAGE002
、
Figure 493687DEST_PATH_IMAGE003
、
Figure 738723DEST_PATH_IMAGE004
、
Figure 252881DEST_PATH_IMAGE005
In the following
Figure 975987DEST_PATH_IMAGE002
And
Figure 993621DEST_PATH_IMAGE005
in the time of the interval,
Figure 347242DEST_PATH_IMAGE001
=0, in
Figure 207751DEST_PATH_IMAGE003
In the time of the interval,
Figure 609913DEST_PATH_IMAGE001
=
Figure 606688DEST_PATH_IMAGE006
in the following
Figure 334473DEST_PATH_IMAGE004
In the time of the interval,
Figure 88802DEST_PATH_IMAGE001
=
Figure 684869DEST_PATH_IMAGE007
，
Figure 411516DEST_PATH_IMAGE006
peak value of the three-valued periodic signal; the three-valued periodic signal is processed
Figure 172186DEST_PATH_IMAGE001
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter
Figure 882653DEST_PATH_IMAGE008
Obtaining a second d-axis current reference signal
Figure 688935DEST_PATH_IMAGE009
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T; acquiring three-phase voltage at grid-connected point of phase-locked loop type inverter
Figure 660302DEST_PATH_IMAGE010
And three-phase current
Figure 464310DEST_PATH_IMAGE011
For the three-phase voltage
Figure 521128DEST_PATH_IMAGE010
And the three-phase current
Figure 131101DEST_PATH_IMAGE011
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current in dq coordinate system
Figure 97920DEST_PATH_IMAGE012
And d-axis voltage
Figure 197463DEST_PATH_IMAGE013
The method comprises the steps of carrying out a first treatment on the surface of the Obtaining d-axis current in period T
Figure 616943DEST_PATH_IMAGE012
Current average of three steady state operating points in (a)
Figure 765028DEST_PATH_IMAGE014
And d-axis voltage
Figure 710987DEST_PATH_IMAGE013
Voltage average of three steady-state operating points in (a)
Figure 591218DEST_PATH_IMAGE015
And according to the current average value
Figure 622628DEST_PATH_IMAGE014
And the voltage average value
Figure 777666DEST_PATH_IMAGE015
Calculating the resistance value of the equivalent impedance of the power grid in real time
Figure 250235DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 957160DEST_PATH_IMAGE017
The method comprises the steps of carrying out a first treatment on the surface of the Establishing an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and setting the real-time power grid equivalent inductance value
Figure 85653DEST_PATH_IMAGE017
Feedback to the adaptive control rate to make the phase-locked loop typeThe inverter performs adaptive stability control.
In a second aspect, the present invention provides an adaptive stability control system for a phase locked loop inverter, comprising: a generation module configured to generate a three-valued periodic signal with period T related to time T
Figure 575541DEST_PATH_IMAGE001
Wherein each period is T and is provided with 4 subintervals
Figure 496092DEST_PATH_IMAGE002
、
Figure 983705DEST_PATH_IMAGE003
、
Figure 727058DEST_PATH_IMAGE004
、
Figure 20636DEST_PATH_IMAGE005
In the following
Figure 671060DEST_PATH_IMAGE002
And
Figure 454208DEST_PATH_IMAGE005
in the time of the interval,
Figure 822873DEST_PATH_IMAGE001
=0, in
Figure 654562DEST_PATH_IMAGE003
In the time of the interval,
Figure 284127DEST_PATH_IMAGE001
=
Figure 379122DEST_PATH_IMAGE006
in the following
Figure 828558DEST_PATH_IMAGE004
In the time of the interval,
Figure 667201DEST_PATH_IMAGE001
=
Figure 88955DEST_PATH_IMAGE007
，
Figure 213906DEST_PATH_IMAGE006
peak value of the three-valued periodic signal; a superposition module configured to superimpose the three-valued periodic signal
Figure 291583DEST_PATH_IMAGE001
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter
Figure 465075DEST_PATH_IMAGE008
Obtaining a second d-axis current reference signal
Figure 69232DEST_PATH_IMAGE009
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T; a conversion module configured to obtain three-phase voltages at grid-connected points of the phase-locked loop type inverter
Figure 506030DEST_PATH_IMAGE010
And three-phase current
Figure 930058DEST_PATH_IMAGE011
For the three-phase voltage
Figure 907241DEST_PATH_IMAGE010
And the three-phase current
Figure 506850DEST_PATH_IMAGE011
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current in dq coordinate system
Figure 973603DEST_PATH_IMAGE012
And d-axis voltage
Figure 557031DEST_PATH_IMAGE013
The method comprises the steps of carrying out a first treatment on the surface of the The computing module is used for processing the data,configured to obtain d-axis current during period T
Figure 541168DEST_PATH_IMAGE012
Current average of three steady state operating points in (a)
Figure 122846DEST_PATH_IMAGE014
And d-axis voltage
Figure 635867DEST_PATH_IMAGE013
Voltage average of three steady-state operating points in (a)
Figure 34488DEST_PATH_IMAGE015
And according to the current average value
Figure 353473DEST_PATH_IMAGE014
And the voltage average value
Figure 662095DEST_PATH_IMAGE015
Calculating the resistance value of the equivalent impedance of the power grid in real time
Figure 470651DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 497513DEST_PATH_IMAGE017
The method comprises the steps of carrying out a first treatment on the surface of the The control module is configured to establish an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and to enable the real-time power grid equivalent inductance value to be displayed
Figure 682507DEST_PATH_IMAGE017
And feeding back the self-adaptive control rate to enable the self-adaptive stable control of the phase-locked loop type inverter.
In a third aspect, there is provided an electronic device, comprising: the system comprises at least one processor and a memory communicatively connected with the at least one processor, wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the steps of the adaptive stability control method of the phase-locked loop inverter of any one of the embodiments of the present invention.
In a fourth aspect, the present invention also provides a computer readable storage medium having stored thereon a computer program, which when executed by a processor, causes the processor to perform the steps of the adaptive stability control method of a phase locked loop inverter of any of the embodiments of the present invention.
In addition, the self-adaptive control rate in the parameter space of the power grid impedance and the phase-locked loop bandwidth under the small disturbance stability meaning is built off line through the built phase-locked loop inverter grid-connected system SISO impedance analysis model, and the result is placed in a real-time controller, so that the self-adaptive control is realized. The method has important significance for guaranteeing the stable operation of the high-proportion phase-locked loop connected to the power grid.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of an adaptive stability control method of a phase-locked loop inverter according to an embodiment of the present invention;
fig. 2 is a hardware circuit diagram of an adaptive stability control method of a pll inverter according to an embodiment of the present invention;
fig. 3 is a control strategy block diagram of an adaptive stability control method of a pll inverter according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a boundary between a PLL bandwidth and an equivalent inductance value of a power grid under a given parameter according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of d-axis current reference and measured values after adding a three-valued periodic signal according to an embodiment of the present invention;
FIG. 6 is a waveform diagram of the phase A voltage and phase A current of the common connection point according to an embodiment of the present invention;
FIG. 7 is a diagram illustrating real-time measured grid impedance values and reference values according to an embodiment of the present invention;
FIG. 8 is a graph of d-axis current for a grid-connected system of a phase-locked loop inverter operating at different grid intensities without adaptive stability control according to the present invention;
FIG. 9 is a graph showing d-axis current for a phase locked loop inverter grid-tie system operating at different grid strengths in accordance with one embodiment of the present invention;
FIG. 10 is a schematic diagram illustrating a PLL bandwidth adaptation process according to an embodiment of the present invention;
fig. 11 is a block diagram of an adaptive stability control system of a pll inverter according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, a flowchart of an adaptive stability control method of a phase-locked loop inverter is shown.
As shown in fig. 1, the adaptive stability control method of the phase-locked loop inverter specifically includes the following steps:
step S101, generating a three-valued periodic signal with period T and related to time T
Figure 907952DEST_PATH_IMAGE001
In the present embodiment, a three-valued periodic signal related to time t is generated in the control system of the phase-locked loop type inverter
Figure 28354DEST_PATH_IMAGE001
The period is marked as T, wherein each period is provided with 4 subintervals in T
Figure 135988DEST_PATH_IMAGE002
、
Figure 38DEST_PATH_IMAGE003
、
Figure 79990DEST_PATH_IMAGE004
、
Figure 495928DEST_PATH_IMAGE005
In the following
Figure 966223DEST_PATH_IMAGE002
And
Figure 758599DEST_PATH_IMAGE005
in the time of the interval,
Figure 896319DEST_PATH_IMAGE001
=0, in
Figure 155262DEST_PATH_IMAGE003
In the time of the interval,
Figure 503067DEST_PATH_IMAGE001
=
Figure 708920DEST_PATH_IMAGE006
in the following
Figure 497885DEST_PATH_IMAGE004
In the time of the interval,
Figure 450098DEST_PATH_IMAGE001
=
Figure 957303DEST_PATH_IMAGE007
，
Figure 825902DEST_PATH_IMAGE006
is the peak of the three-valued periodic signal.
Step S102, the three-valued periodic signal is processed
Figure 672635DEST_PATH_IMAGE001
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter
Figure 538960DEST_PATH_IMAGE008
Obtaining a second d-axis current reference signal
Figure 595778DEST_PATH_IMAGE009
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T.
In this embodiment, a three-valued periodic signal is to be generated
Figure 143434DEST_PATH_IMAGE018
With a first d-axis Current reference signal in a phase-locked loop inverter Current Loop (CL)
Figure 969307DEST_PATH_IMAGE008
Added up to be recorded as a second d-axis current reference signal
Figure 209796DEST_PATH_IMAGE019
D-axis current and d-axis current output by the inverter are controlled through a current loop
Figure 19489DEST_PATH_IMAGE019
And consistent. Therefore, due to the addition of the three-value period signal, the inverter can switch to work at the first stable operation point, the second stable operation point and the third stable operation point in one period T. Wherein, at a first stable operating point,
Figure 370836DEST_PATH_IMAGE020
at a second stable operation point
Figure 51216DEST_PATH_IMAGE021
At the third stable operation point
Figure 462606DEST_PATH_IMAGE022
。
Step S103, obtaining three-phase voltage at grid-connected point of phase-locked loop type inverter
Figure 494016DEST_PATH_IMAGE010
And three-phase current
Figure 649053DEST_PATH_IMAGE011
For the three-phase voltage
Figure 449519DEST_PATH_IMAGE010
And the three-phase current
Figure 828548DEST_PATH_IMAGE011
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current in dq coordinate system
Figure 222620DEST_PATH_IMAGE012
And d-axis voltage
Figure 43333DEST_PATH_IMAGE013
。
In this embodiment, three-phase voltages at the grid-connected point of the phase-locked loop type inverter are collected through a voltage sensor and a current sensor
Figure 839251DEST_PATH_IMAGE010
And three-phase current
Figure 451498DEST_PATH_IMAGE011
The three-phase/two-phase conversion is carried out to obtain the voltage and current alpha beta component
Figure 332866DEST_PATH_IMAGE023
And
Figure 688761DEST_PATH_IMAGE024
. Then the phase-locked loop (Phase locked loop, PLL) outputs phase angle theta, voltage and current alpha beta components to a Park conversion module to obtain d-axis current under dq coordinate system
Figure 339185DEST_PATH_IMAGE025
And d-axis voltage
Figure 387913DEST_PATH_IMAGE026
。
Step S104, obtaining d-axis current in period T
Figure 490998DEST_PATH_IMAGE025
Current average of three steady state operating points in (a)
Figure 322688DEST_PATH_IMAGE014
And d-axis voltage
Figure 217831DEST_PATH_IMAGE013
Voltage average of three steady-state operating points in (a)
Figure 47247DEST_PATH_IMAGE015
And according to the current average value
Figure 762262DEST_PATH_IMAGE014
And the voltage average value
Figure 600905DEST_PATH_IMAGE015
Calculating the resistance value of the equivalent impedance of the power grid in real time
Figure 22659DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 413189DEST_PATH_IMAGE017
。
In this embodiment, the d-axis current is collected
Figure 225287DEST_PATH_IMAGE025
And d-axis voltage
Figure 398780DEST_PATH_IMAGE013
Data processing is carried out, and each calculation period is the same as a period T of the three-valued periodic signal: the d-axis current is recorded during each complete period T
Figure 2937DEST_PATH_IMAGE025
Average of three steady state operating points in (a)
Figure 174155DEST_PATH_IMAGE014
Simultaneously recording the corresponding d-axis voltage
Figure 866692DEST_PATH_IMAGE013
Average of three steady-state points in signal
Figure 47137DEST_PATH_IMAGE015
According to different steady state values of voltage and current, the resistance value of the equivalent impedance of the grid at the grid-connected point of the inverter can be obtained by utilizing a real-time measurement method of the impedance of the grid
Figure 177905DEST_PATH_IMAGE016
And inductance value
Figure 910237DEST_PATH_IMAGE017
。
It should be noted that, the method for measuring the impedance of the power grid in real time is specifically implemented in the following manner:
step 1, obtaining an average value of three steady-state operating points of d-axis voltage: in order to avoid the influence of transient processes on the average value in the steady-state point switching process, the average value of three steady-state operation points of the d-axis voltage in each T period can be calculated according to a formula (1).
Figure 696928DEST_PATH_IMAGE028
，（1）
In the method, in the process of the invention,
Figure 477802DEST_PATH_IMAGE029
is thatkTime of daydThe value of the voltage on the shaft,
Figure 790971DEST_PATH_IMAGE030
in the case of a discrete sample time,
Figure 569572DEST_PATH_IMAGE031
is the number of sampling points in a given time interval. The average value calculation process can be regarded as average value filtering of the voltage signals, and noise interference can be eliminated.
Step 2, obtaining an average value of three steady-state operating points of d-axis current: the average of the three steady-state operating points of the d-axis current during each T period can be calculated according to equation (2).
Figure 968192DEST_PATH_IMAGE033
，（2）
In the method, in the process of the invention,
Figure 490440DEST_PATH_IMAGE034
is thatkTime of daydA shaft current value;
step 3, obtaining
Figure 189275DEST_PATH_IMAGE014
、
Figure 873197DEST_PATH_IMAGE015
Substituting the equivalent resistance value into the formula (3) to estimate the equivalent resistance value of the power grid side
Figure 24693DEST_PATH_IMAGE016
And inductance value
Figure 85052DEST_PATH_IMAGE017
。
Figure 372814DEST_PATH_IMAGE035
，（3）
Specifically, the results of power grid impedance estimation are calculated and given in each period T in the steps 1 to 3, the selection suggestion of T is between 500ms and 1s, so that the power grid impedance estimation results are ensured not to be influenced by transient processes in steady-state switching, and high accuracy is ensured. The method can effectively avoid pollution to the power quality of the power grid, and can also ensure real-time sensing of the impedance of the power grid.
Step S105, establishing the self-adaptive control rate of the power grid equivalent inductance value and the phase-locked loop bandwidth parameter selection, and setting the real-time power grid equivalent inductance value
Figure 555534DEST_PATH_IMAGE017
And feeding back the self-adaptive control rate to enable the self-adaptive stable control of the phase-locked loop type inverter.
In the embodiment, an impedance frequency domain model of interaction between the phase-locked loop type inverter and the power grid is established, and d-axis current is marked off-line based on a small disturbance stability criterion
Figure 804113DEST_PATH_IMAGE036
Equivalent inductance value of power grid
Figure 527218DEST_PATH_IMAGE037
Phase-locked loop bandwidth
Figure 810432DEST_PATH_IMAGE038
The small disturbance stability parameter feasible region is formed, thereby establishing different
Figure 229299DEST_PATH_IMAGE036
Equivalent inductance value of power grid in operation range
Figure 761912DEST_PATH_IMAGE037
With phase-locked loop bandwidth
Figure 429654DEST_PATH_IMAGE038
And the self-adaptive control rate of parameter selection ensures the stable operation of the grid-connected system of the phase-locked loop type inverter.
According to the power grid equivalent inductance value estimated in the step S104
Figure 692008DEST_PATH_IMAGE037
And (5) combining the self-adaptive control rate in the step (S105) to realize the self-adaptive stable control of the phase-locked loop type inverter based on the real-time measurement of the power grid impedance.
It should be noted that, the equivalent inductance value of the power grid
Figure 888634DEST_PATH_IMAGE037
With phase-locked loop bandwidth
Figure 236439DEST_PATH_IMAGE038
The specific implementation method of the self-adaptive control rate of parameter selection comprises the following steps:
establishing a power grid impedance model under a complex vector dq coordinate system, wherein the expression of the power grid impedance model is as follows:
Figure 239030DEST_PATH_IMAGE039
，（4）
in the method, in the process of the invention,
Figure 231256DEST_PATH_IMAGE016
is the resistance value of the equivalent impedance of the resistive grid,
Figure 254576DEST_PATH_IMAGE017
is the equivalent inductance value of the power grid,
Figure 699464DEST_PATH_IMAGE040
in order for the laplace operator to be useful,
Figure 568063DEST_PATH_IMAGE041
is the imaginary partThe unit of the total number of the units,
Figure 477113DEST_PATH_IMAGE042
is the fundamental angular frequency;
establishing a phase-locked loop type inverter impedance model under a complex vector dq coordinate system, wherein the phase-locked loop type inverter impedance model has the following expression:
Figure 15542DEST_PATH_IMAGE043
，（5）
Figure 337939DEST_PATH_IMAGE044
，（6）
in the method, in the process of the invention,
Figure 682332DEST_PATH_IMAGE045
for the impedance matrix of the inverter in the complex vector dq coordinate system,
Figure 649151DEST_PATH_IMAGE046
for the transformation matrix of the real space dq coordinate system to the complex vector dq coordinate system,
Figure 748694DEST_PATH_IMAGE047
for the impedance matrix of the inverter in real space dq coordinate system,
Figure 168174DEST_PATH_IMAGE048
for positive sequence impedance in the impedance matrix under the complex vector dq coordinate system,
Figure 316259DEST_PATH_IMAGE049
for negative sequence impedance in the impedance matrix under the complex vector dq coordinate system,
Figure 262218DEST_PATH_IMAGE050
is the conjugate of the negative-sequence impedance,
Figure 408029DEST_PATH_IMAGE051
is the conjugate of the positive sequence impedance,
Figure 111543DEST_PATH_IMAGE052
is a matrix of units which is a matrix of units,
Figure 140283DEST_PATH_IMAGE053
for the PCC point voltage transfer matrix,
Figure 81695DEST_PATH_IMAGE054
in the form of a current loop transfer matrix,
Figure 523040DEST_PATH_IMAGE055
for the PCC point current transfer matrix,
Figure 917112DEST_PATH_IMAGE056
for the inverter port voltage transfer matrix,
Figure 407000DEST_PATH_IMAGE057
for the inverter filter transfer matrix,
Figure 796393DEST_PATH_IMAGE058
for the steady state value of the inverter grid-connected point q-axis current,
Figure 549585DEST_PATH_IMAGE059
is a closed loop transfer function of a phase-locked loop,
Figure 227691DEST_PATH_IMAGE060
is the steady-state value of the d-axis current of the grid-connected point of the inverter,
Figure 849165DEST_PATH_IMAGE061
for the value of the inverter port q-axis voltage,
Figure 234010DEST_PATH_IMAGE062
for the d-axis voltage value of the inverter port,
Figure 689262DEST_PATH_IMAGE063
is the steady-state value of the d-axis voltage of the grid-connected point of the inverter,
Figure 182561DEST_PATH_IMAGE064
in order for the laplace operator to be useful,
Figure 951933DEST_PATH_IMAGE065
in order for the parasitic resistance to be present,
Figure 519181DEST_PATH_IMAGE066
in order to filter the inductance of the inductor,
Figure 473230DEST_PATH_IMAGE067
for the fundamental angular frequency of the wave,
Figure 63612DEST_PATH_IMAGE068
is the ratio coefficient of the current loop,
Figure 26889DEST_PATH_IMAGE069
is the integral coefficient of the current loop,
Figure 183063DEST_PATH_IMAGE070
in units of the imaginary part,
Figure 183380DEST_PATH_IMAGE071
for the conjugate of the transformation matrix of the real space dq coordinate system to the complex vector dq coordinate system,
Figure 385692DEST_PATH_IMAGE072
is the bandwidth of the phase-locked loop;
calculating phase-locked loop bandwidth
Figure 824763DEST_PATH_IMAGE038
And the adaptive control rate between the grid impedance: on the premise of knowing the impedance of the power grid, if the stability of the grid-connected system of the phase-locked loop type converter is to be ensured, the impedance of the phase-locked loop type inverter and the impedance of the power grid need to be satisfied without interaction in a given frequency range. Consider the worst case of grid impedance, i.e. pure inductance, and therefore for each
Figure 304286DEST_PATH_IMAGE037
All have a critical
Figure 603068DEST_PATH_IMAGE038
So that the system is stable. Therefore, the offline calculation expression of the adaptive control rate is:
Figure 168042DEST_PATH_IMAGE073
，（7）
wherein, the expression of phase-locked loop inverter single input single output (Single input single output, SISO) equivalent impedance is calculated:
Figure 145225DEST_PATH_IMAGE074
，（8）
therefore, under a given power grid impedance range, the self-adaptive control rate between the bandwidth of the phase-locked loop and the equivalent inductance value of the power grid is as follows:
Figure 338309DEST_PATH_IMAGE075
，（9）
in the method, in the process of the invention,
Figure 946008DEST_PATH_IMAGE076
as a margin coefficient of the degree of freedom,
Figure 795015DEST_PATH_IMAGE077
equivalent inductance of electric networkL g D-axis current steady state valueI d0 And d-axis voltage steady state valueU d0 A stable boundary function composed of three parameters.
In summary, the adaptive control method of the phase-locked loop type inverter is an explicit adaptive control rate strictly derived from the parameter space of the power grid impedance, the phase-locked loop bandwidth, the running current and the port voltage based on the small disturbance stability criterion. In actual operation of the inverter grid-connected system, the mainly changed variables comprise grid-connected port voltage, current and uncertainty of grid impedance. Therefore, by measuring the impedance, voltage and current of the power grid and combining the control rate, the phase-locked loop bandwidth suitable for the current working condition can be directly selected, so that the phase-locked loop inverter can be ensured to have wider bandwidth in normal operation so as to ensure better dynamic performance, and can also be ensured to have enough stability margin under the weak network condition, and the stability of the system is ensured.
In some alternative embodiments, fig. 2 is a hardware circuit diagram of a phase-locked loop type inverter adaptive stability control method based on real-time measurement of power grid impedance, which mainly comprises a direct current power supply, an inverter bridge, a filter inductor, power grid impedance and a three-phase power supply for simulating new energy power generation.
Fig. 3 is a control strategy block diagram of the phase-locked loop type inverter self-adaptive stable control method based on real-time measurement of power grid impedance. The system mainly comprises a three-value periodic signal generation module, a signal acquisition and conversion module, an impedance real-time calculation module, a phase-locked loop self-adaption module, a phase-locked loop, a current loop and a PWM (pulse-Width modulation) loop.
1) The three-value periodic signal generation module: generating a three-valued periodic signal related to time t
Figure 372627DEST_PATH_IMAGE001
The period is denoted T. Each period T is provided with 4 subintervals
Figure 826742DEST_PATH_IMAGE002
、
Figure 402080DEST_PATH_IMAGE003
、
Figure 66279DEST_PATH_IMAGE004
、
Figure 322948DEST_PATH_IMAGE005
Wherein, in
Figure 428307DEST_PATH_IMAGE002
And
Figure 236863DEST_PATH_IMAGE005
in the time of the interval,
Figure 998146DEST_PATH_IMAGE001
=0, in
Figure 120823DEST_PATH_IMAGE003
In the time of the interval,
Figure 143006DEST_PATH_IMAGE001
=
Figure 263408DEST_PATH_IMAGE006
in the following
Figure 574304DEST_PATH_IMAGE004
In the time of the interval,
Figure 562989DEST_PATH_IMAGE001
=
Figure 315044DEST_PATH_IMAGE007
，
Figure 668665DEST_PATH_IMAGE006
is the peak of the three-valued periodic signal.
2) Current loop and PWM module: the generated three-valued periodic signal
Figure 263594DEST_PATH_IMAGE001
With a first d-axis Current reference signal in a phase-locked loop inverter Current Loop (CL)
Figure 931336DEST_PATH_IMAGE078
Added up to be recorded as a second d-axis current reference signal
Figure 600215DEST_PATH_IMAGE009
D-axis current and d-axis current output by an inverter are controlled through a current loop and PWM
Figure 455563DEST_PATH_IMAGE009
And consistent.
3) Signal acquisitionAnd a conversion module: three-phase voltage at grid-connected point of phase-locked loop type inverter is collected through voltage sensor and current sensor
Figure 413154DEST_PATH_IMAGE010
And three-phase current
Figure 743642DEST_PATH_IMAGE011
The three-phase/two-phase conversion is carried out to obtain the voltage and current alpha beta component
Figure 532606DEST_PATH_IMAGE079
And
Figure 165713DEST_PATH_IMAGE080
. Then the phase-locked loop (Phase locked loop, PLL) outputs phase angle theta, voltage and current alpha beta components to a Park conversion module to obtain d-axis current under dq coordinate system
Figure 407338DEST_PATH_IMAGE081
And d-axis voltage
Figure 541516DEST_PATH_IMAGE082
；
4) The impedance real-time calculation module: for the collected d-axis current
Figure 388250DEST_PATH_IMAGE081
And d-axis voltage
Figure 316891DEST_PATH_IMAGE082
Data processing is carried out, and each calculation period is the same as a period T of the three-valued periodic signal: the d-axis current is recorded during each complete period T
Figure 311392DEST_PATH_IMAGE081
Average of three steady state operating points in (a)
Figure 593469DEST_PATH_IMAGE014
Simultaneously recording the corresponding d-axis voltage
Figure 684922DEST_PATH_IMAGE082
Average of three steady-state points in signal
Figure 456569DEST_PATH_IMAGE015
According to the different steady state values of the voltage and the current, the resistance value of the equivalent impedance of the power grid at the grid-connected point of the inverter can be obtained
Figure 876049DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 24133DEST_PATH_IMAGE017
。
5) Phase-locked loop bandwidth adaptation module: by self-adaptive control rate between off-line calibrated power grid impedance and phase-locked loop bandwidth, the equivalent inductance adaptive to the current power grid is provided
Figure 970092DEST_PATH_IMAGE083
Phase-locked loop bandwidth, i.e. adaptive phase-locked loop bandwidth
Figure 115903DEST_PATH_IMAGE084
And sending the amplitude limited signal into a phase-locked loop to realize the self-adaption of the bandwidth of the phase-locked loop, wherein the amplitude limited signal is sent into the phase-locked loop. The function of the limiter is to ensure that
Figure 147313DEST_PATH_IMAGE085
Is in a reasonable selection range, and avoids the abnormal operation of the inverter. The specific parameters of the examples are shown in table 1:
Figure 833509DEST_PATH_IMAGE086
，
FIG. 4 is a calculated adaptive phase-locked loop bandwidth given an inverter rated output current of 40A
Figure 509341DEST_PATH_IMAGE085
Equivalent inductance value with electric network
Figure 622791DEST_PATH_IMAGE017
And (5) taking a value boundary. The stability boundary refers to equivalent inductance values of different power grids
Figure 141497DEST_PATH_IMAGE017
If the small disturbance of the system is to be guaranteed to be stable, the phase-locked loop bandwidth must not exceed the boundary. In addition, the maximum value of the phase-locked loop bandwidth is set to be 200Hz and the minimum value is set to be 5Hz because the current inner loop bandwidth limits the phase-locked loop bandwidth and the most basic phase-locked loop frequency and phase locking function are required to be met. Setting the robust coefficient M to 0.5, and calculating according to the stable boundary
Figure 569067DEST_PATH_IMAGE085
And (3) with
Figure 161722DEST_PATH_IMAGE017
Adaptive control rate between the two.
Fig. 5 shows the d-axis current reference value and the measured value after adding the three-value periodic signal, and it can be seen that the period of the three-value periodic signal is t=1s, the amplitude is 1A, and in each period, the d-axis current output by the inverter can well track the reference value, and the three steady-state values 40a,41A and 39A can be switched back and forth to operate; fig. 6 shows the phase a voltage and current waveforms at the common connection point, and it can be seen that no harmonic component is introduced on the ac side because the injected disturbance is a fundamental disturbance.
Fig. 7 shows the real-time measured grid impedance values and reference values for different grid impedances using the proposed impedance measurement method. As can be seen from the graph, during 0-1 s, the inverter impedance measurement module is connected with the grid to acquire data, so that the output is 0; when the power grid impedance is 1-3 s, the measured value of the power grid impedance (the power grid impedance is only set to be a pure inductance) is almost consistent with the reference value, and the power grid impedance is stabilized near 4mH; when the power grid impedance reference value is increased from 4mH to 6mH in 3-6 s, but the calculated value is not updated in 3-4 s because the calculation period of the impedance measurement method is 1s, and the 4mH is still maintained; dynamically updating the impedance measured value to be near 6mH when the impedance measured value is 4-6 s, and accurately measuring the new power grid impedance; and when the power grid impedance reference value is 6-10 s, the power grid impedance reference value is increased from 6mH to 8mH, and similarly, after 1s delay, the power grid impedance estimated value is updated to about 8 mH. Thus, the proposed impedance measurement algorithm updates the grid impedance in real time with a delay of T time length, but still accurately perceives the grid impedance on the second scale.
FIG. 8 is a d-axis current for a phase-locked loop inverter grid-tie system operating at different grid strengths without the proposed adaptive stabilization control, with the initial bandwidth of the phase-locked loop set to 100Hz, and it can be seen that at 6s, when the grid impedance increases from 6mH to 8mH, the d-axis current is destabilized due to the phase-locked loop not having adaptive capability; fig. 9 shows d-axis current waveforms of a phase-locked loop type inverter grid-connected system adopting the adaptive stability control according to the present invention, wherein the d-axis current waveforms are operated under different grid intensities, and the initial bandwidth of the phase-locked loop is set to be 100Hz. It can be seen that the pll inverter grid-connected system can stably operate under the set working conditions of 4mH, 6mH and 8mH, and the corresponding pll bandwidth adaptive process is shown in fig. 10. When the impedance is 0-1 s, the output of the impedance measuring module is 0, the bandwidth of the phase-locked loop is 100Hz, and when the impedance is 1-3 s, the output of the impedance measuring module is 4mH, and the bandwidth of the phase-locked loop is self-adaptive to 90Hz; when the power grid impedance is changed in 3-4 s, the output of the impedance measurement module is not updated, and the bandwidth of the phase-locked loop is still 90Hz; when the impedance measurement module outputs about 5.8mH in 4-5 s, the bandwidth of the phase-locked loop is reduced to 62Hz in a self-adaptive manner; when the impedance measurement module outputs and stabilizes to be near 6mH in 5-6 s, the bandwidth of the phase-locked loop is adaptively adjusted to be 45Hz; when the power grid impedance is switched to 8mH in 6-7 s, but the impedance measured value is updated at the moment, and the bandwidth of the phase-locked loop is still kept at 45Hz; and at 7-10 s, updating the measured value of the power grid impedance to about 8mH, and adaptively changing the bandwidth of the phase-locked loop to 25Hz. The phase-locked loop bandwidth self-adaptive control method can enable the phase-locked loop inverter grid-connected system to stably operate under different power grid impedances.
In summary, the method of the present application can achieve the following technical effects:
1) And fundamental wave power injection is adopted, so that different steady-state operation points are generated, and the equivalent impedance of the power grid is solved through the relation between the voltage and the current of the different steady-state operation points and the impedance of the power grid. The method can effectively avoid pollution to the power quality of the power grid, and can also ensure real-time sensing of the impedance of the power grid.
2) The adaptive control rate is an explicit adaptive control rate strictly derived in the power grid impedance, phase-locked loop bandwidth, operating current, port voltage parameter space based on a small disturbance stability criterion. The phase-locked loop bandwidth suitable for the current working condition can be directly selected by measuring the impedance, voltage and current of the power grid and combining the self-adaptive control rate, so that the phase-locked loop inverter can be ensured to have wider bandwidth in normal operation so as to ensure better dynamic performance, and also can be ensured to have enough stability margin under the weak network condition, and the stability of the system is ensured.
3) The implementation does not need to add additional hardware facilities or measuring units in the phase-locked loop type inverter grid-connected system, and only needs to modify the phase-locked loop type inverter control system, so that the implementation cost is low.
Referring to fig. 11, a block diagram of an adaptive stability control system for a pll inverter of the present application is shown.
As shown in fig. 11, the adaptive stability control system 200 includes: the system comprises a generation module 210, a superposition module 220, a transformation module 230, a calculation module 240 and a control module 250.
Wherein the generation module 210 is configured to generate a three-valued periodic signal with period T and related to time T
Figure 42478DEST_PATH_IMAGE001
Wherein each period is T and is provided with 4 subintervals
Figure 658267DEST_PATH_IMAGE002
、
Figure 686266DEST_PATH_IMAGE003
、
Figure 461324DEST_PATH_IMAGE004
、
Figure 119839DEST_PATH_IMAGE005
In the following
Figure 285241DEST_PATH_IMAGE002
And
Figure 179247DEST_PATH_IMAGE005
in the time of the interval,
Figure 684178DEST_PATH_IMAGE001
=0, in
Figure 575911DEST_PATH_IMAGE003
In the time of the interval,
Figure 556505DEST_PATH_IMAGE001
=
Figure 863990DEST_PATH_IMAGE006
in the following
Figure 285744DEST_PATH_IMAGE004
In the time of the interval,
Figure 410694DEST_PATH_IMAGE001
=
Figure 488372DEST_PATH_IMAGE007
，
Figure 927444DEST_PATH_IMAGE006
peak value of the three-valued periodic signal; a superposition module 220 configured to superimpose the three-valued periodic signal
Figure 266021DEST_PATH_IMAGE001
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter
Figure 702819DEST_PATH_IMAGE008
Obtaining a second d-axis current reference signal
Figure 64530DEST_PATH_IMAGE009
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T; conversion mouldBlock 230, configured to obtain three-phase voltages at grid-tie points of a phase-locked loop inverter
Figure 838451DEST_PATH_IMAGE010
And three-phase current
Figure 438059DEST_PATH_IMAGE011
For the three-phase voltage
Figure 842496DEST_PATH_IMAGE010
And the three-phase current
Figure 753820DEST_PATH_IMAGE011
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current in dq coordinate system
Figure 472377DEST_PATH_IMAGE012
And d-axis voltage
Figure 723230DEST_PATH_IMAGE013
The method comprises the steps of carrying out a first treatment on the surface of the A calculation module 240 configured to obtain a d-axis current during the period T
Figure 352096DEST_PATH_IMAGE012
Current average of three steady state operating points in (a)
Figure 891661DEST_PATH_IMAGE014
And d-axis voltage
Figure 210647DEST_PATH_IMAGE013
Voltage average of three steady-state operating points in (a)
Figure 378323DEST_PATH_IMAGE015
And according to the current average value
Figure 327825DEST_PATH_IMAGE014
And the voltage average value
Figure 885845DEST_PATH_IMAGE015
Real-time clockCalculating the resistance value of the equivalent impedance of the power grid
Figure 70839DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 499546DEST_PATH_IMAGE017
The method comprises the steps of carrying out a first treatment on the surface of the A control module 250 configured to establish an adaptive control rate of the grid equivalent inductance value and the phase-locked loop bandwidth parameter selection, and to output the real-time grid equivalent inductance value
Figure 479004DEST_PATH_IMAGE017
And feeding back the self-adaptive control rate to enable the self-adaptive stable control of the phase-locked loop type inverter.
It should be understood that the modules depicted in fig. 11 correspond to the various steps in the method described with reference to fig. 1. Thus, the operations and features described above for the method and the corresponding technical effects are equally applicable to the modules in fig. 11, and are not described here again.
In other embodiments, the present invention further provides a computer readable storage medium, on which a computer program is stored, where the program instructions, when executed by a processor, cause the processor to perform the adaptive stability control method of the phase-locked loop inverter in any of the above method embodiments;
as one embodiment, the computer-readable storage medium of the present invention stores computer-executable instructions configured to:
generating a three-valued periodic signal with period T, which is related to time T
Figure 993161DEST_PATH_IMAGE001
Wherein each period is T and is provided with 4 subintervals
Figure 653950DEST_PATH_IMAGE002
、
Figure 530639DEST_PATH_IMAGE003
、
Figure 87522DEST_PATH_IMAGE004
、
Figure 620135DEST_PATH_IMAGE005
In the following
Figure 881352DEST_PATH_IMAGE002
And
Figure 19072DEST_PATH_IMAGE005
in the time of the interval,
Figure 543594DEST_PATH_IMAGE001
=0, in
Figure 360241DEST_PATH_IMAGE003
In the time of the interval,
Figure 628411DEST_PATH_IMAGE001
=
Figure 620638DEST_PATH_IMAGE006
in the following
Figure 112799DEST_PATH_IMAGE004
In the time of the interval,
Figure 823266DEST_PATH_IMAGE001
=
Figure 629548DEST_PATH_IMAGE007
，
Figure 603845DEST_PATH_IMAGE006
peak value of the three-valued periodic signal;
the three-valued periodic signal is processed
Figure 407853DEST_PATH_IMAGE001
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter
Figure 136774DEST_PATH_IMAGE008
Obtaining a second d-axis current reference signal
Figure 809064DEST_PATH_IMAGE009
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T;
acquiring three-phase voltage at grid-connected point of phase-locked loop type inverter
Figure 775883DEST_PATH_IMAGE010
And three-phase current
Figure 547530DEST_PATH_IMAGE011
For the three-phase voltage
Figure 91644DEST_PATH_IMAGE010
And the three-phase current
Figure 442991DEST_PATH_IMAGE011
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current in dq coordinate system
Figure 61054DEST_PATH_IMAGE012
And d-axis voltage
Figure 65919DEST_PATH_IMAGE013
；
Obtaining d-axis current in period T
Figure 972695DEST_PATH_IMAGE012
Current average of three steady state operating points in (a)
Figure 924471DEST_PATH_IMAGE014
And d-axis voltage
Figure 459357DEST_PATH_IMAGE013
Voltage average of three steady-state operating points in (a)
Figure 41648DEST_PATH_IMAGE015
And according to the current average value
Figure 232458DEST_PATH_IMAGE014
And the voltage average value
Figure 784662DEST_PATH_IMAGE015
Calculating the resistance value of the equivalent impedance of the power grid in real time
Figure 439635DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 927248DEST_PATH_IMAGE017
；
Establishing an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and setting the real-time power grid equivalent inductance value
Figure 667671DEST_PATH_IMAGE017
And feeding back the self-adaptive control rate to enable the self-adaptive stable control of the phase-locked loop type inverter.
The computer readable storage medium may include a storage program area and a storage data area, wherein the storage program area may store an operating system, at least one application program required for a function; the storage data area may store data created according to the use of an adaptive stability control system of the phase locked loop type inverter, etc. In addition, the computer-readable storage medium may include high-speed random access memory, and may also include memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, the computer readable storage medium optionally includes a memory remotely located with respect to the processor, the remote memory being connectable to the adaptive stability control system of the phase locked loop inverter via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
Fig. 12 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, as shown in fig. 12, where the device includes: a processor 310 and a memory 320. The electronic device may further include: an input device 330 and an output device 340. The processor 310, memory 320, input device 330, and output device 340 may be connected by a bus or other means, for example in fig. 12. Memory 320 is the computer-readable storage medium described above. The processor 310 executes various functional applications of the server and data processing by running nonvolatile software programs, instructions and modules stored in the memory 320, i.e., implements the adaptive stability control method of the pll inverter of the above-described method embodiment. The input device 330 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the adaptive stability control system of the phase-locked loop inverter. The output device 340 may include a display device such as a display screen.
The electronic equipment can execute the method provided by the embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method. Technical details not described in detail in this embodiment may be found in the methods provided in the embodiments of the present invention.
As an embodiment, the electronic device is applied to an adaptive stability control system of a phase-locked loop inverter, and is used for a client, and includes: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executable by the at least one processor to enable the at least one processor to:
generating a three-valued periodic signal with period T, which is related to time T
Figure 961249DEST_PATH_IMAGE001
Wherein each period is T and is provided with 4 subintervals
Figure 346094DEST_PATH_IMAGE002
、
Figure 66925DEST_PATH_IMAGE003
、
Figure 563153DEST_PATH_IMAGE004
、
Figure 332526DEST_PATH_IMAGE005
In the following
Figure 962090DEST_PATH_IMAGE002
And
Figure 853823DEST_PATH_IMAGE005
in the time of the interval,
Figure 178625DEST_PATH_IMAGE001
=0, in
Figure 814006DEST_PATH_IMAGE003
In the time of the interval,
Figure 563656DEST_PATH_IMAGE001
=
Figure 563973DEST_PATH_IMAGE006
in the following
Figure 766284DEST_PATH_IMAGE004
In the time of the interval,
Figure 939776DEST_PATH_IMAGE001
=
Figure 153720DEST_PATH_IMAGE007
，
Figure 387255DEST_PATH_IMAGE006
peak value of the three-valued periodic signal;
the three-valued periodic signal is processed
Figure 76863DEST_PATH_IMAGE001
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter
Figure 991729DEST_PATH_IMAGE008
Obtaining a second d-axis current reference signal
Figure 388075DEST_PATH_IMAGE009
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T;
acquiring three-phase voltage at grid-connected point of phase-locked loop type inverter
Figure 120408DEST_PATH_IMAGE010
And three-phase current
Figure 641519DEST_PATH_IMAGE011
For the three-phase voltage
Figure 422393DEST_PATH_IMAGE010
And the three-phase current
Figure 1142DEST_PATH_IMAGE011
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current in dq coordinate system
Figure 514163DEST_PATH_IMAGE012
And d-axis voltage
Figure 584887DEST_PATH_IMAGE013
；
Obtaining d-axis current in period T
Figure 966190DEST_PATH_IMAGE012
Current average of three steady state operating points in (a)
Figure 274812DEST_PATH_IMAGE014
And d-axis voltage
Figure 21051DEST_PATH_IMAGE013
Voltage average of three steady-state operating points in (a)
Figure 909897DEST_PATH_IMAGE015
And according to the current average value
Figure 970257DEST_PATH_IMAGE014
And the voltage average value
Figure 195702DEST_PATH_IMAGE015
Calculating the resistance value of the equivalent impedance of the power grid in real time
Figure 175159DEST_PATH_IMAGE016
Equivalent inductance value of power grid
Figure 423738DEST_PATH_IMAGE017
；
Establishing an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and setting the real-time power grid equivalent inductance value
Figure 84526DEST_PATH_IMAGE017
And feeding back the self-adaptive control rate to enable the self-adaptive stable control of the phase-locked loop type inverter.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on such understanding, the foregoing technical solutions may be embodied essentially or in part in the form of a software product, which may be stored in a computer-readable storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the various embodiments or methods of some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (6)

1. An adaptive stability control method for a phase-locked loop inverter, comprising:
generating a three-valued periodic signal with period T, which is related to time T
Figure QLYQS_3
Wherein 4 subintervals +_are provided in each period T>
Figure QLYQS_5
、/>
Figure QLYQS_9
、/>
Figure QLYQS_4
、/>
Figure QLYQS_7
In->
Figure QLYQS_11
And->
Figure QLYQS_14
In the interval, the->
Figure QLYQS_1
=0, in->
Figure QLYQS_8
In the interval, the->
Figure QLYQS_12
=/>
Figure QLYQS_15
In the following
Figure QLYQS_2
In the interval, the->
Figure QLYQS_6
=/>
Figure QLYQS_10
，/>
Figure QLYQS_13
Peak value of the three-valued periodic signal;
the three-valued periodic signal is processed
Figure QLYQS_16
First d-axis current reference signal superimposed on current loop of phase-locked loop type inverter>
Figure QLYQS_17
On, a second d-axis current reference signal +.>
Figure QLYQS_18
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T;
acquiring three-phase voltage at grid-connected point of phase-locked loop type inverter
Figure QLYQS_19
And three-phase current->
Figure QLYQS_20
For the three-phase voltage +.>
Figure QLYQS_21
And the three-phase current +.>
Figure QLYQS_22
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current +.>
Figure QLYQS_23
And d-axis voltage>
Figure QLYQS_24
；
Obtaining d-axis current in period T
Figure QLYQS_26
Current average value of three steady-state operating points +.>
Figure QLYQS_29
And d-axis voltage +.>
Figure QLYQS_32
The voltage average value of the three steady-state operating points +.>
Figure QLYQS_27
And according to said current average +.>
Figure QLYQS_31
And said voltage average +.>
Figure QLYQS_34
Calculating the resistance value of the equivalent impedance of the power grid in real time>
Figure QLYQS_36
And the equivalent inductance value of the power grid->
Figure QLYQS_25
Wherein, according to said current average +.>
Figure QLYQS_30
And said voltage average +.>
Figure QLYQS_33
Calculating the resistance value of the equivalent impedance of the power grid in real time>
Figure QLYQS_35
And the equivalent inductance value of the power grid->
Figure QLYQS_28
The expression of (2) is:
Figure QLYQS_37
；
establishing an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and setting the real-time power grid equivalent inductance value
Figure QLYQS_38
The feedback is carried out to the self-adaptive control rate to carry out self-adaptive stable control on the phase-locked loop type inverter, wherein the equivalent inductance value of the power grid and the bandwidth of the phase-locked loop are built>
Figure QLYQS_39
An adaptive control rate for parameter selection, comprising:
establishing a power grid impedance model under a complex vector dq coordinate system, wherein the expression of the power grid impedance model is as follows:
Figure QLYQS_40
，
in the method, in the process of the invention,
Figure QLYQS_41
resistance value of equivalent impedance of resistive grid, +.>
Figure QLYQS_42
For the equivalent inductance value of the power grid, < >>
Figure QLYQS_43
For Laplace operator>
Figure QLYQS_44
In imaginary units->
Figure QLYQS_45
Is the fundamental wave angleA frequency;
establishing a phase-locked loop type inverter impedance model under a complex vector dq coordinate system, wherein the phase-locked loop type inverter impedance model has the following expression:
Figure QLYQS_46
，
Figure QLYQS_47
，
in the method, in the process of the invention,
Figure QLYQS_66
for the impedance matrix of the inverter in complex vector dq coordinate system, +.>
Figure QLYQS_69
Transformation matrix for converting real space dq coordinate system into complex vector dq coordinate system, +.>
Figure QLYQS_72
For the impedance matrix of the inverter in real space dq coordinate system,
Figure QLYQS_49
for positive sequence impedance in impedance matrix under complex vector dq coordinate system, < >>
Figure QLYQS_52
For the negative sequence impedance in the impedance matrix under complex vector dq coordinate system, < >>
Figure QLYQS_57
Is the conjugate of negative sequence impedance->
Figure QLYQS_62
Is the conjugation of positive sequence impedance, +.>
Figure QLYQS_63
Is a unitary matrix->
Figure QLYQS_67
For PCC point voltage transfer matrix,/for>
Figure QLYQS_70
For the current loop transfer matrix, ">
Figure QLYQS_73
For the PCC point current transfer matrix,
Figure QLYQS_68
for the inverter port voltage transfer matrix, +.>
Figure QLYQS_71
For the inverter filter transfer matrix, +.>
Figure QLYQS_74
For inverter grid-connected point q-axis current steady-state value, for>
Figure QLYQS_75
For the closed loop transfer function of the phase-locked loop>
Figure QLYQS_54
For the steady-state value of the d-axis current of the grid-connected point of the inverter, < + >>
Figure QLYQS_58
For the value of the inverter port q-axis voltage, +.>
Figure QLYQS_61
For the d-axis voltage value of the inverter port, +.>
Figure QLYQS_65
For the steady-state value of the voltage of the grid-connected point d axis of the inverter, < >>
Figure QLYQS_48
For Laplace operator>
Figure QLYQS_55
For parasitic resistance->
Figure QLYQS_60
For filtering inductance +.>
Figure QLYQS_64
For fundamental angular frequency, ++>
Figure QLYQS_50
Is the ratio coefficient of the current loop,
Figure QLYQS_53
for the current loop integral coefficient, +.>
Figure QLYQS_56
In imaginary units->
Figure QLYQS_59
Conjugation of transformation matrix for conversion of real space dq coordinate system into complex vector dq coordinate system,/-for real space dq coordinate system>
Figure QLYQS_51
Is the bandwidth of the phase-locked loop;
the offline calculation expression of the adaptive control rate is:
Figure QLYQS_76
，
the expression of the single-input single-output equivalent impedance of the phase-locked loop type inverter is calculated:
Figure QLYQS_77
，
therefore, under a given power grid impedance range, the self-adaptive control rate between the bandwidth of the phase-locked loop and the equivalent inductance value of the power grid is as follows:
Figure QLYQS_78
，
in the method, in the process of the invention,
Figure QLYQS_79
is margin coefficient, is at the beginning of the journey>
Figure QLYQS_80
Equivalent inductance of electric networkL g D-axis current steady state valueI d0 And d-axis voltage steady state valueU d0 A stable boundary function composed of three parameters.
2. The adaptive stability control method of a phase locked loop inverter of claim 1, wherein the three steady-state operating points are: a first stable operating point, a second stable operating point, and a third stable operating point, wherein at the first stable operating point,
Figure QLYQS_81
in the second stable operating point +.>
Figure QLYQS_82
In the third stable operating point +.>
Figure QLYQS_83
。
3. The adaptive stabilization control method of a phase locked loop inverter according to claim 1, wherein the d-axis current in the period T is calculated
Figure QLYQS_84
Current average value of three steady-state operating points +.>
Figure QLYQS_85
The expression of (2) is:
Figure QLYQS_86
，/>
calculating d-axis voltage
Figure QLYQS_87
The voltage average value of the three steady-state operating points +.>
Figure QLYQS_88
The expression of (2) is:
Figure QLYQS_89
，
in the method, in the process of the invention,
Figure QLYQS_90
is thatkTime of daydShaft current value->
Figure QLYQS_91
Is thatkTime of daydAxle voltage value>
Figure QLYQS_92
For discrete sampling time, +.>
Figure QLYQS_93
Is the number of sampling points in a given time interval.
4. An adaptive stability control system for a phase-locked loop inverter, comprising:
a generation module configured to generate a three-valued periodic signal with period T related to time T
Figure QLYQS_95
Wherein 4 subintervals +_are provided in each period T>
Figure QLYQS_99
、/>
Figure QLYQS_103
、/>
Figure QLYQS_96
、/>
Figure QLYQS_100
In->
Figure QLYQS_104
And->
Figure QLYQS_107
In the interval, the->
Figure QLYQS_94
=0, in->
Figure QLYQS_98
In the interval, the->
Figure QLYQS_102
=/>
Figure QLYQS_106
In->
Figure QLYQS_97
In the interval, the->
Figure QLYQS_101
=/>
Figure QLYQS_105
，/>
Figure QLYQS_108
Peak value of the three-valued periodic signal;
a superposition module configured to superimpose the three-valued periodic signal
Figure QLYQS_109
Superimposed on a phase-locked loopFirst d-axis current reference signal of current loop of inverter +.>
Figure QLYQS_110
On, a second d-axis current reference signal +.>
Figure QLYQS_111
The phase-locked loop type inverter can be switched to work at three steady-state operation points in one period T;
a conversion module configured to obtain three-phase voltages at grid-connected points of the phase-locked loop type inverter
Figure QLYQS_112
And three-phase current
Figure QLYQS_113
For the three-phase voltage +.>
Figure QLYQS_114
And the three-phase current +.>
Figure QLYQS_115
Performing three-phase/two-phase transformation and Park transformation to obtain d-axis current +.>
Figure QLYQS_116
And d-axis voltage>
Figure QLYQS_117
；
A calculation module configured to obtain d-axis current in period T
Figure QLYQS_119
Current average of three steady state operating points in (a)
Figure QLYQS_122
And d-axis voltage +.>
Figure QLYQS_125
The voltage average value of the three steady-state operating points +.>
Figure QLYQS_121
And according to said current average +.>
Figure QLYQS_123
And said voltage average +.>
Figure QLYQS_126
Calculating the resistance value of the equivalent impedance of the power grid in real time>
Figure QLYQS_128
And the equivalent inductance value of the power grid->
Figure QLYQS_118
Wherein, according to the current average value
Figure QLYQS_124
And said voltage average +.>
Figure QLYQS_127
Calculating the resistance value of the equivalent impedance of the power grid in real time>
Figure QLYQS_129
And the equivalent inductance value of the power grid->
Figure QLYQS_120
The expression of (2) is: />
Figure QLYQS_130
；
The control module is configured to establish an adaptive control rate of the power grid equivalent inductance value and phase-locked loop bandwidth parameter selection, and to enable the real-time power grid equivalent inductance value to be displayed
Figure QLYQS_131
The feedback is carried out to the self-adaptive control rate to carry out self-adaptive stable control on the phase-locked loop type inverter, wherein the equivalent inductance value of the power grid and the bandwidth of the phase-locked loop are built>
Figure QLYQS_132
An adaptive control rate for parameter selection, comprising:
establishing a power grid impedance model under a complex vector dq coordinate system, wherein the expression of the power grid impedance model is as follows:
Figure QLYQS_133
，
in the method, in the process of the invention,
Figure QLYQS_134
resistance value of equivalent impedance of resistive grid, +.>
Figure QLYQS_135
For the equivalent inductance value of the power grid, < >>
Figure QLYQS_136
For Laplace operator>
Figure QLYQS_137
In imaginary units->
Figure QLYQS_138
Is the fundamental angular frequency;
establishing a phase-locked loop type inverter impedance model under a complex vector dq coordinate system, wherein the phase-locked loop type inverter impedance model has the following expression:
Figure QLYQS_139
，/>
Figure QLYQS_140
，
in the method, in the process of the invention,
Figure QLYQS_160
for the impedance matrix of the inverter in complex vector dq coordinate system, +.>
Figure QLYQS_162
Transformation matrix for converting real space dq coordinate system into complex vector dq coordinate system, +.>
Figure QLYQS_165
For the impedance matrix of the inverter in real space dq coordinate system,
Figure QLYQS_143
for positive sequence impedance in impedance matrix under complex vector dq coordinate system, < >>
Figure QLYQS_148
For the negative sequence impedance in the impedance matrix under complex vector dq coordinate system, < >>
Figure QLYQS_152
Is the conjugate of negative sequence impedance->
Figure QLYQS_155
Is the conjugation of positive sequence impedance, +.>
Figure QLYQS_144
Is a unitary matrix->
Figure QLYQS_146
For PCC point voltage transfer matrix,/for>
Figure QLYQS_149
For the current loop transfer matrix, ">
Figure QLYQS_153
For the PCC point current transfer matrix,
Figure QLYQS_157
for the inverter port voltage transfer matrix, +.>
Figure QLYQS_161
For the inverter filter transfer matrix, +.>
Figure QLYQS_164
For inverter grid-connected point q-axis current steady-state value, for>
Figure QLYQS_167
For the closed loop transfer function of the phase-locked loop>
Figure QLYQS_159
For the steady-state value of the d-axis current of the grid-connected point of the inverter, < + >>
Figure QLYQS_163
For the value of the inverter port q-axis voltage, +.>
Figure QLYQS_166
For the d-axis voltage value of the inverter port, +.>
Figure QLYQS_168
For the steady-state value of the voltage of the grid-connected point d axis of the inverter, < >>
Figure QLYQS_141
For Laplace operator>
Figure QLYQS_145
For parasitic resistance->
Figure QLYQS_150
For filtering inductance +.>
Figure QLYQS_156
For fundamental angular frequency, ++>
Figure QLYQS_142
Is the ratio coefficient of the current loop,
Figure QLYQS_147
for the current loop integral coefficient, +.>
Figure QLYQS_151
In imaginary units->
Figure QLYQS_154
Conjugation of transformation matrix for conversion of real space dq coordinate system into complex vector dq coordinate system,/-for real space dq coordinate system>
Figure QLYQS_158
Is the bandwidth of the phase-locked loop;
the offline calculation expression of the adaptive control rate is:
Figure QLYQS_169
，
the expression of the single-input single-output equivalent impedance of the phase-locked loop type inverter is calculated:
Figure QLYQS_170
，
therefore, under a given power grid impedance range, the self-adaptive control rate between the bandwidth of the phase-locked loop and the equivalent inductance value of the power grid is as follows:
Figure QLYQS_171
，
in the method, in the process of the invention,
Figure QLYQS_172
is margin coefficient, is at the beginning of the journey>
Figure QLYQS_173
Equivalent inductance of electric networkL g D-axis current steady state valueI d0 And d-axis voltage stabilizationState valueU d0 A stable boundary function composed of three parameters.
5. An electronic device, comprising: at least one processor, and a memory communicatively coupled to the at least one processor, wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 3.
6. A computer readable storage medium, on which a computer program is stored, characterized in that the program, when being executed by a processor, implements the method of any one of claims 1 to 3.
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