CN115662884A - GaN junction barrier Schottky diode based on secondary growth of full HVPE process and preparation method thereof - Google Patents

Abstract

The invention provides a GaN junction barrier Schottky diode based on secondary growth of a full HVPE process and a preparation method thereof, wherein the preparation method comprises the following steps: adopting HVPE process, using liquid metal gallium as Ga source, ammonia gas as N source and SiH ₄ An n-type GaN epitaxial layer is grown on the double-polished GaN monocrystal self-supporting substrate as an n-type doping source; then growing a layer of Mg ion doped p-GaN epitaxial layer, photoetching, exposing and developing the p-GaN epitaxial layer, and then etching(ii) a Then removing the photoresist, and carrying out secondary growth of the n-type GaN epitaxial layer in the etching region; and finally, preparing an ohmic electrode and a Schottky electrode to obtain the GaN junction barrier Schottky diode. The content of C impurities in the epitaxial layer is obviously reduced, and the carrier mobility of the material is effectively improved; the growth rate is high, and the method is suitable for the growth of the GaN thick film; low cost and is suitable for industrial large-scale production.

Description

GaN junction barrier Schottky diode based on secondary growth of full HVPE process and preparation method thereof

Technical Field

The invention relates to the technical field of semiconductor materials, in particular to a GaN junction barrier Schottky diode based on secondary growth of a full HVPE process and a preparation method thereof.

Background

Gallium nitride (GaN) is an important third-generation semiconductor material, and has excellent application prospect and market potential value in the fields of solid-state light sources, power electronics, microwave radio-frequency devices and the like due to the superior performances of large forbidden band width, high breakdown electric field, large heat conductivity, high electron saturation drift rate, strong radiation resistance and the like.

The vertical GaN diode has attracted great attention and is widely used because of its advantages of high voltage resistance, high temperature resistance, small size, etc. Common vertical GaN diodes are schottky diodes (SBD), PN diodes (PND), and junction barrier schottky diodes (JBS). Junction barrier schottky diodes (JBS) combine the advantages of schottky diodes and PN diodes, have high breakdown voltage and low reverse leakage, and are one of the indispensable components in GaN power devices. The conventional GaN junction barrier schottky diode (JBS) is a device fabricated on an epitaxial layer (drift layer) grown on the basis of Metal Organic Chemical Vapor Deposition (MOCVD), and the method becomes one of the most popular methods for GaN epitaxial layer growth due to advantages such as precise doping precision and thickness control, and is also a poor choice for enterprise production. However, limited by the technology, this approach presents some significant problems:

(1) The MOCVD method easily introduces unintentionally doped carbon atoms associated with deep energy levels within the bandgap of the epitaxial layer during epitaxial growth.

(2) MOCVD has a slow growth rate, and cannot grow thicker (> 20 um) GaN epitaxial layers, so that the preparation of devices with high requirements on withstand voltage cannot be met.

(3) In the process of growing GaN by the MOCVD process, trimethyl gallium (TMGa) or triethyl gallium (TEGa) serving as an organic gallium source is used as a precursor of gallium, so that the production cost is high, and the large-scale production of enterprise-level is not facilitated.

The prior art adopts Hydride Vapor Phase Epitaxy (HVPE) method to prepare epitaxial layer still has the problem that the carrier concentration is difficult to drop, and the control of the carrier is inferior to MOCVD, so that the epitaxial layer is difficult to prepare by adopting full HVPE in practical application.

In view of the above, there is a need for an improved GaN junction barrier schottky diode based on full HVPE process secondary growth and a method for fabricating the same to solve the above problems.

Disclosure of Invention

In order to overcome the defects of the prior art, the invention aims to provide a GaN junction barrier Schottky diode based on secondary growth of a full HVPE process and a preparation method thereof, wherein the content of C impurities in an epitaxial layer is obviously reduced, and the carrier mobility of the material is effectively improved; the growth rate is high, the theoretical growth speed is more than 100um/h, and the method is suitable for the growth of the GaN thick film; low cost and is suitable for industrial large-scale production.

In order to realize the aim, the invention provides a preparation method of a GaN junction barrier Schottky diode based on secondary growth of a full HVPE process, which comprises the following steps:

s1, growing an n-type GaN epitaxial layer on a double-polished GaN single crystal self-supporting substrate by adopting an HVPE (high voltage polyethylene) process; the HVPE process comprises the following steps: using liquid metal gallium as Ga source, ammonia as N source, siH ₄ As an n-type doping source, HCl-containing gas is flowed through liquid metal gallium by using inert gas to generate GaCl at 600-900 ℃; delivering n-type doping source to HVPE reaction chamber by using inert gas, and reactingDecomposing into Si and H at the room temperature of 300-1000 ℃; followed by reaction of GaCl with NH at 900-1200 deg.C ₃ Reacting with Si to obtain an n-GaN film doped with Si, and depositing the n-GaN film on the GaN monocrystal self-supporting substrate; then Mg is used as a doping agent, and p-GaN grows on the surface of the n-GaN;

s2, photoetching, exposing and developing the epitaxial layer of the device obtained in the step S1 to form a plurality of blocking areas with equal intervals;

s3, performing p-GaN etching on the device, removing the region which is not blocked by the photoresist, and then removing the photoresist;

s4, growing the n-GaN epitaxial layer again in the region etched in the step S3 by adopting an HVPE process;

and S5, preparing an ohmic electrode and a Schottky electrode on the device obtained in the step S4 to obtain the GaN junction barrier Schottky diode.

As a further improvement of the invention, in the step S1, the thickness of the n-type GaN epitaxial layer is 30-50 μm, and the carrier concentration of the n-type GaN epitaxial layer is controlled to be 0.5E16-2E16cm ^-3 To (c) to (d); the carrier concentration of the double-polished GaN single crystal self-supporting substrate is 2E18cm ^-3 。

As a further improvement of the invention, in the step S1, the carrier concentration of the p-GaN is 1E17cm ^-3 The thickness is 500nm.

As a further improvement of the invention, in step S1, the growth rate of the GaN thin film is controlled to be 5-20 μm/h, preferably 15 μm/h.

As a further improvement of the invention, the growth mode of the double-polished GaN single crystal self-supporting substrate is to rapidly grow 800um bulk GaN single crystal on a heterogeneous sapphire substrate by adopting HVPE, then strip the bulk GaN single crystal from the sapphire substrate by adopting a laser stripping mode, and finally thin the substrate to 500um by grinding and polishing.

As a further improvement of the present invention, in step S2, the pitch of each barrier region is 1 μm.

As a further improvement of the invention, in step S3, the etching comprises dry etching of the target device, ICP is used as etching equipment, and Cl is used as gas ₂ /BCl ₃ The flow rate of the mixed gas is 100sccm, the ICP source power is 1700W, the bias power is 150W, and the time is 5min.

As a further improvement of the invention, in step S4, the thickness of the regrown n-GaN epitaxial layer is the same as the thickness of the p-GaN.

As a further improvement of the invention, in step S3, the photoresist removal is dry photoresist removal, and the processing method is O ₂ plasma with O as the gas ₂ The gas flow rate was 100sccm, the power was 500W, the bias power was 100W, and the processing time was 10min.

As a further improvement of the invention, in step S5, the metals adopted by the ohmic electrode are Ti, al, ni and Au in sequence, the thicknesses of the metals are 20nm, 100nm, 25nm and 40nm respectively, and the ohmic electrode is subjected to rapid thermal annealing at 800 ℃ for 1min; the Schottky electrode is formed by sequentially plating Ni and Au metal films as Schottky electrodes of the device through a metal thermal evaporation coating instrument, and the thicknesses of the Schottky electrodes are respectively 25nm and 40nm.

The invention has the beneficial effects that:

according to the GaN junction barrier Schottky diode based on secondary growth of the full HVPE process and the preparation method thereof, the preparation of the high-performance GaN junction barrier Schottky diode is realized by strictly controlling the growth temperature of the epitaxial layer and simultaneously carrying out secondary growth and Mg ion doping. Compared with the traditional MOCVD process, the epitaxial layer has low content of C impurities in the growth process of the HVPE process, and the carrier mobility of the material is effectively improved; the growth rate is high, the theoretical growth speed is more than 100um/h, and the method is suitable for the growth of the GaN thick film; low cost and is suitable for industrial large-scale production.

Drawings

FIG. 1 is a schematic structural view of a double-parabolic GaN self-supporting substrate.

FIG. 2 is a schematic view of a preparation structure of an n-type GaN epitaxial layer.

FIG. 3 is a schematic structural diagram of a target device after photolithography.

FIG. 4 is a schematic structural diagram of a target device after p-GaN etching.

FIG. 5 is O ₂ And (5) a structural schematic diagram of the target device after plasma photoresist stripping.

FIG. 6 shows the target device after n-GaN secondary growth.

Fig. 7 is a structural diagram of a target device.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in detail below with reference to specific embodiments. It should be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and/or processing steps closely related to the scheme of the present invention are shown in the specific embodiments, and other details not closely related to the present invention are omitted.

In addition, it is also to be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

The preparation method of the GaN junction barrier Schottky diode based on the secondary growth of the full HVPE process provided by the invention comprises the following steps:

as shown in FIG. 1, the device substrate is a double-polished GaN single crystal self-supporting substrate, which is grown by rapidly growing 800um bulk GaN single crystal on a heterogeneous sapphire substrate by HVPE, then peeling the bulk GaN single crystal from the sapphire substrate by laser peeling, and finally thinning the substrate to 500um by grinding and polishing, because the part of the bottom in contact with the sapphire is in large lattice mismatch. The substrate has a carrier concentration greater than 1E18cm ^-3 The carrier concentration of the substrate adopted by the invention is 2E18cm ^-3 . The thickness of the substrate of the vertical GaN diode is 150-400 um, and the thickness of the substrate is 300um (secondary thinning after epitaxy).

Then, an N-type GaN epitaxial layer grows on the GaN self-supporting substrate, the adopted growth equipment is HVPE, liquid metal gallium is used as a Ga source, ammonia gas is used as an N source, and the reaction process of the GaN self-supporting substrate comprises the following two steps:

Ga(l)+HCl(g)→GaCl(g)+H ₂ (g) (1)

firstly, liquid metal gallium reacts with HCl (g) to generate intermediate reactant GaCl, in the process, HCl-containing gas flows through metal Ga by using inert gas, the intermediate reactant with GaCl as a gallium source is generated at 600-900 ℃, and the reaction temperature is preferably 850 +/-30 ℃ (real-time adjustment is made according to the detection environment). And then transferred to the HVPE reaction chamber. The flow rate of the inert gas is usually 100 to 1000sccm, and the flow rate of the HCl-containing gas is usually 50 to 500sccm.

Next, an n-type dopant source is delivered into the HVPE reaction chamber using an inert gas. Typically, the n-type dopant source is SiH ₄ 。SiH ₄ Can be decomposed at high temperature to form n-type doping agent Si and waste gas H ₂ So that the HVPE reaction chamber is filled with the Si doping agent. In the process, the temperature of the HVPE reaction chamber is controlled at 300-1000 ℃ and SiH is controlled ₄ The decomposition is started at 300 ℃, the decomposition is accelerated at 600 ℃, the decomposition is completely decomposed into Si and H at 1000 ℃, and the actual temperature is determined according to the detection of the growth rate and the requirement of the carrier concentration. SiH ₄ The flow rate of the gas is generally 100-300sccm.

Finally, intermediate reactants GaCl and NH ₃ The reaction generates GaN, the reaction temperature is between 900 ℃ and 1200 ℃, and the preferable temperature is 1050 +/-30 ℃ (because the HVPE reaction chamber is a quartz tube, si can be thermally decomposed due to overhigh temperature, and the carrier concentration is influenced). According to the thickness monitoring system, the growth speed and the thickness of the homoepitaxial gallium nitride film are fed back in real time, and the flow of the gallium source, the N-type doping source and the N source are adjusted, so that the growth speed of the homoepitaxial gallium nitride film is controlled to be 5-20 mu m/h, and the actual growth speed is 15 mu m/h. The carrier concentration of the n-GaN epitaxial layer is controlled to be between 0.5E16-2E16cm-3, the thickness is 40um, and the concentration is 1E16 cm-3. Subsequently, after the n-GaN growth was completed, p-GaN growth was performed, again with the HVPE apparatus selected, in a similar growth step as the n-GaN growth, with Mg as the p-type dopant. The carrier concentration of p-GaN is 1E17cm ^-3 The thickness is 500nm. The rear structure of the GaN epitaxial layer is shown in FIG. 2。

By the operation, the epitaxial layer HVPE method growth can be realized through strict control of the temperature gradient, and the thickness is controllable.

After the steps are completed, photoetching, exposing and developing are carried out on the target device, the required pattern is left on the epitaxial layer, and the distance between the P-GaN region and the n-GaN region designed by the device is the same and is 1um. And then, photoresist is used as a barrier layer to form a required shape on the epitaxial layer. The detailed steps of the photoetching are as follows: homogenizing, drying, exposing and developing. The rotating speed is 5000r/min during the photoresist homogenizing, and the thickness of the formed photoresist is about 1um. Exposure time 10s, development time 20s. The drying temperature is 100 deg.C, and the drying time is 10min. The structure is shown in fig. 3.

And after the photoetching step is finished, carrying out p-GaN etching on the device, wherein the purpose is to remove the appointed p-type drift layer (epitaxial layer) for subsequent secondary growth of n-GaN and form a JBS structure. The detailed steps of the etching are as follows: dry etching the target device with ICP as equipment and Cl as gas ₂ /BCl ₃ The flow rate of the mixed gas was 100sccm, the ICP source power was 1700W, and the bias power was 150W. The etch time depends on the desired etch depth of the target device. If the target etching depth is 500nm, the corresponding etching time is 5min. After the etching is completed, the device is acid-washed by using dilute hydrochloric acid (HCl: H) ₂ O =1:10 Its primary purpose is to remove impurities generated by the etching process and clean the device. The structure of the p-GaN etched device is shown in FIG. 4:

and after the ion implantation step is completed, carrying out photoresist removing treatment on the target device. Because the photoresist is used as a barrier layer in the ion implantation process and is denatured under the bombardment of high-energy He ion beams, a dry photoresist removing mode is adopted. The treatment method is O ₂ plasma. The apparatus used is ICP, the gas used is O ₂ The gas flow rate was 100sccm, the ICP source power was 500W, the bias power was 100W, and the process time was 10min. The structure of the device after the photoresist stripping is completed is shown in fig. 5. After the photoresist is removed, the device is acid-washed with dilute hydrochloric acid (HCl: H) ₂ O =1:10 It is mainly aimed atRemoval of O ₂ Impurities generated by the plasma process clean the device.

After all the steps are completed, secondary epitaxial growth is carried out on the target device, and the step is basically the same as the first n-GaN growth process. The thickness of the n-GaN epitaxial layer after secondary growth is consistent with that of the p-GaN and is 500nm. The structure of the target device after the secondary epitaxial growth of the n-GaN is shown in FIG. 6.

After all the steps are completed, ohmic electrode (Ohmic) and Schottky electrode (Anode) preparation is carried out on the target device. 1. Ohmic electrode: the ohmic electrode adopts metals of Ti, al, ni and Au in sequence, the thicknesses of the metals are respectively 20nm, 100nm, 25nm and 40nm (four layers of metal films are plated in sequence), and the ohmic electrode is subjected to rapid thermal annealing at 800 ℃ for 1min; the Schottky electrode is formed by sequentially plating Ni and Au metal films as Schottky electrodes of the device through a metal thermal evaporation coating instrument, and the thicknesses of the Schottky electrodes are respectively 25nm and 40nm. As shown in fig. 7.

Although the present invention has been described in detail with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the spirit and scope of the present invention.

Claims (10)

1. A preparation method of a GaN junction barrier Schottky diode based on secondary growth of a full HVPE process is characterized by comprising the following steps:

s1, growing an n-type GaN epitaxial layer on a double-polished GaN single crystal self-supporting substrate by adopting an HVPE (high voltage polyethylene) process; the HVPE process comprises the following steps: liquid metal gallium is used as Ga source, ammonia gas is used as N source, siH ₄ As an n-type doping source, HCl-containing gas is flowed through liquid metal gallium by using inert gas to generate GaCl at 600-900 ℃; conveying the n-type doping source into an HVPE reaction chamber by using inert gas, wherein the temperature of the reaction chamber is 300-1000 ℃, and decomposing into Si and H; followed by reaction of GaCl with NH at 900-1200 deg.C ₃ Reacting with Si to obtain an n-GaN film doped with Si, and depositing the n-GaN film on the GaN monocrystal self-supporting substrate; then Mg is used as a doping agent, and p-GaN grows on the surface of the n-GaN;

s2, photoetching, exposing and developing the epitaxial layer of the device obtained in the step S1 to form a plurality of blocking areas with equal intervals;

s3, performing p-GaN etching on the device, removing the region which is not blocked by the photoresist, and then removing the photoresist;

s4, adopting an HVPE process to grow the n-GaN epitaxial layer again in the region etched in the step S3;

and S5, preparing an ohmic electrode and a Schottky electrode for the device obtained in the step S4 to obtain the GaN junction barrier Schottky diode.

2. The method for preparing a GaN junction barrier Schottky diode based on secondary growth of full HVPE process according to claim 1, wherein in step S1, the thickness of the n-type GaN epitaxial layer is 30-50 μm, and the carrier concentration of the n-type GaN epitaxial layer is controlled to be 0.5E16-2E16cm ^-3 To (c) to (d); the carrier concentration of the double-polished GaN single crystal self-supporting substrate is 2E18cm ^-3 。

3. The method according to claim 1, wherein in step S1, the p-GaN has a carrier concentration of 1E17cm ^-3 The thickness is 500nm.

4. The method for preparing a GaN junction barrier Schottky diode based on secondary growth by using a full HVPE process according to claim 1, wherein in the step S1, the growth rate of the GaN thin film is controlled to be 5-20 μm/h, preferably 15 μm/h.

5. The method for preparing a GaN junction barrier Schottky diode based on secondary growth of full HVPE process according to any of claims 1-4, wherein the double-polished GaN single crystal self-supporting substrate is grown by rapidly growing 800um bulk GaN single crystal on a hetero-sapphire substrate by HVPE, then stripping it from the sapphire substrate by laser stripping, and finally thinning the substrate to 500um by grinding and polishing.

6. The method according to claim 1, wherein in step S2, the distance between each blocking region is 1 μm.

7. The method for preparing a GaN junction barrier Schottky diode based on full HVPE process secondary growth according to claim 1, wherein in step S3, the etching comprises dry etching of a target device, the etching equipment is ICP, and the etching gas is Cl ₂ /BCl ₃ The flow rate of the mixed gas is 100sccm, the ICP source power is 1700W, the bias power is 150W, and the time is 5min.

8. The method of claim 1, wherein in the step S4, the thickness of the regrown n-GaN epitaxial layer is the same as the thickness of the p-GaN.

9. The method for preparing a GaN junction barrier Schottky diode based on full HVPE process secondary growth according to claim 1, wherein in step S3, the photoresist removal is dry photoresist removal, and the processing method is O ₂ plasma, the gas used is O ₂ The gas flow rate was 100sccm, the power was 500W, the bias power was 100W, and the processing time was 10min.

10. The method for preparing a GaN junction barrier Schottky diode based on secondary growth of full HVPE process according to claim 1, wherein in step S5, the metal adopted by the ohmic electrode is sequentially Ti, al, ni and Au, the thickness of the metal is 20nm, 100nm, 25nm and 40nm respectively, and the GaN junction barrier Schottky diode is subjected to rapid thermal annealing at 800 ℃ for 1min; the Schottky electrode is formed by sequentially plating Ni and Au metal films as Schottky electrodes of the device through a metal thermal evaporation coating instrument, and the thicknesses of the Schottky electrodes are respectively 25nm and 40nm.

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