CN115642903A - Micro-power consumption clock calibration method and circuit of passive chip - Google Patents
Micro-power consumption clock calibration method and circuit of passive chip Download PDFInfo
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Abstract
According to the micro-power clock calibration method and circuit of the passive chip, the ultra-low power consumption temperature sensor is added in the chip, after the air interface calibration is finished when the chip is in a use stage, the temperature sensor detects temperature change, then the digital calibration circuit generates a compensation logic sequence according to a temperature quantization value, adjusts the magnitude of charging and discharging current, and performs secondary compensation on clock frequency, so that the frequency is stabilized in a smaller tolerance range, and a clock signal with micro-power consumption, high precision and no temperature change can be generated; by the calibration method, the internal clock of the chip is calibrated only once when the chip is taken out of the field, so that the necessary flow and workload in the actual use and test process of the chip are reduced, and the application cost is low.
Description
Technical Field
The invention belongs to the technical field of passive Internet of things ultra-low power consumption node chips, and particularly relates to a micro-power consumption clock calibration method and circuit of a passive chip.
Background
Under the development of wireless network communication technology, data technology, sensor technology and artificial intelligence technology, the internet of things technology develops towards a passive internet of things, and the passive internet of things becomes the current hotspot technology due to the characteristics of micro power consumption, self power supply, low cost and low area.
The active internet of things is upgraded to the passive internet of things, the bottleneck problem to be solved is the passivity of the terminal node, the wireless energy in the surrounding environment is collected by using a wireless energy collection technology, and a working power supply is provided for the chip; meanwhile, communication data are transmitted wirelessly, so that the passive Internet of things can realize energy-carrying communication or data and energy simultaneous transmission, the cost, the volume and the power consumption of the terminal are greatly reduced, and the application scene of the node is widened and the data volume of the node is increased.
In the implementation process, the passive internet of things super-requirement passive node chip supports micro power consumption, is low in cost, high in integration and clock precision can meet requirements of communication protocol parameters, a digital baseband in the chip comprises a protocol processing module, a clock signal required in normal work is provided by an internal integrated clock of the chip instead of an external crystal oscillator of the chip under the condition of micro power consumption self-power supply, the internal clock of the chip is influenced by different production and manufacturing batches, temperatures and the like, the provided clock frequency has large offset, the micro power consumption and high precision requirements of the passive node chip in communication cannot be met, and particularly the communication requirements of being compatible with relays of current commercial networks such as BLE and WiFi and the like.
Aiming at the problem of large clock frequency deviation generated by a chip internal clock, various high-precision clock generation methods and circuits are proposed in the market at present, and the methods can be specifically divided into the following two categories. The second method reduces the frequency error caused by the internal clock structure of the chip by improving the internal clock structure of the chip and adopting a positive and negative temperature coefficient compensation mode so as to improve the clock frequency precision.
The first clock calibration method needs to be externally connected with a precise clock signal as a reference, and after the internal clock of the chip is calibrated, the internal clock of the chip can meet the requirement of high precision. The frequency deviation caused by the temperature and the process during production can be counteracted only by adopting an off-chip real-time calibration mode before the chip internal clock is used and tested each time, so that the necessary flow and workload in the actual use and test process of the chip are increased, and the application cost is high; in addition, the internal clock of the chip is calibrated by the calibration method, the chip must have an interface compatible with a commercial air interface protocol, and for a passive node chip without the interface, the clock cannot be calibrated by the calibration method. In conclusion, the conventional clock calibration technical scheme cannot be widely applied to the field of highly integrated and low-cost passive internet of things;
the second clock calibration method is to improve the structure of the clock in the chip, usually adopt a positive and negative temperature coefficient compensation mode, but the structure is more complex, and the positive and negative temperature coefficients have nonlinearity, so that it is difficult to realize more accurate offset compensation in a full temperature section or a long temperature section, therefore, the temperature compensation effect is limited, the process deviation is large, and the compensation precision can be reduced; in addition, the method based on positive and negative temperature coefficient compensation has lower energy efficiency, the commonly applied clock frequency is in a KHz range, and can have lower power consumption, once the clock frequency rises, the power consumption is obviously increased along with the frequency according to a linear relation, when the frequency reaches a MHz range, the power consumption can be increased by several orders of magnitude, and the method is difficult to be applied to passive chip occasions where the clock frequency (more than several MHz) and the power consumption (submicrowatt) both require higher, such as passive RFID, novel passive BLE, passive WIFI or other on-chip clock source occasions with certain requirements on communication speed.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a micro-power clock calibration method and circuit of a passive chip. The technical problem to be solved by the invention is realized by the following technical scheme:
the invention provides a micro-power clock calibration method of a passive chip, which is applied to the passive chip, wherein the passive chip comprises an RC oscillator circuit, a memory circuit and a digital calibration circuit, and is characterized in that a temperature sensor is integrated in the passive chip, and the micro-power clock calibration method of the passive chip comprises the following steps:
in the air interface calibration stage, the calibration process is carried out,
the digital calibration circuit is used for generating a calibration logic sequence and sending the calibration logic sequence to the RC oscillator circuit so as to control the turn-off or turn-on of part of transistors of a current branch of the RC oscillator circuit to realize air interface calibration and store the calibration logic sequence into the memory circuit;
the temperature sensor is used for detecting the internal temperature of the passive chip and storing the internal temperature into the memory circuit;
in the stage of use, the liquid is,
the memory circuit is used for sending the internal temperature stored in the air interface calibration stage and the calibration logic sequence to the digital calibration circuit;
the temperature sensor is used for detecting the internal temperature of the passive chip and transmitting the internal temperature to the digital calibration circuit;
the digital calibration circuit is used for making a difference between the internal temperature stored in the memory and the internal temperature directly transmitted by the temperature sensor, generating a compensation logic sequence according to the internal temperature difference obtained by making the difference, and sending the compensation logic sequence and the calibration logic sequence to the RC oscillator circuit;
and the RC oscillator circuit is used for controlling the transistor of the current branch circuit of the RC oscillator circuit to be switched off or switched on according to the calibration logic sequence and the compensation logic sequence, so that the influence of temperature change on the internal clock frequency of the passive chip is compensated in a manner of controlling the current magnitude of the current branch circuit.
Optionally, the digital calibration circuit is configured to generate a calibration logic sequence and send the calibration logic sequence to the RC oscillator circuit, so as to control a part of transistors of a current branch of the RC oscillator circuit to be turned off or turned on, so as to implement air interface calibration, and store the calibration logic sequence in the memory circuit includes:
the digital calibration circuit is used for receiving an external clock transmitted through an air interface, taking each clock period of the external clock as a reference period, counting the rising edges of the clock generated by the RC oscillator circuit in the reference period, subtracting the counting result from a preset logic value, counting the positive difference obtained by subtracting, accumulating the positive difference value of each reference period, and generating the RC oscillator circuit which is used for controlling the turn-off or turn-on of part of transistors of the current branch circuit according to the calibration logic sequence.
Optionally, the output of the temperature sensor is connected to the input of the memory circuit and the input of the digital calibration circuit, the output of the memory circuit is connected to the input of the digital calibration circuit, and the output of the digital calibration circuit is connected to the input of the memory and the input of the RC oscillator circuit.
Optionally, the RC oscillator circuit includes a current branch and an RS flip-flop, where the current branch includes a plurality of transistors and a charge and discharge capacitor;
the RC oscillator circuit is configured to control a transistor of a current branch of the RC oscillator circuit to be turned off or turned on according to the calibration logic sequence and the compensation logic sequence, so as to control a current of the current branch, and compensating an influence of a temperature change on an internal clock frequency of the passive chip includes:
and the RC oscillator circuit is used for controlling the transistor of the current branch of the RC oscillator circuit to be switched off or switched on according to the calibration logic sequence and the compensation logic sequence so as to charge or discharge the charge-discharge capacitor, thereby changing the current magnitude of the current branch and compensating the influence of temperature change on the internal clock frequency of the passive chip.
Optionally, the digital calibration circuit subtracts an internal temperature P1 stored in the internal memory from an internal temperature P2 directly transmitted by the temperature sensor, so as to obtain an internal temperature difference Δ P;
the internal temperature difference Δ P is related to the current change Δ I of the branch circuit in the RC oscillator circuit by:
wherein, the first and the second end of the pipe are connected with each other,
c is the capacitance value of the equivalent capacitor in the RC oscillator circuit, the numerical value of V is 2 times of the turnover voltage of the RC oscillator, and f is the internal clock frequency of the passive chip.
Optionally, the digital calibration circuit includes: a counter 1, a counter 2, a subtracter and an adder,
in the air interface calibration stage, the calibration process is carried out,
the counter 1 is configured to receive an external clock transmitted through an air interface, use each clock cycle of the external clock as a reference cycle, and count clock rising edges generated by the RC oscillator circuit in the reference cycle;
the logic unit is used for subtracting the counting result of the counter 1 from a preset logic value;
the counter 2 is used for counting the positive difference value obtained by subtracting the counter 1;
the adder is used for accumulating the positive difference value of each reference period to generate a calibration logic sequence;
in the stage of use, the liquid is,
the subtracter is used for making a difference between the internal temperature stored in the memory and the internal temperature directly transmitted by the temperature sensor, generating a compensation logic sequence according to the internal temperature difference obtained by making the difference, and sending the compensation logic sequence to the RC oscillator circuit.
The invention provides a micro-power consumption clock calibration circuit of a passive chip, which is calibrated by using the micro-power consumption clock calibration method of the passive chip.
1. According to the micro-power clock calibration method and circuit of the passive chip, the ultra-low power consumption temperature sensor is added in the chip, after the air interface calibration is finished when the chip is in a use stage, the temperature sensor detects temperature change, then the digital calibration circuit generates a compensation logic sequence according to a temperature quantization value, adjusts the magnitude of charging and discharging current, and performs secondary compensation on clock frequency, so that the frequency is stabilized in a smaller tolerance range, and a clock signal with micro-power consumption, high precision and no temperature change can be generated; by the calibration method, the internal clock of the chip is calibrated only once when the chip is out of field, so that the necessary flow and workload in the actual use and test process of the chip are reduced, and the application cost is low;
2. compared with the prior art, the clock frequency is usually in the KHz range, once the clock frequency rises, the power consumption is obviously increased, and the high energy efficiency ratio can not be realized in the MHz range; the calibration and generation of the micro-power consumption and high-precision clock are all realized by an analog front-end circuit in a chip, a digital baseband circuit is not involved, the whole implementation scheme is simple, the energy efficiency ratio of the circuit is high, the clock frequency can reach MHz level, and the whole power consumption is in submicron level;
3. the calibration method adopts a temperature compensation mode, the internal clock of the chip only needs to carry out initialization air interface calibration once after the chip is packaged, and an interface compatible with a commercial air interface is avoided, so that the method can be widely applied to a passive Internet of things chip with high integration and low cost; in addition, when the chip is used and tested, the frequency is secondarily compensated through the temperature compensation module, and the calibration is carried out without externally connecting an accurate clock as a reference when the chip is used and tested every time, so that the necessary processes and workloads in the actual use and test process of the chip are reduced, and the application cost is low;
4. the method for calibrating the clock in the chip does not need any external component, has high integration level, adopts the original RC oscillator in the chip, does not need to change the original internal structure of the chip, and simplifies the clock structure; and the RC oscillator has high energy efficiency ratio when the calibration method of the invention is used, so the cost of the chip and the application cost of the system are low.
The present invention will be described in further detail with reference to the drawings and examples.
Drawings
Fig. 1 is an internal schematic diagram of a passive chip to which a micro power consumption clock calibration method of the passive chip according to the present invention is applied;
FIG. 2 is a schematic process diagram of a micro-power clock calibration method for a passive chip according to the present invention;
FIG. 3 is a schematic diagram of an RC oscillator circuit according to an embodiment of the present invention;
FIG. 4 is a block diagram of a digital calibration circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a temperature sensor configuration according to an embodiment of the present invention;
FIG. 6 is a simulation diagram of the effect of temperature on clock frequency according to an embodiment of the present invention;
fig. 7 is a graph of the expected effect of an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
The invention provides a micro-power clock calibration method of a passive chip, which is applied to the passive chip, wherein a temperature sensor is integrated in the passive chip, referring to fig. 1, the passive chip comprises an RC oscillator circuit, a memory circuit and a digital calibration circuit, and the digital calibration circuit comprises: the temperature sensor comprises a counter 1, a logic unit, a counter 2, a subtracter and an adder, wherein the output of the temperature sensor is respectively connected with the input of a memory circuit and the input of a digital calibration circuit, the output of the memory circuit is connected with the input of the digital calibration circuit, and the output of the digital calibration circuit is connected with the input of the memory and the input of the RC oscillator circuit. The RC oscillator circuit comprises a current branch circuit and an RS trigger, wherein the current branch circuit comprises a plurality of transistors and charging and discharging capacitors.
It is worth mentioning that: the temperature sensor integrated in the passive chip is a low-power consumption temperature sensor, and the power consumption of the temperature sensor is below a microwatt level.
Referring to fig. 2, a micro power consumption clock calibration method for a passive chip provided by the present invention includes:
in the air interface calibration stage, the calibration process is carried out,
the digital calibration circuit is used for generating a calibration logic sequence and sending the calibration logic sequence to the RC oscillator circuit, controlling the turn-off or turn-on of part of transistors of a current branch of the RC oscillator circuit so as to realize air interface calibration, and storing the calibration logic sequence into the memory circuit;
further, the digital calibration circuit is configured to receive an external clock transmitted through an air interface, count rising edges of a clock generated by the RC oscillator circuit in a reference period using each clock period of the external clock as the reference period, perform a difference between a count result and a preset logic value, count a positive difference value obtained by the difference, accumulate the positive difference value in each reference period, and generate the RC oscillator circuit, which is configured to control a part of transistors of its current branch to be turned off or turned on according to the calibration logic sequence.
After a chip is packaged, when logic calibration (air interface calibration) starts, initializing a chip internal clock, wherein the clock frequency is the maximum, then taking an external precision clock as a reference period of the frequency calibration process of an internal RC oscillator clock circuit by the chip, sampling and counting the rising edge of the clock by a counter 1 in a digital calibration circuit in each calibration period, comparing the sampled value with a subsequent logic value K, when the sampled value is greater than K, starting counting by a counter 2, and taking the counted value as a digital signal for controlling the current branch circuit to be switched off, thereby generating a new clock frequency, and ending the period; in the next calibration period, the above process is repeated, and only the value counted by the counter 2 is added by the adder circuit and the count value of the previous counter 2 and is applied to the current branch circuit for control until the count value sampled by the counter 1 is equal to the logic value K, an enable signal is output, the calibrated logic number sequence and the temperature P1 during calibration are stored in the memory circuit, and the calibration process is completed.
Further, in the air interface calibration stage,
the counter 1 is configured to receive an external clock transmitted through an air interface, use each clock cycle of the external clock as a reference cycle, and count rising edges of a clock generated by the RC oscillator circuit in the reference cycle;
the logic unit is used for subtracting the counting result of the counter 1 from a preset logic value;
it is worth mentioning that: the logic unit is composed of an AND gate, an OR gate, a NOT gate and the like and is used for forming a logic value K, and when the count value of the counter 1 is larger than K, the counter 2 starts counting.
The counter 2 is used for counting the positive difference value obtained by subtracting the counter 1;
the adder is used for accumulating the positive difference value of each reference period to generate a calibration logic sequence;
it is worth mentioning that: the adder is used for sampling and counting rising edges of the clock in a fixed period and outputting corresponding logic sequences N0, N1, N.
It is worth mentioning that: in the air interface calibration stage, a one-way calibration mode is adopted, namely, all current branches in an RC oscillator clock circuit in a chip are conducted initially, and the clock frequency reaches the highest value; an external precision clock provides a precision clock signal which is used as a fixed period U when the counter 1 in the digital calibration circuit works and counts; the counter 1 counts the rising edge of a clock output frequency signal of the internal RC oscillator in a period U, when the count value is greater than K, the counter 2 starts counting in the same period U, the counted output value is used as a control signal to turn off a part of current branches, so that the clock frequency is reduced, and the first period U is finished; when a second period U comes, the counter 1 continues to perform rising edge detection on the clock signal after the first calibration, when the counting value is greater than a logic value K, the counter 2 starts to count, the counted output value is superposed on the last output value through the adder, a part of current branches are jointly switched off, and the clock frequency continues to be reduced; when a third period U, a fourth period U and a.once.once.a.cycle U come, repeating the process until the count value of the counter 1 is equal to K, outputting an enable signal, closing the digital calibration clock circuit, simultaneously storing a logic sequence generated by the digital calibration circuit and a chip temperature signal P1 acquired by the temperature sensor into the memory circuit, finishing the calibration process, and finishing the calibration of clock deviation caused by the process;
the temperature sensor is used for detecting the internal temperature of the passive chip and storing the internal temperature into the memory circuit;
in the stage of use, the liquid is,
the memory circuit is used for sending the internal temperature stored in the air interface calibration stage and the calibration logic sequence to the digital calibration circuit;
it is worth mentioning that: after the frequency of an RC oscillator clock circuit in a chip is calibrated by a chip ex-factory external precision clock through a digital calibration circuit, namely after an air interface calibration stage is completed, a digital signal P1 output after the temperature sensor is quantized and a logic sequence generated by the first calibration of the digital calibration circuit are stored by a memory; when the chip is actually used and tested, the internal temperature P1 and the logic sequence stored in the air interface calibration stage are sent to the digital calibration circuit for processing.
The temperature sensor is used for detecting the internal temperature of the passive chip and transmitting the internal temperature to the digital calibration circuit;
it is worth mentioning that: the temperature sensor circuit comprises a forward bias diode structure, two loop oscillators, a frequency division circuit and a counter which are connected by a PNP transistor, wherein the voltage Vbe and the reference voltage Vref of the PNP transistor are respectively used as the input of the two loop oscillators as comparison voltages to charge and discharge a capacitor through the loop oscillators to generate periodic signals T1 and T2, and the periodic signal T1 is converted into a periodic signal T2 by 2 n Generating an enable signal EN after frequency division is multiplied, wherein the enable signal EN is used for a control signal of a counter, and n represents the number of frequency division bits; the periodic signal T2 is used as a clock signal of the counter; and finally, quantizing the obtained frequency signal into a digital signal P as output.
The digital calibration circuit is used for making a difference between the internal temperature stored in the memory and the internal temperature directly transmitted by the temperature sensor, generating a compensation logic sequence according to the internal temperature difference obtained by making the difference, and sending the compensation logic sequence and the calibration logic sequence to the RC oscillator circuit;
the digital calibration circuit is used for subtracting the internal temperature P1 stored in the internal memory from the internal temperature P2 directly transmitted by the temperature sensor to obtain an internal temperature difference value delta P;
the internal temperature difference Δ P is related to the current change Δ I of the branch circuit in the RC oscillator circuit by:
wherein the content of the first and second substances,
c is the capacitance value of the equivalent capacitor in the RC oscillator circuit, the numerical value of V is 2 times of the turnover voltage of the RC oscillator, and f is the internal clock frequency of the passive chip.
Further, in the use stage,
the subtracter is used for making a difference between the internal temperature stored in the memory and the internal temperature directly transmitted by the temperature sensor, generating a compensation logic sequence according to the internal temperature difference obtained by making the difference, and sending the compensation logic sequence to the RC oscillator circuit.
It is worth mentioning that: when the chip is used, the digital signal P2 quantized by the temperature sensor is subtracted from the digital signal P1 stored in the memory circuit to generate delta P.
And the RC oscillator circuit is used for controlling the transistor of the current branch of the RC oscillator circuit to be switched off or switched on according to the calibration logic sequence and the compensation logic sequence, so that the influence of temperature change on the internal clock frequency of the passive chip is compensated in a mode of controlling the current size of the current branch.
The RC oscillator circuit is used for charging or discharging the charging and discharging capacitor, so that the current magnitude of the current branch circuit is changed, and the influence of temperature change on the internal clock frequency of the passive chip is compensated.
Wherein, the current branches are respectively 1, 2, n and the on-off of the digital calibration circuit is directly controlled by a multi-bit logic sequence of the digital calibration circuit.
It is worth mentioning that: when the chip is actually used and tested, the temperature sensor in the circuit automatically detects the temperature and quantizes to generate a temperature quantized signal P2, then the P2 is sent to the digital calibration circuit, the memory circuit simultaneously sends a calibration logic sequence and the temperature P1 in a logic calibration stage to the digital calibration circuit, a subtracter in the digital calibration circuit performs subtraction calculation on the P1 and the P2 to generate and output a temperature difference signal delta P (delta P = P2-P1), when the delta P is positive, the temperature is increased, the control switch-off part compensates the logic array, and the clock frequency is reduced; when the delta P is negative, the temperature is reduced, the partial compensation logic array is controlled to be opened, the clock frequency is increased, the frequency reaches the frequency error range in the previous calibration, and the frequency compensation process is finished. According to the method, after one-time logic calibration, when the chip is actually used and tested, the temperature change is detected through the temperature sensor inside the chip, and a signal is fed back to compensate and adjust the current, so that the purpose of reducing the frequency error is achieved, the influence of the temperature on the output frequency of the clock inside the chip after calibration is compensated, meanwhile, an external precision clock is not needed to be calibrated when the chip is used and tested every time, the necessary flow and workload in the actual use and test process of the chip are reduced, and the application cost and the system cost are greatly reduced.
Referring to fig. 3, the adjustable current branch circuit is used for continuously charging and discharging the capacitors C1 and C2, and simultaneously feeding back the charges and discharges to the switch control oscillator through the RS flip-flop, so that a clock period is generated, the output frequency and the capacitance (C1 = C2), the comparator flip voltage are inversely proportional to the charging current, and the clock frequency can be adjusted by adjusting the current of the current branch circuit.
Example 1:
the digital calibration circuit, with reference to fig. 4, is made up of two parts: a digital calibration unit and a digital compensation unit. The digital calibration unit is used for connecting the crystal oscillator and the RC oscillator, processing frequency deviation and finally achieving the effect of calibrating clock frequency; the digital compensation unit is composed of a subtracter and is used for analyzing and processing the temperature difference, generating a compensation logic sequence and adjusting a current branch in the RC oscillator so as to achieve the purpose of compensating the frequency.
And the temperature sensor, referring to fig. 5, is used for connecting the memory circuit and the digital calibration circuit, detecting the chip temperature during calibration and the chip temperature during actual use of the chip, then storing the temperature information into the memory circuit and sending the temperature information to the digital calibration circuit for temperature compensation of frequency.
The memory circuit is used for connecting the temperature sensor and the digital calibration circuit, storing the calibrated calibration logic sequence and the temperature information during calibration, and sending the calibration logic sequence and the temperature information to the digital calibration circuit for use or processing when the chip is used.
For the expected effect achievable with the temperature quadratic compensation, the minimum current relationship corresponding to the analysis and a bit compensation logic array is given as follows:
firstly, other internal modules of chips such as REF and LDO are included, and the influence of temperature on the clock frequency caused by the fact that the internal modules act together with an RC oscillator is systematically analyzed:
according to the line ab in fig. 6, the curve of the relationship between the clock frequency and the temperature shows that the temperature affects the clock frequency to be compensated approximately in a proportional linear relationship, so a first-order linear compensation method can be used, the temperature secondary compensation mentioned in the present scheme is a compensation method of first-order linear coupling, the sampling relationship of the temperature sensor to the temperature is shown in the line cd in fig. 6, the frequency and the temperature are highly linearly related, and therefore, the clock offset caused by the temperature can be compensated to an error tolerance range by a temperature detection method, which shows that the method can realize the compensation of the effect of the temperature change on the clock frequency inside the chip after the logic calibration, and the system can introduce a nonlinear calibration error, and the error value is far less than 0.5%.
The idealized slope has
By
To obtain
Wherein, C is the capacitance value of the equivalent capacitor in the RC oscillator circuit, and the value of V is 2 times of the turnover voltage of the RC oscillator, namely is slightly smaller than the voltage VDD of the clock oscillator.
By
To obtain
Bringing the formula (1-1) and the formula (1-3) into the formula (1-5) to obtain
That is, when designing the clock frequency deviation adjusted to compensate for the temperature change, the ratio of Δ P and Δ I can be considered with reference to the following relationship.
Further, example 2 illustrates the process performed on the temperature compensation portion with reference to example 1.
As shown in fig. 7, the frequency of the clock is calibrated at T1 ℃ (point a), and the calibration logic sequence and the temperature (T1 =20 ℃) at this time are stored in the memory circuit after the calibration.
When the chip is used:
in the first case, when the temperature reaches T2 ℃ (T2 =80 ℃) (point C), the temperature sensor sends the temperature T2 at this time to the digital calibration circuit, the memory circuit sends the calibration logic sequence and the temperature T1 to the digital calibration circuit, a subtractor in the digital calibration circuit processes T1 and T2 to generate Δ T (Δ T = T2-T1), a compensation logic sequence is generated by using an expression (1-7) as a reference according to the value of Δ T, the magnitude of current for charging and discharging a capacitor is reduced, and the frequency reaches point E from point C;
in case two, when the temperature reaches T3 ℃ (T3 =0 ℃) (point C), the temperature sensor sends the temperature T3 at this time to the digital calibration circuit, the memory circuit sends the calibration logic sequence and the temperature T1 to the digital calibration circuit, a subtractor in the digital calibration circuit processes T1 and T3 to generate Δ T (Δ T = T3-T1), a compensation logic sequence is generated by using an equation (1-7) as a reference according to the value of Δ T, the magnitude of current for charging and discharging the capacitor is reduced, and the frequency reaches point D from point B;
in case three, the temperature is exactly the frequency T1 ℃ at calibration, where Δ T is 0 and the frequency is unchanged.
Through the three situations, the frequency downward deviation, the frequency upward deviation and the frequency invariance can be divided, and meanwhile, the working process and the working method are explained, and as shown in fig. 7, the conversion from the curve BAC to the curve DAE fully shows the expected frequency compensation effect. (the two dotted lines shown in FIG. 7 represent the upper and lower limits of the allowable deviation after frequency compensation, and the frequency error within the limits is. + -. 0.5%)
The invention compensates the internal clock frequency according to the linear relation of temperature, frequency and current by adding the temperature sensor in the chip, and the temperature compensation process is the following in the using stage process:
after the temperature sensor starts working, the temperature sensor detects the temperature of the chip at the moment, the acquired temperature signal P2 is sent to the digital calibration circuit, meanwhile, the memory circuit sends the temperature signal P1 and the logic sequence which are stored when the logic calibration is finished to the digital calibration circuit, a subtracter in the digital calibration circuit carries out subtraction operation on the P1 and the P2 to generate delta P (delta P = P2-P1), the delta P is used as a compensation logic sequence and directly controls the turn-off or the turn-on of part of current branches, when the temperature is biased upwards, the delta P is positive, the clock frequency is increased, part of current branch switches are closed, and the current is reduced by delta I, so that the frequency is reduced; when the temperature is biased downwards, the delta P is negative, the clock frequency is reduced, part of current branch switches are turned on, the current is increased by delta I, the frequency is increased, the output frequency of the RC oscillator is finally adjusted to be within the frequency tolerance range, and the frequency error is not more than +/-0.5% as can be known from experiments.
The invention provides a micro-power clock calibration circuit of a passive chip, which is calibrated by using a micro-power clock calibration method of the passive chip. Calibration circuit referring to fig. 1, the calibration process is compared with the calibration method of the present invention, and will not be described in detail here.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
While the present application has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed application, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (7)
1. A micro-power clock calibration method of a passive chip is applied to the passive chip, the passive chip comprises an RC oscillator circuit, a memory circuit and a digital calibration circuit, and is characterized in that a temperature sensor is integrated in the passive chip, and the micro-power clock calibration method of the passive chip comprises the following steps:
in the air interface calibration stage, the calibration process is carried out,
the digital calibration circuit is used for generating a calibration logic sequence and sending the calibration logic sequence to the RC oscillator circuit so as to control the turn-off or turn-on of part of transistors of a current branch of the RC oscillator circuit to realize air interface calibration and store the calibration logic sequence into the memory circuit;
the temperature sensor is used for detecting the internal temperature of the passive chip and storing the internal temperature into the memory circuit;
in the stage of use, the liquid is,
the memory circuit is used for sending the internal temperature stored in the air interface calibration stage and the calibration logic sequence to the digital calibration circuit;
the temperature sensor is used for detecting the internal temperature of the passive chip and transmitting the internal temperature to the digital calibration circuit;
the digital calibration circuit is used for subtracting the internal temperature stored in the memory from the internal temperature directly transmitted by the temperature sensor, generating a compensation logic sequence according to the internal temperature difference obtained by subtracting, and sending the compensation logic sequence and the calibration logic sequence to the RC oscillator circuit;
and the RC oscillator circuit is used for controlling the transistor of the current branch circuit of the RC oscillator circuit to be switched off or switched on according to the calibration logic sequence and the compensation logic sequence, so that the influence of temperature change on the internal clock frequency of the passive chip is compensated in a manner of controlling the current magnitude of the current branch circuit.
2. The method according to claim 1, wherein the digital calibration circuit is configured to generate a calibration logic sequence and send the calibration logic sequence to the RC oscillator circuit, so as to control a part of transistors of a current branch of the RC oscillator circuit to be turned off or on, so as to implement air interface calibration, and the storing the calibration logic sequence in the memory circuit comprises:
the digital calibration circuit is used for receiving an external clock transmitted through an air interface, taking each clock period of the external clock as a reference period, counting the rising edges of the clock generated by the RC oscillator circuit in the reference period, subtracting the counting result from a preset logic value, counting the positive difference value obtained by subtracting, accumulating the positive difference value of each reference period, and generating the RC oscillator circuit which is used for controlling the turn-off or turn-on of partial transistors of the current branch circuit according to the calibration logic sequence.
3. The method of claim 1, wherein the temperature sensor output is connected to the input of a memory circuit and the input of a digital calibration circuit, the output of the memory circuit is connected to the input of the digital calibration circuit, and the output of the digital calibration circuit is connected to the input of the memory and the input of the RC oscillator circuit.
4. The clock calibration method for micropower of a passive chip of claim 1, wherein the RC oscillator circuit comprises a current branch and an RS flip-flop, the current branch comprises a plurality of transistors and a charging and discharging capacitor;
the RC oscillator circuit is configured to control a transistor of a current branch of the RC oscillator circuit to turn off or turn on according to the calibration logic sequence and the compensation logic sequence, so as to control a current of the current branch, and compensating an influence of a temperature change on an internal clock frequency of the passive chip includes:
and the RC oscillator circuit is used for controlling the transistor of the current branch of the RC oscillator circuit to be switched off or switched on according to the calibration logic sequence and the compensation logic sequence so as to charge or discharge the charge-discharge capacitor, thereby changing the current magnitude of the current branch and compensating the influence of temperature change on the internal clock frequency of the passive chip.
5. The clock calibration method for micropower consumption of a passive chip according to claim 1, wherein the digital calibration circuit obtains an internal temperature difference Δ P by subtracting an internal temperature P1 stored in the internal memory from an internal temperature P2 directly transmitted by the temperature sensor;
the internal temperature difference Δ P is related to the current change Δ I of the branch circuit in the RC oscillator circuit by:
wherein the content of the first and second substances,
c is the capacitance value of the equivalent capacitor in the RC oscillator circuit, the numerical value of V is 2 times of the turnover voltage of the RC oscillator, and f is the internal clock frequency of the passive chip.
6. The micro-power clock calibration method of the passive chip according to claim 1, wherein the digital calibration circuit comprises: a counter 1, a counter 2, a subtracter and an adder,
in the air interface calibration stage, the calibration process is carried out,
the counter 1 is configured to receive an external clock transmitted through an air interface, use each clock cycle of the external clock as a reference cycle, and count clock rising edges generated by the RC oscillator circuit in the reference cycle;
the logic unit is used for subtracting the counting result of the counter 1 from a preset logic value;
the counter 2 is used for counting positive difference values obtained by subtracting the counter 1;
the adder is used for accumulating the positive difference value of each reference period to generate a calibration logic sequence;
in the stage of use, it is preferred that,
and the subtracter is used for subtracting the internal temperature stored in the memory from the internal temperature directly transmitted by the temperature sensor, generating a compensation logic sequence according to the internal temperature difference obtained by subtracting, and sending the compensation logic sequence to the RC oscillator circuit.
7. A micro power consumption clock calibration circuit of a passive chip, characterized in that the calibration is carried out by using the micro power consumption clock calibration method of the passive chip of any one of claims 1 to 6.
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| CN118157631A (en) * | 2024-05-13 | 2024-06-07 | 杭州胜金微电子有限公司 | Digital temperature compensation calibration method, controller and calibration circuit for real-time clock |
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