CN115632614A - Low-power-consumption gate drive circuit - Google Patents
Low-power-consumption gate drive circuit Download PDFInfo
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- CN115632614A CN115632614A CN202211326385.1A CN202211326385A CN115632614A CN 115632614 A CN115632614 A CN 115632614A CN 202211326385 A CN202211326385 A CN 202211326385A CN 115632614 A CN115632614 A CN 115632614A
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
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- H—ELECTRICITY
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- H—ELECTRICITY
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Abstract
The invention discloses a low-power-consumption gate driving circuit, and relates to the technical field of power management. The driving circuit comprises a first amplifier, a second amplifier, a small fetching module and a voltage control module; according to the invention, the slope signal input by the positive input end of the first amplifier controls the first voltage signal output by the small module to slowly rise, and the voltage control module is used for adjusting the grid voltage of the target transistor according to the voltage signal, so that the starting rising slope of the grid voltage of the target transistor can be controlled, the slow starting of the transistor is realized, when the output voltage of the power supply output end is equal to the voltage of the negative input end of the second amplifier, the small module is used for keeping the second voltage signal output by the second amplifier unchanged, and the voltage control module further controls the grid voltage of the target transistor to keep unchanged according to the second voltage signal, so that the stable operation of the target transistor and the protection of the grid are realized, and the power consumption of the circuit is reduced.
Description
Technical Field
The invention relates to the technical field of power management, in particular to a low-power-consumption gate driving circuit.
Background
In the prior art, an analog transistor is usually used to transmit signals or power between an input and an output, and the transistor needs a corresponding gate driving circuit to control the transistor to be turned on and off. When the grid control circuit controls the grid source voltage of the transistor to be greater than the threshold voltage, the transistor is conducted; and when the grid control circuit controls the grid source voltage of the transistor to be smaller than the threshold voltage, the transistor is turned off.
When a target transistor is required to be conducted in operation, a signal at an enabling end of an oscillator module is high, the oscillator module outputs a square wave with fixed frequency at the moment, the square wave can control a charge pump module connected with the oscillator module to generate a voltage higher than the output voltage to a grid electrode of the target transistor, and the voltage is finally fixed at a stable voltage by a clamping diode to keep the target transistor to have a stable grid-source voltage; when the target transistor is required to be turned off, the signal of the enabling end is low, the oscillator module and the charge pump module are both turned off, the NMOS transistor pulls down the grid electrode, and the grid source voltage of the target transistor is lower than 0, so that the target transistor is turned on and turned off.
However, the conventional gate driver generally has the following problems:
1. when the target transistor is turned on, a large current is easily generated across the target transistor and the input. 2. The gate-source voltage of the target transistor is stabilized by a clamping diode, and the voltage of the clamping diode can change along with factors such as process, temperature and the like, so that the gate-source voltage is inaccurate. 3. The power consumption of the oscillator module and the charge pump module is large.
Disclosure of Invention
The invention aims to provide a low-power-consumption gate driving circuit which can realize slow start and stable operation of a transistor and protection of a gate and reduce the power consumption of the circuit by adjusting the voltage of the gate.
In order to achieve the purpose, the invention provides the following scheme:
a low power consumption gate drive circuit comprising: the device comprises a first amplifier, a second amplifier, a small fetching module and a voltage control module;
the negative electrode input end of the first amplifier is connected with the grid electrode of the target transistor; the positive electrode input end of the first amplifier is used for inputting a ramp signal; the output end of the first amplifier is connected with the input end of the small-size fetching module; the first amplifier is used for outputting a first voltage signal;
the negative electrode input end of the second amplifier is connected with the grid electrode of the target transistor; the positive electrode input end of the second amplifier is connected with the source electrode of the target transistor; the output end of the second amplifier is connected with the input end of the small fetching module; the second amplifier is used for outputting a second voltage signal;
the output end of the small fetching module is connected with the input end of the voltage control module; the first output end of the voltage control module is connected with the grid electrode of the target transistor; the second output end of the voltage control module is connected with the source electrode of the target transistor; the source electrode of the target transistor is also connected with the power supply output end; the drain electrode of the target transistor is connected with the power supply input end;
when the circuit is started, the small-taking module takes the first voltage signal as output, and the first voltage signal is gradually increased along with the increase of the ramp signal; the voltage control module controls the grid voltage of the target transistor to gradually increase according to the first voltage signal output by the small-size fetching module, and when the grid voltage exceeds a voltage threshold value, the target transistor is conducted;
after the target transistor is turned on, the small-fetching module takes the first voltage signal as output, the first voltage signal is gradually increased along with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor and the output voltage of the power output end to be gradually increased according to the first voltage signal output by the small-fetching module, and when the output voltage is equal to the input voltage of the power input end, the output voltage is kept unchanged;
after the output voltage is kept unchanged, when the voltage of the negative electrode input end of the second amplifier is equal to the output voltage, the small-taking module takes the second voltage signal as output, the second voltage signal is kept unchanged, and the voltage control module controls the grid voltage of the target transistor to be kept unchanged according to the second voltage signal.
Optionally, the method further comprises: a pull-down voltage module;
one end of the pull-down voltage module is connected with the grid electrode of the target transistor; the other end of the pull-down voltage module is grounded;
the pull-down voltage module is used for controlling the grid voltage of the target transistor to be lower than 0 when the target transistor is required to be turned off.
Optionally, the driving circuit further includes: the circuit comprises a first resistor, a second resistor, a third resistor and a current source;
one end of the first resistor is connected with the grid electrode of the target transistor; the other end of the first resistor is respectively connected with one end of the current source and the negative input end of the second amplifier;
one end of the second resistor is connected with the grid electrode of the target transistor; the other end of the second resistor is respectively connected with one end of the third resistor and the negative input end of the first amplifier;
the other end of the third resistor and the other end of the current source are both grounded.
Optionally, the driving circuit further includes: a switch;
one end of the switch is connected with the other end of the second resistor; the other end of the switch is connected with the negative electrode input end of the first amplifier.
Optionally, the current source comprises: the reference voltage device and the fourth resistor are connected in sequence; one end of the reference voltage device is one end of the current source; one end of the fourth resistor is the other end of the current source.
Optionally, the voltage control module specifically includes: the oscillator and the charge pump module are connected in sequence;
the small fetching module, the oscillator, the charge pump module and the grid electrode of the target transistor are connected in sequence; the charge pump module is also connected with the power supply output end;
the oscillator is used for outputting a clock control signal according to the output signal of the small-size fetching module;
and the charge pump module is used for controlling the grid voltage of the target transistor and the output voltage of the power supply output end according to the clock control signal.
Optionally, the pull-down voltage module is an NMOS transistor.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the invention discloses a low-power-consumption gate drive circuit, which comprises a first amplifier, a second amplifier, a small fetching module and a voltage control module, wherein the first amplifier is connected with the second amplifier; when the circuit is started, the small-taking module takes the first voltage signal as output, the first voltage signal is gradually increased along with the increase of the ramp signal, the voltage control module controls the grid voltage of the target transistor to be gradually increased according to the first voltage signal output by the small-taking module, and when the grid voltage exceeds a voltage threshold value, the target transistor is conducted; after the target transistor is conducted, the small-taking module takes the first voltage signal as output, the first voltage signal is gradually increased along with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor and the output voltage of the power output end to be gradually increased according to the first voltage signal output by the small-taking module, and when the output voltage is equal to the input voltage of the power input end, the output voltage is kept unchanged; after the output voltage is kept unchanged, when the voltage of the negative electrode input end of the second amplifier is equal to the output voltage, the taking-down module takes the second voltage signal as output, the second voltage signal is kept unchanged, and the voltage control module controls the grid voltage of the target transistor to be kept unchanged according to the second voltage signal. The voltage signal output by the small module is controlled to slowly rise through the ramp signal, and the voltage control module is used for adjusting the grid voltage of the target transistor according to the voltage signal, so that the starting rising slope of the grid voltage of the target transistor can be controlled, the slow starting and stable operation of the transistor and the protection of the grid can be realized, and the power consumption of the circuit can be reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
FIG. 1 is a schematic diagram of a low power consumption gate driving circuit according to the present invention;
FIG. 2 is a schematic circuit diagram of a gate driving circuit according to an embodiment of the present invention;
fig. 3 is a waveform diagram illustrating an exemplary operation of a gate driving circuit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
The invention aims to provide a low-power-consumption gate driving circuit which can realize slow start and stable operation of a transistor and protection of a gate and reduce the power consumption of the circuit by adjusting the voltage of the gate.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
As shown in fig. 1, an embodiment of the present invention provides a low power consumption gate driving circuit, including: the device comprises a first amplifier 1, a second amplifier 2, a small fetching module 3 and a voltage control module 4.
The negative electrode input end of the first amplifier 1 is connected with the grid electrode of the target transistor; the positive input end of the first amplifier 1 is used for inputting a ramp signal; the output end of the first amplifier 1 is connected with the input end of the small fetching module 3; the first amplifier 1 is used for outputting a first voltage signal; the negative electrode input end of the second amplifier 2 is connected with the grid electrode of the target transistor; the positive electrode input end of the second amplifier 2 is connected with the source electrode of the target transistor; the output end of the second amplifier 2 is connected with the input end of the small fetching module 3; the second amplifier 2 is used for outputting a second voltage signal; the output end of the small fetching module 3 is connected with the input end of the voltage control module 4; a first output end of the voltage control module 4 is connected with a grid electrode of the target transistor; a second output end of the voltage control module 4 is connected with a source electrode of the target transistor; the source electrode of the target transistor is also connected with the power supply output end; and the drain electrode of the target transistor is connected with the power supply input end.
The first amplifier and the second amplifier are used for amplifying the voltages of the positive electrode input end and the negative electrode input end and outputting a first voltage signal and a second voltage signal; and the small-taking module is used for carrying out small-taking processing on the first voltage signal and the second voltage signal and outputting a signal with smaller voltage in the two signals.
When the circuit is started, the minifying module 3 takes the first voltage signal as output, the first voltage signal gradually increases along with the increase of the ramp signal, the voltage control module 4 controls the gate voltage of the target transistor to gradually increase according to the first voltage signal output by the minifying module 3, and when the gate voltage exceeds a voltage threshold, the target transistor is turned on.
After the target transistor is turned on, the small-fetching module 3 takes the first voltage signal as output, the first voltage signal is gradually increased along with the increase of the ramp signal, the voltage control module 4 controls the gate voltage of the target transistor and the output voltage of the power output end to be gradually increased according to the first voltage signal output by the small-fetching module 3, and when the output voltage is equal to the input voltage of the power input end, the output voltage is kept unchanged.
After the output voltage is kept unchanged, when the voltage at the negative input end of the second amplifier 2 is equal to the output voltage, the small-taking module takes the second voltage signal as output, the second voltage signal is kept unchanged, and the voltage control module 4 controls the gate voltage of the target transistor to be kept unchanged according to the second voltage signal.
In the circuit controlled by only a clamping diode in the prior art, if the grid-source voltage is too small, the on resistance of a target transistor is too large and even is turned off, and if the grid-source voltage is too large and exceeds a withstand voltage value, the grid electrode can be damaged; in addition, the oscillator module and the charge pump module can only work at a fixed frequency all the time, and redundant current generated in the work can be discharged by the clamping diode, so that the power consumption is large.
Therefore, the circuit with the clamping diode structure is replaced by the first amplifier 1, the second amplifier 2, the small-size module 3 and the voltage control module 4, the problem of inaccurate grid-source voltage can be solved, and energy consumption can be saved.
As a specific implementation manner, the structure of the driving circuit further includes: and a pull-down voltage module.
One end of the pull-down voltage module is connected with the grid electrode of the target transistor; and the other end of the pull-down voltage module is grounded. The pull-down voltage module is used for controlling the grid voltage of the target transistor to be lower than 0 when the target transistor is required to be turned off.
In the embodiment shown in fig. 2, based on the above-mentioned driving circuit structure, the driving circuit further includes: a first resistor RB, a second resistor RU, a third resistor RD and a current source IB.
One end of the first resistor RB is connected with the grid electrode of the target transistor M0; the other end of the first resistor RB is respectively connected with one end of the current source IB and the negative electrode input end of the second amplifier A2; one end of the second resistor RU is connected with the grid electrode of the target transistor M0; the other end of the second resistor RU is connected to one end of the third resistor RD and the negative input end of the first amplifier A1, respectively; the other end of the third resistor RD and the other end of the current source IB are both grounded.
Wherein the current source IB comprises: the reference voltage device and the fourth resistor are connected in sequence; one end of the reference voltage device is one end of the current source; one end of the fourth resistor is the other end of the current source.
On this basis, this circuit still includes: and (6) switching. One end of the switch is connected with the other end of the second resistor RU; the other end of the switch is connected with the negative electrode input end of the first amplifier A1.
As a specific embodiment of the voltage control module, the method includes: the oscillator and the charge pump module are connected in sequence. The small fetching module, the oscillator, the charge pump module and the grid electrode of the target transistor are sequentially connected; the charge pump module is also connected with the power output end.
The oscillator is used for outputting a clock control signal according to the output signal of the small-size fetching module; and the charge pump module is used for controlling the grid voltage of the target transistor and the output voltage of the power supply output end according to the clock control signal.
In this embodiment, the pull-down voltage module is an NMOS transistor.
According to the circuit configuration shown in fig. 2, the GATE voltage to ground generates the first comparison voltage GATE _ DIV = GATE × RD/(RU + RD) through the second resistor RU, the switch S1, and the third resistor RD, the voltage and a ramp signal SS are input to an amplifier A1, and the A1 generates an error amplifying signal VC1 by a difference of the voltage GATE _ DIV and the ramp signal SS. To equalize GATE _ DIV = SS across the input of amplifier A1, there is GATE = SS (RU + RD)/RD.
GATE is connected to ground via a first resistor RB and a current source IB, so as to generate a second comparison voltage GATE _ MR = GATE-IB RB, and if the current source IB is generated by a reference Voltage (VREF) and a fourth resistor RB2 of the same type as the first resistor RB, i.e. the current source IB = VREF/RB2, GATE _ MR = GATE-IB RB = GATE-VREF RB/RB2. The first comparison voltage GATE _ MR is input to another amplifier A2 together with the output voltage VOUT of the GATE driving circuit, and the amplifier A2 generates an error amplification signal VC2 by a difference between the voltage GATE _ MR and the output voltage VOUT. To equalize GATE _ MR = VOUT across the inputs of amplifier A2, there is GATE = VOUT + VREF RB/RB2.
The error amplified signals VC1 and VC2 get the smaller signal VC = min (VC 1, VC 2) of the two signals by taking the small block (VMIN). VC with smaller VC1 and VC2 can ensure that the grid voltage GATE = min { GATE = SS (RU + RD)/RD, VOUT + VREF × RB/RB2}. Namely, the output signal of the small module 3 is taken as the voltage regulation signal.
The voltage regulation signal VC is coupled to the Oscillator to control the Oscillator to output the clock control signal CLK. The higher the voltage of the conditioning signal VC, the higher the frequency of the output clock CLK.
The clock CLK signal is coupled to the charge pump module, and the charge pump module, to generate a voltage higher than the output voltage VOUT, and the output is coupled to the GATE of the target transistor M0. If the frequency of the clock CLK is higher, the regulating voltage generated by the charge pump module, namely the Charge Pump, is higher; conversely, if the frequency of the clock CLK becomes low, the regulated voltage generated by the charge pump module, chargePump, will become low.
According to the control principle of the gate driver circuit, a typical waveform as shown in fig. 3 can be obtained.
At time T0, the enable terminal EN goes from low to high, the ramp signal SS rises slowly from 0, the GATE _ MR voltage is just started to be much lower than the VOUT voltage, the VC2 voltage is very high, VC = VC1, the whole loop is controlled by the amplifier A1, and therefore GATE _ DIV = SS, that is, GATE = SS (RU + RD)/RD, and the GATE voltage rises slowly with the rise of the ramp signal SS.
At time T1, the GATE voltage VGS (which is equal to the GATE voltage at this time) exceeds the threshold voltage of the target transistor M0, and the target transistor M0 starts to turn on, so that the output voltage VOUT of the GATE driving circuit also starts to slowly rise along with the rise of SS. Since the rising slope of VOUT is controlled by SS, the currents on M0 and the input VIN of the gate driver circuit are also small.
At time T2, VOUT voltage rises to be equal to input voltage VIN and does not continue to rise, while GATE voltage continues to rise as SS rises.
At time T3, the GATE _ MR voltage rises to equal the VOUT voltage, the VC2 voltage begins to go low, then VC = VC2, the entire loop switches to being controlled by amplifier A2, keeping GATE _ MR = VOUT, then the GATE voltage no longer continues to rise as SS rises, but keeping GATE = VOUT + VREF RB/RB2. Therefore, VGS = GATE-VOUT = VREF RB/RB2, which is determined only by the reference voltage VREF and the resistance ratio, and does not vary with process, temperature, and other factors with high accuracy.
At time T4, ramp signal SS reaches the highest voltage VH, at which time switch S1 may be closed to reduce the current on GATE, saving power.
In summary, during the whole working process:
initially the GATE voltage is slowly ramped up following the ramp signal SS by adjusting the clock and charge pump module to limit the input voltage VIN and the current on transistor M0. Thus, the rising slope of the GATE voltage can be adjusted by adjusting the rising slope of the ramp signal SS, which adjusts the input voltage VIN and the current in the path of the transistor M0.
And automatically transitioning to a later stage by regulating a clock and a charge pump to control GATE to be stabilized at VOUT + VREF RB/RB2, so that the grid-source voltage VGS = VREF RB/RB2 is kept, is determined only by a reference Voltage (VREF) and a resistance ratio, is very accurate and cannot be changed along with the changes of factors such as process, temperature and the like.
The oscillator and charge pump operation is controlled by the VC voltage, and the clock frequency is maintained at the lowest frequency required to control the GATE voltage. This will save a lot of power consumption compared to controlling the charge pump with a fixed clock frequency.
The new gate drive circuit can be used not only to drive a single transistor but also to drive for example two transistors connected back-to-back.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the circuit and its core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the foregoing, the description is not to be taken in a limiting sense.
Claims (7)
1. A low power consumption gate driving circuit, comprising: the device comprises a first amplifier, a second amplifier, a small fetching module and a voltage control module;
the negative electrode input end of the first amplifier is connected with the grid electrode of the target transistor; the positive input end of the first amplifier is used for inputting a ramp signal; the output end of the first amplifier is connected with the input end of the small fetching module; the first amplifier is used for outputting a first voltage signal;
the negative electrode input end of the second amplifier is connected with the grid electrode of the target transistor; the positive electrode input end of the second amplifier is connected with the source electrode of the target transistor; the output end of the second amplifier is connected with the input end of the small fetching module; the second amplifier is used for outputting a second voltage signal;
the output end of the small fetching module is connected with the input end of the voltage control module; the first output end of the voltage control module is connected with the grid electrode of the target transistor; the second output end of the voltage control module is connected with the source electrode of the target transistor; the source electrode of the target transistor is also connected with the power supply output end; the drain electrode of the target transistor is connected with the power supply input end;
when the circuit is started, the small-taking module takes the first voltage signal as output, and the first voltage signal is gradually increased along with the increase of the ramp signal; the voltage control module controls the grid voltage of the target transistor to gradually increase according to the first voltage signal output by the small-size fetching module, and when the grid voltage exceeds a voltage threshold value, the target transistor is conducted;
after the target transistor is conducted, the small-taking module takes the first voltage signal as output, the first voltage signal is gradually increased along with the increase of the ramp signal, the voltage control module controls the gate voltage of the target transistor and the output voltage of the power output end to be gradually increased according to the first voltage signal output by the small-taking module, and when the output voltage is equal to the input voltage of the power input end, the output voltage is kept unchanged;
after the output voltage is kept unchanged, when the voltage of the negative electrode input end of the second amplifier is equal to the output voltage, the small-taking module takes the second voltage signal as output, the second voltage signal is kept unchanged, and the voltage control module controls the grid voltage of the target transistor to be kept unchanged according to the second voltage signal.
2. The low power consumption gate driving circuit according to claim 1, further comprising: a pull-down voltage module;
one end of the pull-down voltage module is connected with the grid electrode of the target transistor; the other end of the pull-down voltage module is grounded;
the pull-down voltage module is used for controlling the grid voltage of the target transistor to be lower than 0 when the target transistor is required to be turned off.
3. The low power consumption gate driving circuit according to claim 1, further comprising: the circuit comprises a first resistor, a second resistor, a third resistor and a current source;
one end of the first resistor is connected with the grid electrode of the target transistor; the other end of the first resistor is respectively connected with one end of the current source and the negative input end of the second amplifier;
one end of the second resistor is connected with the grid electrode of the target transistor; the other end of the second resistor is respectively connected with one end of the third resistor and the negative electrode input end of the first amplifier;
the other end of the third resistor and the other end of the current source are both grounded.
4. The gate driving circuit with low power consumption of claim 3, wherein the driving circuit further comprises: a switch;
one end of the switch is connected with the other end of the second resistor; the other end of the switch is connected with the negative electrode input end of the first amplifier.
5. The low power consumption gate driving circuit according to claim 3, wherein the current source comprises: the reference voltage device and the fourth resistor are connected in sequence; one end of the reference voltage device is one end of the current source; one end of the fourth resistor is the other end of the current source.
6. The gate driving circuit with low power consumption according to claim 1, wherein the voltage control module specifically comprises: the oscillator and the charge pump module are connected in sequence;
the small fetching module, the oscillator, the charge pump module and the grid electrode of the target transistor are connected in sequence; the charge pump module is also connected with the power supply output end;
the oscillator is used for outputting a clock control signal according to the output signal of the small fetching module;
and the charge pump module is used for controlling the grid voltage of the target transistor and the output voltage of the power supply output end according to the clock control signal.
7. The gate driving circuit with low power consumption of claim 2, wherein the pull-down voltage module is an NMOS transistor.
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