CN115622393A - Switch converter and control circuit thereof - Google Patents
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- CN115622393A CN115622393A CN202110805943.1A CN202110805943A CN115622393A CN 115622393 A CN115622393 A CN 115622393A CN 202110805943 A CN202110805943 A CN 202110805943A CN 115622393 A CN115622393 A CN 115622393A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1582—Buck-boost converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The application discloses switching converter and control circuit thereof includes: an error amplifier for comparing a first feedback signal of the output voltage with a reference voltage to generate an error signal; the light load judging circuit is used for providing a light load indicating signal of a logic high level when the load end of the switch converter is in a light load state and controlling the switch converter to work in a light load mode; and the transient response circuit is used for generating a narrow pulse signal when the light load indicating signal is inverted from a logic high level to a low level, and the narrow pulse signal is used for increasing the error signal so as to increase the response speed of a loop signal, so that the error signal can timely feed back the change of a load or an output voltage, the change speed of an inductance current is increased, faster energy supply is increased for the output voltage, and the dynamic response of a system is improved.
Description
Technical Field
The present invention relates to the field of switching power supply technologies, and in particular, to a switching converter and a control circuit thereof.
Background
With the demand of power electronic products and the development of semiconductor technology, power management chips are widely used in portable computers, mobile phones, personal digital assistants, and other portable or non-portable electronic devices. The switching converter controls the transmission of electric energy from the input terminal to the output terminal by using the power switch, so that a constant output voltage and/or output current can be provided at the output terminal.
Fig. 1 shows a schematic circuit diagram of a conventional switching converter. The switching converter 100 includes a power circuit including a switching tube M and a diode D1 connected in series between an input terminal and a ground terminal, an inductor Lx connected between an intermediate node of the switching tube M and the diode D1 and an output terminal, and an output capacitor Cout connected between the output terminal and the ground terminal, and a control circuit. The switching converter 100 has an input terminal receiving an input voltage Vin and an output terminal providing an output voltage Vout. The control circuit of the switching converter 100 is used to provide a switching control signal to the switching tube M.
In the control circuit of the switching converter 100, the error amplifier 210 compares the feedback voltage FB provided by the feedback network 130 with the reference voltage Vref, and amplifies an error therebetween to obtain an error amplified signal Vea, and the compensation resistor Rea and the compensation capacitor Cea are used for performing frequency compensation on the error amplified signal Vea. The PWM comparator 120 compares the error amplification signal Vea with the ramp signal Vramp, generates a pulse width modulation signal PWM according to the comparison result, and the logic and driving circuit 110 converts the pulse width modulation signal PWM into a switch driving signal to drive the on-state of the switching tube M.
For a low-quiescent-current switching converter, when the switching converter operates in an idle state, in order to improve light-load efficiency and reduce standby loss, an internal circuit is generally switched to a low-current operating mode, a system operates in a Pulse Frequency Modulation (PFM) mode, and a switching tube M is in an off state for a long time in the PFM mode. When the external load is changed from no-load to heavy load, the system needs to be switched from the PFM mode to the normal working mode, and because the output of the error amplifier needs a certain set-up time, the inductive current is still limited at this time, and the current required by the output cannot be provided, so that the output voltage can be continuously reduced, and the output voltage can be gradually recovered until the output of the error amplifier becomes the required value.
Therefore, when the load of the existing switching converter is changed from light load to heavy load, because the output of the error amplifier takes a long time to be established, the output voltage can generate a large 'drop' phenomenon, and the dynamic response is poor.
Disclosure of Invention
In view of the above problems, an object of the present invention is to provide a switching converter and a control circuit thereof, which solve the problem of poor dynamic response after a load jumps from a light load to a heavy load in the prior art.
According to an aspect of the embodiments of the present invention, there is provided a control circuit of a switching converter, the switching converter controlling power transmission from an input end to an output end by using at least one switching tube so as to generate an output voltage according to an input voltage, wherein the control circuit includes: an error amplifier for comparing a first feedback signal of the output voltage with a reference voltage to generate an error signal; the light load judging circuit is used for providing a light load indicating signal of a logic high level when the load end of the switch converter is in a light load state and controlling the switch converter to work in a light load mode; and the transient response circuit is used for generating a narrow pulse signal when the light load indicating signal is inverted from a logic high level to a low level, and the narrow pulse signal is used for increasing the error signal so as to improve the loop signal reaction speed.
Optionally, the narrow pulse signal increases the error signal by increasing a transconductance gain of the error amplifier and/or providing an offset voltage to the reference voltage.
Optionally, the error amplifier includes: a bias circuit for providing a bias current; the input stage amplifying circuit is used for receiving the first feedback signal and the reference voltage and outputting a differential voltage between the first feedback signal and the reference voltage; the output stage amplifying circuit is used for outputting the error signal according to the differential voltage; and the gain adjusting circuit is connected with the output stage amplifying circuit and is used for starting when receiving the narrow pulse signal so as to increase the transconductance gain of the error amplifier.
Optionally, the control circuit further includes: and the offset circuit is connected between the reference voltage and one input end of the error amplifier and is used for starting when receiving the narrow pulse signal so as to provide the offset voltage.
Optionally, the input stage amplifying circuit includes: a first transistor and a second transistor forming a differential input pair for receiving the first error signal and the reference voltage, respectively; a third transistor and a fourth transistor for constituting an active load of the input stage amplifying circuit; and a first current source for providing a constant bias current to the first transistor and the second transistor.
Optionally, the output stage amplifying circuit includes: and an eighth transistor and a sixth transistor sequentially connected between a power supply voltage and ground, wherein the sixth transistor and the fourth transistor constitute a current mirror to convert the differential voltage into a current, and the eighth transistor converts the current into a voltage output to output the error signal at an intermediate node therebetween.
Optionally, the bias circuit includes: and a seventh transistor and a fifth transistor sequentially connected between the power supply voltage and ground, wherein the seventh transistor and the eighth transistor constitute a current mirror, and the fifth transistor and the third transistor constitute a current mirror.
Optionally, the gain adjustment circuit includes: the first transistor, the second transistor and the third transistor are sequentially connected between the power supply voltage and the ground, the first transistor and the third transistor respectively form a mirror current source with the eighth transistor and the sixth transistor, an intermediate node of the first switch and the second switch is connected with an output end of the error signal, and the first switch and the second switch are turned on when receiving the narrow pulse signal.
Optionally, the offset circuit includes: a first resistor having one end connected to the reference voltage and the other end connected to an input terminal of the error amplifier; and a third switch and a second current source connected between the first resistor and the input terminal of the error amplifier, wherein the third switch is turned on upon receiving the narrow pulse signal.
According to another aspect of an embodiment of the present invention, there is provided a switching converter including: the power circuit adopts at least one switching tube to control the transmission of electric energy from the input end to the output end, so as to generate output voltage according to the input voltage; and the control circuit is used for generating a switch control signal to control the conduction state of the at least one switching tube.
Optionally, the power circuit adopts a topology selected from any one of the following: the power supply comprises a floating type Buck power circuit, a field type Buck power circuit, a flyback power circuit, a Buck-Boost type power circuit and a Boost type power circuit.
In the switching converter and the control circuit thereof of the embodiment of the invention, when the load end is changed from light load to heavy load, the transient response circuit generates a narrow pulse signal, and the narrow pulse signal increases the voltage value of the error signal by increasing the transconductance gain of the error amplifier and/or providing an offset voltage for the reference voltage, so that the error signal can timely feed back the change of the load or the output voltage, thereby increasing the response speed of the loop signal and improving the dynamic response of the system. In addition, the circuit of the embodiment of the invention does not need to greatly change the existing converter structure, has low cost and is suitable for various existing switching converters.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings, in which:
fig. 1 shows a schematic circuit diagram of a conventional switching converter;
fig. 2 shows a schematic circuit diagram of a switching converter according to an embodiment of the invention;
FIG. 3 shows a schematic circuit diagram of an error amplifier and offset circuit of a switching converter according to an embodiment of the invention;
fig. 4A and 4B show voltage diagrams of conventional and inventive switching converters during light to heavy load, respectively.
Fig. 5A and 5B show a test comparison diagram of a conventional switching converter and a switching converter according to an embodiment of the present invention, respectively.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown.
It should be understood that in the following description, a "circuit" refers to a conductive loop made up of at least one element or sub-circuit by electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that the two be absent intermediate elements.
In the present application, the switching transistor is a transistor that operates in a switching mode to provide a current path, and includes one selected from a bipolar transistor or a field effect transistor. The first end and the second end of the switching tube are respectively a high potential end and a low potential end on a current path, and the control end is used for receiving a driving signal to control the switching tube to be switched on and switched off.
The present invention may be embodied in various forms, some examples of which are described below.
Fig. 2 shows a schematic circuit diagram of a switching converter according to an embodiment of the invention. This switching converter 200 adopts the Buck topology, including power circuit and control circuit, power circuit includes switching tube MD1 and MD2 of series connection between input and earthing terminal, switching tube MD1 is called the main switch tube again, switching tube MD2 is called the synchronous switch tube again, inductance Lx connects between switching tube MD1 and MD 2's intermediate node and output, output capacitor Cout connects between output and earthing terminal, resistance Resr is output capacitor Cout's equivalent series resistance, load RL parallel connection is between output capacitor Cout's both ends. The switching converter 200 has an input terminal receiving an input voltage Vin and an output terminal providing an output voltage Vout. The voltage division network formed by the resistors R1 and R2 is used for obtaining a first feedback signal FB1 of the output voltage Vout, and the voltage division network formed by the resistors R3 and R4 is used for obtaining a second feedback signal FB2 of the output voltage Vout.
The control circuit of the switching converter 200 is used to provide switching control signals to the switching tubes MD1 and MD 2. The control circuit of the switching converter 200 includes an error amplifier 210, a PWM comparator 220, a logic and driving circuit 230, a ripple compensation circuit 240, a light-load determining circuit 250, and a transient response circuit 260.
The error amplifier 210 is configured to compare the first feedback signal FB1 with the reference voltage Vref to obtain an error signal Vea. Specifically, the error amplifier 210 has an inverting input terminal receiving the first feedback signal FB1, a non-inverting input terminal receiving the reference voltage Vref, and an output terminal outputting the error signal Vea.
The PWM comparator 220 has an inverting input terminal receiving the second feedback signal FB2 and a superimposed signal Vsum of the Ripple signal Ripple, a non-inverting input terminal receiving the error signal Vea, and the PWM comparator 220 is configured to compare the superimposed signal Vsum with the error signal Vea to generate the PWM signal PWM.
In this embodiment, the error amplifier 210 uses an error amplifier with a high dc gain, which is beneficial to improve the output accuracy of the switching converter. Further, the PWM comparator 220 adopts a self-adaptive hysteresis voltage architecture, and the hysteresis voltage Vhys = K% × Vout of the PWM comparator 220 enables the switching converter to adaptively change the size of the hysteresis window according to the output voltage, so as to maintain the relative stability of the switching frequency, improve the problem of large frequency variation range of the hysteresis control mode, and facilitate the improvement of the frequency stability and the light load efficiency of the system. Furthermore, the Ripple signal Ripple provides an ac signal having the same phase as the inductor current, and the PWM comparator 220 compares the superimposed signal Vsum with the error signal Vea, and directly controls the on/off of the switching tube according to the comparison result, so as to ensure that the change of the output voltage Vout can be quickly reflected to the hysteresis comparator to perform a corresponding switching operation, so that the switching converter 200 has a good transient response.
Further, the control circuit further includes a compensation network connected between the output terminal of the error amplifier 210 and ground, and the compensation network includes a compensation resistor Rea and a compensation capacitor Cea.
The logic and driving circuit 230 is used for implementing a logic control function of the system, and is used for generating a switching control signal according to the pulse width modulation signal PWM to control the conduction states of the switching tubes MD1 and MD 2. The Ripple compensation circuit 240 is connected to the inductor Lx for providing the Ripple signal Ripple.
The light load judging circuit 250 is configured to monitor a state of the output voltage Vout according to the error signal Vea, determine whether a load end of the switching converter is in a light load state according to a judgment result, and when the load end of the switching converter is in the light load state, the light load judging circuit 250 outputs a light load indication signal PFM of a logic high level to control the switching converter to operate in a light load mode, and turn off the switching tubes MD1 and MD2 and other circuits of the system. When the load end of the switching converter is in a heavy load state, the light load judgment circuit 250 outputs a light load indication signal PFM of a logic low level to control the switching converter to operate in a normal mode.
When the load is heavy, the dynamic response is slow, and the output voltage drops. The transient response circuit 260 is connected to the light load determining circuit 250, and is configured to generate a narrow pulse signal Pluse when a falling edge of the light load indicating signal PFM changing from a logic high level to a logic low level is detected, where the narrow pulse signal Pluse increases a voltage value of the error signal Vea to increase a response speed of the loop signal, so as to improve a dynamic response of the system.
Alternatively, the narrow pulse signal Pluse increases the voltage value of the error signal Vea by increasing the transconductance gain or the operating current of the error amplifier 210. Meanwhile, the narrow pulse signal plus controls the offset circuit 270 to provide an offset voltage Vos at the non-inverting input terminal of the error amplifier 210, so that the preset output voltage is higher than the normal value in the effective time of the narrow pulse signal plus, and the output voltage Vout will not drop during the period from the light load to the heavy load, thereby achieving the purpose of optimizing the dynamic characteristics of the system.
As shown in fig. 3, a schematic circuit diagram of an error amplifier and an offset circuit of a switching converter according to an embodiment of the present invention is shown. The error amplifier 210 is a two-stage operational amplifier structure for providing high gain and large output swing under the action of bias current. Specifically, the error amplifier 210 includes a bias circuit 301, an input stage amplification circuit 302, an output stage amplification circuit 303, and a gain adjustment circuit 304.
The input stage amplifying circuit 302 is composed of transistors M1 to M4 and a current source Ib. The transistors M1 and M2 form a PMOS differential input pair, and respectively input the first feedback signal FB1 and the reference voltage Vref. The transistors M3 and M4 constitute an active load of the input stage amplifying circuit 302, and the current source Ib supplies a constant bias current to the transistors M1 and M2. Transistors M1 and M2 convert the differential input voltage into a differential current, and transistors M3 and M4 are input stage loads, restoring the differential current to a differential voltage.
The output stage amplification circuit 303 is composed of transistors M6 and M8. Transistor M6 is a common source amplifier for which transistor M8 provides a constant bias current while acting as an output stage load. The transistor M6 and the transistor M4 form a current mirror to convert the differential voltage signal of the input stage amplifying circuit 302 into a current, and the transistor M8 converts the current signal into a voltage output again, thereby obtaining the error signal Vea.
The bias circuit 301 includes transistors M5 and M7, the transistors M5 and M7 in turn connected between the supply voltage VCC and ground. The transistor M5 and the transistor M3 form a current mirror, so as to provide a bias current for the input stage amplifying circuit 302. Transistor M7 and transistor M8 form a current mirror to provide a constant bias current thereto.
The gain adjustment circuit 304 includes transistors M9 and M10 and switches K1 and K2, the transistor M9, the switch K1, the switch K2, and the transistor M10 are sequentially connected between the power supply voltage VCC and the ground, the transistor M9 and the transistor M8 constitute a mirror current source, the transistor M10 and the transistor M6 constitute a mirror current source, and an intermediate node between the switches K1 and K2 is connected to an output terminal of the error signal Vea. Wherein, the size ratio of the transistors M9 and M10 to the transistors M8 and M6 is 1: m, m are integers greater than 1, when the narrow pulse signal Pluse is at a logic low level, the switches K1 and K2 are turned off, the gain adjustment circuit 304 does not function, and the output current of the error amplifier 210 is:
I2＝I1＝Gm×(Vref-FB1) (1)
when the narrow pulse signal Pluse is at a logic high level, the switches K1 and K2 are turned on, and the output current of the error amplifier 210 is:
I2＝Gm×(m+1)×(Vref-FB1) (2)
where Gm represents the initial transconductance of error amplifier 210.
Further, the offset circuit 270 is composed of a current source Ios, a switch K3, and a resistor Ros, one end of which is connected to the reference voltage Vref, the other end of which is connected to the control terminal of the transistor M2 (i.e., the non-inverting input terminal of the error amplifier), one end of the switch K3 is connected to the current source Ios, and the other end of which is connected to an intermediate node of the resistor Ros and the transistor M2. When the narrow pulse signal Pluse is at a logic low level, the switch K3 is turned off, the voltage drop across the resistor Ros is zero, and the voltage at the positive phase input terminal of the error amplifier is directly equal to the reference voltage Vref. When the narrow pulse signal Pluse is at a logic high level, the switch K3 is turned on, and the current Ios generates an offset voltage Vos = Ios × Ros on the resistor Ros, so that the voltage at the non-inverting input terminal of the error amplifier is equal to Vref + Vos. As can be obtained in combination with equation (2) above, after the offset voltage is increased, the output current of the error amplifier becomes:
I2＝Gm×(m+1)×(Vref+Vos-FB1) (3)
as can be seen from the above equations (2) and (3), when the narrow pulse signal Pluse is at a logic high level, the transconductance gain of the error amplifier 210 is increased to Gm (1+m), so as to increase the output current of the error amplifier 210, so that the output of the error amplifier can be quickly established, and the purpose of increasing the loop response speed when the no-load switch is performed to the heavy load is achieved.
It will be appreciated that although the offset circuit and the gain adjustment circuit are illustrated and described in one embodiment in the above embodiments, the invention is not so limited. It will be apparent to those skilled in the art that the embodiments may be replaced and integrated by using the offset circuit or the gain adjustment circuit alone to increase the response speed of the loop when the system is switched from idle to heavy load, or by using both the offset circuit and the gain adjustment circuit.
Fig. 4A and 4B show voltage diagrams of conventional and inventive switching converters during light to heavy load, respectively. When the output voltage Vout drops to a certain extent, the system detects that the load becomes heavy, the light load indication signal PFM is inverted from a logic high level to a low level, and is limited by the gain of the error amplifier, and the operating current I1_ EA of the error amplifier is small, in the conventional switching converter, as shown in fig. 4A, limited by the gain Gm _ EA of the error amplifier, the error signal Vea output by the error amplifier in the prior art only rises slowly, so that the inductor current IL is limited to be unable to provide sufficient output current, and even if the light load indication signal PFM controls the system to operate in a normal mode, the output voltage Vout continues to drop, and the output voltage Vout "drops". In the switching converter of this embodiment, as shown in fig. 4B, when the light load indication signal PFM is inverted from a logic high level to a low level, the system generates a narrow pulse signal Pluse, which increases the transconductance gain Gm _ EA of the error amplifier, and simultaneously provides an offset voltage Vos at the non-inverting input terminal of the error amplifier, so that the operating current I2_ EA of the error amplifier is pulled up instantaneously, and at this time, the error signal Vea can also be quickly established to pull up the inductor current IL, so as to provide enough output current for the load, so that the output voltage Vout does not continue to drop during this period of time, thereby solving the problem that the output voltage Vout "sags" when the system is switched from a no-load state to a heavy load state, and greatly improving the dynamic characteristics of the system.
It should be noted that although fig. 2 shows embodiments of a buck-type synchronous switching converter, the present invention is not limited to these embodiments. The advantages of the invention are also applicable to other types of converters, including but not limited to floating-ground type Buck converters, field type Buck converters, flyback converters, buck-Boost converters, boost converters and other topological structures.
In summary, in the switching converter and the control circuit thereof according to the embodiments of the present invention, when the load end is changed from light load to heavy load, the transient response circuit generates a narrow pulse signal, and the narrow pulse signal increases the voltage value of the error signal by increasing the transconductance gain of the error amplifier and/or providing an offset voltage to the reference voltage, so that the error signal can feed back the change of the load or the output voltage in time, thereby increasing the response speed of the loop signal and improving the dynamic response of the system. In addition, the circuit of the embodiment of the invention does not need to greatly change the existing converter structure, has low cost and is suitable for various existing switching converters.
In the above description, well-known structural elements and steps are not described in detail. It should be understood by those skilled in the art that the corresponding structural elements and steps may be implemented by various technical means. In addition, in order to form the same structural elements, those skilled in the art may also design a method which is not exactly the same as the above-described method. In addition, although the embodiments are described separately above, this does not mean that the measures in the respective embodiments cannot be used advantageously in combination.
In accordance with the present invention, as set forth above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The scope of the invention should be determined from the following claims.
Claims (11)
1. A control circuit for a switching converter, the switching converter employing at least one switching transistor to control power transfer from an input terminal to an output terminal to generate an output voltage based on an input voltage, wherein the control circuit comprises:
an error amplifier for comparing a first feedback signal of the output voltage with a reference voltage to generate an error signal;
the light load judging circuit is used for providing a logic high level light load indicating signal when the load end of the switch converter is in a light load state and controlling the switch converter to work in a light load mode; and
and the transient response circuit is used for generating a narrow pulse signal when the light load indicating signal is inverted from a logic high level to a low level, and the narrow pulse signal is used for increasing the error signal so as to improve the response speed of a loop signal.
2. The control circuit of claim 1, wherein the narrow pulse signal boosts the error signal by increasing a transconductance gain of the error amplifier and/or providing an offset voltage to the reference voltage.
3. The control circuit of claim 2, wherein the error amplifier comprises:
a bias circuit for providing a bias current;
the input stage amplifying circuit is used for receiving the first feedback signal and the reference voltage and outputting a differential voltage between the first feedback signal and the reference voltage;
the output stage amplifying circuit is used for outputting the error signal according to the differential voltage; and
and the gain adjusting circuit is connected with the output stage amplifying circuit and is used for starting when the narrow pulse signal is received so as to increase the transconductance gain of the error amplifier.
4. The control circuit of claim 2, further comprising:
and the offset circuit is connected between the reference voltage and one input end of the error amplifier and is used for starting when receiving the narrow pulse signal so as to provide the offset voltage.
5. The control circuit of claim 3, wherein the input stage amplification circuit comprises:
a first transistor and a second transistor forming a differential input pair for receiving the first error signal and the reference voltage, respectively;
a third transistor and a fourth transistor for constituting an active load of the input stage amplifying circuit; and
a first current source for providing a constant bias current to the first transistor and the second transistor.
6. The control circuit of claim 5, wherein the output stage amplification circuit comprises:
an eighth transistor and a sixth transistor connected in series between the supply voltage and ground,
wherein the sixth transistor and the fourth transistor constitute a current mirror to convert the differential voltage into a current,
the eighth transistor converts the current to a voltage output, thereby outputting the error signal at an intermediate node between the current and the voltage output.
7. The control circuit of claim 6, wherein the bias circuit comprises:
a seventh transistor and a fifth transistor connected in series between the supply voltage and ground,
wherein the seventh transistor and the eighth transistor form a current mirror, and the fifth transistor and the third transistor form a current mirror.
8. The control circuit of claim 7, wherein the gain adjustment circuit comprises:
a ninth transistor, a first switch, a second switch, and a tenth transistor connected in sequence between the power supply voltage and ground,
the ninth transistor and the tenth transistor constitute a mirror current source with the eighth transistor and the sixth transistor, respectively, an intermediate node of the first switch and the second switch is connected to an output terminal of the error signal,
wherein the first switch and the second switch are turned on upon receiving the narrow pulse signal.
9. The control circuit of claim 4, wherein the offset circuit comprises:
a first resistor having one end connected to the reference voltage and the other end connected to an input terminal of the error amplifier; and
a third switch and a second current source connected between the first resistor and the input terminal of the error amplifier,
wherein the third switch is turned on upon receiving the narrow pulse signal.
10. A switching converter, comprising:
the power circuit adopts at least one switching tube to control the transmission of electric energy from the input end to the output end, so as to generate output voltage according to the input voltage; and
a control circuit according to any of claims 1-9, adapted to generate a switch control signal to control the conductive state of the at least one switching tube.
11. The switching converter of claim 10, the power circuit employing a topology selected from any one of: the power supply comprises a floating type Buck power circuit, a field type Buck power circuit, a flyback power circuit, a Buck-Boost type power circuit and a Boost type power circuit.
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| CN202110805943.1A CN115622393A (en) | 2021-07-16 | 2021-07-16 | Switch converter and control circuit thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101350995B1 (en) * | 2012-12-18 | 2014-01-15 | 충북대학교 산학협력단 | Single inductor multiple output boost converter using current control scheme |
| US9602001B1 (en) * | 2015-11-06 | 2017-03-21 | National Cheng Kung University | Buck converter with a variable-gain feedback circuit for transient responses optimization |
| CN108880249A (en) * | 2015-08-25 | 2018-11-23 | 华为技术有限公司 | Voltage conversion circuit, method and Multiphase Parallel power-supply system |
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2021
- 2021-07-16 CN CN202110805943.1A patent/CN115622393A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101350995B1 (en) * | 2012-12-18 | 2014-01-15 | 충북대학교 산학협력단 | Single inductor multiple output boost converter using current control scheme |
| CN108880249A (en) * | 2015-08-25 | 2018-11-23 | 华为技术有限公司 | Voltage conversion circuit, method and Multiphase Parallel power-supply system |
| US9602001B1 (en) * | 2015-11-06 | 2017-03-21 | National Cheng Kung University | Buck converter with a variable-gain feedback circuit for transient responses optimization |
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