CN115616367A - Power electronic device state information online monitoring method and system - Google Patents
Power electronic device state information online monitoring method and system Download PDFInfo
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Abstract
The invention discloses a method and a system for on-line monitoring of state information of a power electronic device, which relate to the field of monitoring of power electronic equipment and comprise the following steps: determining a first estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature-sensitive electrical parameter; determining a second estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature of the power terminal of the device; determining a third estimated junction temperature of the power electronic device based on a shell temperature junction temperature estimation method; and monitoring the state information of the power electronic device in real time on line based on the first estimated junction temperature, the second estimated junction temperature and the third estimated junction temperature. The invention can accurately monitor the state information of the power electronic device in real time.
Description
Technical Field
The invention relates to the field of power electronic equipment monitoring, in particular to a method and a system for monitoring state information of a power electronic device on line.
Background
Most of the electric energy in the world, such as electric automobile driving equipment, rail traffic traction equipment, new energy power generation equipment, communication power supply equipment and the like, is converted and controlled through power electronic devices. The power electronic device is almost the most prone component in all electrical equipment to have faults, so that the reliability state or the aging evolution state of the power electronic device is monitored on line, and the method has important significance in mastering the state information of the power electronic device, guaranteeing the operation safety and realizing the health management/service life management of the electrical equipment.
The reliability state or aging evolution state monitoring of power electronic devices is always a hot point of research on power electronic equipment at home and abroad. The state monitoring method of the power electronic equipment comprehensively researched at home and abroad at present can be roughly summarized as follows: methods based on the external connection of the device terminals to sensors and circuits, methods based on the characteristics of the device terminals, and model-based methods.
Based on the method of externally connecting a sensor and a circuit at the end part of the device, for example, a terminal is led out at the emitter lead of the IGBT to be connected with an external resistance and other auxiliary measuring circuits, and the falling fault of the IGBT lead can be monitored. For example, resistors are connected in parallel on two sides of an emitter lead terminal of the IGBT, and the auxiliary circuit is triggered and an alarm is given out by using the change of voltage drop on the resistors. Although such a method based on externally connecting a sensor and a circuit to the end of the device can effectively monitor the occurrence of a fault, the introduction of the auxiliary circuit and/or the sensor element may change the internal structural layout of the inverter IGBT, and the power loss of the auxiliary circuit and/or the sensor element may also affect the accuracy of the state detection of the power electronic equipment.
The method based on the device end characteristics, such as an electrothermal loading experiment, researches the characteristics of the change of the on-state voltage drop, transconductance and grid threshold voltage of the power electronic device before and after fatigue along with the temperature so as to deduce the aging condition of the power electronic device. However, in practical application, because most of the power electronic devices are packaged in a module, the end characteristics such as on-state voltage drop, transconductance, gate threshold voltage and the like are difficult to directly measure, and because the factors such as measurement errors and weak signal changes are caused, that is, the accurate measurement of the method based on the end characteristics of the devices is very difficult, and practical engineering application is limited.
A model-based method, such as a thermal resistance model method, estimates the change of the internal thermal resistance of the power electronic device by analyzing the change of the power loss of the power electronic device in the whole operation range, thereby judging the fatigue degree of the solder layer under the chip; for example, a junction temperature model method, the aging condition of the power electronic device is deduced by utilizing the characteristic relation between the aging of the power electronic device and junction temperature change; for example, a method of combining a thermal resistance model and a junction temperature model compares the two junction temperature parameters obtained by the junction temperature model and the thermal resistance model, and judges the aging type of the power electronic device. However, such model-based methods may introduce certain errors, resulting in inaccurate measurement accuracy, and may also require higher accuracy for the corresponding thermal resistance model and/or junction temperature model.
In summary, the method based on the external connection of the sensor and the circuit at the end of the device needs to consider the measurement error of the sensor and the influence of the measurement error on the hardware structure, the method based on the characteristics of the end of the device is not suitable for realizing online measurement, and the method based on the model puts higher requirements on the precision of the model and the algorithm.
Disclosure of Invention
The invention aims to provide an on-line monitoring method and system for state information of a power electronic device, so as to achieve the purpose of accurately monitoring the state information of the power electronic device in real time.
In order to achieve the purpose, the invention provides the following scheme:
a method for monitoring state information of a power electronic device on line comprises the following steps:
determining a first estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature-sensitive electrical parameter; the power electronic device comprises a chip, a power terminal and a chip lower solder layer;
determining a second estimated junction temperature of the power electronic device based on a junction temperature estimation method of the device power terminal temperature;
determining a third estimated junction temperature of the power electronic device based on a shell temperature junction temperature estimation method;
monitoring state information of the power electronic device in real time on line based on the first estimated junction temperature, the second estimated junction temperature and the third estimated junction temperature; the state information comprises chip aging, chip non-aging, bonding wire non-aging, chip lower solder layer aging and chip lower solder layer non-aging.
Optionally, the determining a first estimated junction temperature of the power electronic device by using the junction temperature estimation method based on the temperature-sensitive electrical parameter specifically includes:
acquiring temperature-sensitive electrical parameters of the power electronic device;
estimating a first estimated junction temperature of the power electronic device on line according to the temperature-sensitive characteristic relation and the temperature-sensitive electrical parameter; the temperature-sensitive characteristic relation is a mapping relation between the temperature-sensitive electrical parameter and the junction temperature.
Optionally, the determining a second estimated junction temperature of the power electronic device by using the junction temperature estimation method based on the device power terminal temperature specifically includes:
acquiring a thermal resistance network parameter from a chip to a power terminal in the power electronic device;
acquiring the temperature of a power terminal of the power electronic device;
calculating a loss of the power electronics corresponding to a second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
according to the formula T B ＝P B *Z th_jt +T t Determining a second estimated junction temperature of the power electronics;
wherein, T B Representing a second estimated junction temperature, P B Representing the loss, T, corresponding to the second estimated junction temperature t Indicating power terminal temperature, Z th_jt Representing the thermal resistance network parameters from chip to power terminal.
Optionally, the determining a third estimated junction temperature of the power electronic device by the case temperature-based junction temperature estimation method specifically includes:
acquiring thermal resistance network parameters from a chip to a solder layer in the power electronic device;
acquiring the shell temperature of the power electronic device; the shell temperature is the temperature of the shell of the power electronic device or the copper bottom plate;
calculating a loss of the power electronic device corresponding to a third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
according to the formula T C ＝P*Z th_jc +T case Determining a third estimated junction temperature of the power electronics;
wherein, T C Representing a third estimated junction temperature, P representing a loss corresponding to the third estimated junction temperature, T case Indicates the shell temperature, Z th_jc Representing the thermal resistance network parameters from the chip to the solder layer.
Optionally, the real-time online monitoring of the state information of the power electronic device based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature specifically includes:
when the difference value between the first estimated junction temperature and the second estimated junction temperature is in a set interval, determining the state information of the power electronic device as that the chip is not aged and the bonding wire is not aged;
when the difference value between the first estimated junction temperature and the second estimated junction temperature is larger than the maximum value of the set interval, determining the state information of the power electronic device as that the chip is aged;
when the difference value between the first estimated junction temperature and the second estimated junction temperature is smaller than the minimum value of the set interval, determining the state information of the power electronic device as the bonding wire is aged;
when the difference value between the second estimated junction temperature and the third estimated junction temperature is smaller than or equal to a set threshold value, determining that the state information of the power electronic device is that the solder layer under the chip is not aged;
and when the difference value between the second estimated junction temperature and the third estimated junction temperature is larger than the set threshold value, determining the state information of the power electronic device as the aging of a solder layer under the chip.
An on-line monitoring system for status information of power electronic devices, comprising:
the first estimated junction temperature determination module is used for determining a first estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature-sensitive electrical parameter; the power electronic device comprises a chip, a power terminal and a chip lower solder layer;
the second estimated junction temperature determining module is used for determining a second estimated junction temperature of the power electronic device based on a junction temperature estimation method of the device power terminal temperature;
a third estimated junction temperature determination module, configured to determine a third estimated junction temperature of the power electronic device based on a junction temperature estimation method of the case temperature;
a state information monitoring module, configured to monitor state information of the power electronic device in real time on line based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature; the state information comprises chip aging, chip non-aging, bonding wire non-aging, chip lower solder layer aging and chip lower solder layer non-aging.
Optionally, the first estimated junction temperature determining module specifically includes:
the temperature-sensitive electrical parameter acquisition unit is used for acquiring temperature-sensitive electrical parameters of the power electronic device;
the first estimated junction temperature determining unit is used for estimating a first estimated junction temperature of the power electronic device on line according to the temperature-sensitive characteristic relation and the temperature-sensitive electrical parameter; the temperature-sensitive characteristic relation is a mapping relation between the temperature-sensitive electrical parameter and the junction temperature.
Optionally, the second estimated junction temperature determining module specifically includes:
the thermal resistance network parameter acquisition unit is used for acquiring thermal resistance network parameters from a chip to a power terminal in the power electronic device;
a power terminal temperature acquisition unit for acquiring a power terminal temperature of the power electronic device;
a loss calculation unit corresponding to a second estimated junction temperature, configured to calculate a loss of the power electronic device corresponding to the second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
a second estimated junction temperature determination unit for determining a junction temperature according to the formula T B ＝P B *Z th_jt +T t Determining a second estimated junction temperature of the power electronics;
wherein, T B Representing the second estimated junction temperature, P B Representing the loss, T, corresponding to the second estimated junction temperature t Indicating power terminal temperature, Z th_jt Representing the thermal resistance network parameters from chip to power terminal.
Optionally, the third estimated junction temperature determining module specifically includes:
the thermal resistance network parameter acquisition unit is used for acquiring thermal resistance network parameters from a chip to a solder layer in the power electronic device;
the shell temperature acquisition module is used for acquiring the shell temperature of the power electronic device; the shell temperature is the temperature of the shell of the power electronic device or the copper bottom plate;
a loss calculation unit corresponding to a third estimated junction temperature, configured to calculate a loss of the power electronic device corresponding to the third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
a third estimated junction temperature determination unit for determining a third estimated junction temperature according to the formula T C ＝P*Z th_jc +T case Determining a third estimated junction temperature of the power electronics;
wherein, T C Representing a third estimated junction temperature, P representing a loss corresponding to the third estimated junction temperature, T case Indicates the shell temperature, Z th_jc Representing the thermal resistance network parameter from chip to solder layer.
Optionally, the state information monitoring module specifically includes:
a chip non-aging and bonding wire non-aging determining unit, configured to determine, when a difference between the first estimated junction temperature and the second estimated junction temperature is in a set interval, that the state information of the power electronic device is chip non-aging and bonding wire non-aging;
a chip aging occurrence determination unit, configured to determine that the state information of the power electronic device is chip aging occurrence when a difference between the first estimated junction temperature and the second estimated junction temperature is greater than a maximum value of the set interval;
a bonding wire aging determining unit, configured to determine that the state information of the power electronic device is the aging of the bonding wire when a difference between the first estimated junction temperature and the second estimated junction temperature is smaller than a minimum value of the set interval;
a unit for determining that the solder layer under the chip is not aged, the unit being configured to determine that the state information of the power electronic device is that the solder layer under the chip is not aged when a difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to a set threshold;
and the under-chip solder layer aging determining unit is used for determining that the state information of the power electronic device is the under-chip solder layer aging when the difference value between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold value.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the invention discloses a method and a system for on-line monitoring of state information of a power electronic device. The method comprises the steps of establishing an aging diagnosis model based on junction temperature based on the characteristics of different junction temperatures measured by different methods under different aging modes of the power electronic device, specifically, respectively estimating the junction temperature of the power electronic device according to electric-thermal data in the actual working condition of the power electronic device by combining a junction temperature estimation method based on temperature-sensitive electric parameters, a junction temperature estimation method based on the temperature of a power terminal of the device and a junction temperature estimation method based on shell temperature, then comparing the three estimated junction temperatures, realizing real-time accurate online monitoring of state information of the power electronic device, and further realizing judgment of aging types of the power electronic device, including packaging aging (mainly including the aging of a solder layer under a chip), chip aging, bonding wire aging and the like.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic flow chart of a method for on-line monitoring status information of a power electronic device according to the present invention;
FIG. 2 is a flowchart illustrating an implementation of the aging type determination of the power electronic device according to the present invention;
FIG. 3 is a schematic structural diagram of an online status information monitoring system for power electronic devices according to the present invention;
FIG. 4 is a schematic diagram of an experimental platform for estimating and calibrating junction temperature based on temperature-sensitive electrical parameters according to the present invention;
FIG. 5 is a schematic diagram of an experimental system for estimating and calibrating junction temperature based on temperature-sensitive electrical parameters according to the present invention;
FIG. 6 is an electrical schematic diagram of an IGBT device of the invention;
FIG. 7 is a schematic structural diagram of an IGBT device according to the present invention;
FIG. 8 shows the collector-emitter voltage v of an IGBT device in one switching cycle according to the invention ce Collector current i c A schematic diagram of the waveform of (a); FIG. 8 (a) is a schematic diagram of a gate emitter voltage waveform of the present invention; FIG. 8 (b) is a graph showing collector current i according to the present invention c A waveform schematic diagram; FIG. 8 (c) shows the collector-emitter voltage v of the present invention ce A waveform schematic diagram;
FIG. 9 is a schematic diagram of a device power terminal temperature based junction temperature estimation method according to the present invention;
FIG. 10 is a schematic diagram illustrating an aging type determination according to the present invention; FIG. 10 (a) is a diagram illustrating the chip aging determination according to the present invention; FIG. 10 (b) is a schematic diagram illustrating the aging determination of a bonding wire according to the present invention; FIG. 10 (c) is a schematic diagram illustrating the aging judgment of the solder layer under the chip according to the present invention;
fig. 11 is a schematic diagram of a junction temperature variation curve estimated based on power terminals of a power electronic device according to the present invention.
Description of the symbols:
1. the device comprises a temperature controller, 2 parts of a control board, 3 parts of a high-power direct-current power supply, 4 parts of an upper computer, 5 parts of a Mixed Signal Oscilloscope (MSO), 6 parts of a high-voltage differential probe and high-precision circuit probe, 7 parts of a cooling fan, 8 parts of a device to be tested (DUT) and 9 parts of an inductive load (8 mh).
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to overcome the defects of the prior art, the invention provides a method for utilizing the junction temperature T of a chip j Temperature T of power terminal t Shell temperature T case The on-line monitoring method for representing and judging the aging states of the chip, the bonding wire and the solder layer under the chip by the information (or the mutual relation of the three) has the advantages of simple implementation, novel principle, scientific and reasonable aging judgment of the power electronic device, high confidence coefficient and the like. Under the support of big data, the hidden danger of the power electronic device can be found quickly, and effective support is provided for the service life prolonging operation of the power electronic device.
The invention also aims to improve the safety and economic benefit of the power electronic device, and is a new idea in the field of aging pre-diagnosis of the power electronic device.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
In order to achieve the purpose of the invention, the invention adopts the following technical scheme:
example one
Referring to fig. 1 and fig. 2, the present embodiment provides an online monitoring method for status information of a power electronic device (e.g., an inverter) of a power electronic device, where the power electronic device includes a chip, a power terminal, and a solder layer under the chip; the method comprises the following steps:
step 101: determining a first estimated junction temperature T of a power electronic device based on a temperature-sensitive electrical parameter junction temperature estimation method A (ii) a The method specifically comprises the following steps:
step 1011: temperature-sensitive electrical parameters of power electronic devices in the power electronic device are obtained.
Wherein, can measure and obtain various temperature sensitive electrical parameters through the calibration experiment according to actual conditions, for example: conduction voltage drop v ce(on) Off delay time t d_off And voltage rise time t at turn-off rv Voltage drop time t at turn-on fv And the like.
Step 1012: according to a temperature-sensitive characteristic relation between a temperature-sensitive electrical parameter and temperature which are calibrated in advance and the obtained temperature-sensitive electrical parameter, a first estimated junction temperature T of the power electronic device is estimated on line A 。
The temperature-sensitive characteristic relationship is determined according to a temperature-sensitive electrical parameter characteristic calibration experiment.
Taking the IGBT as an example, the determining process of the temperature-sensitive characteristic relationship is as follows:
firstly, an IGBT is selected and placed on a temperature calibration platform.
Secondly, a control variable method is adopted, and collector current i of the IGBT in a single switching period is measured under a certain current gradient and junction temperature gradient respectively c Signal and emitter voltage v ce A signal.
Then based on the collector current i c Signal and emitter voltage v ce And establishing experimental sample data by the signals through an offline data processing method.
And finally, determining a mapping relation table of temperature-sensitive electrical parameters and junction temperature of the power electronic device, namely a temperature-sensitive characteristic relation, based on experimental sample data.
Step 102: determining a second estimated junction temperature T of the power electronic device based on a junction temperature estimation method of the device power terminal temperature B (ii) a The method comprises the following specific steps:
step 1021: obtaining a thermal resistance network parameter Z from a chip to a power terminal in a power electronic device by means of experimental calibration or finite element simulation calculation and the like th_jt 。
Step 1022: online measurement and acquisition of power terminal temperature T of power electronic device t 。
Step 1023: calculating a loss P of the power electronic device corresponding to the second estimated junction temperature B 。
Step 1024: according to the thermal resistance network parameter Z th_jt Temperature T of power terminal t A loss P corresponding to the second estimated junction temperature B And an electrothermal model of the power electronic device chip-power terminal, estimating a second estimated junction temperature T of the power electronic device B 。
The estimation formula of the electric heating model of the power electronic device chip-power terminal is T B ＝P B *Z th_jt +T t 。
Wherein, a device loss model can be established according to a power electronic device manual or a calibration experiment, and the on-line measured power electronic device operation working point information (including direct current voltage, output current, duty ratio and shell temperature T) case Etc.) to calculate a loss P corresponding to the second estimated junction temperature B 。
Step 103: determining a third estimated junction temperature T of the power electronic device based on a shell temperature junction temperature estimation method C (ii) a The method specifically comprises the following steps:
step 1031: obtaining the thermal resistance network parameter Z from the chip to the solder layer in the power electronic device by means of a power electronic device manual or a calibration experiment and the like th_jc Such as the temperature of an NTC temperature sensitive resistor integrated at the power electronics mount.
Step 1032: on-line measurement and acquisition of shell temperature T of power electronic device case . The shell temperature T case Is the temperature of the housing or copper backplane of the power electronics.
Step 1033: a loss P of the power electronics corresponding to the third estimated junction temperature is calculated.
Step 1034: based on thermal resistance network parameter Z th_jc Shell temperature T case The loss P corresponding to the third estimated junction temperature and the electrothermal model of the chip-chip lower solder layer of the power electronic device are used for estimating the third estimated junction temperature T of the power electronic device C 。
The expression T of the electrothermal model of the chip-chip lower solder layer of the power electronic device C ＝P*Z th_jc +T case 。
Wherein, a device loss model can be established according to a power electronic device manual or a calibration experiment, and the on-line measured power electronic device operation working point information (including direct current voltage, output current, duty ratio and shell temperature T) case Etc.) to calculate a loss P corresponding to the third estimated junction temperature.
Step 104: based on the first estimated junction temperature T A The second estimated junction temperature T B And the third estimated junction temperature T C Monitoring the state information of the power electronic device in real time on line; the state information comprises chip aging, chip non-aging, bonding wire non-aging, chip lower solder layer aging and chip lower solder layer non-aging.
The junction temperatures of the power electronic devices estimated by different methods are compared with each other to judge the aging type of the power electronic devices, so that the characterization of the aging evolution of the power electronic devices and the online monitoring of state information are realized.
The judgment of the aging type of the power electronic device is realized as follows:
(1) A method of determining (or characterizing) chip aging of a power electronic device.
Two junction temperature parameters were used: i.e. the first estimated junction temperature T A (when the chip is aged, the turn-off process of the power electronic device is slowed down and the loss is increased, namely, the first estimated junction temperature T is estimated according to the temperature-sensitive electrical parameters such as turn-off time and the like A Will be greater than the actual chip junction temperature) and a second estimated junction temperature T B (the thermal resistance network parameter from the chip to the power terminal, i.e. the estimated second estimated junction temperature T, is hardly affected when the chip ages B Equal or nearly equal to the actual chip junction temperature). At the same operating point, when the first estimated junction temperature T A The trend of change will gradually deviate from the second estimated junction temperature T B And the difference between the two is delta T 1 ＝T A -T B When the chip size is increased, it can be determined that the chip of the power electronic device is aged.
(2) A method of determining (characterizing) bond wire aging of a power electronic device.
Two junction temperature parameters were used: i.e. the first estimated junction temperature T A (when the bond wires are aged and the chip is not aged, the first estimated junction temperature T A Equal or nearly equal to the actual chip junction temperature) and a second estimated junction temperature T B (when the bonding wire is aged and the chip is not aged, the equivalent internal resistance of the bonding wire is increased to cause the increase of heat productivity, and the second estimated junction temperature T B Will be greater than the actual chip junction temperature). At the same working point, when the second temperature T is higher B The trend of change will gradually deviate from the first estimated junction temperature T A And the difference value delta T between the two 1 ＝T A -T B When the degradation is reduced, it can be determined that the bonding wire of the power electronic device is degraded.
(3) A method for determining (characterizing) solder layer degradation under a power electronic device chip.
Two junction temperature parameters were used: i.e. the second estimated junction temperature T B (when the under-chip solder layer is degraded and the chip and the bonding wires are not degraded, the second estimated junction temperature T B Equal or nearly equal to the actual chip junction temperature T), and a third estimated junction temperature T C (when under-chip solder layer aging occurs, the actual thermal resistance will become greater, and the third estimated junction temperature T C Less than the actual chip junction temperature). At the same working point, when the third estimated junction temperature T C The trend of change will gradually deviate from the second estimated junction temperature T B And the difference between the two is delta T 2 ＝T B -T C When the solder layer is increased, it can be judged that the under-chip solder layer of the power electronic device is aged.
Step 104 described in this embodiment specifically includes:
when the first estimated junction temperature T A And the second estimated junction temperature T B When the difference value is in a set interval, determining the state information of the power electronic device as that the chip is not aged and the bonding wire is not aged.
When the first estimated junction temperature T A And the second estimated junction temperature T B When the difference between the values is larger than the maximum value of the set interval, the electric power is determinedThe state information of the electronic device is that the chip is aged.
When the first estimated junction temperature T A And the second estimated junction temperature T B And when the difference value is smaller than the minimum value of the set interval, determining the state information of the power electronic device as the aging of the bonding wire.
When the second estimated junction temperature T B And the third estimated junction temperature T C And when the difference value is less than or equal to the set threshold value, determining the state information of the power electronic device that the solder layer under the chip is not aged.
When the second estimated junction temperature T B And the third estimated junction temperature T C And when the difference value is larger than the set threshold value, determining the state information of the power electronic device as the aging of the solder layer under the chip.
Compared with the prior art, the method has the following obvious prominent substantive features and remarkable advantages:
1. the online monitoring method provided by the embodiment diagnoses the aging type by using the key state variable junction temperature of the power electronic device, and has the advantages of direct and reliable performance.
2. In the embodiment, the junction temperature is monitored by a junction temperature estimation method based on temperature-sensitive electrical parameters, a junction temperature estimation method based on the temperature of a power terminal of the device and a junction temperature estimation method based on the shell temperature, the aging types of the power electronic device are judged by comparing the monitored junction temperatures, the aging degree and the service life of the power electronic device are further diagnosed, the safety and the economic benefit of the power electronic device are improved, and a new thought is provided for the online diagnosis and research of the aging of the power electronic device.
3. The online monitoring method provided by the embodiment has the advantages of simple method, novel principle, scientific and reasonable aging judgment of the device, high confidence coefficient and the like, can quickly find hidden dangers of the device under the support of big data, and provides effective support for the service life prolonging of the power electronic device.
Example two
Referring to fig. 3, the present embodiment provides an online monitoring system for status information of a power electronic device, including:
a first estimated junction temperature determination module 301, configured to determine a first estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature-sensitive electrical parameter; the power electronic device comprises a chip, a power terminal and a chip lower solder layer.
A second estimated junction temperature determining module 302, configured to determine a second estimated junction temperature of the power electronic device based on a junction temperature estimation method of a device power terminal temperature.
A third estimated junction temperature determining module 303, configured to determine a third estimated junction temperature of the power electronic device based on a junction temperature estimation method of the case temperature.
A state information monitoring module 304, configured to monitor state information of the power electronic device in real time on line based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature; the state information comprises chip aging, chip non-aging, bonding wire non-aging, chip lower solder layer aging and chip lower solder layer non-aging.
The first estimated junction temperature determining module 301 specifically includes:
and the temperature-sensitive electrical parameter acquisition unit is used for acquiring the temperature-sensitive electrical parameters of the power electronic device.
The temperature-sensitive electrical parameter is measured according to the direct-current voltage of a bus of the power electronic device, a current sensor of a power electronic device (such as an inverter) and a peripheral circuit of the power electronic device.
The first estimated junction temperature determining unit is used for estimating a first estimated junction temperature of the power electronic device on line according to the temperature-sensitive characteristic relation and the temperature-sensitive electrical parameter; the temperature-sensitive characteristic relation is a mapping relation between the temperature-sensitive electrical parameter and the junction temperature.
The second estimated junction temperature determining module 302 specifically includes:
and the thermal resistance network parameter acquisition unit is used for acquiring thermal resistance network parameters from a chip to a power terminal in the power electronic device.
And the power terminal temperature acquisition unit is used for acquiring the power terminal temperature of the power electronic device acquired by the power terminal temperature sensor.
A loss calculation unit corresponding to a second estimated junction temperature, configured to calculate a loss of the power electronic device corresponding to the second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined from operating point information of the power electronics device; the power electronics are mounted on the power electronics.
A second estimated junction temperature determination unit for determining a junction temperature according to the formula T B ＝P B *Z th_jt +T t Determining a second estimated junction temperature of the power electronics.
Wherein, T B Representing a second estimated junction temperature, P B Representing the loss, T, corresponding to the second estimated junction temperature t Indicating power terminal temperature, Z th_jt Representing the thermal resistance network parameters from chip to power terminal.
The third estimated junction temperature determining module 303 specifically includes:
and the thermal resistance network parameter acquisition unit is used for acquiring thermal resistance network parameters from a chip to a solder layer in the power electronic device.
The shell temperature acquisition module is used for acquiring the shell temperature of the power electronic device acquired by the shell temperature sensor; the shell temperature is the temperature of the shell or the copper base plate of the power electronic device.
A loss calculation unit corresponding to a third estimated junction temperature, configured to calculate a loss of the power electronic device corresponding to the third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics.
A third estimated junction temperature determination unit for determining a junction temperature according to the formula T C ＝P*Z th_jc +T case Determining a third estimated junction temperature of the power electronics.
Wherein, T C Representing a third estimated junction temperature, P representing a loss corresponding to the third estimated junction temperature, T case Indicates the shell temperature, Z th_jc Representing the thermal resistance network parameter from chip to solder layer.
The status information monitoring module 304 specifically includes:
and the chip non-aging and bonding wire non-aging determining unit is used for determining the state information of the power electronic device as the chip non-aging and the bonding wire non-aging when the difference value between the first estimated junction temperature and the second estimated junction temperature is in a set interval.
And the chip aging determining unit is used for determining the state information of the power electronic device as the chip aging when the difference value between the first estimated junction temperature and the second estimated junction temperature is larger than the maximum value of the set interval.
And the bonding wire aging determining unit is used for determining the state information of the power electronic device as the bonding wire aging when the difference value between the first estimated junction temperature and the second estimated junction temperature is smaller than the minimum value of the set interval.
And the under-chip solder layer non-aging determination unit is used for determining that the state information of the power electronic device is that the under-chip solder layer is not aged when the difference value between the second estimated junction temperature and the third estimated junction temperature is less than or equal to a set threshold value.
And the under-chip solder layer aging determining unit is used for determining that the state information of the power electronic device is the under-chip solder layer aging when the difference value between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold value.
EXAMPLE III
The embodiment provides an on-line monitoring method for state information of an IGBT device of an inverter, and the state of the IGBT device is determined by comparing junction temperatures of the IGBT device acquired by three junction temperature estimation methods.
Fig. 6 is an electrical symbol diagram of the IGBT device, C is a collector of the IGBT device, E is an emitter of the IGBT device, and G is a gate of the IGBT device.
Referring to fig. 7, the IGBT device according to this embodiment includes: the device comprises a chip, an anti-parallel diode chip, a bonding wire, a chip lower solder layer, a DBC upper copper layer, a DBC ceramic substrate, a DBC lower copper layer, a DBC lower solder layer, a copper bottom plate and a power terminal.
The chip is connected with a bonding wire, the bonding wire is connected with an anti-parallel diode chip, the bonding wire is connected with an upper copper layer of a DBC, an upper copper layer of the DBC is connected with a power terminal, the chip is connected with a lower welding flux layer of the chip, the anti-parallel diode chip is connected with a lower welding flux layer of the chip, the lower welding flux layer of the chip is connected with the upper copper layer of the DBC, the upper copper layer of the DBC is connected with a ceramic substrate of the DBC, the ceramic substrate of the DBC is connected with the lower copper layer of the DBC, the lower copper layer of the DBC is connected with the lower welding flux layer of the DBC, and the lower welding flux layer of the DBC is connected with a copper bottom plate.
Meanwhile, the upper copper layers of the DCB are divided into three layers which are respectively connected with three output terminals C \ E \ G of the IGBT device, and the three upper copper layers are not connected with each other (without electrical connection).
The method for monitoring the state information of the IGBT device of the inverter on line comprises the following steps: firstly, respectively collecting the temperature T of the power terminals of the IGBT device t Shell temperature T of IGBT device case And the collecting and emitting voltage V of the IGBT device ce DC bus voltage U of inverter d And an inverter output current signal i; and then, respectively estimating the junction temperature of the IGBT device by adopting a junction temperature estimation method based on temperature-sensitive electrical parameters, a junction temperature estimation method based on the temperature of a power terminal of the device and a junction temperature estimation method based on the shell temperature, and finally judging the aging type of the IGBT device by comparing the three estimated junction temperatures with each other, thereby realizing the characterization of the aging evolution of the IGBT device and the online monitoring of state information.
The junction temperature monitoring method of the IGBT device comprises the following steps:
(1) Junction temperature estimation method based on temperature-sensitive electrical parameters: collecting and transmitting voltage V of IGBT device on line ce And an inverter output current signal i for selecting the voltage rise time t when the IGBT device is turned off rv As a temperature-sensitive electrical parameter, and estimating a first estimated junction temperature T of the IGBT device according to a temperature-sensitive characteristic relation between the temperature-sensitive electrical parameter and the temperature which is calibrated in advance A 。
The temperature-sensitive characteristic calibration test is realized on a temperature calibration platform shown in fig. 4 (a schematic diagram is shown in fig. 5), a single-phase inverter circuit is adopted for double-pulse test, and British fly is selectedThe IGBT device (model: FF50R12RT 4) of Rabdosia was tested. In the experiment, the heating sheets are started after the heating sheets on two sides of the device 8 to be tested (namely, an IGBT device), after the temperature controller 1 displays stable temperature and maintains the temperature for 15 minutes, the temperature of a chip in the device 8 to be tested is considered to be the same as the temperature in a box, collector currents 10A, 15A, 20A, 25A, 30A, 35A and 40A at the turn-off time are adjusted by changing the pulse width of a first pulse, and the collection and emission voltages V of the IGBT device in a single switching period at 30 ℃, 60 ℃, 90 ℃ and 120 ℃ are respectively tested ce Collector current i c And recording experimental data (i.e. the collected voltage V) ce Collector current i c ) Voltage V collected during a single switching cycle ce Collector current i c The waveform of (2) is shown in fig. 8.
(2) Junction temperature estimation method based on device power terminal temperature: firstly, obtaining a thermal resistance network parameter Z from a chip to a power terminal in an IGBT device by means of experimental calibration or simulation calculation and the like th_jt Then measuring the temperature T of the power terminal of the IGBT device on line t And a loss P corresponding to the second estimated junction temperature B And finally according to an electric heating model T of the IGBT device B ＝P B *Z th_jt +T t Estimating a second estimated junction temperature T of the IGBT device B 。
A schematic diagram of a device power terminal temperature based junction temperature estimation method is shown in fig. 9. The power electronic device is used as a tested element and is arranged in the power electronic device; the power terminals of the power electronic device are connected with an external load or a power supply through the wiring row. The infrared temperature sensor is arranged near the power electronic device (the distance is 1 mm-100 m), the temperature measuring point is the power terminal of the power electronic device, and the measured temperature T of the power terminal of the power electronic device is measured t Sending to a power electronics electrothermal model unit in the MCU to calculate a second estimated junction temperature T on-line B . The result shows that the power terminal of the power electronic device is positioned outside the power electronic device, so that the online temperature measurement is convenient, the heat capacity from the power terminal to the chip is small, namely, the junction temperature of the chip inside the power electronic device can be timely and accurately measured by utilizing the temperature of the power terminal, the influence of the fatigue of a welding flux layer under the chip of the power electronic device is avoided, and the method can be combined with a thermal resistance network methodAnd (4) combining a temperature-sensitive electrical parameter method with the establishment of a joint model to finally determine the aging state of the IGBT device.
(3) Junction temperature estimation method based on shell temperature: firstly, obtaining a thermal resistance network parameter Z from an IGBT device chip to a device meter shell by means of an IGBT device manual or a calibration experiment and the like th_jc And then measuring the shell temperature (T) of the IGBT device on line case ) And the loss P corresponding to the third estimated junction temperature is finally obtained according to the electric heating model T of the IGBT device C ＝P*Z th_jc +T case Estimating a third estimated junction temperature T C 。
Wherein, the loss P corresponding to the third estimated junction temperature is the device loss model provided by the IGBT device manual and the inverter operation operating point information (including direct current voltage, output current, duty ratio and shell temperature T) measured on line case ) And (4) calculating.
According to the aging type determination diagram shown in fig. 10, it can be found that the actual junction temperature and the measured temperature inside the power electronic device are affected by the aging state and the aging degree, but the first estimated junction temperature T can be estimated by comparison A And a second estimated junction temperature T B A second estimated junction temperature T B And a third estimated junction temperature T C And judging the aging state of the power electronic device. When Δ T 1 ＝T A -T B When the value of (A) is increased, the chip of the power electronic device is aged; when Δ T 1 ＝T A -T B When the value of (A) is smaller, the aging of the bonding wire of the power electronic device is indicated; when Δ T 2 ＝T B -T C When the value of (A) is large, it indicates that the under-chip solder layer of the power electronic device is deteriorated.
In this embodiment, junction temperature estimation of the IGBT device is performed according to electrical data of the IGBT device in an actual working condition by combining a junction temperature estimation method based on a temperature-sensitive electrical parameter, a junction temperature estimation method based on a device power terminal temperature, and a junction temperature estimation method based on a case temperature, and the aging type of the IGBT device is determined by comparing the three estimated junction temperatures.
For example: the temperature of the IGBT device in a 380V/7.5kW three-phase frequency converter is measured experimentally. In the experimental process, a frequency converter drives a 380V/3kW permanent magnet synchronous motor to run at a rated speed, and an infrared thermal imager is adopted to measure the temperature of a power terminal and a chip of an IGBT device on line at the same time. In order to facilitate the infrared thermal imager to measure the temperature of the chip of the IGBT device, the shell of the IGBT device of the phase A of the frequency converter is removed, and the internal chip is exposed in the measuring range of the infrared thermal imager.
The curves of the temperature changes of the IGBT device at different positions were experimentally measured, as shown in fig. 11. Estimated junction temperature T in fig. 10 B Is determined by the method provided by the invention. The experimental result shows that the temperature of the IGBT device at different positions gradually rises along with the increase of the running time of the frequency converter. The junction temperature estimated by the invention is basically consistent with the junction temperature measured by the infrared thermal imager.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the foregoing, the description is not to be taken in a limiting sense.
Claims (10)
1. A method for on-line monitoring state information of a power electronic device is characterized by comprising the following steps:
determining a first estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature-sensitive electrical parameter; the power electronic device comprises a chip, a power terminal and a chip lower solder layer;
determining a second estimated junction temperature of the power electronic device based on a junction temperature estimation method of the device power terminal temperature;
determining a third estimated junction temperature of the power electronic device based on a shell temperature junction temperature estimation method;
monitoring state information of the power electronic device in real time on line based on the first estimated junction temperature, the second estimated junction temperature and the third estimated junction temperature; the state information comprises chip aging, chip non-aging, bonding wire non-aging, chip lower solder layer aging and chip lower solder layer non-aging.
2. The method for on-line monitoring of state information of a power electronic device according to claim 1, wherein the determining of the first estimated junction temperature of the power electronic device by the junction temperature estimation method based on the temperature-sensitive electrical parameter specifically comprises:
acquiring temperature-sensitive electrical parameters of the power electronic device;
estimating a first estimated junction temperature of the power electronic device on line according to the temperature-sensitive characteristic relation and the temperature-sensitive electrical parameter; the temperature-sensitive characteristic relation is a mapping relation between the temperature-sensitive electrical parameter and the junction temperature.
3. The method for on-line monitoring of state information of a power electronic device according to claim 1, wherein the determining of the second estimated junction temperature of the power electronic device by the junction temperature estimation method based on the device power terminal temperature specifically comprises:
acquiring thermal resistance network parameters from a chip to a power terminal in the power electronic device;
acquiring the temperature of a power terminal of the power electronic device;
calculating a loss of the power electronics corresponding to a second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
according to the formula T B ＝P B *Z th_jt +T t Determining a second estimated junction temperature of the power electronics;
wherein, T B Representing the second estimated junction temperature, P B Representing the loss, T, corresponding to the second estimated junction temperature t Indicating power terminal temperature, Z th_jt Representing the thermal resistance network parameters from chip to power terminal.
4. The method for online monitoring of state information of a power electronic device according to claim 1, wherein the determining of the third estimated junction temperature of the power electronic device by the case temperature-based junction temperature estimation method specifically includes:
acquiring thermal resistance network parameters from a chip to a solder layer in the power electronic device;
acquiring the shell temperature of the power electronic device; the shell temperature is the temperature of the shell of the power electronic device or the copper bottom plate;
calculating a loss of the power electronic device corresponding to a third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
according to the formula T C ＝P*Z th_jc +T case Determining a third estimated junction temperature of the power electronics;
wherein, T C Representing a third estimated junction temperature, P representing a loss corresponding to the third estimated junction temperature, T case Indicates the shell temperature, Z th_jc Representing the thermal resistance network parameter from chip to solder layer.
5. The on-line monitoring method for state information of a power electronic device according to claim 1, wherein the real-time on-line monitoring of the state information of the power electronic device based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature specifically comprises:
when the difference value between the first estimated junction temperature and the second estimated junction temperature is in a set interval, determining the state information of the power electronic device as that the chip is not aged and the bonding wire is not aged;
when the difference value between the first estimated junction temperature and the second estimated junction temperature is larger than the maximum value of the set interval, determining the state information of the power electronic device as that the chip is aged;
when the difference value between the first estimated junction temperature and the second estimated junction temperature is smaller than the minimum value of the set interval, determining the state information of the power electronic device as that the bonding wire is aged;
when the difference value between the second estimated junction temperature and the third estimated junction temperature is smaller than or equal to a set threshold value, determining that the state information of the power electronic device is that the solder layer under the chip is not aged;
and when the difference value between the second estimated junction temperature and the third estimated junction temperature is larger than the set threshold value, determining the state information of the power electronic device as the aging of a solder layer under the chip.
6. An on-line monitoring system for status information of power electronic devices, comprising:
the first estimated junction temperature determination module is used for determining a first estimated junction temperature of the power electronic device based on a junction temperature estimation method of the temperature-sensitive electrical parameter; the power electronic device comprises a chip, a power terminal and a chip lower solder layer;
the second estimated junction temperature determining module is used for determining a second estimated junction temperature of the power electronic device based on a junction temperature estimation method of the device power terminal temperature;
a third estimated junction temperature determination module, configured to determine a third estimated junction temperature of the power electronic device based on a junction temperature estimation method of the case temperature;
a state information monitoring module, configured to monitor state information of the power electronic device in real time on line based on the first estimated junction temperature, the second estimated junction temperature, and the third estimated junction temperature; the state information comprises chip aging, chip non-aging, bonding wire non-aging, chip lower solder layer aging and chip lower solder layer non-aging.
7. The system for online monitoring of state information of power electronic devices according to claim 6, wherein the first estimated junction temperature determining module specifically includes:
the temperature-sensitive electrical parameter acquisition unit is used for acquiring temperature-sensitive electrical parameters of the power electronic device;
the first estimated junction temperature determining unit is used for estimating a first estimated junction temperature of the power electronic device on line according to the temperature-sensitive characteristic relation and the temperature-sensitive electrical parameter; the temperature-sensitive characteristic relation is a mapping relation between the temperature-sensitive electrical parameter and the junction temperature.
8. The system for on-line monitoring of state information of a power electronic device according to claim 6, wherein the second estimated junction temperature determining module specifically includes:
the thermal resistance network parameter acquisition unit is used for acquiring thermal resistance network parameters from a chip to a power terminal in the power electronic device;
a power terminal temperature acquisition unit for acquiring a power terminal temperature of the power electronic device;
a loss calculation unit corresponding to a second estimated junction temperature, configured to calculate a loss of the power electronic device corresponding to the second estimated junction temperature; the loss corresponding to the second estimated junction temperature is determined from operating point information of the power electronics device; the power electronics are mounted on the power electronics device;
a second estimated junction temperature determination unit for determining a junction temperature according to the formula T B ＝P B *Z th_jt +T t Determining a second estimated junction temperature of the power electronics;
wherein, T B Representing a second estimated junction temperature, P B Representing the loss, T, corresponding to the second estimated junction temperature t Indicating power terminal temperature, Z th_jt Representing the thermal resistance network parameters from chip to power terminal.
9. The system for online monitoring of state information of power electronic devices according to claim 6, wherein the third estimated junction temperature determining module specifically includes:
the thermal resistance network parameter acquisition unit is used for acquiring thermal resistance network parameters from a chip to a solder layer in the power electronic device;
the shell temperature acquisition module is used for acquiring the shell temperature of the power electronic device; the shell temperature is the temperature of the shell of the power electronic device or the copper bottom plate;
a loss calculation unit corresponding to a third estimated junction temperature, configured to calculate a loss of the power electronic device corresponding to the third estimated junction temperature; the loss corresponding to the third estimated junction temperature is determined from operating point information of the power electronic device; the power electronics are mounted on the power electronics device;
a third estimated junction temperature determination unit for determining a junction temperature according to the formula T C ＝P*Z th_jc +T case Determining a third estimated junction temperature of the power electronics;
wherein, T C Representing a third estimated junction temperature, P representing a loss corresponding to the third estimated junction temperature, T case Indicates the shell temperature, Z th_jc Representing the thermal resistance network parameter from chip to solder layer.
10. The system for on-line monitoring of status information of power electronic devices according to claim 6, wherein the status information monitoring module specifically comprises:
a chip non-aging and bonding wire non-aging determining unit, configured to determine, when a difference between the first estimated junction temperature and the second estimated junction temperature is within a set interval, that the state information of the power electronic device is chip non-aging and bonding wire non-aging;
a chip aging occurrence determination unit, configured to determine that the state information of the power electronic device is chip aging occurrence when a difference between the first estimated junction temperature and the second estimated junction temperature is greater than a maximum value of the set interval;
a bonding wire aging determining unit, configured to determine that the state information of the power electronic device is the aging of the bonding wire when a difference between the first estimated junction temperature and the second estimated junction temperature is smaller than a minimum value of the set interval;
a unit for determining that the solder layer under the chip is not aged, the unit being configured to determine that the state information of the power electronic device is that the solder layer under the chip is not aged when a difference between the second estimated junction temperature and the third estimated junction temperature is less than or equal to a set threshold;
and the under-chip solder layer aging determining unit is used for determining that the state information of the power electronic device is the under-chip solder layer aging when the difference value between the second estimated junction temperature and the third estimated junction temperature is greater than the set threshold value.
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| CN116992819B (en) * | 2023-09-25 | 2024-01-26 | 江西五十铃汽车有限公司 | IGBT junction temperature estimation method and system |
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