CN115599447A - Energy saving method, energy saving device, electronic device, and computer storage medium - Google Patents
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Abstract
The disclosure provides a power saving method, which includes responding to the condition that a device is currently in a state of running an idle task and enters a power saving mode, and executing a sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode. The dynamic power consumption of the equipment can be reduced, and the aim of saving energy is fulfilled. The power consumption is reduced by reducing the clock frequency and the power supply voltage (namely the power supply voltage), energy conservation can be realized without reducing the working frequency, correspondingly, the embedded software does not need to be adaptively modified, the implementation is easy, and the system efficiency is not reduced. The present disclosure also provides an energy saving device, an electronic device, and a computer storage medium.
Description
Technical Field
The invention relates to the technical field of communication, in particular to an energy-saving method, energy-saving equipment, electronic equipment and a computer storage medium.
Background
With the rapid development of SOC (System on Chip) technology, embedded chips with higher and higher integration level are emerging, so that one Chip can complete the functions of several original chips, and meanwhile, as higher requirements are put forward for application software, the integration level and complexity of the application software become higher and higher. The power consumption of the whole system is higher and higher with the upgrade of the software and hardware (chips, application software, etc.). Moreover, for technical reasons, the power consumption of 5G (5 th Generation Mobile Communication Technology, fifth Generation Mobile Communication Technology) base stations is higher than that of 4G (the 4Generation Mobile Communication Technology, fourth Generation Mobile Communication Technology) base stations, and the number of 5G base stations is more than 2 times of the number of 4G base stations. Therefore, under the same coverage, the energy consumption of the 5G base station may be several times of the energy consumption of the 4G base station in the limit case.
At present, a commonly used energy-saving method is to reduce the dominant frequency of a chip (the dominant frequency of the chip, i.e. the working frequency of the chip), and the method has several disadvantages: firstly, the embedded software is supported only by adaptive modification, which is not beneficial to the maintenance of the embedded software in the later period and has certain limitation; and will have a large impact on system efficiency.
Therefore, a new energy-saving method is needed to solve the above-mentioned shortcomings.
Disclosure of Invention
In view of the above-mentioned shortcomings in the prior art, the present disclosure provides an energy saving method, an energy saving device, an electronic device, and a computer storage medium.
In a first aspect, an embodiment of the present disclosure provides an energy saving method, where the method includes:
and in response to the condition that the equipment is currently in a state of running an idle task and enters the energy-saving mode, executing sleep operation for reducing the clock frequency or the power supply voltage of the equipment according to the energy-saving mode.
In some embodiments, after the performing of the sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode, the method further comprises:
and terminating the sleep operation in response to a preset wake-up condition corresponding to the energy-saving mode being satisfied.
In some embodiments, the performing of the sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode includes:
performing a sleep operation for reducing the device clock frequency in case the power saving mode is a shallow power saving mode;
performing a sleep operation for lowering the device power supply voltage in a case where the power saving mode is a deep power saving mode.
In some embodiments, the shallow power saving modes include a first shallow power saving mode, and the performing the sleep operation to reduce the device clock frequency comprises: the operating clock of the processor of the device is turned off.
In some embodiments, entering the first shallow energy saving mode condition comprises: the number of online users is less than a preset first threshold.
In some embodiments, the preset wake-up condition corresponding to the first shallow power saving mode includes: the device generates a hardware interrupt.
In some embodiments, the shallow power saving modes include a second shallow power saving mode, and the performing the sleep operation for reducing the clock frequency of the device includes: the operating clock of the processor and the operating clock of the hardware accelerator of the device are turned off.
In some embodiments, after the performing the sleep operation for reducing the device clock frequency according to the power-saving mode, the method further comprises: disabling a hardware interrupt to prevent the hardware interrupt from waking up a working clock of the processor.
In some embodiments, entering the second shallow energy saving mode condition comprises: the utilization rate of the physical resource blocks is smaller than a preset second threshold value.
In some embodiments, the preset wake-up condition corresponding to the second shallow energy saving mode includes: a specified memory space of the device is accessed.
In some embodiments, the power saving mode is a deep power saving mode, and the performing of the sleep operation for reducing the device power supply voltage includes: and deleting all cells on a baseband board of the equipment, and turning off the working power supply of the baseband board.
In some embodiments, entering the deep power saving mode condition comprises: the number of active users is zero.
In some embodiments, the preset wake-up condition corresponding to the deep power saving mode includes: the preset time length is reached.
In another aspect, an embodiment of the present disclosure provides an energy saving device, including:
the judging module is used for judging whether the equipment is in a state of running an idle task at present and judging whether the condition of entering an energy-saving mode is met;
and the sleep module is used for responding to the condition that the judging module judges that the equipment is currently in the state of running an idle task and enters the energy-saving mode, and executing sleep operation for reducing the clock frequency or the power supply voltage of the equipment according to the energy-saving mode.
In another aspect, an embodiment of the present disclosure provides an electronic device, including:
one or more processors;
a storage device having one or more programs stored thereon;
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the power saving method as previously described.
In yet another aspect, the disclosed embodiments provide a computer storage medium having a computer program stored thereon, wherein the program when executed implements the energy saving method as described above.
According to the energy-saving method provided by the embodiment of the disclosure, by responding to the condition that the equipment is currently in the state of running an idle task and enters the energy-saving mode, the sleep operation for reducing the clock frequency or the power supply voltage is executed according to the energy-saving mode, so that the dynamic power consumption of the equipment can be reduced, and the purpose of saving energy is achieved. The power consumption is reduced by reducing the clock frequency and the power supply voltage (namely the power supply voltage), energy conservation can be realized without reducing the working frequency, correspondingly, the embedded software does not need to be adaptively modified, the implementation is easy, and the system efficiency is not reduced.
Drawings
Fig. 1 is a first schematic flow chart of an energy saving method according to an embodiment of the present disclosure;
fig. 2 is a schematic flow chart diagram ii of an energy saving method provided in the embodiment of the present disclosure;
fig. 3 is a schematic block diagram of an energy saving device according to an embodiment of the present disclosure.
Detailed Description
Example embodiments will be described more fully hereinafter with reference to the accompanying drawings, but which may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, … … specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Embodiments described herein may be described with reference to plan and/or cross-sectional views in light of idealized schematic illustrations of the disclosure. Accordingly, the example illustrations can be modified in accordance with manufacturing techniques and/or tolerances. Accordingly, the embodiments are not limited to the embodiments shown in the drawings, but include modifications of configurations formed based on a manufacturing process. Thus, the regions illustrated in the figures have schematic properties, and the shapes of the regions shown in the figures illustrate specific shapes of regions of elements, but are not intended to be limiting.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
An embodiment of the present disclosure provides an energy saving method, as shown in fig. 1, the method may include the following steps:
and S11, responding to the condition that the equipment is currently in the state of running the idle task and enters the energy-saving mode, and executing the sleep operation for reducing the clock frequency or the power supply voltage of the equipment according to the energy-saving mode.
The operating system establishes an Idle Task (Idle Task), the Idle Task is put into operation when no other Task enters a ready state, the priority of the Idle Task is always set to be lowest, and if the equipment is in a state of operating the Idle Task currently, the equipment does not operate any other Task currently.
The power saving modes include various types, and once the device has entered a state of running an idle task and entered a certain power saving mode condition is satisfied, the power saving device may perform a sleep operation for reducing a clock frequency or a power supply voltage according to the corresponding power saving mode.
The static power consumption of a device is typically calculated according to the following equation (1):
wherein, P s For static power consumption, t is time, V DD For supply voltage, I leak Is the current.
The dynamic power consumption of a device is typically calculated according to the following equation (2):
wherein, P d For dynamic power consumption, t is time, C is load capacitance, V DD For supply voltage, f c Is the clock frequency.
As can be seen from equations (1) and (2), the static statePower consumption P s Dynamic power consumption P in direct proportion to supply voltage and current of circuit d In direct proportion to the quadratic square of the supply voltage and the clock frequency, in a CMOS (Complementary Metal Oxide Semiconductor) circuit, the static power consumption is relatively small, and much more the dynamic power consumption is discussed. Since in a CMOS circuit the dynamic power consumption is related to the supply voltage and the clock frequency (different from the operating frequency of the chip), the dynamic power consumption is directly proportional to the quadratic sum of the supply voltage and the clock frequency, the higher the supply voltage and the higher the clock frequency, the greater the dynamic power consumption. According to the energy-saving method provided by the embodiment of the disclosure, by responding to the condition that the equipment is currently in the state of running an idle task and enters the energy-saving mode, the sleep operation for reducing the clock frequency or the power supply voltage is executed according to the energy-saving mode, so that the dynamic power consumption of the equipment can be reduced, and the purpose of saving energy is achieved. The power consumption is reduced by reducing the clock frequency and the power supply voltage (namely the power supply voltage), energy conservation can be realized without reducing the working frequency, correspondingly, the embedded software does not need to be adaptively modified, the implementation is easy, and the system efficiency is not reduced.
In order to achieve energy saving to the maximum extent, the energy saving mode needs to be entered as far as possible, and the device needs to be able to guarantee normal operation of the device even when entering the energy saving mode. However, the requirements of the equipment are not constant when the equipment works normally, and a single energy-saving mode is probably incapable of universally meeting various working requirements of the equipment, so that different energy-saving modes can be set according to the current actual working condition of the equipment, and the purposes of saving energy as much as possible and ensuring the normal work of the equipment are achieved. Accordingly, in some embodiments, the energy saving modes include a shallow energy saving mode and a deep energy saving mode, and the shallow energy saving mode includes a first shallow energy saving mode and a second shallow energy saving mode.
The equipment can not be always in the energy-saving mode, otherwise the normal work of the equipment is seriously influenced, so that the equipment can automatically exit the corresponding energy-saving mode at a proper time by setting the awakening condition.
Accordingly, in some embodiments, as shown in fig. 2, after the performing of the sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode (i.e., S11), the method may further include the steps of:
and S12, responding to the preset awakening condition corresponding to the energy-saving mode, and terminating the sleep operation.
When the equipment is in a certain energy-saving mode, once the awakening condition of the energy-saving mode is met, the equipment stops sleeping, automatically exits the corresponding energy-saving mode, and completely recovers to normal work.
As described above, in the CMOS circuit, the dynamic power consumption is in a direct proportional relationship with the quadratic square of the power supply voltage and the clock frequency, and the power saving is achieved by lowering the power supply voltage, and the power saving degree is higher than that achieved by lowering the clock frequency. The device may then also enter a deep power saving mode by reducing the supply voltage.
Accordingly, in some embodiments, the performing of the sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode (i.e., S11) may include the steps of: performing a sleep operation for reducing a clock frequency of the device in a case where the power saving mode is a shallow power saving mode; in the case where the power saving mode is the deep power saving mode, a sleep operation for lowering a power supply voltage of the device is performed.
The shallow energy saving mode includes a first shallow energy saving mode and a second shallow energy saving mode, the device enters the first shallow energy saving mode when the working demand of the device is relatively large, the device enters the second shallow energy saving mode when the working demand of the device is relatively small, and the degree of reducing the clock frequency of the device by the device in the two shallow energy saving modes may be different, that is, the sleep operation performed by the device in the two shallow energy saving modes to reduce the clock frequency of the device may be different.
Accordingly, in some embodiments, when the shallow power saving mode is the first shallow power saving mode, the performing of the sleep operation for reducing the clock frequency of the device may include: the operating clock of the processor of the device is turned off. After the working clock of the processor is closed, the level is not turned over any more, only the processor sleeps, the clock frequency is reduced, the sleeping time is short, and the high-load operation requirement of the system can be met.
As the working requirements of the device change, the device may enter different energy saving modes, for example, in a case where the working requirements of the device gradually become complex and diverse, the device may sequentially enter a deep energy saving mode, a second shallow energy saving mode, and a first shallow energy saving mode. That is, the energy saving device can enter different energy saving modes by setting different conditions for entering the energy saving mode.
Accordingly, in some embodiments, entering the first shallow energy saving mode condition may include: the number of online users is less than a preset first threshold. The number of online users, or what may be called the system activation user level, refers to the total number of active users in the case of the system currently having active users. Taking energy-saving equipment as a base station or equipment therein as an example, the online users are users currently accessed to the base station, and if the number of the online users is smaller than a preset first threshold, it indicates that the traffic of all cells will be low at this time, that is, the equipment has a working requirement but the working requirement is not very large at this time, and the first shallow energy-saving mode can be entered.
In the disclosed embodiment, the device enters the first shallow power saving mode, the second shallow power saving mode, and the deep power saving mode by performing a sleep operation. The first shallow layer energy-saving mode, the second shallow layer energy-saving mode and the deep layer energy-saving mode are different in sleep degree, and the difficulty degree and condition for waking up the sleep of the three energy-saving modes are also different.
In some embodiments, the wake-up condition of the first shallow power saving mode may include: the device generates a hardware interrupt. The hardware interrupt may be generated by the device itself (when the hardware interrupt occurs), or may be generated by a predetermined specified device. The first shallow energy-saving mode is awakened through hardware interruption, because the hardware interruption happens occasionally, the dormancy of the first shallow energy-saving mode is easily awakened, and the first shallow energy-saving mode can be called as a millisecond-level energy-saving mode, which means that when the equipment is in the first shallow energy-saving mode, normal work can be recovered within milliseconds.
As previously described, the sleep operations performed by the device to reduce the clock frequency of the device in the two shallow power saving modes may be different. Accordingly, in some embodiments, when the shallow power saving mode is the second shallow power saving mode, the performing of the sleep operation for reducing the clock frequency of the device may include: the operating clocks of the processor and the hardware accelerator of the device are turned off. After the working clock of the processor and the working clock of the hardware accelerator are closed, the level is not turned over any more, and the processor and the hardware accelerator are in sleep, so that the clock frequency of the equipment can be further reduced on the premise of ensuring the normal work of the equipment.
In some embodiments, after the performing of the sleep operation for reducing the clock frequency of the device according to the power saving mode, the method further comprises: the hardware interrupt is disabled to prevent the hardware interrupt from waking up the operating clock of the processor. A hardware Interrupt is an asynchronous signal indicating that attention or changes are required to perform a synchronous event, a way to avoid wasting valuable time of the processor in polling loops, waiting for external events, is automatically generated by peripherals (such as network cards, hard disks, keyboards, etc.) connected to the system, each device or device set has its own IRQ (Interrupt Request), and based on the IRQ, the processor can distribute the corresponding Interrupt Request to the corresponding hardware driver (the hardware driver is usually a subroutine in the kernel, not an independent process), for example, when a network card receives a packet, a hardware Interrupt is issued.
Because hardware interruption occurs occasionally, and the processor can respond to the hardware interruption to automatically turn on the working clock, in order to avoid that the working clock of the processor is awakened by the hardware interruption and exits the second shallow energy-saving mode, after the working clock of the processor and the working clock of the hardware accelerator are turned off, the hardware interruption can be prevented from awakening the working clock of the processor, and the equipment is ensured to be continuously in the second shallow energy-saving mode.
In some embodiments, entering the second shallow energy saving mode condition may include: the utilization rate of the physical resource blocks is smaller than a preset second threshold value. The Physical Resource Block (PRB) utilization rate may be used to measure the current working requirement of the device, and the second threshold may be set according to an actual situation, for example, may be set to 12%, 10%, 8%, and so on. If the utilization rate of the physical resource block is smaller than the preset second threshold, it indicates that the working requirement of the equipment is smaller at this time, and the second shallow energy-saving mode can be entered.
In some embodiments, the wake-up condition of the second shallow power saving mode may include: a specified memory space of the device is accessed. The specified memory space is accessed, which may be a spontaneous event of the device, or a preset specified memory space access event, for example, the device may preset a specified memory space access event after 30 seconds, and when the time for the device to enter the second shallow energy saving mode reaches 30 seconds, the preset specified memory space access event occurs, and the second shallow energy saving mode is awakened. The second shallow energy saving mode may also be referred to as a second level energy saving mode, which means that the device can resume normal operation within seconds when the device is in the second shallow energy saving mode. The degree of dormancy of the second shallow power saving mode is greater than that of the first shallow power saving mode, and the condition for waking up the dormancy of the second shallow power saving mode is also more difficult than that of the first shallow power saving mode.
In some embodiments, when the energy saving mode is the deep energy saving mode, taking the energy saving device as a base station or a device therein as an example, the performing of the sleep operation for lowering the power supply voltage of the device may include: and deleting all cells on the baseband board of the equipment, and turning off the working power supply of the baseband board. The baseband board is a circuit with the functions of processing (such as encryption and decryption) of modulating signals and demodulating signals, controlling the circuit and the like, and the working power supply of the baseband board is turned off, namely, the power supply voltage is reduced to 0V, so that the equipment has longer sleep time and more obvious energy-saving effect.
In some embodiments, entering a deep power saving mode condition may include: the number of active users is zero. A number of active users of zero indicates that there are no active users of the system. If the number of the activated users is zero, the working requirement of the equipment is extremely low at the moment, and a deep energy-saving mode can be entered.
It should be noted that, in the embodiment of the present disclosure, in addition to determining whether to enter the energy saving mode according to the number of online users, the utilization rate of the physical Resource block, and the number of activated users, it may also be determined whether to enter the energy saving mode by combining other parameters such as a Radio Resource Control (RRC) connection number, a Key Performance Indicator (KPI), and the like.
In some embodiments, the wake-up condition of the deep power saving mode may include: the preset time length is reached. The preset time duration may be 4 minutes, 5 minutes, 6 minutes, and the like, and the sleep of the deep power saving mode may be awakened through a preset timing event. The deep power saving mode may also be referred to as a minute power saving mode, which means that the device resumes normal operation between minutes when it is in the deep power saving mode. The deep power saving mode has a greater degree of dormancy than the second shallow power saving mode, and the condition for waking up the deep power saving mode is more difficult than the condition for waking up the second shallow power saving mode.
The traditional energy-saving method is to reduce the dominant frequency of a chip (namely the working frequency of the chip), and the method also has a great disadvantage that the comprehensive benefit is lower when the chip runs on equipment with high time requirement. According to the embodiment of the disclosure, the sleep of the energy-saving mode can be rapidly awakened by setting the awakening condition of the energy-saving mode, so that the high requirement of the equipment on time is met, and the energy-saving benefit is improved.
It should be noted that, in the embodiment of the present disclosure, in addition to the device generating a hardware interrupt, the specified memory space of the device being accessed, and the preset time reaching the wake-up condition as the energy-saving mode, other events such as an internal operating system scheduling cycle interrupt, inter-core communication, and the like may be used as the wake-up condition to wake up the sleep of the energy-saving mode.
Based on the same technical concept, an embodiment of the present disclosure further provides an energy saving device, as shown in fig. 3, the energy saving device may include:
the determining module 101 is configured to determine whether the device is currently in a state of running an idle task, and determine whether a condition for entering an energy saving mode is satisfied.
And the sleep module 102 is configured to, in response to the determination module determining that the device is currently in a state of running an idle task and a condition of entering an energy saving mode is met, execute a sleep operation for reducing a clock frequency or a power supply voltage of the device according to the energy saving mode.
In some embodiments, the hibernation module 102 is further to: and terminating the sleep operation in response to a preset wake-up condition corresponding to the energy-saving mode being satisfied.
In some embodiments, the hibernation module 102 is to:
performing a sleep operation for reducing a clock frequency of a device in a case where the power saving mode is a shallow power saving mode;
performing a sleep operation for lowering a power supply voltage of the device in a case where the power saving mode is a deep power saving mode.
In some embodiments, the shallow power saving modes include a first shallow power saving mode, and the hibernation module 102 is configured to: the operating clock of the processor of the device is turned off.
In some embodiments, entering the first shallow energy saving mode condition comprises: the number of online users is less than a preset first threshold.
In some embodiments, the preset wake-up condition corresponding to the first shallow power saving mode includes: the device generates a hardware interrupt.
In some embodiments, the shallow energy saving modes include a second shallow energy saving mode, and the hibernation module 102 is configured to: the operating clocks of the processor and the hardware accelerator of the device are turned off.
In some embodiments, after the performing of the sleep operation for reducing the clock frequency of the device according to the power saving mode, the method further comprises: disabling a hardware interrupt to prevent the hardware interrupt from waking up a working clock of the processor.
In some embodiments, entering the second shallow energy saving mode condition comprises: the utilization rate of the physical resource blocks is smaller than a preset second threshold value.
In some embodiments, the preset wake-up condition corresponding to the second shallow energy saving mode includes: a specified memory space of the device is accessed.
In some embodiments, the power saving mode is a deep power saving mode, and the sleep module 102 is configured to: and deleting all cells on a baseband board of the equipment, and turning off the working power supply of the baseband board.
In some embodiments, entering the deep power saving mode condition comprises: the number of active users is zero.
In some embodiments, the preset wake-up condition corresponding to the deep power saving mode includes: the preset time length is reached.
In the embodiments of the present disclosure, the energy saving device may be an embedded system (e.g., a chip) including a processor, hardware, application software and an operating system, or a part thereof, or may be a device including an embedded system, such as a base station, an embedded system platform, and the like. Taking the determining module 101 and the hibernation module 102 as the operating system in the embedded system as an example, the application software may fill parameters for instructing to enter the first shallow energy saving mode, the second shallow energy saving mode or the deep energy saving mode in the background configuration table, analyze the parameters in the background configuration table and set different energy saving modes, and then turn on the energy saving mode switch located at the bottom layer of the operating system according to the set energy saving mode. When the number of online users is less than a preset first threshold, the switch of the first shallow energy-saving mode can be turned on, when the utilization rate of the physical resource block is less than a preset second threshold, the switch of the second shallow energy-saving mode can be turned on, and when the number of active users is zero, the switch of the deep energy-saving mode can be turned on. And the bottom layer of the operating system can determine whether the conditions for entering each energy-saving mode are met according to the states of the three energy-saving mode switches.
It should be understood that if the power saving mode needs to be switched, the application software may refill the parameters in the background configuration table and switch the power saving mode switch located at the bottom of the operating system. If the application software sets a certain energy-saving mode, the switch of the energy-saving mode is to be turned on, but the switches of other energy-saving modes are already turned on currently, the switches of other energy-saving modes need to be turned off first, and then the switch of the set energy-saving mode is turned on.
When the application software analyzes the parameters in the background configuration table and sets different energy-saving modes, different events can be preset for the different energy-saving modes as wake-up conditions. After monitoring that the device enters a state of running an idle task, the operating system can judge whether an energy-saving mode switch at the bottom layer of the operating system is turned on, and if the first shallow sleep energy-saving mode switch is turned on, a working clock of the processor can be turned off; if the second shallow sleep energy-saving mode is on, the working clock of the processor and the working clock of the hardware accelerator can be closed, and hardware interruption is forbidden; if the deep energy-saving mode switch is turned on, all cells on the baseband board can be deleted, and the working power supply of the baseband board is turned off.
If the operating system enters the first shallow energy-saving mode by closing the working clock of the processor, the processor automatically opens the working clock to recover normal work in response to hardware interrupt generated by the equipment. If the operating system enters the second shallow energy-saving mode by closing the working clock of the processor and the working clock of the hardware accelerator and prohibiting the hardware interrupt, the processor and the hardware accelerator automatically open the working clock in response to the specified memory space being accessed, and the operating system can cancel the prohibition of the hardware interrupt and resume normal operation. If the operating system enters a deep energy-saving mode by deleting all cells on the baseband board and closing the working power supply of the baseband board, the baseband board automatically re-electrifying and running in response to the arrival of the preset time length to establish the cells, and normally performing task scheduling processing after the cells are established to restore normal work.
It should be noted that the other energy saving modes can be entered only after the current energy saving mode is awakened.
The energy-saving equipment provided by the embodiment of the disclosure has longer sleep time and more obvious energy saving under the condition of low system utilization rate; under the condition of high system utilization rate, the sleep time is shorter, and the high-load operation requirement of the system can be met. Under the actual hardware single-board environment and under the condition that the system processing load is 10% to 40%, the power consumption and energy saving benefit can reach about 14%.
In addition, an embodiment of the present disclosure also provides an electronic device, including:
one or more processors;
a storage device having one or more programs stored thereon;
when the one or more programs are executed by the one or more processors, the one or more processors are caused to implement the energy saving method provided by the foregoing embodiments.
The embodiment of the present disclosure also provides a computer storage medium, on which a computer program is stored, wherein the program, when executed, implements the energy saving method provided by the foregoing embodiments.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods disclosed above, functional modules/units in the apparatus, may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as is well known to those skilled in the art.
Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted in a generic and descriptive sense only and not for purposes of limitation. In some instances, features, characteristics and/or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics and/or elements described in connection with other embodiments, unless expressly stated otherwise, as would be apparent to one skilled in the art. Accordingly, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the disclosure as set forth in the appended claims.
Claims (16)
1. A method for conserving energy, the method comprising:
and in response to the condition that the equipment is currently in a state of running an idle task and enters the energy-saving mode, executing sleep operation for reducing the clock frequency or the power supply voltage of the equipment according to the energy-saving mode.
2. The power saving method of claim 1, wherein after the performing of the sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode, the method further comprises:
and terminating the sleep operation in response to a preset wake-up condition corresponding to the energy-saving mode being satisfied.
3. The power saving method of claim 2, wherein the performing of the sleep operation for reducing the clock frequency or the power supply voltage of the device according to the power saving mode comprises:
performing a sleep operation for reducing the device clock frequency in a case where the power saving mode is a shallow power saving mode;
performing a sleep operation for lowering the device power supply voltage in a case where the power saving mode is a deep power saving mode.
4. The power saving method of claim 3, wherein the shallow power saving mode comprises a first shallow power saving mode, and wherein the performing the sleep operation for reducing the clock frequency of the device comprises: the operating clock of the processor of the device is turned off.
5. The energy saving method of claim 4, wherein entering the first shallow energy saving mode condition comprises: the number of online users is less than a preset first threshold.
6. The energy saving method according to claim 4, wherein the preset wake-up condition corresponding to the first shallow energy saving mode comprises: the device generates a hardware interrupt.
7. The power saving method of claim 3, wherein the shallow power saving mode comprises a second shallow power saving mode, and wherein the performing the sleep operation for reducing the clock frequency of the device comprises: the operating clock of the processor and the operating clock of the hardware accelerator of the device are turned off.
8. The power saving method of claim 7, wherein after the performing the sleep operation for reducing the clock frequency of the device according to the power saving mode, the method further comprises: disabling a hardware interrupt to prevent the hardware interrupt from waking up a working clock of the processor.
9. The energy saving method of claim 7, wherein entering the second shallow energy saving mode condition comprises: the utilization rate of the physical resource blocks is smaller than a preset second threshold value.
10. The energy saving method according to claim 7, wherein the preset wake-up condition corresponding to the second shallow energy saving mode comprises: a specified memory space of the device is accessed.
11. The power saving method of claim 3, wherein the power saving mode is a deep power saving mode, and the performing the sleep operation for lowering the device power supply voltage comprises: and deleting all cells on a baseband board of the equipment, and turning off the working power supply of the baseband board.
12. The energy saving method of claim 11, wherein entering the deep power saving mode condition comprises: the number of active users is zero.
13. The method according to claim 11, wherein the preset wake-up condition corresponding to the deep power saving mode comprises: the preset time length is reached.
14. An energy saving device, characterized in that the energy saving device comprises:
the judging module is used for judging whether the equipment is in a state of running an idle task at present and judging whether the condition of entering an energy-saving mode is met;
and the sleep module is used for responding to the condition that the judging module judges that the equipment is currently in the state of running an idle task and enters the energy-saving mode, and executing sleep operation for reducing the clock frequency or the power supply voltage of the equipment according to the energy-saving mode.
15. An electronic device, comprising:
one or more processors;
a storage device having one or more programs stored thereon;
the one or more programs, when executed by the one or more processors, cause the one or more processors to implement the energy saving method of any one of claims 1-13.
16. A computer storage medium having a computer program stored thereon, wherein the program when executed implements the energy saving method of any one of claims 1-13.
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| CN202110721640.1A CN115599447A (en) | 2021-06-28 | 2021-06-28 | Energy saving method, energy saving device, electronic device, and computer storage medium |
| PCT/CN2022/098957 WO2023273890A1 (en) | 2021-06-28 | 2022-06-15 | Energy-saving method, energy-saving device, electronic device, and computer-readable storage medium |
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| CN202110721640.1A CN115599447A (en) | 2021-06-28 | 2021-06-28 | Energy saving method, energy saving device, electronic device, and computer storage medium |
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| US9426743B2 (en) * | 2013-01-08 | 2016-08-23 | Qualcomm Incorporated | Systems and methods to optimize power consumption for LTE eMBMS |
| CN105704793A (en) * | 2014-11-28 | 2016-06-22 | 中兴通讯股份有限公司 | Base station control method and base station |
| CN105807892A (en) * | 2016-03-10 | 2016-07-27 | 浙江大学 | Low power consumption mode switching method of embedded real time operating system |
| CN106060911B (en) * | 2016-07-19 | 2020-05-08 | 上海华为技术有限公司 | Dormancy and awakening method of radio frequency unit and base station |
| US20220353809A1 (en) * | 2019-08-16 | 2022-11-03 | Telefonaktiebolaget Lm Ericsson (Publ) | User Equipment (UE) Sleep Mode Adaptation |
| CN111459562A (en) * | 2020-04-13 | 2020-07-28 | 芯来智融半导体科技(上海)有限公司 | Improved system and method for switching sleep mode based on RISC-V architecture |
| CN111741518A (en) * | 2020-06-22 | 2020-10-02 | 湖南国科微电子股份有限公司 | WiFi chip circuit and WiFi device |
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