CN115589342B

CN115589342B - Power consumption management method of SAS controller

Info

Publication number: CN115589342B
Application number: CN202211165748.8A
Authority: CN
Inventors: 王剑铎; 宫晓渊; 刁永翔; 汪宏志; 李越峰; 杨亮
Original assignee: Wuxi Zhongxing Microsystem Technology Co ltd
Current assignee: Wuxi Zhongxing Microsystem Technology Co ltd
Priority date: 2022-09-23
Filing date: 2022-09-23
Publication date: 2023-07-07
Anticipated expiration: 2042-09-23
Also published as: CN115589342A

Abstract

The invention provides a power consumption management method of an SAS controller, which comprises the following steps: dividing a plurality of clocks inside the SAS controller; monitoring the working state of an SAS link and controlling a clock switch of a corresponding functional module according to the working state; when the idle time of the SAS link exceeds a preset idle time threshold, the SAS controller initiates a low-power handshake to the opposite terminal equipment and enters a low-power state. According to the scheme of the invention, clocks of all functional modules are independently controlled in real time according to the state of the SAS link, and the hardware automatically initiates a process of entering the low power consumption of the physical layer according to the idle time of the SAS link, so that software intervention is not needed, and the power consumption of the SAS controller is reduced.

Description

Power consumption management method of SAS controller

Technical Field

The invention belongs to the technical field of disk connection, and particularly relates to a power consumption management method of an SAS controller.

Background

SATA (Serial ATA) is a high-speed serial bus that is the primary I/O interface widely used in the industry between storage devices and hosts. SAS (serial attached SCSI) is similar to SATA technology, is a new generation of SCSI technology, belongs to a point-to-point full duplex serial protocol, and adopts a serial interface to obtain a higher transmission speed. Meanwhile, the SAS design considers the downward compatible SATA technology, achieves interconnection and data transmission between the SAS controller and the SATA device through an STP protocol (SATA channel protocol), and has good expansibility and compatibility. Bandwidth performance may be improved between SAS devices by grouping multiple links into one wide port. SAS controllers support large-scale disk management through one or more expander (disk expander) extensions. Fig. 1 is a view illustrating an interconnection scenario between a SAS controller and a disk device. SAS HBAs (host bus adapters) may contain one or more SAS controllers inside. Each SAS controller may be directly connected to a SAS disk. Alternatively, more types of disks may be connected by connecting to an Expander to expand the storage network. Interconnection with SATA disks may be achieved through STP bridges within the Expander. The management of the large-scale disk array can be realized by cascading the Expander.

As shown in fig. 2, the standard SAS controller mainly includes the following modules inside:

1) The transmission layer M1.1 and the link layer M1.2 of the SMP sub-protocol (serial management protocol) in the SAS protocol are responsible for sending and receiving SMP frames;

2) The transmission layer M2.1 and the link layer M2.2 of the SSP sub-protocol (serial SCSI protocol) in the SAS protocol are responsible for transmitting and receiving SSP frames;

3) The transmission layer M3.1 and the link layer M3.2 of the STP sub-protocol (SATA channel protocol) in the SAS protocol are responsible for transmitting and receiving STP frames;

4) The Port layer M4 is responsible for the management of the wide ports, and selects proper connection to transmit frames;

5) The SAS link layer M5 is responsible for framing of the link layer, calculation of CRC, scrambling and descrambling of data, management of the link, low power consumption and power supply control, primitive decoding and the like;

6) The physical layer M4 is responsible for OOB physical link initialization, 8/10b codec, parallel-to-serial conversion, data clock recovery, and the like.

According to the SAS protocol, a point-to-point connection needs to be established in advance before initiating transmission of frames. Firstly, an OAF frame is sent through an SAS link layer to establish point-to-point connection with a target, and after the connection is established successfully, the OAF frame can be sent and received with the target. After the frame transmission or reception is completed, the currently established connection is closed. The link returns to the idle state, waits for a new service request to arrive, and establishes connection with the corresponding target again.

In a typical SAS frame transmission as shown in fig. 3, the command transmission procedure of the SAS controller and the target device is as follows:

1) The link is in an idle state, and at the moment, a transmission layer and a link layer of a sub-protocol (SSP/SMP/STP) are both in idle states;

2) An OAF frame is sent out by the SAS link layer requesting a new connection to the target device (Expander or disk device). When an OPEN ACCEPT primitive is received, this connection establishment is indicated as successful.

3) After the connection is established successfully, the corresponding sub-protocol transmission layer and the link layer start to work, and exchange frames with the target equipment;

4) When the frame transmission is completed, the two parties mutually send CLOSE primitive, and the current connection is closed;

5) At this point the link is again restored to the idle state awaiting transmission of the next frame.

Because three sub-protocols SMP, SSP and STP are specified in the SAS protocol, only one of the sub-protocols is in an operating state within the same period of time, i.e., both of the remaining sub-protocols are in an idle state. However, in the conventional design scheme, the clock signal inside the SAS controller is always inverted, so that even if the SAS controller is in an idle state, significant power consumption is still brought about, more heat is generated, which has an adverse effect on the design of the whole SOC chip. When the temperature of the chip rises to a certain extent, the operating clock frequency of the entire system must be lowered. Fig. 4 shows the internal structure of a typical ICG integrated gated clock module, including a low level sensitive latch and a logic and gate. When the input enable signal clk_en is at a high level, the input clock clk is output; when clk_en is low, the output clock g_clk is turned off and always in a low state. By integrating the gating clock module, when the logic module does not work, the clock of the corresponding logic module can be closed, and the power consumption of the system can be reduced.

In addition, serDes (serial-deserializer) in SAS physical layer is also a high power element of SOC, which can be significantly reduced if physical layer is put into a low power state without a connected device or link being inactive for a long period of time. For example, fig. 5 depicts a process for physical layer entry and exit low power consumption as specified in the SAS protocol. In fig. 5:

1) Under the condition that the SAS link layer is in an idle state, software requests the physical layer to enter a Partial or Slber low-power consumption state by configuring a register of the SAS controller;

2) When receiving a request of software, the SAS link layer sends out a PS_REQ (PARTIAL) primitive or a PS_REQ (SLUMBER) primitive according to the requested low power consumption mode, and after receiving the PS_ACK primitive replied by the opposite terminal, the SAS controller indicates the physical layer to enter the requested low power consumption state;

3) When the low power consumption state needs to be exited, the software instructs the physical layer of the home terminal to exit the low power consumption state by configuring a register of the SAS controller, and then the physical layer wakes up the opposite terminal by sending a COMWAKE sequence;

4) After receiving the COMWAKE sequence responded by the opposite terminal, starting to send an ALIGN primitive;

5) When the two parties exchange ALIGN primitives, the process of exiting the low power state is ended, and the SAS controller can start frame transmission.

As can be seen from the above description, if the low power consumption state is entered in the manner specified in the SAS protocol, the system software needs to query the state of the link layer first, and when the link is in the idle state, the software initiates entering the low power consumption flow by configuring the register. From the perspective of system software design, this low power access procedure brings additional software requirements and consumes part of CPU resources, thereby reducing the efficiency of the system software.

Disclosure of Invention

The invention aims at a power consumption management method of an SAS controller, so as to eliminate adverse effects of a power consumption management process on system software operation of the SAS controller. The power consumption management method of the SAS controller comprises the following steps:

s101, dividing a plurality of clocks in the SAS controller according to a sub-protocol type or a hierarchical structure;

s102, monitoring the working state of an SAS link, and controlling a clock switch of a corresponding functional module according to the working state;

s103, when the idle time of the SAS link exceeds a preset idle time threshold, initiating a low-power handshake to the opposite terminal equipment by the SAS controller, and entering a low-power state.

Preferably, the partitioning the multiple clocks inside the SAS controller according to the sub-protocol type or the hierarchy further comprises:

and setting independent switches to control clocks of corresponding sub-protocol modules according to SMP, SSP or STP sub-protocol functions of the SAS controller.

Preferably, a power consumption management unit is disposed in the SAS controller, and the power consumption management unit includes a dynamic clock management module, so as to convert an input clock source into a plurality of clocks capable of being controlled by independent switches through clock enabling signals generated by a state machine, and provide clock inputs for each functional module.

Preferably, the plurality of clocks include working clocks of the dynamic clock management module, port layer and SAS link layer clocks, and transmission layer and link layer clocks belonging to SMP, SSP or STP sub-protocols respectively.

Preferably, the monitoring the working state of the SAS link, and controlling the clock switch of the corresponding functional module according to the working state, further includes:

when the current link does not establish any sub-protocol connection, the dynamic clock management module closes clocks corresponding to all sub-protocols;

when the dynamic clock management module receives a sending request of an upper layer application, opening a clock corresponding to a sub-protocol to which the sending request belongs;

after the connection is established successfully, the transmission layer and the link layer under the current sub-protocol start to carry out frame transmission with the opposite terminal, and after the frame transmission is completed, the current connection is closed;

and after the dynamic clock management module monitors that the connection is closed, closing the clock corresponding to the current sub-protocol.

when the SAS controller does not establish a physical link, the dynamic clock management module turns off clocks of the Port layer and the SAS link layer;

when the SAS controller and the opposite terminal have successfully established a physical link, the dynamic clock management module responds to the high level of a physical link ready signal to turn on clocks of the Port layer and the SAS link layer;

and when the physical link is lost again, if the dynamic clock management module monitors that the physical link ready signal is changed to a low level, the Port layer and SAS link layer clocks are closed.

Preferably, the power consumption management unit comprises a low power consumption control module, wherein a software configurable threshold value register and a low power consumption mode selection register are arranged in the low power consumption control module;

the threshold register defines a maximum idle time threshold of the SAS link layer;

the low power mode selection register is used for defining a requested low power mode, and the low power mode comprises a Partial or a Slber.

Preferably, when the idle time of the SAS link exceeds a preset idle time threshold, the SAS controller initiates a low-power handshake to the peer device, and enters a low-power state, and further includes:

after the low-power consumption control module monitors that the current link is closed, a timer starts to work, and when the timer reaches an idle time threshold preset by the threshold register, the low-power consumption control module controls an SAS link layer to send a low-power consumption mode primitive and waits for the response of the opposite terminal;

after receiving the response of the opposite terminal, the SAS controller indicates the physical layer to enter a low power consumption mode;

and when the physical layer receives the indication signal with low power consumption, starting to enter a low power consumption mode, and when the dynamic clock management module monitors that the physical link ready signal is changed to a low level, closing the Port layer and SAS link layer clocks, and only keeping the opening state of the clocks of the power consumption management unit.

Preferably, after entering the low power consumption state, further comprising:

when the low power consumption state needs to be exited, executing write operation on a register of the SAS controller through software, and initiating a request for exiting the low power consumption by the SAS controller.

Preferably, after entering the low power consumption state, further comprising:

when the low power consumption state needs to be exited, an upper layer application directly issues a frame sending request of a corresponding sub-protocol to the SAS controller, and the low power consumption control module exits a low power consumption mode after receiving the request and then starts frame transmission of the corresponding sub-protocol.

Compared with the prior art, the method for managing the power consumption of the SAS controller reduces the power consumption of the chip SOC by arranging the power consumption management unit in the SAS controller and independently controlling the clocks of all the functional modules in real time according to the state of the SAS link. When the idle time of the SAS link exceeds a preset idle time threshold, the hardware automatically initiates the low power consumption of the physical layer to enter the process, so that the power consumption of the chip SOC is further reduced. The whole process does not need software intervention, the power consumption of the SAS controller can be greatly reduced, and the design difficulty of the whole chip is reduced.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent to those having ordinary skill in the art from the description or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the prior art descriptions, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 shows a schematic diagram of an interconnection structure of a SAS controller and a disk device according to the related art.

Fig. 2 shows a schematic diagram of the internal architecture of a standard SAS controller according to the prior art.

Fig. 3 shows a command transmission process signaling diagram of a SAS controller and an Expander in a SAS frame transmission process according to the prior art.

Fig. 4 shows a schematic diagram of the internal structure of an ICG gated clock module according to the prior art.

Fig. 5 shows a signaling diagram of physical layer entry and exit low power procedures as specified by the SAS protocol in accordance with the prior art.

Fig. 6 shows a flowchart of a power consumption management method of a SAS controller in accordance with the present invention.

Fig. 7 shows a schematic diagram of an internal structure of a SAS controller according to the present invention.

Fig. 8 shows an internal block diagram of the dynamic clock management module DCM according to the invention.

Fig. 9 shows a clock control signaling diagram of the dynamic clock management module DCM in the success of the chain establishment under the SMP sub-protocol and in the frame transfer process according to the invention.

Fig. 10 shows a clock control signaling diagram of the dynamic clock management module DCM according to the invention when a link down failure under the SMP sub-protocol occurs.

Fig. 11 shows a clock control signaling diagram of the dynamic clock management module DCM in the SSP sub-protocol chaining and frame transfer process according to the invention.

Fig. 12 shows a clock control signaling diagram of the dynamic clock management module DCM in the link under STP sub-protocol and frame transfer according to the invention.

Fig. 13 shows a diagram of the dynamic clock management module DCM clock control signaling for Port layer and SAS link layer in accordance with the present invention.

Fig. 14 shows an exemplary workflow signaling diagram of the low power control module LP OC according to the present invention.

Figure 15 shows a process signalling diagram for exiting a low power consumption state and frame transmission by initiating an STP transmission request according to the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which are derived by a person skilled in the art from the embodiments according to the invention without creative efforts, fall within the protection scope of the invention.

In order to solve the above problems, the invention eliminates the extra power consumption introduced by the fact that the SMP, SSP or STP sub-protocol module or the module clock which belongs to the SAS link layer in the SAS controller still keeps turning over when the SAS link layer does not work by arranging the power consumption management unit in the SAS controller according to the characteristics of the SAS protocol. By dividing each functional module into independent clock domains, based on the point-to-point transmission characteristic of the SAS protocol, the clocks of each functional module are dynamically controlled to be switched according to the current state of the link, including the clock of the corresponding sub-module is closed when SMP, SSP or STP connection is in the closed state, so as to achieve the purpose of reducing the power consumption of the chip.

In addition, aiming at the problems that in the prior art, system software actively inquires the state of an SAS link layer and manually initiates a low-power-consumption entering flow, so that the high complexity of software design and the efficiency of the system software are reduced, the invention automatically sends out a low-power-consumption primitive specified in an SAS protocol by hardware after the idle time of the link reaches a preset idle time threshold value by monitoring the idle state of the SAS link, and handshakes with opposite terminal equipment to request the physical layers of the two parties to enter a low-power-consumption mode. Thereby further reducing the power consumption of SerDes in the physical layer due to the link being in idle state for a long time. The whole process is automatically completed by hardware without software intervention, and extra burden on software is avoided while the power consumption of the SOC is reduced.

Fig. 6 shows a flowchart of a power consumption management method of a SAS controller in accordance with the present invention. Specifically, the method for managing power consumption of the SAS controller according to the present invention includes:

s101, dividing a plurality of clocks in the SAS controller according to the type or the hierarchical structure of the sub-protocol.

The invention divides the clocks of the internal modules of the SAS controller according to SMP, SSP or STP sub-protocol functions or hierarchical structures, so that the clocks of each sub-module can be independently controlled by a switch, and the purpose of reducing power consumption is achieved by closing the clocks of the non-working modules. Meanwhile, a power consumption management unit PMU is arranged in the SAS controller, and the PMU mainly comprises a dynamic clock management module DCM and a low power consumption control module LP_OC, as shown in FIG. 7. Wherein the dynamic clock management module DCM is configured to dynamically control the switching of the corresponding sub-module clock by monitoring the state of the link.

S102, monitoring the working state of the SAS link, and controlling the clock switch of the corresponding functional module according to the working state.

Fig. 8 is a block diagram of the internal structure of the DCM dynamic clock management module. The dynamic clock management module DCM converts an original clock enable signal generated by a state machine from an input clock source into a plurality of clocks capable of being controlled by independent switches, and provides clock inputs for the functional modules respectively, so that the original single clock is divided into the following 5 sub-clocks in the SAS controller of fig. 7:

1) The clock 1 is a normally open clock domain and provides a working clock for the DCM module;

2) Clock 2 is a sub-clock provided for Port layer and SAS link layer, and is started after DCM monitors that physical link is successfully established, and is closed when physical link is lost;

3) The clock 3, the clock 4 and the clock 5 are sub-clocks of a transmission layer and a link layer module of the SMP/SSP/STP sub-protocol respectively, and the DCM starts the clock of the corresponding sub-protocol module only when the connection of a certain sub-protocol is opened according to the current link state, otherwise, the clock is closed. For example, when the SSP sub-protocol connection is opened, clock 4 of the SSP sub-protocol module is turned on, while

clocks

3, 5 of the SMP, STP sub-protocols are turned off.

Referring to fig. 8, three DCM Sxp FSM modules are used to control the corresponding

clocks

3, 4 and 5 of the transport and link layers of the SMP/SSP/STP, respectively. The DCM_SL_FSM module is used for controlling clock 2 of the Port layer and the SAS link layer. The DCM dynamically performs on-off control of the clocks of the various functional modules by monitoring the state of the current link. While also reserving a software controlled interface, software can control cfg_ signals through configuration registers, where cfg_dcm_en is used to enable or disable DCM functions, cfg_sl_clken, cfg_smp_clken, cfg_ssp_clken are used to force shut down clocks of SL, SMP, SSP, or STP sub-modules, respectively.

Referring to fig. 9, taking SMP as an example, a control flow of the dynamic clock management module DCM for clock 3 in a process of actively initiating and successfully establishing a chain and transmitting a frame by the SAS controller is described:

1) When no SMP is connected, the DCM turns off the SMP clock smp_clk;

2) When the DCM receives an SMP sending request smp_tx_req of an upper layer application, turning on a clock smp_clk;

3) The SAS link layer establishes connection with the Expander by sending an OAF frame request, and after receiving an OPEN_ACCEPT primitive, the connection is established successfully;

4) After the connection is established successfully, the SMP transmission layer and the link layer start to transmit frames with the opposite terminal. phy_tx_data and phy_rx_data represent data signals transmitted and received by the SAS controller, respectively. After the frame transmission is completed, the two parties mutually send CLOSE primitive, and the current connection is closed;

5) After the DCM monitors that the connection is closed, the clock smp_clk is turned off.

Similar to fig. 9, fig. 10 depicts the flow of control of DCM to pair 3 in a scenario where the SAS controller actively initiates SMP chaining but the chaining fails:

1) When no SMP is connected, the DCM turns off the SMP clock smp_clk;

2) After receiving a transmission request smp_tx_req of an upper layer application, the DCM turns on a clock smp_clk;

3) The SAS link layer establishes connection with the Expander by sending an OAF frame request, and when the Expander replies an OPEN_REJECT primitive, the request is refused;

4) After the link establishment fails, the Port layer reports an indication of the connection establishment failure through the pl_txop_rej signal, and the DCM turns off the clock smp_clk after receiving the indication signal pl_txop_rej of the connection establishment failure.

Referring to fig. 11, taking SSP as an example, the control flow of DCM to clock 4 in the scenario where the peer (disk or Expander) actively initiates a chain and performs frame transmission is described:

1) When no SSP is connected, DCM turns off SSP's clock ssp_clk;

2) After receiving OAF frame of opposite end, SAS link layer agrees to request for connection setup and replies open_accept primitive. After the connection establishment is successful, the DCM opens the corresponding clock ssp_clk after monitoring the connection establishment of the SSP.

3) At this time, the transmission layer and the link layer of the SSP start to work, start to receive or transmit frames, and after the two sides complete the transmission and the reception of the frames, the two sides mutually transmit CLOSE primitives, and the current connection is closed;

4) After the DCM monitors that the connection is closed, the DCM turns off the clock ssp_clk.

Referring to fig. 12, the control flow of DCM to clock 5 during the process of actively initiating a chain and transmitting frames by the SAS controller is described by taking STP as an example:

1) When no STP connection exists, the DCM turns off the STP_clk clock of the STP;

2) When the DCM receives a transmission request stp_tx_req of an upper layer application, turning on a clock stp_clk;

4) When the connection is established successfully, the STP transmission layer and the link layer start to carry out frame transmission with the opposite terminal;

5) When the frame transmission is completed, the two parties are in an idle state to start sending SYNC primitives, then the link layers of the two parties mutually send CLOSE primitives, and the current connection is closed;

6) After the DCM detects that the connection is closed, the clock stp_clk is turned off.

Fig. 13 shows the DCM control procedure for Port layer and SAS link layer clock 2, sl_clk, according to another embodiment of the present invention:

1) When no physical link exists, the DCM turns off the clock sl_clk;

2) Initiating an OOB (initialization Of an Out Band physical link and a physical rate negotiation handshake) by an SAS controller or an opposite terminal to carry Out physical link establishment, and sequentially exchanging COMRESET, COMINIT, COMSAS sequences and ALIGN primitives by the two parties;

3) When the physical link establishment is completed, the physical layer pulls up a mark signal start_slope and phy_ready which indicate that the physical link establishment is successful, and the DCM opens a clock sl_clk;

4) When the physical link is lost again, the DCM monitors that the phy_ready signal goes to 0, turning off the clock sl_clk.

The invention configures the low power control module lp_oc in the power management unit PMU to start the low power mode by monitoring the idle time of the link. When the idle time of the SAS link exceeds a preset idle time threshold, initiating a low-power handshake to opposite terminal target equipment (Expander or disk) to request the two parties to enter a low-power state.

The low power consumption control module lp_oc internally comprises two registers, namely a software configurable threshold register lp_idle_thresh and a low power consumption MODE selection register lp_req_mode. Wherein:

1) The threshold register lp_idle_thresh threshold defines the maximum IDLE time of the SAS link layer;

2) The low power MODE select register lp_req_mode defines the requested low power MODE, i.e. Partial or symbol.

When the link IDLE time exceeds lp_idle_thresh, the low power control module lp_oc controls the SAS link layer to send out a low power primitive Ps_req (PARTIAL) or ps_req (SLUMBER) specified in the SAS protocol according to the configuration MODE defined by lp_req_mode, handshake request with the opposite terminal and enter a low power state.

An exemplary operating scenario of the low power control module lp_oc according to one embodiment of the invention is shown in fig. 14:

1) After the frame transmission is completed, the two sides send CLOSE primitive to each other, and the current connection is closed. Because the link is in an idle state at this time, clocks smp_clk, ssp_clk and stp_clk corresponding to the protocols are all in a closed state;

2) After the lp_oc monitors that the current link is closed, the timer starts to operate (0, 1, 2 in the idle_cnt signal are used to represent the current count in fig. 14), when the timer reaches the preset IDLE time threshold lp_idle_thresh, the lp_oc controls the SAS link layer to send a Ps_req (PARTIAL) or ps_req (SLUMBER) primitive, and then waits for the response of the peer;

3) After receiving the PS_ACK primitive, the SAS controller pulls up a go_parallel or go_slider signal to instruct the physical layer to enter a Partial or Slber low power consumption mode;

4) After the physical layer receives the low-power-consumption indication signal, starting to enter a low-power-consumption mode, and then pulling down a phy_ready signal;

5) After detecting that phy_ready becomes 0, DCM turns off clock sl_clk. In this case, clocks of the SAS controller except the PMU are turned on, clocks of other modules are turned off, and SerDes including the physical layer are also in a low-power state, so that the whole SAS controller is in a very low-power state.

The present invention further provides an alternative way to exit the low power mode in the event that the SAS controller has entered a low power state. In the first manner, a write operation may be performed by software to a register of the SAS controller, and the SAS controller initiates a process of exiting low power consumption. In the second mode, the upper layer application may directly issue a request for sending a frame of SMP, SSP or STP to the SAS controller, and after receiving the request, the lp_oc starts to exit the low power flow, and after exiting the low power flow, the upper layer application automatically starts to transmit the frame. For example, fig. 15 depicts a process in which an upper layer initiates an STP transmission request, hardware control exits a low power state, and then performs frame transmission:

1) When the SAS controller is in a Partial or Slber low power consumption state, the upper layer application requests to transmit STP frames;

2) After the LP_OC monitors STP transmission stp_tx_req, pulling down one of the go_partial or go_slice signals according to the type of the low power consumption state in which the LP_OC is currently located, so as to inform the physical layer to exit the low power consumption state;

3) After the physical layer monitors that one of go_partial or go_slumber is changed to 0, a COMWAKE sequence is sent to the Expander, and after the COMWAKE sequence replied by the Expander is received, the two parties mutually send an ALIGN primitive, and at the moment, the two parties are in a low power consumption state;

4) The physical layer pulls the phy_ready high, which means that the low power consumption state has been successfully exited, and the dynamic clock management module DCM turns on the clock sl_clk after detecting that the phy_ready becomes 1;

5) The SAS link layer starts to send OAF frames, requests to establish STP connection with the Expander, and after the connection is established successfully, the DCM opens a clock stp_clk, and the STP transmission layer and the link layer start to work;

6) After the frame transmission is finished, a CLOSE primitive is sent to CLOSE the current connection, and after the DCM detects that the connection is closed, the clock stp_clk is closed.

As can be seen from the above embodiments, in the method for managing power consumption of an SAS controller of the present invention, according to characteristics of SAS protocol, a power consumption management unit is disposed inside the SAS controller, and according to states of SAS links, clocks of each functional module are dynamically and independently controlled in real time, and power consumption of a chip SOC is reduced by closing clocks of non-working modules; on the basis, by monitoring the idle time of the SAS link, when the idle time exceeds a preset idle time threshold, the hardware automatically initiates the low power consumption of the physical layer to enter the process, so that the power consumption of the chip SOC is further reduced. The dynamic clock management and the physical layer entering the low-power consumption state are initiated by hardware automatically, software intervention is not needed in the whole process, and the software only needs to pay attention to upper-layer business to transmit commands and data, so that the difficulty of software development is reduced. Through the control of the low-power-consumption state of the SAS controller clock and the physical layer, the power consumption of the SAS controller can be greatly reduced, and the power consumption design, chip packaging and PCB-level design difficulty of the whole chip SOC are reduced.

The flowcharts or block diagrams shown above are only for illustrating the technical solution of the present invention, and are not limited to the embodiments. It will be appreciated by those skilled in the art that any modifications may be made to the above-described method flow details, etc. as may be readily appreciated by those skilled in the art based on the present invention as desired, without limiting the invention to the specific structures or parameters of the examples described above.

While the invention has been described in detail with reference to the foregoing embodiments, it will be appreciated by those skilled in the art that variations may be made in the techniques described in the foregoing embodiments, or equivalents may be substituted for elements thereof; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for managing power consumption of a SAS controller, comprising:

s103, when the idle time of the SAS link exceeds a preset idle time threshold, initiating a low-power handshake to opposite terminal equipment by the SAS controller, and entering a low-power state without software intervention;

the monitoring the working state of the SAS link, and controlling the clock switch of the corresponding functional module according to the working state, further includes:

when the current link does not establish any sub-protocol connection, closing clocks corresponding to all sub-protocols;

when a sending request of an upper layer application is received, a clock corresponding to a sub-protocol to which the sending request belongs is opened;

after the connection is established successfully, the transmission layer and the link layer under the current sub-protocol start to carry out frame transmission with the opposite terminal, and the current connection is closed after the frame transmission is completed;

after the connection is monitored to be closed, closing a clock corresponding to the current sub-protocol;

a power consumption management unit is arranged in the SAS controller, the power consumption management unit comprises a low power consumption control module, and a software configurable threshold value register and a low power consumption mode selection register are arranged in the low power consumption control module;

the low power mode selection register is used for defining a requested low power mode, and the low power mode comprises a Partial or a Slber;

when the idle time of the SAS link exceeds a preset idle time threshold, the SAS controller initiates a low-power handshake to the peer device to enter a low-power state, and further includes:

after the low-power consumption control module monitors that the current link is closed, a timer starts to work, and when the timer reaches an idle time threshold preset by the threshold register, the low-power consumption control module controls SAS link layer hardware to automatically send a low-power consumption mode primitive to wait for the response of the opposite terminal;

and when the physical layer receives the indication signal with low power consumption, starting to enter a low power consumption mode, and when the physical link ready signal is monitored to be changed into a low level, closing the clocks of the Port layer and the SAS link layer, and only keeping the on state of the clock of the power consumption management unit.

2. The method for managing power consumption of a SAS controller of claim 1 wherein the dividing the plurality of clocks within the SAS controller according to the sub-protocol type or hierarchy further comprises:

3. The method of claim 2, wherein the power management unit comprises a dynamic clock management module for converting an input clock source into a plurality of independently switch controllable clocks via a clock enable signal generated by a state machine, each providing a clock input to each functional module.

4. A method of managing power consumption of a SAS controller as recited in claim 3 wherein the plurality of clocks comprises an operating clock of a dynamic clock management module, port layer and SAS link layer clocks, and transmission layer and link layer clocks belonging to SMP, SSP or STP sub-protocols, respectively.

5. The method for managing power consumption of a SAS controller of claim 4 wherein monitoring an operational state of a SAS link and controlling a clock switch of a corresponding functional module based on the operational state further comprises:

6. The method for managing power consumption of a SAS controller of claim 1 wherein after entering the low power state, further comprises:

7. The method for managing power consumption of a SAS controller of claim 1 wherein after entering the low power state, further comprises: