CN115589169B

CN115589169B - Inverter control method and device based on instantaneous characteristics and inverter system

Info

Publication number: CN115589169B
Application number: CN202211595673.7A
Authority: CN
Inventors: 尹聪
Original assignee: Foxess Co Ltd
Current assignee: Foxess Co ltd
Priority date: 2022-12-13
Filing date: 2022-12-13
Publication date: 2023-04-07
Anticipated expiration: 2042-12-13
Also published as: CN115589169A

Abstract

The invention discloses a control method and a control device of an inverter based on instantaneous characteristics and an inverter system, wherein the method comprises the following steps: calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain an average voltage difference value; when the target balancing unit is determined to be a voltage-sharing control loop according to the average voltage difference value, determining a voltage sub-loop modulation instruction value according to the average voltage difference value and an initial voltage feedforward instruction value, and determining a voltage-sharing direct current suppression modulation voltage instruction value according to the common-mode component of two-phase alternating current, wherein the two-phase alternating current is two-phase grid-connected current flowing through a bus capacitor unit; determining a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value; and balancing the voltage of the bus capacitor unit according to the voltage-sharing control modulation voltage instruction value. The invention solves the technical problem that the balance efficiency of an inverter system is low when the voltage of the bus capacitor is balanced in the related technology.

Description

Inverter control method and device based on instantaneous characteristics and inverter system

Technical Field

The invention relates to the field of power supplies, in particular to a control method and device of an inverter based on instantaneous characteristics and an inverter system.

Background

With the progress of optical storage technology, the electricity utilization cost of people is greatly reduced, and more family users around the world install optical storage systems.

Fig. 1 is a light storage system integrating light storage in the prior art, and as shown in fig. 1, the light storage system includes a hybrid light storage inverter 100, a photovoltaic cell 210, a household energy storage cell 220, a common load 420, a power grid 300, and an important load 410. Two direct current input ports of the hybrid optical storage inverter 100 are respectively connected to the photovoltaic cell 210 and the household energy storage cell 220, one alternating current output port (i.e., grid-connected port) is connected to the power grid 300, and the other alternating current output port (i.e., off-grid port) is connected to the important load 410. The grid connection port connected to the grid 300 is also connected to other common loads 420 connected to the grid. When the power grid is powered off, the hybrid optical storage inverter 100 supplies power to the important load 410 connected to the off-grid port and does not supply power to the common load 420 connected to the on-grid port any more.

Fig. 1 illustrates a hybrid optical storage inverter, as well as other inverters. In the light storage system, the photovoltaic cell and the inverter determine the performance of the light storage system and are core devices in the system. However, in the related art, when the bus capacitor voltage in the inverter is equalized, the inverter system has low equalization efficiency and poor system stability.

In view of the above problems, no effective solution has been proposed.

Disclosure of Invention

The embodiment of the invention provides a control method and device of an inverter based on instantaneous characteristics and an inverter system, and at least solves the technical problem that in the related art, when the voltage of a bus capacitor is balanced, the balancing efficiency of the inverter system is low.

According to an aspect of the embodiments of the present invention, there is provided a control method of an inverter based on transient characteristics, applied to an inverter system of a photovoltaic power source, the inverter system at least includes an inverter and a voltage-sharing control loop, the inverter at least includes a bus capacitor unit and a balance bridge unit, the bus capacitor unit at least includes an upper bus capacitor and a lower bus capacitor, the method includes: calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain an average voltage difference value; when the target balancing unit is determined to be a voltage-sharing control loop according to the average voltage difference value, determining a voltage sub-loop modulation instruction value according to the average voltage difference value and an initial voltage feedforward instruction value through the voltage-sharing control loop, and determining a voltage-sharing direct current suppression modulation voltage instruction value according to a common-mode component of two-phase alternating current, wherein the two-phase alternating current is two-phase grid-connected current flowing through a bus capacitor unit; determining a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value; and carrying out equalization processing on the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the voltage-sharing control modulation voltage instruction value.

Further, the inverter control method based on the transient characteristic further includes: before calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor and obtaining the average voltage difference value, comparing the average voltage difference value with a preset voltage threshold value to obtain a comparison result; and determining a target balancing unit from the balancing bridge unit and the voltage-sharing control loop according to the comparison result, wherein the preset voltage threshold at least comprises a first voltage threshold, a second voltage threshold and a third voltage threshold, the first voltage threshold is smaller than the second voltage threshold, and the second voltage threshold is smaller than the third voltage threshold.

Further, the inverter control method based on the transient characteristic further includes: and when the absolute value of the average voltage difference value is larger than the third voltage threshold value, determining that the target equalization unit is a balance bridge unit.

Further, the inverter control method based on the transient characteristic further includes: when the absolute value of the average voltage difference is larger than a first voltage threshold and is smaller than or equal to a second voltage threshold, starting timing, acquiring a first time length, and when the first time length is larger than a preset time length, determining that the target equalization unit is a voltage-sharing control loop, wherein the first time length is a duration of the average voltage difference, which is larger than the first voltage threshold and is smaller than or equal to the second voltage threshold; or when the absolute value of the average voltage difference value is larger than the second voltage threshold and is smaller than or equal to the third voltage threshold, the target equalizing unit is determined to be a voltage-sharing control loop.

Further, the inverter control method based on the transient characteristic further includes: when the absolute value of the average voltage difference is smaller than or equal to a first voltage threshold, determining that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in a balanced state; or when the first time length is less than or equal to the preset time length, determining that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in an equilibrium state.

Further, the inverter control method based on the transient characteristic further includes: determining an initial voltage feedforward instruction value according to the capacitance value of the bus capacitor unit, the instantaneous charging time of the bus capacitor unit, the average voltage difference value and the effective value of the grid-connected current flowing through the bus capacitor unit; acquiring an average voltage difference value and a working state identifier of a voltage-sharing control loop, wherein the working state identifier of the voltage-sharing control loop represents whether the voltage-sharing control loop is in an enabling state or not; calculating the product of the average voltage difference value and the working state identifier of the voltage-sharing control loop to obtain a voltage-sharing control instruction value; adjusting the voltage-sharing control instruction value to obtain a voltage-sharing direct control modulation instruction value; calculating the product of the initial voltage feedforward instruction value and the working state identifier of the voltage-sharing control loop to obtain a voltage feedforward instruction value after operation; and calculating the sum of the voltage-sharing direct control modulation instruction value and the calculated voltage feedforward instruction value to obtain a voltage sub-loop modulation instruction value.

Further, the inverter control method based on the transient characteristic further includes: acquiring a first current reference value; calculating a difference value between a common-mode component of the two-phase alternating current and a first current reference value to obtain a direct current suppression modulation current instruction value; and adjusting the direct current suppression modulation current command value to obtain a voltage-sharing direct current suppression modulation voltage command value.

Further, the inverter control method based on the transient characteristic further includes: controlling a modulation controller to generate a switch control signal according to the voltage-sharing control modulation voltage instruction value; adjusting the duty ratio of an inversion switching unit in the inverter according to the switching control signal; and adjusting the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the duty ratio.

Further, the inverter control method based on the transient characteristic further includes: acquiring a grid-connected current control modulation voltage instruction value, a voltage-sharing control modulation voltage instruction value and a two-phase current differential mode direct current suppression modulation instruction value; calculating the sum of a grid-connected current control modulation voltage instruction value, a voltage-sharing control modulation voltage instruction value and a two-phase current differential mode direct current suppression modulation instruction value to obtain a first-phase total modulation instruction; generating a switch control signal for a first-phase switch tube in the inversion switch unit based on the first-phase total regulation instruction; carrying out negation operation on the grid-connected current control modulation voltage instruction value, and calculating the sum of the negated grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current differential mode direct current suppression modulation instruction value to obtain a second-phase total modulation instruction; and generating a switch control signal for a second-phase switch tube in the inversion switch unit based on the second-phase total regulation instruction.

Further, the inverter control method based on the transient characteristic further includes: acquiring a second current reference value; calculating the difference value between the differential mode component of the two-phase alternating current and the second current reference value to obtain a differential mode direct current suppression modulation current instruction value; and adjusting the differential mode direct current suppression modulation current instruction value to obtain a two-phase current differential mode direct current suppression modulation instruction value.

Further, the inverter control method based on the transient characteristic further includes: determining a grid-connected feedback current value according to the differential mode component of the two-phase alternating current and the current value of the two-phase alternating current; calculating a difference value between a grid-connected feedback current value and a grid-connected current instruction value to obtain a grid-connected current control modulation current instruction value, wherein the grid-connected current instruction value is determined by an effective value of grid-connected current; and adjusting the grid-connected current control modulation current instruction value to obtain a grid-connected current control modulation voltage instruction value.

According to another aspect of the embodiments of the present invention, there is also provided a control apparatus of an inverter based on transient characteristics, the control apparatus being applied to an inverter system of a photovoltaic power source, the inverter system including at least an inverter and a voltage-sharing control loop, the inverter including at least a bus capacitor unit, the bus capacitor unit including at least an upper bus capacitor and a lower bus capacitor, the apparatus including: the voltage calculation module is used for calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain an average voltage difference value; the first instruction determining module is used for determining a voltage sub-loop modulation instruction value according to the average voltage difference value and an initial voltage feedforward instruction value through the voltage-sharing control loop when the target balancing unit is determined to be the voltage-sharing control loop according to the average voltage difference value, and determining a voltage-sharing direct current suppression modulation voltage instruction value according to the common-mode component of two-phase alternating current, wherein the two-phase alternating current is two-phase grid-connected current flowing through the bus capacitor unit; the second instruction determining module is used for determining a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value; and the voltage balancing module is used for balancing the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the voltage-sharing control modulation voltage instruction value.

According to another aspect of the embodiments of the present invention, there is also provided a control system of an inverter based on transient characteristics, the inverter system being configured to perform the above-described control method of the inverter based on transient characteristics.

According to another aspect of embodiments of the present invention, there is also provided a computer-readable storage medium having a computer program stored therein, wherein the computer program is configured to execute the above-mentioned transient characteristic-based inverter control method when running.

According to another aspect of the embodiments of the present invention, there is also provided an electronic device, including one or more processors; a memory for storing one or more programs that, when executed by the one or more processors, cause the one or more processors to implement a method for operating a program, wherein the program is configured to perform the above-described transient characteristic-based inverter control method when executed.

In the embodiment of the invention, the mode of balancing the average value of the capacitor voltages of the upper bus and the lower bus by adopting the initial voltage feedforward instruction and the common-mode component of the two-phase alternating current is adopted, and the initial voltage feedforward instruction is added into the voltage-sharing control loop, so that the dynamic regulation efficiency of the inverter system can be accelerated, and the reliability of the inverter system is improved. In addition, a voltage-sharing direct current suppression modulation voltage instruction value is determined through a common-mode component of two-phase alternating current, so that a direct current modulation wave is added to a current control loop in the inverter system, the duty ratio of a switching tube in an inversion switching unit in the inverter system is changed, the instantaneous characteristic of the inverter system is further realized, and the balance efficiency of the inverter system is improved.

Therefore, the purpose of balancing the bus capacitor voltage is achieved by the scheme provided by the application, the technical effect of improving the balancing efficiency of the inverter system is achieved, and the technical problem that the balancing efficiency of the inverter system is low when the bus capacitor voltage is balanced in the related technology is solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:

FIG. 1 is a schematic diagram of a prior art optical storage integrated optical storage system;

FIG. 2 is a schematic diagram of an inverter system according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of an inverter according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of driving waveforms of switching tubes in an inverter switching unit according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of driving waveforms of switching tubes in an inverter switching unit according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a midpoint DC current flow path of a bus according to an embodiment of the present invention;

fig. 7 is a flowchart of a method of controlling an inverter based on transient characteristics according to an embodiment of the present invention;

FIG. 8 is a flow chart of determining a voltage sub-loop modulation command value according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of driving waveforms of switching tubes in an inverter switching unit according to an embodiment of the present invention;

FIG. 10 is a schematic diagram of driving waveforms of switching tubes in an inverter switching unit according to an embodiment of the present invention;

FIG. 11 is a schematic diagram of a transient characteristic based control arrangement for an inverter, according to an embodiment of the present invention;

FIG. 12 is a schematic diagram of an alternative electronic device according to an embodiment of the invention.

Detailed Description

In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

It should be noted that the related information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for presentation, analyzed data, etc.) related to the present invention are information and data authorized by the user or sufficiently authorized by each party. For example, an interface is provided between the system and the relevant user or institution, and before obtaining the relevant information, an obtaining request needs to be sent to the user or institution through the interface, and after receiving the consent information fed back by the user or institution, the relevant information needs to be obtained.

Example 1

In accordance with an embodiment of the present invention, there is provided an embodiment of a method for controlling an inverter based on transient characteristics, it being noted that the steps illustrated in the flowchart of the figures may be carried out in a computer system such as a set of computer-executable instructions, and that while a logical order is illustrated in the flowchart, in some cases, the steps illustrated or described may be carried out in an order different than presented herein.

In addition, it should be further noted that the solution provided by the present embodiment may be applied to an inverter system of a photovoltaic power source, that is, the inverter system may be an execution subject of the method provided by the present embodiment. In addition, fig. 2 shows a schematic structural diagram of an alternative inverter system, as can be seen from fig. 2, the inverter system at least includes an inverter and a voltage-sharing control loop, and the inverter at least includes a bus capacitor unit and a balance bridge unit. The method provided by the present embodiment will be explained below in conjunction with the inverter system shown in fig. 2.

Before explaining the bus capacitor voltage equalization strategy provided in the present application, the inverter will be described first. Fig. 3 shows a schematic diagram of an alternative inverter circuit, and as shown in fig. 3, the inverter 100 includes a bus capacitor unit 110, a balance bridge unit 120, an inverter switch unit 130, a filter unit 140, an on-grid and off-grid switching unit 150, a grid connection port 161, and a critical load port 162. The bus capacitor unit 110, the balance bridge unit 120 and the inverter switch unit 130 are sequentially connected, wherein the bus capacitor unit 110, the balance bridge unit 120, the inverter switch unit 130, the filter unit 140 and the grid-connected and off-grid switching unit 150 in the inverter 100 are sequentially connected, and neutral line terminals of the grid-connected port 161 and the important load port 162 are connected with a neutral line N through the grid-connected and off-grid switching unit 150.

Optionally, as shown in fig. 3, the bus capacitor unit 110 includes an upper bus capacitor C1 and a lower bus capacitor C2 connected in series between the positive dc bus and the negative dc bus, a common node of the upper bus capacitor C1 and the lower bus capacitor C2 forms a bus midpoint DN, and a dc (i.e., a bus voltage) Udc output from the photovoltaic cell or the household energy storage battery is received between the positive dc bus and the negative dc bus, where in fig. 3, udc1 is an average voltage of the upper bus capacitor C1, and Udc2 is an average voltage of the lower bus capacitor C2.

As shown in fig. 3, the balanced bridge cell 120 includes a first balanced bridge switch S1 and a second flat Heng Qiaokai off S2 connected in series between a positive dc bus and a negative dc bus, and a power inductor L0 connected between a bus midpoint DN and a common node of the first flat Heng Qiaokai off S1 and the second flat Heng Qiaokai off S2.

The inversion switch unit 130 is configured to invert a bus voltage Udc received at a dc side into an ac power at an ac side, where the inversion switch unit 130 includes a plurality of switch tubes, the dc side is connected between a positive dc bus and a negative dc bus and is configured to receive the bus voltage Udc, the ac side includes a first phase output end a, a second phase output end B, and a neutral line N, the first phase output end a is configured to output a first phase ac power I1, the second phase output end B is configured to output a second phase ac power I2, and the neutral line N is connected to a bus midpoint DN, a neutral line endpoint N-Grid of the Grid-connected port 161, and a neutral line endpoint N-Load of the important Load port 162.

It should be noted that the inverter switch unit 130 may be any switch unit capable of inverting a direct current into an alternating current, such as a single-phase T-type three-level topology or an I-type three-level topology, and the application does not limit the specific structure of the inverter switch unit 130. In fig. 3, taking a T-type three-level topology AS an example, the inverter switch unit 130 includes a first switch leg formed by an a-phase first switch AS1 and an a-phase fourth switch AS4 connected in series between a positive dc bus and a negative dc bus, and a second switch leg formed by a B-phase first switch BS1 and a B-phase fourth switch BS4 connected in series between the positive dc bus and the negative dc bus, where a connection point of the a-phase first switch AS1 and the a-phase fourth switch AS4 is a first-phase output end a, and a connection point of the B-phase first switch BS1 and the B-phase fourth switch BS4 is a second-phase output end B. In addition, the inverter switch unit 130 further includes a first series switch unit formed by connecting the a-phase second switch AS2 and the a-phase third switch AS3 in series, and a second series switch unit formed by connecting the B-phase second switch BS2 and the B-phase third switch BS3 in series, where the first series switch unit is connected between the first-phase output end a and the neutral line N of the inverter 100, the second series switch unit is connected between the second-phase output end B and the neutral line N of the inverter 100, and the neutral line N of the inverter 100 is connected to the bus midpoint DN.

It should be noted that, since the two-phase voltage of the inverter is inverted, the driving waveforms corresponding to the switching tubes are also different by a half cycle. For example, fig. 4 and 5 each show a schematic view of a driving waveform of a switching tube in an inverting switching unit, wherein, in fig. 4, an a-phase modulation wave contains only a conventional sinusoidal modulation wave; in fig. 5, the B-phase modulated wave contains only a conventional sinusoidal modulated wave. AS can be seen from comparison between fig. 4 and fig. 5, the a-phase first switch AS1 and the B-phase fourth switch BS4 are driven the same, the a-phase third switch AS3 and the B-phase second switch BS2 are driven the same, the a-phase second switch AS2 and the B-phase third switch BS3 are driven the same, the a-phase fourth switch AS4 and the B-phase first switch BS1 are driven the same, and the phases are different by half a cycle.

Further, as shown in fig. 3, the inverter circuit further includes a filtering unit 140 and an on-grid and off-grid switching unit 150. The filter unit 140 includes a first filter inductor L1, a second filter inductor L2, a first filter capacitor C11, and a second filter capacitor C22. The first filter inductor L1 is connected between the first phase output terminal a and the first end of the second filter capacitor C22, the second filter inductor L2 is connected between the second phase output terminal B and the first end of the first filter capacitor C11, and the second end of the first filter capacitor C11 and the second end of the second filter capacitor C22 are connected to the neutral line N.

And the grid-connected and off-grid switching unit 150 is connected between the filtering unit 140 and the grid-connected port 161 and the important load port 162, and is used for switching the alternating-current side output of the inverter switching unit 130 between the grid-connected port 161 and the important load port 162 or simultaneously connecting the grid-connected port 161 and the important load port 162, and neutral line terminals of the grid-connected port 161 and the important load port 162 pass through the grid-connected and off-grid switching unit 150 and are connected with the neutral line N.

It should be noted that the present application does not limit and limit the specific structure of the off-grid switching unit 150 as long as it can implement the above-mentioned functions. The Grid-connected/disconnected switching unit 150 shown in fig. 3 is an embodiment, and includes a selection switch CS1 connected between the first end of the second filter capacitor C22 and the first node d1, a selection switch CS2 connected between the first end of the first filter capacitor C11 and the second node d2, a selection switch CS3 connected between the neutral line N and the third node d3, a selection switch DS1 connected between the first node d1 and the first phase end point L1-Load of the important Load port 162, a selection switch DS2 connected between the second node d2 and the second phase end point L2-Load of the important Load port 162, a selection switch DS3 connected between the third node d3 and the neutral line end point N-Load of the important Load port 162, a selection switch ES1 connected between the first node d1 and the first phase end point L1-Grid of the Grid-connected port 161, a selection switch ES2 connected between the second node d2 and the second phase end point L2-Grid of the Grid-connected port 161, and a selection switch ES3 connected between the third node d3 and the neutral line end point N-Grid of the Grid-connected port 161.

Optionally, when the selection switch CS1, the selection switch CS2, the selection switch CS3, the selection switch DS1, the selection switch DS2, and the selection switch DS3 are turned on, the ac side output of the inverter switch unit 130 is switched to the important load port 162. When the selection switch CS1, the selection switch CS2, the selection switch CS3, the selection switch ES1, the selection switch ES2, and the selection switch ES3 are turned on, the ac side output of the inverter switch unit 130 is switched to the grid-connected port 161. When the selection switches are all turned on, the ac side output of the inverter switch unit 130 is switched to the important load port 162 and the grid connection port 161 at the same time. In this way, the grid neutral and the important load neutral are connected to the bus midpoint DN and the neutral N of the inverter 100 through the grid-on/off switching unit 150.

Optionally, as shown in fig. 3, the grid-connected port 161 is connected to an ac two-phase three-wire grid, and the phases of the two-phase grid are opposite.

When the modulation wave contains only the regular sinusoidal modulation wave, i.e. no dc current is injected to the bus midpoint DN, no additional dc component modulation wave is generated, and the switching drive waveform is as shown in fig. 4 and 5. The current flowing through the upper bus capacitor C1 is (-I2, -I1), the current flowing through the lower bus capacitor C2 is (+ I1, + I2), and the two-phase currents are symmetrical in positive and negative half cycles, so that the normal sinusoidal current in one fundamental wave period does not affect the bus capacitor voltage, that is, the direct current deviation of the upper and lower bus capacitor voltages is not caused, and the reference directions of the second-phase alternating current I2 and the first-phase alternating current I1 are shown in fig. 3.

In practical application, the important Load can be connected between L1-Load and N-Load or between L2-Load and N-Load, and the ordinary Load can be connected between L1-Grid and N-Grid or between L2-Grid and N-Grid. Obviously, the voltage fluctuation of the dc bus capacitor inside the inverter 100 can be caused by switching of a common load during normal grid connection or switching of an important load during grid connection or grid disconnection. Specifically, when an unbalanced load with a dc characteristic represented by a blower is instantaneously switched, because the equivalent impedance of the neutral line N to the dc component of the current is low, the dc current formed by the unbalanced load is injected to the bus midpoint DN through the grid-connected and off-grid switching unit 150 and the neutral line N (that is, the dc component circulates in one phase, and it can be correspondingly said that the dc component flowing into one phase is the common-mode component of the first-phase alternating current I1 and the second-phase alternating current I2), so that the charging and discharging of the upper and lower bus capacitors are unbalanced, and the voltage of the upper and lower bus capacitors generates a dc deviation, and the unbalanced load with a dc characteristic for switching a larger power also frequently triggers the inverter to stop protection, resulting in poor system reliability.

In practical application, instantaneous direct current can be injected into a bus midpoint DN to control the mean value difference of the direct current bus capacitance, but the instantaneous direct current can flow through a connected load, so that the instantaneous direct current component of the load is too large, and the normal work of the load is influenced. As shown in fig. 6, when the inverter injects dc modulation, the dc current circulation path at the midpoint of the bus is schematically shown, and as can be seen from fig. 6, the dc modulation current is injected so that the current integral charging the lower bus capacitor C2 exceeds the current integral charging the upper bus capacitor C1, thereby increasing the voltage of the lower bus capacitor C2, and decreasing the voltage of the upper bus capacitor C1, so as to equalize the average voltage values of the upper and lower bus capacitors. As can be seen from fig. 6, this dc modulated current also flows through the load.

In order to solve the above problems in the related art, the method provided by the present embodiment is improved on the basis of the inverter shown in fig. 3, and as shown in fig. 2, the efficiency and reliability of the inverter can be improved by the inverter system shown in fig. 2.

Alternatively, fig. 7 is a flowchart of an alternative transient characteristic-based inverter control method, which may be implemented in the inverter system provided in fig. 2, according to an embodiment of the present invention. As shown in fig. 7, the method includes the steps of:

step S702 is to calculate a difference between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain an average voltage difference.

Optionally, as can be seen from fig. 2, the inverter system shown in fig. 2 includes, in addition to the inverter 100 in fig. 3, a subtraction module 510, a determination module 520, a voltage-sharing control loop 530, a first addition unit 541, an a-phase PWM controller 542, an inverter current control loop 550, a differential-mode direct current suppression loop 560 between two phase currents, a first controller 570, an inversion unit 581, a second addition unit 562, and a B-phase PWM controller 583.

The subtraction module 510 may receive the average voltage Udc1 of the upper bus capacitor C1 and the average voltage Udc2 of the lower bus capacitor C2, perform filtering processing through the low pass filtering unit LPF, and then calculate a difference between the filtered Udc1 and the filtered Udc2, so as to obtain an average voltage difference Δ Udc of the bus capacitors.

In addition, the subtraction module 510 may also perform difference processing on the filtered voltage average value after the voltage average value Udc1 of the upper bus capacitor and the voltage average value Udc2 of the lower bus capacitor pass through the low-pass filter, respectively, so as to obtain the average voltage difference value Δ Udc of the bus capacitors.

Step S704, when the target balancing unit is determined to be the voltage-sharing control loop according to the average voltage difference, determining a voltage sub-loop modulation instruction value according to the average voltage difference and the initial voltage feedforward instruction value through the voltage-sharing control loop, and determining a voltage-sharing dc suppression modulation voltage instruction value according to a common-mode component of two-phase ac current, where the two-phase ac current is two-phase grid-connected current flowing through the bus capacitor unit.

Step S706, determining a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value.

Alternatively, as shown in fig. 2, the determining module 520 may receive the average voltage difference Δ Udc transmitted by the subtracting module 510, and determine whether to use the balance bridge unit 120 as the target equalizing unit or to use the voltage-sharing control loop 530 as the target equalizing unit according to a magnitude relationship between the average voltage difference Δ Udc and a preset voltage threshold.

In fig. 2, ENB is an operation status flag of balance bridge unit 120, where when ENB =1, balance bridge unit 120 is enabled, i.e., balance bridge unit 120 is used as a target equalization unit; ENV is the operating state identification of the voltage sharing control loop 530, wherein when ENV =1, the voltage sharing control loop 530 is enabled, i.e. the voltage sharing control loop 530 is used as the target balancing unit. The determining module 520 assigns values to the ENB and the ENV according to the comparison result to determine the target equalizing unit.

It should be noted that the preset voltage threshold is not limited to one, and may be a plurality of voltage thresholds, for example, in this embodiment, the preset voltage threshold may include a first voltage threshold, a second voltage threshold and a third voltage threshold, where the first voltage threshold is smaller than the second voltage threshold, and the second voltage threshold is smaller than the third voltage threshold. And determining the target equalization unit by comparing the average voltage difference value with the magnitude relation of the first voltage threshold, the second voltage threshold and the third voltage threshold.

As shown in fig. 2, the voltage-equalizing control loop 530 includes a voltage-equalizing direct-control voltage sub-loop 531, a voltage-equalizing direct-current suppressing sub-loop 532, and a first adding unit 533. When the target balancing unit is determined to be the voltage-sharing control loop, the voltage-sharing direct control voltage sub-loop 531 determines the voltage sub-loop modulation instruction value Vudc according to the average voltage difference value Δ Udc and the initial voltage feedforward instruction Vdeff ^* (ii) a The voltage-sharing DC current suppression sub-loop 532 is based on the common mode component I1 of the two-phase AC current ^* Determining voltage equalizing direct current suppression modulation voltage command value Vidc ^* . Finally, the first addition operation unit 533 calculates the voltage sub-loop modulation command value Vudc ^* Voltage equalizing DC current restraining modulation voltage instruction value Vidc ^* Summing to obtain voltage-sharing control modulation voltage command value Vdc ^* 。

Step 708, the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are equalized according to the voltage-equalizing control modulation voltage instruction value.

Alternatively, as shown in fig. 2, the voltage-sharing control modulation voltage command value Vdc is obtained ^* Then, the modulation command VLdc is restrained by combining the two-phase current differential mode direct current ^* And grid-connected electricityFlow control modulated voltage command VL ^* The duty ratio of the switching tube in the inversion switching unit in the inverter system can be adjusted, so that the instantaneous characteristic of the inverter system is realized, and the balance efficiency of the inverter system is improved. Namely, the scheme provided by the embodiment not only can realize the balance of the average values of the upper and lower bus capacitor voltages, but also can optimize the instantaneous characteristics of the inverter system.

Based on the solutions defined in the above steps S702 to S708, it can be known that, in the embodiment of the present invention, a mode of equalizing the average values of the capacitor voltages of the upper and lower buses is implemented by using the initial voltage feed-forward instruction and the common-mode component of the two-phase alternating current, and the initial voltage feed-forward instruction is added to the voltage-equalizing control loop, so that the dynamic regulation efficiency of the inverter system can be accelerated, and the reliability of the inverter system can be improved. In addition, a voltage-sharing direct current suppression modulation voltage instruction value is determined through a common-mode component of two-phase alternating current, so that a direct current modulation wave is added to a current control loop in the inverter system, the duty ratio of a switching tube in an inversion switching unit in the inverter system is changed, the instantaneous characteristic of the inverter system is further realized, and the balance efficiency of the inverter system is improved.

In an alternative embodiment, before calculating the difference between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain the average voltage difference, the inverter system needs to determine a target balancing unit for balancing the voltages of the upper and lower bus capacitors from the balancing bridge unit and the voltage balancing control loop.

Specifically, the inverter system firstly compares the average voltage difference value with a preset voltage threshold value to obtain a comparison result, and determines a target equalization unit from the balance bridge unit and the voltage-sharing control loop according to the comparison result, wherein the preset voltage threshold value at least comprises a first voltage threshold value, a second voltage threshold value and a third voltage threshold value, the first voltage threshold value is smaller than the second voltage threshold value, and the second voltage threshold value is smaller than the third voltage threshold value.

Optionally, when the absolute value of the average voltage difference is greater than the first voltage threshold and is less than or equal to the second voltage threshold, timing is started, a first duration is obtained, and when the first duration is greater than a preset duration, the determining module 520 determines that the target equalization unit is a voltage-sharing control loop, where the first duration is a duration in which the absolute value of the average voltage difference is greater than the first voltage threshold and is less than or equal to the second voltage threshold.

That is, when the absolute value of Δ Udc is greater than the first voltage threshold Udcth0, and is less than or equal to the second voltage threshold Udcth1, and the duration (i.e., the first time length) Thold is greater than the preset time duration Tth, the determining module 520 outputs ENV =1 and enb =0, that is, enables the voltage-sharing control loop 530, but does not enable the balance bridge unit 120, that is, enables the voltage-sharing control loop 530 to balance the voltage average values of the upper and lower bus capacitors.

Optionally, when the absolute value of the average voltage difference is greater than the second voltage threshold and is less than or equal to the third voltage threshold, it is determined that the target equalizing unit is a voltage-sharing control loop.

That is, when the absolute value of Δ Udc is greater than the second voltage threshold Udcth1 and is less than or equal to the third voltage threshold Udcth2, the determining module 520 outputs ENV =1 and enb =0, that is, enables the voltage-sharing control loop 530, but does not enable the balance bridge unit 120, and similarly enables the voltage-sharing control loop 530 to balance the voltage average values of the upper and lower bus capacitors.

Optionally, when the absolute value of the average voltage difference is greater than the third voltage threshold, the determining module 520 determines that the target balancing unit is a balance bridge unit.

That is, when the absolute value of Δ Udc is greater than the third voltage threshold Udcth2, the determining module 520 outputs ENV =0 and enb =1, that is, the voltage equalizing control loop 530 is not enabled, but the balance bridge unit 120 is enabled, that is, the balance bridge unit 120 is enabled to equalize the voltage average values of the upper bus capacitor and the lower bus capacitor.

Optionally, when the absolute value of the average voltage difference is smaller than or equal to the first voltage threshold, the determining module 520 determines that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in a balanced state.

That is, when the absolute value of Δ Udc is less than or equal to the first voltage threshold Udcth0, the determining module 520 outputs ENV =0 and enb =0, that is, the voltage equalizing control loop 530 is not enabled, and the balance bridge unit 120 is not enabled at the same time. At this time, the average voltage difference Δ Udc of the bus capacitance is within a range acceptable by the system. Preferably, when Udcth0=0, the voltage-sharing control loop is not enabled and the balance bridge unit 120 is not enabled only when the bus capacitance average voltage difference value Δ Udc is zero.

Optionally, when the first time length is less than or equal to the preset time length, the determining module 520 determines that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in a balanced state.

That is, when the absolute value of Δ Udc is greater than the first voltage threshold Udcth0 and less than the second voltage threshold Udcth1, and the duration (i.e., the first time length) Thold is less than or equal to the preset time length Tth, the determining module 520 outputs ENV =0 and enb =0, that is, the voltage-sharing control loop 530 is not enabled, and the balance bridge unit 120 is not enabled. That is, the average voltage difference Δ Udc of the bus capacitor increases only for a short time and is within the acceptable range of the system.

In an alternative embodiment, as shown in fig. 7, after the target equalizing unit is determined to be the voltage equalizing control loop, the average voltage of the bus capacitor and the average voltage of the lower bus capacitor may be equalized by the voltage equalizing control loop. Fig. 8 shows a process of determining a voltage sub-loop modulation command value according to the average voltage difference value and the initial voltage feedforward command value, and as shown in fig. 8, the process includes the following steps:

and S81, determining an initial voltage feedforward instruction value according to the capacitance value of the bus capacitor unit, the instantaneous charging time of the bus capacitor unit, the average voltage difference value and the effective value of the grid-connected current flowing through the bus capacitor unit.

Optionally, as shown in fig. 2, a voltage-sharing control loop 530 is added with a voltage feedforward command value, and a voltage feedforward command value Vdcff is added to the voltage-sharing control loop 530 ^* (or initial voltage feedforward command Vdcff value) may accelerate the dynamic regulation effect of the inverter system. When the regulation speed of the regulator of the inverter system is relatively slow, the average value of the capacitor voltages of the upper bus and the lower bus cannot be balanced quickly, so that the reliability of the system is influenced. For example, when the average value of the upper bus capacitor voltage Udc1 is greater than the average value of the lower bus capacitor voltage Udc2, the difference is Δ Udc, and the average value of the bus capacitor voltage is Udc, the upper bus capacitor voltage may be represented as Udc1= Udc + Δ Udc/2, and the lower bus capacitor voltage may be represented as Udc2= Udc- Δ Udc/2, then the required voltage feedforward command value Vdcff for the lower bus capacitor C2 is obtained ^* (i.e., from Udc- Δ Udc/2 up to Udc) can be obtained by:

in the above formula, C is a capacitance value of the half bus capacitor, tset is an instantaneous charging time of capacitor voltage, and IL is an effective value of grid-connected current, and can be set according to a power frequency cycle.

It should be noted that, because the voltage fluctuation value of the bus capacitor is much smaller than the average value, the square value of the negligible fluctuation value simplifies the above expression, and the voltage feedforward command value Vdcff can be obtained finally ^* = (C Δ Udc)/(IL Tset), i.e. voltage feedforward command value Vdcff ^* The parameters are related to the capacitance value C of the half bus capacitor, the instantaneous charging time Tset of the capacitor voltage, the average voltage difference value delta Udc of the bus capacitor and the effective value IL of the grid-connected current. The boundary condition Udcth1 or Udcth2 enabling the voltage grading control loop 530 is selected for Δ Udc when actually used.

And S82, acquiring an average voltage difference value and a working state identifier of the voltage-sharing control loop, wherein the working state identifier of the voltage-sharing control loop represents whether the voltage-sharing control loop is in an enabling state or not.

And S83, calculating the product of the average voltage difference value and the working state identifier of the voltage-sharing control loop to obtain a voltage-sharing control instruction value.

Specifically, as shown in FIG. 2, the voltage-sharing direct control voltage sub-loop 531 comprises a multiplier,A first regulator 5311 and a first arithmetic unit 5312. The multiplier receives an average voltage difference value delta Udc of a bus capacitor and a working state identifier ENV of a voltage-sharing control loop, and performs multiplication operation on the average voltage difference value delta Udc and the working state identifier ENV to obtain a voltage-sharing control instruction value delta Udc ^* 。

And S84, adjusting the voltage-sharing control instruction value to obtain a voltage-sharing direct control modulation instruction value.

Specifically, as shown in fig. 2, the first regulator 5311 receives the voltage-sharing control command value Δ Udc ^* For voltage-sharing control command value delta Udc ^* PI (Linear control) adjustment is carried out to obtain a voltage-sharing direct control modulation instruction value delta Udc1 ^* 。

The first regulator may be a PI regulator, a P regulator, or the like. The specific type of regulator is not limited by this application.

And S85, calculating the product of the initial voltage feedforward instruction value and the working state identification of the voltage-sharing control loop to obtain the calculated voltage feedforward instruction value.

Specifically, as shown in fig. 2, the multiplier calculates the product of the initial voltage feedforward command value Vdcff and the operating state identifier ENV of the voltage-sharing control loop to obtain the calculated voltage feedforward command value Vdcff ^* 。

And step S86, calculating the sum of the voltage-equalizing direct control modulation instruction value and the calculated voltage feedforward instruction value to obtain a voltage sub-loop modulation instruction value.

Specifically, as shown in fig. 2, the first arithmetic unit 5312 receives the voltage-sharing direct control modulation command value Δ Udc1 ^* And the calculated voltage feedforward command value Vdcff ^* And calculating the two values to obtain a voltage sub-loop modulation command value Vudc ^* 。

In an alternative embodiment, the inverter system further determines the grading direct current suppression modulation voltage command value according to a common mode component of the two-phase alternating current. Specifically, the voltage-sharing dc current suppression sub-loop 532 obtains a first current reference value, calculates a difference between a common-mode component of the two-phase ac current and the first current reference value to obtain a dc current suppression modulation current command value, and then adjusts the dc current suppression modulation current command value to obtain a voltage-sharing dc current suppression modulation voltage command value.

Optionally, as shown in fig. 2, the voltage-sharing dc current suppression sub-loop 532 includes a second operation unit 5323 and a second regulator 5321. The second operation unit 5323 receives the reference value 0 (i.e. the first current reference value) and the common mode component I1 of the two-phase ac current ^* Wherein the common-mode component I1 of the two-phase alternating current ^* = (I1 + I2)/2. Then, the second arithmetic unit 5323 calculates the reference value 0 (i.e., the first current reference value) and the common mode component I1 of the two-phase alternating current ^* To obtain a direct current suppression modulation current command value delta I1 ^* (ii) a Then, the second regulator 5321 receives the dc current suppression modulation current command value Δ I1 ^* Direct current suppression modulation current command value Δ I1 ^* Performing PI regulation to obtain a voltage-sharing direct current suppression modulation voltage instruction value Vidc ^* 。

The second regulator may be a PI regulator, a P regulator, or the like. The specific type of regulator is not limited by this application.

Further, as shown in fig. 7, after the voltage sub-loop modulation command value and the voltage-sharing dc current suppression modulation voltage command value are obtained, the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are equalized according to the voltage-sharing control modulation voltage command value. Specifically, the modulation controller is controlled to generate a switch control signal according to the voltage-sharing control modulation voltage instruction value, then the duty ratio of an inversion switch unit in the inverter is adjusted according to the switch control signal, and the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are adjusted according to the duty ratio.

In an optional embodiment, in the process of controlling the modulation controller to generate the switch control signal according to the voltage-sharing control modulation voltage instruction value, firstly, a grid-connected current control modulation voltage instruction value, a voltage-sharing control modulation voltage instruction value and a two-phase current differential mode direct current suppression modulation instruction value are obtained; and then, calculating the sum of the grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current differential mode direct current suppression modulation instruction value to obtain a first-phase total modulation instruction, and generating a switch control signal for a first-phase switching tube in the inverter switching unit based on the first-phase total modulation instruction. And meanwhile, carrying out negation operation on the grid-connected current control modulation voltage instruction value, calculating the sum of the negated grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current differential mode direct current suppression modulation instruction value to obtain a second-phase total modulation instruction, and then generating a switch control signal for a second-phase switch tube in the inversion switch unit based on the second-phase total modulation instruction.

Specifically, as shown in fig. 2, the second addition unit 541 receives the grid-connected current control modulation voltage command value VL output from the inverter current control loop 550 ^* Voltage-equalizing control modulation voltage instruction value Vdc ^* Sum two-phase current differential mode direct current suppression modulation command value VLdc ^* And calculating the sum of the three to obtain the A phase total modulation instruction VMA ^* (i.e., the first phase total modulation instruction). Then, the a-phase PWM controller 542 can obtain the a-phase total modulation command VMA ^* And outputting a switching control signal of the a-phase switching tube in the inversion switching unit 130.

Likewise, the inversion unit 581 receives the grid-connected current control modulation voltage command value VL ^* And carrying out negation operation on the grid-connected current control modulation voltage command value-VL to obtain the negated grid-connected current control modulation voltage command value ^* . Third addition unit 582 calculates inverted grid-connected current control modulation voltage command value-VL ^* Voltage-equalizing control modulation voltage instruction value Vdc ^* Sum two-phase current differential mode direct current suppression modulation command value VLdc ^* Summing to obtain the B phase total modulation instruction VMB ^* (i.e., second phase total modulation command). So that the B-phase PWM controller 583 can obtain the B-phase total modulation instruction VMB ^* And outputting a switch control signal of a B-phase switch tube in the inversion switch unit.

As shown in fig. 2, after half of the sum of the first-phase alternating current I1 and the second-phase alternating current I2 passes through the low-pass filter 5322, the common-mode component I1 is obtained ^* The common mode component I1 ^* Is the direct current injected into the bus midpoint DN, namely the feedback value of the voltage-sharing direct current needing to be suppressed. And the reference value is 0 and the common mode component I1 ^* And a control loop is added for difference, so that the direct current actually injected to the midpoint DN of the bus can be inhibited. Preferably, the dc current injected into the bus midpoint DN is 0. Of course, the common mode component I1 can be obtained by summing half of the first phase alternating current I1 and half of the second phase alternating current I2 after passing through the low pass filter 5322 ^* 。

In addition, the differential mode direct current of the first phase alternating current I1 and the second phase alternating current I2 also needs to be suppressed. As shown in fig. 2, the differential mode dc current suppression loop 560 between two phases of current can suppress the differential mode dc current of two phases of current by using the differential mode dc current of the first phase ac current I1 and the second phase ac current I2 as the feedback value of the differential mode dc current suppression loop, and subtracting the feedback value from the reference value 0 and adding the subtraction result to the control loop. As shown in fig. 2, after half of the difference between the first phase alternating current I1 and the second phase alternating current I2 passes through the low-pass filter 562, the resulting differential mode component I2 is obtained ^* The differential mode component I2 ^* The voltage-sharing direct current feedback value needs to be restrained. In addition, the differential-mode component I2 can also be obtained by subtracting half of the first-phase alternating current I1 and half of the second-phase alternating current I2 after passing through the low-pass filter 5322 ^* 。

In an alternative embodiment, the two-phase current differential mode dc current suppression modulation command value may be obtained by:

in step S1, a second current reference value is obtained, where the second current reference value may be 0.

S2, calculating a difference value between a differential mode component of the two-phase alternating current and a second current reference value to obtain a differential mode direct current suppression modulation current instruction value;

and S3, adjusting the differential mode direct current suppression modulation current instruction value to obtain a two-phase current differential mode direct current suppression modulation instruction value.

Specifically, as shown in fig. 2, the differential mode dc current rejection loop 560 between the two phases of current receives the reference value 0 (i.e., the second current reference value) and the first phase ac current anddifferential mode component I2 of second phase alternating current ^* And calculating the difference value of the two values to obtain a differential mode direct current suppression modulation current instruction value delta I2 ^* . Then, the third regulator 561 damps the modulation current command Δ I2 for the differential-mode direct current ^* PI regulation is carried out, and a two-phase current differential mode direct current suppression modulation instruction VLdc can be obtained ^* 。

The third regulator may be a PI regulator, a P regulator, or the like. The specific type of regulator is not limited by this application.

In an alternative embodiment, the current control loop 550 determines a grid-connected feedback current value according to a difference mode component of the two-phase alternating current and a current value of the two-phase alternating current, calculates a difference value between the grid-connected feedback current value and a grid-connected current command value to obtain a grid-connected current control modulation current command value, and then adjusts the grid-connected current control modulation current command value to obtain a grid-connected current control modulation voltage command value. The grid-connected current instruction value is determined by the effective value of the grid-connected current.

Specifically, as shown in fig. 2, the current control loop 550 includes a subtraction unit 551 and a fourth regulator 552. Wherein, subtraction unit 551 receives grid-connected feedback current value ILfb and grid-connected current command value IL ^* Wherein, the grid-connected feedback current value ILfb is half of the difference between the grid-connected first phase current I1 and the grid-connected second phase current I2 and the differential mode component I2 ^* . Then, the subtraction unit 551 calculates the grid-connected feedback current value ILfb and the grid-connected current command value IL ^* Obtaining a grid-connected current control modulation current instruction value IL1 by the difference ^* . The fourth regulator 552 receives the grid-connected current control modulation current command value IL1 ^* For grid-connected current control modulation current instruction value IL1 ^* PI regulation is carried out to obtain a grid-connected current control modulation voltage instruction value VL ^* 。

The fourth regulator may be a PI regulator, a P regulator, or the like. The specific type of regulator is not limited by this application. The current control loop 550 may be any current control loop available in the industry and is not specifically limited in this application.

In addition, the method can be used for producing a composite materialWhen ENV =1, the voltage equalizing control loop 530 is enabled, and the voltage equalizing control modulation voltage command Vdc outputted from the voltage equalizing control loop 530 is output ^* Is greater than 0, at which point a dc offset is added to the output of the current control loop 550; when ENV =0, the voltage-equalizing control modulation-voltage command value Vdc ^* Equal to 0, does not affect the original operating state of the current control loop 550.

When ENV =1, the duty ratio of at least one switching tube in inverter switching unit 130 is greater than the duty ratio of the switching tube when ENV = 0.

Taking the inverter switch unit 130 shown in fig. 2 as an example, when the voltage average value Udc1 of the upper bus capacitor C1 is greater than the voltage average value Udc2 of the lower bus capacitor C2, and ENV =1, the voltage command value Vdc is modulated due to voltage-sharing control ^* When ENV =0, the duty ratio of the a-phase first switch AS1 and the B-phase first switch BS1 is greater than that, and when ENV =0, the duty ratio of the a-phase first switch AS1 and the B-phase first switch BS1 causes the current integral value of the charging of the lower bus capacitor C2 to exceed the current integral value of the charging of the upper bus capacitor C1, so that the voltage of the lower bus capacitor C2 is increased, the voltage of the upper bus capacitor C1 is decreased, the average voltage values of the upper and lower bus capacitors are equalized, and no dc modulation current is injected into the bus midpoint DN, thereby avoiding the problem that the dc modulation current is injected into the bus midpoint DN to instantaneously affect the load, for example, when the a-phase modulation wave shown in fig. 9 includes a conventional sine modulation wave and a dc modulation wave, the driving waveform diagram of the switching tubes in the inverter switching unit, and when the B-phase modulation wave shown in fig. 10 includes a conventional sine modulation wave and a dc modulation wave, the driving waveform diagram of the switching tubes in the inverter switching unit. AS can be seen from comparison with fig. 4 and 5, the duty ratio of the a-phase first switch AS1 larger than the B-phase fourth switch BS4 increases, and the duty ratio of the B-phase first switch BS1 larger than the a-phase fourth switch AS4 increases.

Similarly, when the voltage average value Udc1 of the upper bus capacitor C1 is smaller than the voltage average value Udc2 of the lower bus capacitor C2, ENV =1, the voltage command value Vdc is modulated due to voltage-sharing control ^* Is greater than 0 such that the duty ratio of the a-phase fourth switch AS4 and the B-phase fourth switch BS4 is greater than that of the a-phase fourth switch AS4 and the B-phase fourth switch at ENV =0The duty ratio of the switch BS4 enables the current integral value of charging the upper bus capacitor C1 to exceed the current integral value of charging the lower bus capacitor C2, so that the voltage of the upper bus capacitor C1 is increased, the voltage of the lower bus capacitor C2 is reduced, the voltage average values of the upper bus capacitor and the lower bus capacitor are balanced, the direct current modulation current is not injected into the bus midpoint DN, and the problem that the load is instantaneously influenced by the direct current modulation current injected into the bus midpoint DN can be solved.

In practical applications, the a-phase PWM controller 542, the B-phase PWM controller 583 and the first controller 570 may be integrated into the same controller, or may be separate controllers. The enable balance bridge unit 120 is prior art and is not described in detail in this application.

Further, a normalization processing module (not shown in fig. 2) may be disposed between the second addition unit 541 and the a-phase PWM controller 542 and between the third addition unit 582 and the B-phase PWM controller 583, and configured to perform a normalization process according to the a-phase total modulation instruction VMA ^* Phase B general modulation instruction VMB ^* And normalizing with one half of the average value of the direct current bus voltage to obtain a normalized modulation command. To avoid over-modulation, the dc bus voltage may be raised to (1 + k 1) × k2 times the bus voltage. If the maximum value of the normalized modulation instruction absolute value is larger than 1, a corresponding difference coefficient k1 is obtained, and the direct current bus voltage is controlled to be (1 + k1) × k2 times of the bus voltage in the next control period, wherein k2 is preferably 1/0.99, namely the maximum value of the modulation degree is controlled within 99%, so that overmodulation is prevented after the voltage-sharing control modulation instruction is increased by increasing the bus voltage, and the phenomenon that the effect of the voltage-sharing control loop 530 is poor or no effect is caused by overmodulation, and grid-connected current distortion is caused is avoided.

In an optional embodiment, after the target equalization unit is determined to be a balanced bridge unit, when the target equalization unit is determined to be the balanced bridge unit, the inverter system controls the first flat Heng Qiaokai switch and the second flat Heng Qiaokai switch to be in complementary conduction so as to perform equalization processing on the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor, wherein the balanced bridge unit at least comprises the first balanced bridge switch and the second flat Heng Qiaokai switch.

Specifically, when ENB =1, the balance bridge unit 120 is enabled, and as shown in fig. 2, the first plane Heng Qiaokai switch S1 and the second plane Heng Qiaokai switch S2 of the balance bridge unit 120 are complementarily conducted, and balance the voltages on the upper bus capacitor C1 and the lower bus capacitor C2 through the power inductor L0. It can be seen that when the balance bridge unit 120 is enabled, the balance bridge unit 120 always has power loss, so that the extra power loss of the inverter is increased, and the overall efficiency of the system is reduced. When ENB =0, the balanced bridge unit 120 is not enabled, and the first flat Heng Qiaokai off S1 and the second flat Heng Qiaokai off S2 of the balanced bridge unit 120 are not conductive. In practical application, the first controller 570 may further receive an average voltage difference Δ Udc between the upper bus capacitor and the lower bus capacitor, and input Δ Udc as a feedback value into the equalizer loop of the equalizer bridge, and the equalizer loop outputs switching control signals of the first switch Heng Qiaokai switch S1 and the second switch Heng Qiao switch S2.

It should be noted that, due to the instantaneous switching of the unbalanced load with the dc characteristic, the dc current formed by the dc unbalanced load is injected to the bus midpoint DN through the neutral line N of the inverter 100, so that the charging and discharging of the upper and lower bus capacitors are unbalanced, and the voltage of the dc bus capacitor of the inverter fluctuates, which is instantaneous and dynamic. Based on the same mechanism, the average voltage difference value delta Udc of the bus capacitor and the actual common-mode component I of the grid-connected two-phase current are obtained ^* Feedback value, grid-connected current control modulation voltage command VL to be output to inverter current control loop ^* In the middle, voltage-sharing control modulation voltage command Vdc is added ^* And a dc modulation wave is added to the current control loop to increase the duty ratio of the switching control signal of at least one switching tube in the inverter switching unit 130, so as to change the current integral value of the charging of the upper and lower bus capacitors, thereby balancing the average value of the dc bus capacitor voltage and optimizing the transient characteristics of the inverter system. Therefore, the voltage-sharing control loop 530 and the differential mode direct current suppression loop 560 between two phases of current are added into the inverter controller to change the duty ratio of the switching tube, so that the injection of the transient direct current can be realized, and no power loss exists.

As described above, when the difference between the average values of the upper and lower bus capacitor voltages is not large, the voltage-sharing control loop 530 is enabled to balance the average values of the upper and lower bus capacitor voltages; when the difference of the average values of the capacitance voltages of the upper bus and the lower bus is large, the balance bridge unit is enabled to quickly realize the balance of the average values of the capacitance voltages of the upper bus and the lower bus. The combination of the two balance modes enables the system to have optimal efficiency and good stability.

Example 2

According to an embodiment of the present invention, there is also provided an embodiment of a control apparatus for an inverter based on transient characteristics, which is applied to an inverter system of a photovoltaic power source, the inverter system at least includes an inverter and a voltage-sharing control loop, the inverter at least includes a bus capacitor unit, and the bus capacitor unit at least includes an upper bus capacitor and a lower bus capacitor, where fig. 11 is a schematic diagram of an alternative control apparatus for an inverter based on transient characteristics according to an embodiment of the present invention, as shown in fig. 11, the apparatus includes: a voltage calculation module 1101, a first instruction determination module 1103, a second instruction determination module 1105, and a voltage equalization module 1107.

The voltage calculation module 1101 is configured to calculate a difference between an average voltage of the upper bus capacitor and an average voltage of the lower bus capacitor, so as to obtain an average voltage difference; the first instruction determining module 1103 is configured to determine, by the voltage-sharing control loop, a voltage sub-loop modulation instruction value according to the average voltage difference value and the initial voltage feedforward instruction value when the target balancing unit is determined to be the voltage-sharing control loop according to the average voltage difference value, and determine a voltage-sharing direct current suppression modulation voltage instruction value according to a common-mode component of two-phase alternating current, where the two-phase alternating current is two-phase grid-connected current flowing through the bus capacitor unit; a second instruction determining module 1105, configured to determine a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value; and a voltage balancing module 1107, configured to perform balancing processing on the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the voltage-sharing control modulation voltage instruction value.

Optionally, the control device for an inverter based on transient characteristics further includes: a comparison module and a first determination module. The comparison module is used for comparing the average voltage difference value with a preset voltage threshold value before calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain the average voltage difference value, so as to obtain a comparison result; and the first determining module is used for determining the target balancing unit from the balancing bridge unit and the voltage-sharing control loop according to the comparison result, wherein the preset voltage threshold at least comprises a first voltage threshold, a second voltage threshold and a third voltage threshold, the first voltage threshold is smaller than the second voltage threshold, and the second voltage threshold is smaller than the third voltage threshold.

Optionally, the first determining module includes: and the first sub-determination module is used for determining that the target equalization unit is a balance bridge unit when the absolute value of the average voltage difference value is greater than the third voltage threshold value.

Optionally, the first determining module includes: a second sub-determination module and a third sub-determination module. The second sub-determining module is configured to start timing and obtain a first time length when the absolute value of the average voltage difference is greater than a first voltage threshold and is less than or equal to a second voltage threshold, and determine that the target balancing unit is a voltage-sharing control loop when the first time length is greater than a preset time length, where the first time length is a duration of the average voltage difference being greater than the first voltage threshold and less than or equal to the second voltage threshold; and the third sub-determination module is used for determining that the target equalization unit is a voltage-sharing control loop when the absolute value of the average voltage difference is greater than the second voltage threshold and is less than or equal to a third voltage threshold.

Optionally, the first determining module further includes: a fourth sub-determination module and a fifth sub-determination module. The fourth sub-determining module is used for determining that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in a balanced state when the absolute value of the average voltage difference value is smaller than or equal to the first voltage threshold; or, the fifth sub-determining module is configured to determine that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in an equilibrium state when the first time length is less than or equal to the preset time length.

Optionally, the first instruction determining module includes: the device comprises a second determining module, a first obtaining module, a first calculating module, a first adjusting module, a second calculating module and a third calculating module. The second determining module is used for determining an initial voltage feedforward instruction value according to the capacitance value of the bus capacitor unit, the instantaneous charging time of the bus capacitor unit, the average voltage difference value and the effective value of the grid-connected current flowing through the bus capacitor unit; the first acquisition module is used for acquiring an average voltage difference value and a working state identifier of the voltage-sharing control loop, wherein the working state identifier of the voltage-sharing control loop represents whether the voltage-sharing control loop is in an enabling state or not; the first calculation module is used for calculating the product of the average voltage difference value and the working state identifier of the voltage-sharing control loop to obtain a voltage-sharing control instruction value; the first adjusting module is used for adjusting the voltage-sharing control instruction value to obtain a voltage-sharing direct control modulation instruction value; the second calculation module is used for calculating the product of the initial voltage feedforward instruction value and the working state identification of the voltage-sharing control loop to obtain the calculated voltage feedforward instruction value; and the third calculation module is used for calculating the sum of the voltage-sharing direct control modulation instruction value and the calculated voltage feedforward instruction value to obtain a voltage sub-loop modulation instruction value.

Optionally, the first instruction determining module includes: the device comprises a second acquisition module, a fourth calculation module and a second adjustment module. The second acquisition module is used for acquiring a first current reference value; the fourth calculation module is used for calculating a difference value between the common-mode component of the two-phase alternating current and the first current reference value to obtain a direct current suppression modulation current instruction value; and the second adjusting module is used for adjusting the direct current suppression modulation current instruction value to obtain a voltage-sharing direct current suppression modulation voltage instruction value.

Optionally, the voltage balancing module includes: the device comprises a signal generating module, a signal adjusting module and a third adjusting module. The signal generation module is used for controlling the modulation controller to generate a switching control signal according to the voltage-sharing control modulation voltage instruction value; the signal adjusting module is used for adjusting the duty ratio of an inversion switching unit in the inverter according to the switching control signal; and the third adjusting module is used for adjusting the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the duty ratio.

Optionally, the signal generating module includes: the device comprises a third acquisition module, a fifth calculation module, a first generation module, a sixth calculation module and a second generation module. The third acquisition module is used for acquiring a grid-connected current control modulation voltage instruction value, a voltage-sharing control modulation voltage instruction value and a two-phase current differential mode direct current suppression modulation instruction value; the fifth calculation module is used for calculating the sum of the grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current difference mode direct current suppression modulation instruction value to obtain a first-phase total modulation instruction; the first generation module is used for generating a switch control signal for a first-phase switch tube in the inversion switch unit based on the first-phase total regulation instruction; the sixth calculation module is used for carrying out negation operation on the grid-connected current control modulation voltage instruction value, and calculating the sum of the negated grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current difference mode direct current suppression modulation instruction value to obtain a second-phase total modulation instruction; and the second generation module is used for generating a switch control signal for a second-phase switch tube in the inversion switch unit based on the second-phase total regulation instruction.

Optionally, the third obtaining module includes: the device comprises a fourth acquisition module, a seventh calculation module and a fourth adjustment module. The fourth obtaining module is used for obtaining a second current reference value; the seventh calculation module is used for calculating the difference value between the differential mode component of the two-phase alternating current and the second current reference value to obtain a differential mode direct current suppression modulation current instruction value; and the fourth adjusting module is used for adjusting the differential mode direct current suppression modulation current instruction value to obtain a two-phase current differential mode direct current suppression modulation instruction value.

Optionally, the third obtaining module includes: the device comprises a third determining module, an eighth calculating module and a fifth adjusting module. The third determining module is used for determining a grid-connected feedback current value according to the differential mode component of the two-phase alternating current and the current value of the two-phase alternating current; the eighth calculation module is used for calculating a difference value between the grid-connected feedback current value and a grid-connected current instruction value to obtain a grid-connected current control modulation current instruction value, wherein the grid-connected current instruction value is determined by an effective value of grid-connected current; and the fifth adjusting module is used for adjusting the grid-connected current control modulation current instruction value to obtain a grid-connected current control modulation voltage instruction value.

Example 3

According to another aspect of the embodiments of the present invention, there is also provided a control system of an inverter based on transient characteristics, the inverter system being configured to perform the control method of the inverter based on transient characteristics provided in embodiment 1 above.

Example 4

According to another aspect of embodiments of the present invention, there is also provided a computer-readable storage medium having a computer program stored therein, wherein the computer program is configured to execute the above-mentioned transient characteristic-based inverter control method when executed.

Example 5

According to another aspect of the embodiments of the present invention, there is also provided an electronic device, wherein fig. 12 is a schematic diagram of an alternative electronic device according to the embodiments of the present invention, as shown in fig. 12, the electronic device includes one or more processors; a memory for storing one or more programs that, when executed by the one or more processors, cause the one or more processors to implement a method for operating a program, wherein the program is configured to perform the above-described transient characteristic-based inverter control method when executed.

The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.

In the above embodiments of the present invention, the description of each embodiment has its own emphasis, and reference may be made to the related description of other embodiments for parts that are not described in detail in a certain embodiment.

In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, a division of a unit may be a division of a logic function, and an actual implementation may have another division, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or may not be executed. In addition, the shown or discussed coupling or direct coupling or communication connection between each other may be an indirect coupling or communication connection through some interfaces, units or modules, and may be electrical or in other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

The above is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and embellishments can be made without departing from the principle of the present invention, and these modifications and embellishments should also be regarded as the protection scope of the present invention.

Claims

1. A control method of an inverter based on transient characteristics is applied to an inverter system of a photovoltaic power supply, the inverter system at least comprises an inverter and a voltage-sharing control loop, the inverter at least comprises a bus capacitor unit, the bus capacitor unit at least comprises an upper bus capacitor and a lower bus capacitor, and the method comprises the following steps:

calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain an average voltage difference value;

when the target balancing unit is determined to be the voltage-sharing control loop according to the average voltage difference value, determining a voltage sub-loop modulation instruction value according to the average voltage difference value and an initial voltage feedforward instruction value through the voltage-sharing control loop, and determining a voltage-sharing direct current suppression modulation voltage instruction value according to a common-mode component of two-phase alternating current, wherein the two-phase alternating current is two-phase grid-connected current flowing through the bus capacitor unit;

determining a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value;

carrying out equalization processing on the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the voltage-sharing control modulation voltage instruction value;

wherein, according to the average voltage difference value and the initial voltage feedforward instruction value, determining a voltage sub-loop modulation instruction value comprises:

determining the initial voltage feedforward instruction value according to the capacitance value of the bus capacitor unit, the instantaneous charging time of the bus capacitor unit, the average voltage difference value and the effective value of the grid-connected current flowing through the bus capacitor unit;

acquiring the average voltage difference value and a working state identifier of the voltage-sharing control loop, wherein the working state identifier of the voltage-sharing control loop represents whether the voltage-sharing control loop is in an enabling state or not;

calculating the product of the average voltage difference value and the working state identifier of the voltage-sharing control loop to obtain a voltage-sharing control instruction value;

adjusting the voltage-sharing control instruction value to obtain a voltage-sharing direct control modulation instruction value;

calculating the product of the initial voltage feedforward instruction value and the working state identification of the voltage-sharing control loop to obtain a calculated voltage feedforward instruction value;

and calculating the sum of the voltage-sharing direct control modulation instruction value and the calculated voltage feedforward instruction value to obtain the voltage sub-loop modulation instruction value.

2. The method of claim 1, wherein prior to calculating a difference between the average voltage of the upper bus capacitance and the average voltage of the lower bus capacitance to obtain an average voltage difference, the method further comprises:

comparing the average voltage difference value with a preset voltage threshold value to obtain a comparison result;

and determining the target balancing unit from a balance bridge unit and the voltage-sharing control loop according to the comparison result, wherein the preset voltage threshold at least comprises a first voltage threshold, a second voltage threshold and a third voltage threshold, the first voltage threshold is smaller than the second voltage threshold, and the second voltage threshold is smaller than the third voltage threshold.

3. The method according to claim 2, wherein determining a target equalization unit from the equalization bridge unit and the equalization control loop according to a magnitude between the average voltage difference value and a preset voltage threshold comprises:

determining that the target balancing unit is the balancing bridge unit when the absolute value of the average voltage difference is greater than the third voltage threshold.

4. The method according to claim 2, wherein determining a target equalization unit from the equalization bridge unit and the equalization control loop according to a magnitude between the average voltage difference value and a preset voltage threshold comprises:

when the absolute value of the average voltage difference value is greater than the first voltage threshold and is less than or equal to the second voltage threshold, starting timing, acquiring a first time length, and when the first time length is greater than a preset time length, determining that the target equalization unit is the voltage-sharing control loop, wherein the first time length is a duration of the average voltage difference value greater than the first voltage threshold and less than or equal to the second voltage threshold; or,

and when the absolute value of the average voltage difference value is greater than the second voltage threshold and is less than or equal to the third voltage threshold, determining that the target equalization unit is the voltage-sharing control loop.

5. The method of claim 4, further comprising:

determining that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in an equilibrium state when the absolute value of the average voltage difference is less than or equal to the first voltage threshold; or,

and when the first time length is less than or equal to the preset time length, determining that the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor are in a balanced state.

6. The method according to claim 1, wherein determining the grading dc current rejection modulation voltage command value based on the common mode component of the two-phase ac current comprises:

acquiring a first current reference value;

calculating a difference value between the common-mode component of the two-phase alternating current and the first current reference value to obtain a direct current suppression modulation current instruction value;

and adjusting the direct current suppression modulation current instruction value to obtain the voltage-sharing direct current suppression modulation voltage instruction value.

7. The method according to claim 1, wherein the equalizing the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the voltage-sharing control modulation voltage command value comprises:

controlling a modulation controller to generate a switch control signal according to the voltage-sharing control modulation voltage instruction value;

adjusting a duty ratio of an inverter switching unit in the inverter according to the switching control signal;

and adjusting the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the duty ratio.

8. The method according to claim 7, wherein controlling a modulation controller to generate a switching control signal according to the voltage-sharing control modulation voltage command value comprises:

acquiring a grid-connected current control modulation voltage instruction value, a voltage-sharing control modulation voltage instruction value and a two-phase current differential mode direct current suppression modulation instruction value;

calculating the sum of the grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current differential mode direct current suppression modulation instruction value to obtain a first-phase total modulation instruction;

generating a switch control signal for a first phase switching tube in the inversion switching unit based on the first phase total regulation instruction;

performing negation operation on the grid-connected current control modulation voltage instruction value, and calculating the sum of the negated grid-connected current control modulation voltage instruction value, the voltage-sharing control modulation voltage instruction value and the two-phase current differential mode direct current suppression modulation instruction value to obtain a second-phase total modulation instruction;

and generating a switch control signal for a second-phase switch tube in the inversion switch unit based on the second-phase total regulation instruction.

9. The method of claim 8, wherein obtaining a two-phase current differential mode direct current suppression modulation command value comprises:

acquiring a second current reference value;

calculating the difference value between the differential mode component of the two-phase alternating current and the second current reference value to obtain a differential mode direct current suppression modulation current instruction value;

and adjusting the differential mode direct current suppression modulation current instruction value to obtain the two-phase current differential mode direct current suppression modulation instruction value.

10. The method of claim 8, wherein obtaining the grid-connected current control modulation voltage command value comprises:

determining a grid-connected feedback current value according to the differential mode component of the two-phase alternating current and the current value of the two-phase alternating current;

calculating a difference value between the grid-connected feedback current value and a grid-connected current instruction value to obtain a grid-connected current control modulation current instruction value, wherein the grid-connected current instruction value is determined by an effective value of grid-connected current;

and adjusting the grid-connected current control modulation current instruction value to obtain the grid-connected current control modulation voltage instruction value.

11. A control device of an inverter based on transient characteristics is applied to an inverter system of a photovoltaic power supply, the inverter system at least comprises an inverter and a voltage-sharing control loop, the inverter at least comprises a bus capacitor unit, the bus capacitor unit at least comprises an upper bus capacitor and a lower bus capacitor, and the device comprises:

the voltage calculation module is used for calculating the difference value between the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor to obtain an average voltage difference value;

the first instruction determining module is used for determining a voltage sub-loop modulation instruction value according to the average voltage difference value and an initial voltage feedforward instruction value through the voltage-sharing control loop when a target balancing unit is determined to be the voltage-sharing control loop according to the average voltage difference value, and determining a voltage-sharing direct current suppression modulation voltage instruction value according to a common-mode component of two-phase alternating current, wherein the two-phase alternating current is two-phase grid-connected current flowing through the bus capacitor unit;

the second instruction determining module is used for determining a voltage-sharing control modulation voltage instruction value according to the voltage sub-loop modulation instruction value and the voltage-sharing direct current suppression modulation voltage instruction value;

the voltage balancing module is used for balancing the average voltage of the upper bus capacitor and the average voltage of the lower bus capacitor according to the voltage-sharing control modulation voltage instruction value;

wherein the first instruction determination module comprises:

the second determining module is used for determining the initial voltage feedforward instruction value according to the capacitance value of the bus capacitor unit, the instantaneous charging time of the bus capacitor unit, the average voltage difference value and the effective value of the grid-connected current flowing through the bus capacitor unit;

the first obtaining module is used for obtaining the average voltage difference value and a working state identifier of the voltage-sharing control loop, wherein the working state identifier of the voltage-sharing control loop represents whether the voltage-sharing control loop is in an enabling state or not;

the first calculation module is used for calculating the product of the average voltage difference value and the working state identifier of the voltage-sharing control loop to obtain a voltage-sharing control instruction value;

the first adjusting module is used for adjusting the voltage-sharing control instruction value to obtain a voltage-sharing direct control modulation instruction value;

the second calculation module is used for calculating the product of the initial voltage feedforward instruction value and the working state identifier of the voltage-sharing control loop to obtain a voltage feedforward instruction value after operation;

and the third calculation module is used for calculating the sum of the voltage-sharing direct control modulation instruction value and the calculated voltage feedforward instruction value to obtain the voltage sub-loop modulation instruction value.

12. An inverter system characterized by being configured to execute the control method of the inverter based on the transient characteristics according to any one of claims 1 to 10.

13. A computer-readable storage medium, characterized in that a computer program is stored in the computer-readable storage medium, wherein the computer program is arranged to execute the transient characteristics-based inverter control method of any one of claims 1 to 10 when executed.

14. An electronic device, characterized in that the electronic device comprises one or more processors; a memory for storing one or more programs that, when executed by the one or more processors, cause the one or more processors to implement a method for operating a program, wherein the program is configured to perform the method for controlling an inverter based on transient characteristics of any one of claims 1 to 10 when executed.