CN115577670B - Electronic chip, detection method of electronic chip and electronic equipment - Google Patents

Electronic chip, detection method of electronic chip and electronic equipment Download PDF

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CN115577670B
CN115577670B CN202211560308.2A CN202211560308A CN115577670B CN 115577670 B CN115577670 B CN 115577670B CN 202211560308 A CN202211560308 A CN 202211560308A CN 115577670 B CN115577670 B CN 115577670B
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electronic chip
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CN115577670A (en
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黄钧
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Ziguang Tongxin Microelectronics Co Ltd
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Beijing Ziguang Xinneng Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/06Structured ASICs
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention provides an electronic chip, a detection method of the electronic chip and electronic equipment. The electronic chip is internally provided with a characteristic signal generator, and the characteristic signal generator is connected with a specified input pin on the electronic chip; the appointed input pin is used for receiving an external preset function signal and sending the preset function signal to a controller in the electronic chip so as to trigger the controller to execute an action corresponding to the preset function signal; the characteristic signal generator is used for switching the appointed input pin into the output pin in a working state and outputting a preset characteristic signal through the appointed input pin. By the method and the device, the ownership of the electronic chip can be identified, and the safety and the standardability of the application of the electronic chip are improved.

Description

Electronic chip, detection method of electronic chip and electronic equipment
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to an electronic chip, a method for detecting the electronic chip, and an electronic device.
Background
With the popularization of electronic devices, electronic chips (also called integrated circuits, ICs or integrated circuit chips) are used more and more widely, and the unique functions or appearances of electronic devices put higher demands on the development of electronic chips. However, a chip manufacturer or a chip design company expends a lot of manpower and material resources to produce the electronic chip, and the chip technology is often stolen by other companies through cloning technologies such as layout copy and the like because the ownership of the electronic chip is difficult to identify.
Disclosure of Invention
The application aims to provide an electronic chip, a detection method of the electronic chip and electronic equipment, so as to identify the ownership right of the electronic chip and improve the safety and the standardization of the application of the electronic chip.
The embodiment of the application provides an electronic chip, wherein a characteristic signal generator is arranged in the electronic chip and is connected with a specified input pin on the electronic chip; the appointed input pin is used for receiving an external preset function signal and sending the preset function signal to a controller in the electronic chip so as to trigger the controller to execute an action corresponding to the preset function signal; the characteristic signal generator is used for switching the specified input pin into an output pin in a working state and outputting a preset characteristic signal through the specified input pin.
An input buffer is arranged between the specified input pin and the controller, and an output buffer is arranged between the specified input pin and the characteristic signal generator; the input buffer is in a working state by default, and the output buffer is in a non-working state by default; the characteristic signal generator is also used for switching the input buffer into a non-working state and switching the output buffer into a working state under a working state so as to switch the specified input pin into an output pin; the characteristic signal generator is also used for switching the input buffer to be in a working state and switching the output buffer to be in a non-working state when the characteristic signal output is finished.
A first switch is arranged between the appointed input pin and the controller, and a second switch is arranged between the appointed input pin and the characteristic signal generator; the first switch defaults to a closed state, and the second switch defaults to an open state; the characteristic signal generator is also used for disconnecting the first switch and closing the second switch under the working state so as to switch the specified input pin as an output pin; and when the output of the characteristic signal is finished, the first switch is closed, and the second switch is opened.
Wherein the characteristic signal generator comprises: the device comprises an output control module, a Read Only Memory (ROM) and a timer, wherein the ROM and the timer are respectively connected with the output control module; the ROM stores coded data corresponding to the characteristic signals in advance; the timer is used for sending a baud rate to the output control module; the output control module is used for switching the specified input pin into an output pin in a working state, reading the coded data and outputting a signal corresponding to the coded data to the specified input pin according to the baud rate.
The coded data are preset binary data, and the signal corresponding to the coded data is a high-level signal or a low-level signal.
The output control module is also used for repeatedly outputting signals corresponding to the coded data until the number of times of repetition reaches a threshold value, and stopping outputting.
The designated input pin is a wakeup pin, and the characteristic signal generator enters a working state when the electronic chip is awakened; the wake-up pin is used for receiving an external wake-up signal and sending the wake-up signal to a controller in the electronic chip so as to trigger the controller to be switched from a dormant state to a working state.
In a second aspect, an embodiment of the present application further provides a method for detecting an electronic chip, where the electronic chip is the electronic chip described above, and the designated input pin is connected to a signal detector; the method comprises the following steps: inputting a preset function signal to the appointed input pin so that the appointed input pin triggers a controller of the electronic chip to execute an action corresponding to the preset function signal; when the controller executes the action corresponding to the preset function signal, detecting whether the designated input pin outputs the characteristic signal or not through the signal detector; if yes, determining the electronic chip as the chip with the characteristic signal generator.
The designated input pin is a wakeup pin, and the characteristic signal generator enters a working state when the electronic chip is awakened; the signal detector is an oscilloscope or a universal meter.
In a third aspect, an embodiment of the present application further provides an electronic device, where the electronic device includes the electronic chip described above.
The embodiment of the application provides an electronic chip, a detection method of the electronic chip and electronic equipment, a characteristic signal generator is arranged on the electronic chip, an appointed input pin can be switched to be an output pin in a working state, the function of the appointed input pin is equivalently expanded, the electronic chip has signal output capacity, the characteristic signal generator can output a preset characteristic signal through the appointed input pin, the characteristic signal is used for identifying the property attribution of the electronic chip, if other chips with functions similar to the electronic chip also output the characteristic signal, the other chips adopt the design technology of the electronic chip and encroach on the design property of the electronic chip, therefore, the uniqueness of the electronic chip is identified by the mode of arranging the characteristic signal generator in the electronic chip, the occurrence probability of stealing the chip by adopting means such as domain copy and the like can be reduced to a certain extent, and the application safety and the normalization of the electronic chip are improved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings used in the detailed description or the prior art description will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic structural diagram of an electronic chip according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another electronic chip provided in an embodiment of the present application;
fig. 3 is a schematic structural diagram of another electronic chip provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of another electronic chip provided in an embodiment of the present application;
fig. 5 is a schematic structural diagram of another electronic chip provided in an embodiment of the present application;
FIG. 6 is a schematic diagram of a characteristic signal provided by an embodiment of the present application;
fig. 7 is a flowchart of a method for detecting an electronic chip according to an embodiment of the present disclosure.
Detailed Description
The technical solutions of the present application will be described clearly and completely with reference to the following embodiments, and it should be understood that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The electronic chip is used as an important part in electronic equipment, and the property right attribution problem is difficult to effectively identify, so that the phenomenon that the chip is stolen by means of simple territory copying and the like is frequent, and the benefits and the production enthusiasm of a chip design and a production company are damaged. Based on this, the embodiment of the present invention provides an electronic chip, a method for detecting an electronic chip, and an electronic device, so as to identify property ownership of the electronic chip by means of generating a characteristic signal by a specific component built in the chip. The technique can be applied to any kind of integrated circuit chip.
Referring to the schematic structural diagram of the electronic chip shown in fig. 1, a characteristic signal generator 12 is disposed in the electronic chip 100, and the characteristic signal generator 12 is connected to a designated input pin 14 on the electronic chip 100. Wherein the designated input pins 14 may be selected from input pins of the electronic chip 100, which are generally only capable of receiving data outside the electronic chip 100 and transmitting the data to other components within the electronic chip 100.
The designated input pin 14 is configured to receive an external preset function signal, and send the preset function signal to the controller 16 in the electronic chip 100, so as to trigger the controller 16 to execute an action corresponding to the preset function signal.
The characteristic signal generator 12 is configured to switch the designated input pin to be the output pin in an operating state, and output a preset characteristic signal through the designated input pin.
The feature signal generator 12 is in a sleep state by default, and may enter a working state by manually triggering the feature signal generator 12, or may enter the working state by being triggered by a controller or other components in the electronic chip 100, and when the specific implementation is implemented, a mode of triggering the feature signal generator 12 to enter the working state may be selected according to an application scenario of the electronic chip 100.
The preset characteristic signal is generated by fixing code data preset in the characteristic signal generator 12, that is, the preset characteristic signal is a fixed signal and will not change with time or other changing factors, and as long as the characteristic signal generator 12 is arranged in the electronic chip 100, the characteristic signal can be output in the operating state of the characteristic signal generator 12.
The electronic chip can switch the appointed input pin as the output pin under the working state through the characteristic signal generator arranged on the electronic chip, which is equivalent to expanding the function of the appointed input pin and enabling the electronic chip to have the signal output capability, and further the characteristic signal generator can output the preset characteristic signal through the appointed input pin, wherein the characteristic signal is used for identifying the property attribution of the electronic chip, if other chips with the functions similar to the electronic chip 100 also output the characteristic signal, the other chips adopt the design technology of the electronic chip 100 and encroach on the design property right of the electronic chip 100, so that the uniqueness of the electronic chip is identified through the way of arranging the characteristic signal generator in the electronic chip, the occurrence probability of stealing the chip by adopting the means of domain copying and the like can be reduced to a certain extent, and the safety and the normalization of the application of the electronic chip are improved.
Referring to fig. 2, another electronic chip is shown, which further includes, on the basis of fig. 1: an input buffer 22 is arranged between the appointed input pin and the controller, and an output buffer 24 is arranged between the appointed input pin and the characteristic signal generator; the input buffer 22 defaults to an operating state, and the output buffer 24 defaults to a non-operating state; correspondingly, the characteristic signal generator 12 is further configured to switch the input buffer 22 to be in a non-operating state and the output buffer 24 to be in an operating state, so as to switch the designated input pin 14 to be an output pin; the signature generator 12 is further configured to switch the input buffer 22 to an active state and the output buffer 24 to a non-active state at the end of outputting the signature signal, so as to recover the designated input pin 14 as the default input pin. The buffer is specifically a buffer register, and the input buffer is used for temporarily storing data or signals sent by an external device so as to be taken away by a controller (or a processor); the output buffer is used for temporarily storing the data or signals sent to the peripheral by the characteristic signal generator. With the above-described buffers, the input or output function of the designated input pin 14 can be coordinated and buffered.
The input buffer 22 and the output buffer 24 allow the characteristic signal generator 12 to relatively easily switch the input or output function of the designated input pin 14, and allow the designated input pin 14 to output the characteristic signal in a desired situation.
Referring to fig. 3, another electronic chip is shown, which further includes, on the basis of fig. 1: a first switch 32 is arranged between the appointed input pin and the controller, and a second switch 34 is arranged between the appointed input pin and the characteristic signal generator; the first switch 32 defaults to a closed state and the second switch 34 defaults to an open state; correspondingly, the characteristic signal generator 12 is further configured to open the first switch 32 and close the second switch 34 to switch the designated input pin 14 as the output pin in the operating state; and at the end of the output of the characteristic signal, the first switch 32 is closed and the second switch 34 is opened. The switch is an operation unit for realizing the on-off of the circuit by utilizing an electronic circuit and a power electronic device, and can comprise a controllable electronic driving device, such as a thyristor, a transistor, a field effect transistor, a controllable silicon, a relay and the like.
The first switch 32 and the second switch 34 allow the characteristic signal generator 12 to switch the input or output function of the designation input pin 14 relatively easily, and allow the designation input pin 14 to output the characteristic signal in a desired situation.
Referring to fig. 4, another electronic chip is shown, which is based on the above fig. 1, and the characteristic signal generator 12 includes: an output control module 121, and a read only memory ROM 122 and a timer 123 respectively connected to the output control module 121;
the ROM 122 stores encoded data corresponding to the characteristic signal in advance;
the timer 123 is configured to send the baud rate to the output control module 421; the baud rate is a measure of the number of transmitted symbol symbols per unit time, and is expressed by the number of times the carrier modulation state changes per unit time.
The output control module 121 is configured to switch the designated input pin 14 to be an output pin in an operating state, read the encoded data in the ROM 122, and output a signal corresponding to the encoded data to the designated input pin 14 according to the baud rate.
The encoded data in the ROM 122 may be preset binary data, and the signal corresponding to the encoded data is a high level signal or a low level signal. For example, 0 in binary data corresponds to a low level signal, and 1 represents a high level signal. The encoded data in the ROM 122 may also be encoded data in other forms, such as encoded data in the form of functions, and the signals corresponding to the encoded data are graphs corresponding to the functions, for example, the functions may be sine functions, cosine functions, etc.
As a possible implementation manner, the output control module 121 is further configured to repeatedly output a signal corresponding to the encoded data until the number of repetitions reaches the threshold number. According to actual needs, the number threshold here may be preset in the output control module 121, the encoded data may be provided with a start flag and/or an end flag, the encoded data may also be of a fixed length, the output control module 121 may simply determine whether to complete outputting of the encoded data of the current time according to the flag or the fixed length, and if yes and the number of repetitions does not reach the number threshold, may continue outputting the signal corresponding to the encoded data until the number of repetitions reaches the number threshold, and stops outputting.
As a possible embodiment, the characteristic signal generator 12 may also adopt other structures, such as: the timer and/or the ROM are/is arranged in the output control module, or the timer is cancelled, and the baud rate of the output signal of the output control module can be a preset fixed value and the like.
As a possible implementation manner, the designated input pin is a wake-up pin (WakeUp pin), and the characteristic signal generator enters a working state when the electronic chip is woken up; the wake-up pin is used for receiving an external wake-up signal and sending the wake-up signal to a controller in the electronic chip so as to trigger the controller to be switched from a dormant state to a working state.
Referring to fig. 5, a schematic structure diagram of another electronic chip is shown, which takes a specific input pin as a wake-up pin 51 as an example for description, where the wake-up pin 51 connects two branches, a first branch is a wake-up control branch corresponding to the wake-up pin 51, and the first branch includes a first switch 52 and a controller 53, so as to wake up the controller 53 (before wake-up, it is in a low power consumption state, such as a standby state or a sleep state) when the wake-up pin 51 receives a wake-up signal (such as a high level signal). The second branch is a wake-up pin 51 as a characteristic signal output branch corresponding to the output pin, and includes a second switch 54, an output control module 55, a timer 56, and a ROM 57. The first switch 52, the second switch 54, the output control module 55, the timer 56, and the ROM 57 constitute a characteristic signal generator.
After the controller 53 wakes up, the characteristic signal generator enters a working state, the device on the second branch starts to operate, the output control module 55 controls the wake-up pin 51 to be switched from the input pin to the output pin, the timer 56 starts to time, and the bit period of the output data, i.e., the baud rate, is used for controlling the interval of the output signal of the output control module 55. The output control module 55 reads the encoded data in the ROM, and the encoded data stored in the ROM 57 may be binary data, such as: 10110100. after the output control module 55 reads the data, the high-low level signal corresponding to the encoded data is sent to the wake-up pin 51 according to the encoding mode, so that the wake-up pin 51 can output the above feature signal, and a signal detector such as an oscilloscope or a multimeter may be connected to the wake-up pin 51 to present the feature signal, see the feature signal diagram shown in fig. 6, where the feature signal is a TTL logic level signal, the top row represents a high level signal, the bottom row represents a low level signal, the feature signal corresponds to the binary data 10110110110100, and is a feature signal of one period, and the period may be set as needed, for example, 10us. And after all the data in the ROM are sent, if the cyclic output is required to be repeated, the steps are repeated, otherwise, the characteristic signal generator stops working.
Before waking up, the electronic chip is in a low power consumption mode, generally in a low level state, and can be woken up by applying a high level.
The devices may use the same power module for power supply, or a power module may be separately disposed in the electronic chip to supply power to one or more of the devices, and the power supply mode of the devices may be implemented with reference to related technologies, which is not described in detail in this embodiment.
Corresponding to the electronic chip, the embodiment of the invention also provides a detection method of the electronic chip, wherein the electronic chip in the detection method is the electronic chip in the embodiment, and the appointed input pin is connected with a signal detector; referring to fig. 7, the method includes the steps of:
step S702, inputting a preset function signal to the specified input pin, so that the specified input pin triggers the controller of the electronic chip to execute an action corresponding to the preset function signal;
step S704, when the controller executes the action corresponding to the preset function signal, detecting whether the designated input pin outputs a characteristic signal or not through the signal detector;
step S706, if yes, the electronic chip is determined to be the chip with the characteristic signal generator.
If the specified input pin is detected by the signal detector not to output the characteristic signal, the current detection process is stopped.
According to the detection method of the electronic chip, the designated input pin can be switched to be the output pin under the working state through the characteristic signal generator arranged on the electronic chip, the function of the designated input pin is expanded equivalently, the designated input pin has the signal output capacity, and then the characteristic signal generator can output the preset characteristic signal through the designated input pin, the characteristic signal is used for identifying the property ownership of the electronic chip, if other chips with the functions similar to the functions of the electronic chip also output the characteristic signal, the other chips adopt the design technology of the electronic chip and encroach on the design property of the electronic chip, so that the uniqueness of the electronic chip is identified through the mode of arranging the characteristic signal generator in the electronic chip, the occurrence probability of stealing the chip by adopting the means of domain copy and the like can be reduced to a certain extent, and the safety and the normalization of the application of the electronic chip are improved.
As a possible implementation manner, the designated input pin in the above method is a wake-up pin, and the characteristic signal generator enters a working state when the electronic chip is woken up; the signal detector is an oscilloscope or a multimeter.
Corresponding to the electronic chip, the embodiment of the invention also provides electronic equipment, and the electronic equipment comprises the electronic chip in the embodiment. The electronic device may be a device with a touch function, such as a smart terminal or a vehicle-mounted device, or may be a non-touch device, such as a server, a computer, a detection device, or the like.
The implementation principle and the resulting technical effects of the method and the electronic device provided in the embodiments of the present application are the same as those of the electronic chip embodiments described above, and for the sake of brief description, reference may be made to corresponding contents in the electronic chip embodiments described above where no part of the method and the electronic device embodiments is mentioned.
Unless specifically stated otherwise, the relative steps, numerical expressions, and numerical values of the components and steps set forth in these embodiments do not limit the scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present application, and are used for illustrating the technical solutions of the present application, but not limiting the same, and the scope of the present application is not limited thereto, and although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: those skilled in the art can still make modifications or changes to the embodiments described in the foregoing embodiments, or make equivalent substitutions for some features, within the technical scope of the present disclosure; such modifications, changes or substitutions do not depart from the spirit and scope of the exemplary embodiments of the present application, and are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (9)

1. An electronic chip is characterized in that a characteristic signal generator is arranged in the electronic chip and connected with a specified input pin on the electronic chip;
the appointed input pin is used for receiving an external preset function signal and sending the preset function signal to a controller in the electronic chip so as to trigger the controller to execute an action corresponding to the preset function signal;
the characteristic signal generator is used for switching the specified input pin into an output pin in a working state and outputting a preset characteristic signal through the specified input pin;
an input buffer is arranged between the appointed input pin and the controller, and an output buffer is arranged between the appointed input pin and the characteristic signal generator; the input buffer is in a working state by default, and the output buffer is in a non-working state by default;
the characteristic signal generator is also used for switching the input buffer into a non-working state and switching the output buffer into a working state under a working state so as to switch the specified input pin into an output pin; the characteristic signal generator is also used for switching the input buffer to be in a working state and switching the output buffer to be in a non-working state when the characteristic signal output is finished.
2. The electronic chip of claim 1, wherein a first switch is disposed between the designated input pin and the controller, and a second switch is disposed between the designated input pin and the feature signal generator; the first switch is defaulted to be in a closed state, and the second switch is defaulted to be in an open state;
the characteristic signal generator is also used for disconnecting the first switch and closing the second switch in a working state so as to switch the specified input pin into an output pin; and when the output of the characteristic signal is finished, the first switch is closed, and the second switch is opened.
3. The electronic chip of claim 1, wherein the signature signal generator comprises: the device comprises an output control module, a Read Only Memory (ROM) and a timer, wherein the ROM and the timer are respectively connected with the output control module;
the ROM stores coded data corresponding to the characteristic signal in advance;
the timer is used for sending a baud rate to the output control module;
the output control module is used for switching the specified input pin into an output pin in a working state, reading the coded data and outputting a signal corresponding to the coded data to the specified input pin according to the baud rate.
4. The electronic chip of claim 3, wherein the encoded data is preset binary data, and the signal corresponding to the encoded data is a high level signal or a low level signal.
5. The electronic chip of claim 4, wherein the output control module is further configured to repeatedly output the signal corresponding to the encoded data until the number of repetitions reaches a threshold number of times to stop outputting.
6. The electronic chip of claim 1, wherein the designated input pin is a wake-up pin, and the feature signal generator enters an operating state when the electronic chip is woken up;
the wake-up pin is used for receiving an external wake-up signal and sending the wake-up signal to the controller in the electronic chip so as to trigger the controller to be switched from a dormant state to a working state.
7. A detection method of an electronic chip is characterized in that the electronic chip is the electronic chip of any one of claims 1 to 6, and a signal detector is connected to the specified input pin; the method comprises the following steps:
inputting a preset function signal to the appointed input pin so that the appointed input pin triggers a controller of the electronic chip to execute an action corresponding to the preset function signal;
when the controller executes the action corresponding to the preset function signal, detecting whether the designated input pin outputs the characteristic signal or not through the signal detector;
if yes, determining the electronic chip as the chip with the characteristic signal generator.
8. The method according to claim 7, wherein the designated input pin is a wake-up pin, and the feature signal generator enters an operating state when the electronic chip is woken up;
the signal detector is an oscilloscope or a universal meter.
9. An electronic device, characterized in that the electronic device comprises an electronic chip according to any one of claims 1-6.
CN202211560308.2A 2022-12-07 2022-12-07 Electronic chip, detection method of electronic chip and electronic equipment Active CN115577670B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105930237A (en) * 2016-04-13 2016-09-07 广州小微电子技术有限公司 Chip security detection method, chip structure, and chip module
CN111639736A (en) * 2020-06-01 2020-09-08 上海爱信诺航芯电子科技有限公司 Anti-counterfeiting method of RFID chip
CN114822635A (en) * 2022-06-28 2022-07-29 浙江力积存储科技有限公司 Chip position identification method and chip time sequence setting method based on same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8089285B2 (en) * 2009-03-03 2012-01-03 International Business Machines Corporation Implementing tamper resistant integrated circuit chips

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105930237A (en) * 2016-04-13 2016-09-07 广州小微电子技术有限公司 Chip security detection method, chip structure, and chip module
CN111639736A (en) * 2020-06-01 2020-09-08 上海爱信诺航芯电子科技有限公司 Anti-counterfeiting method of RFID chip
CN114822635A (en) * 2022-06-28 2022-07-29 浙江力积存储科技有限公司 Chip position identification method and chip time sequence setting method based on same

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