CN110971219A - Pressure sensor, switch circuit thereof, clock control method and clock control device - Google Patents
Pressure sensor, switch circuit thereof, clock control method and clock control device Download PDFInfo
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Abstract
The invention discloses a switch circuit of a pressure sensor, comprising: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when the starting signal detecting module detects a starting signal so as to control the pressure sensor to start clock pulse; and when the ending signal is detected by the ending signal detecting module, generating a clock closing signal to control the pressure sensor to close clock pulses. The invention also discloses a pressure sensor, a clock control method and a clock control device thereof. The invention saves the power consumption of the pressure sensor.
Description
Technical Field
The invention relates to the field of circuits, in particular to a pressure sensor, a switch circuit of the pressure sensor, a clock control method and a clock control device.
Background
A Pressure Transducer (Pressure Transducer) is a device or apparatus that can sense a Pressure signal and convert the Pressure signal into an electrical signal that can be output according to a certain rule, and a chip of the Pressure Transducer can perform data communication with an external chip through a bus connection. The logic circuit inside the chip needs to operate simultaneously with the power supply and the clock to start the data transmission. When the power supply of the existing pressure sensor is turned on, whether data transmission is required or not, clock pulse is always in a working state, a large amount of electric quantity is consumed, and the electric consumption of the pressure sensor is high.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide a pressure sensor, a switch circuit of the pressure sensor, a clock control method and a clock control device, and aims to solve the technical problem of high power consumption of the pressure sensor.
To achieve the above object, the present invention provides a switching circuit of a pressure sensor, including: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when the starting signal detecting module detects a starting signal so as to control the pressure sensor to start clock pulse; and when the ending signal is detected by the ending signal detecting module, generating a clock closing signal to control the pressure sensor to close clock pulses.
Optionally, the start signal detecting module includes a first flip-flop, a CP end of the first flip-flop is connected to a data line of a bus, a D end of the first flip-flop is connected to a clock line of the bus, a Q end of the first flip-flop is electrically connected to an input end of the clock switch signal generating module, and the first flip-flop is a falling edge D flip-flop.
Optionally, the start signal detecting module further includes a second flip-flop and a first not gate, a D-terminal of the second flip-flop is electrically connected to a Q-terminal of the first flip-flop, a Q-terminal of the second flip-flop is electrically connected to an input terminal of the first not gate, and an output terminal of the first not gate is electrically connected to a CLR-terminal of the first flip-flop.
Optionally, the end signal detecting module includes a third flip-flop, a CP end of the third flip-flop is connected to a data line of a bus, a D end of the third flip-flop is connected to a clock line of the bus, a Q end of the third flip-flop is electrically connected to an input end of the clock switch signal generating module, and the third flip-flop is a rising edge D flip-flop.
Optionally, the end signal detecting module further includes a fourth flip-flop and a second not gate, a D-terminal of the fourth flip-flop is electrically connected to a Q-terminal of the third flip-flop, a Q-terminal of the fourth flip-flop is electrically connected to an input terminal of the second not gate, and an output terminal of the second not gate is electrically connected to a CLR-terminal of the third flip-flop.
Optionally, the clock switching signal generating module includes a fifth flip-flop and a third not gate, a CP end of the fifth flip-flop is electrically connected to an output end of the start signal detecting module, an input end of the third not gate is electrically connected to an output end of the end signal detecting module, and an output end of the third not gate is electrically connected to a CLR end of the fifth flip-flop.
In addition, in order to achieve the above object, the present invention also provides a pressure sensor including the switching circuit of the pressure sensor as described above.
In addition, to achieve the above object, the present invention provides a clock control method for a pressure sensor, the clock control method for the pressure sensor being based on a switching circuit of the pressure sensor, the switching circuit of the pressure sensor including: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when receiving the starting signal detected by the starting signal detecting module; generating a clock closing signal when receiving the ending signal detected by the ending signal detecting module; the clock control method of the pressure sensor comprises the following steps: when a clock starting signal of a clock switch signal generating module is received, starting clock pulse; and when a clock closing signal of the clock switch signal generation module is received, closing the clock pulse.
In order to achieve the above object, the present invention provides a clock control device for a pressure sensor based on a switching circuit for the pressure sensor, the switching circuit for the pressure sensor including: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when receiving the starting signal detected by the starting signal detecting module; generating a clock closing signal when receiving the ending signal detected by the ending signal detecting module; the clock control device of the pressure sensor comprises: the clock starting module is used for starting clock pulses when receiving clock starting signals of the clock switching signal generating module; and the clock closing module is used for closing the clock pulse when receiving the clock closing signal of the clock switch signal generating module.
In order to achieve the above object, the present invention also provides a clock control device for a pressure sensor, including: the pressure sensor clock control method comprises a memory, a processor and a pressure sensor clock control program stored on the memory and capable of running on the processor, wherein the pressure sensor clock control program realizes the steps of the pressure sensor clock control method when being executed by the processor.
In order to achieve the above object, the present invention further provides a storage medium having a clock control program for a pressure sensor stored thereon, wherein the clock control program for a pressure sensor implements the steps of the clock control method for a pressure sensor as described above when executed by a processor.
In the pressure sensor, the switch circuit, the clock control method and the clock control device provided by the embodiment of the invention, the start signal detection module detects a start signal sent by an external chip through a bus, the end signal detection module detects an end signal sent by the external chip through the bus, the clock switch signal generation module generates a clock starting signal when the start signal detection module detects the start signal so as to control the pressure sensor to start a clock pulse, generates a clock closing signal when the end signal detection module detects the end signal so as to control the pressure sensor to close the clock pulse, enables the clock pulse to start to read and write data when the external chip sends the start signal through reasonable clock switch control, closes the clock pulse when the external chip sends the end signal, and avoids the pressure sensor from reading and writing data with the external chip when the pressure sensor needs to read and write data with the external chip, the electric quantity consumed by the clock pulse still in the starting state saves the power consumption of the pressure sensor.
Drawings
FIG. 1 is a block diagram of an embodiment of a switching circuit of the pressure sensor of the present invention;
FIG. 2 is a schematic circuit diagram of a switching power supply of an embodiment of the switching circuit of the pressure sensor of the present invention;
FIG. 3 is a schematic diagram of the waveform of the I2C signal of the embodiment of the switch circuit of the pressure sensor of the present invention;
FIG. 4 is a schematic structural diagram of a clock control apparatus of a pressure sensor in a hardware operating environment according to an embodiment of the present invention;
fig. 5 is a block diagram of a clock control apparatus of a pressure sensor according to an embodiment of the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) |
| 100 | Initial signal detection module |
| 110 | End signal detection module |
| 120 | Clock switch signal generating module |
| D1～D5 | First to fifth flip-flops |
| INV1～INV3 | First to third NOT gates |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should be considered to be absent and not within the protection scope of the present invention.
Referring to fig. 1, an embodiment of a switching circuit of a pressure sensor includes: a start signal detection module 100, an end signal detection module 110 and a clock switch signal generation module 120.
The start signal detecting module 100 is configured to detect a start signal sent by an external chip through a bus. The external chip is electrically connected with the pressure sensor through a bus so as to perform data interaction with the pressure sensor through the bus. The external chip can be arranged in the terminal and can also be arranged in external equipment with any structure. If the external chip is disposed in the terminal, it may be a Central Processing Unit (CPU) of the terminal. The bus of the present embodiment is a two-wire serial bus (I2C), which includes a data line (SerialData, SDA) and a clock line (SCL). When the external chip needs to read and write data with the chip of the pressure sensor, an initial signal is generated to start data transmission on the bus. In this embodiment, the start signal detecting module 100 is configured to detect a start signal for reading and writing data between the external chip and the pressure sensor. The start signal detecting module 100 generates a start detection signal when detecting the start signal. The initial detection signal may be a high level signal or a low level signal.
The end signal detecting module 110 is configured to detect an end signal sent by an external chip through a bus. When the external chip finishes data reading and writing with the chip of the pressure sensor, an end signal is generated to represent the end state of current data reading and writing. In this embodiment, the ending signal detecting module 110 detects and obtains the ending signal. The end signal detection module 110 generates an end detection signal when detecting the end signal. The ending detection signal may be a high level signal or a low level signal. It should be noted that the levels of the start detection signal and the end detection signal are opposite.
A clock switch signal generating module 120, configured to generate a clock start signal when the start signal detecting module detects a start signal, so as to control the pressure sensor to start a clock pulse; and when the ending signal is detected by the ending signal detecting module, generating a clock closing signal to control the pressure sensor to close clock pulses.
In this embodiment, the output end of the start signal detecting module 100 and the output end of the end signal detecting module 110 are electrically connected to the input end of the clock switch signal generating module 120. When the start signal detecting module 100 detects the start signal, it generates a start detection signal, and the clock switch signal generating module 120 acquires the start detection signal and generates a clock start signal according to the start detection signal. The clock starting signal controls the pressure sensor to start clock pulse so as to read and write data with an external chip. The clock start signal may be a high level signal or a low level signal, and the level of the clock start signal may be the same as or opposite to the level of the start detection signal. When the ending signal detecting module 110 detects the ending signal, it generates an ending detecting signal, and the clock switch signal generating module 120 obtains the ending detecting signal and generates a clock ending signal according to the ending detecting signal. The clock end signal controls the pressure sensor to close the clock pulse so as to save the electric quantity of the pressure sensor. The clock end signal may be a high level signal or a low level signal, and the level of the clock receiving signal may be the same as or opposite to the level of the end detection signal. Note that the clock start signal and the clock end signal have opposite levels.
In this embodiment, the start signal detecting module 100 detects a start signal sent by an external chip through a bus, the end signal detecting module 110 detects an end signal sent by the external chip through the bus, the clock switch signal generating module 120 generates a clock start signal to control the pressure sensor to start a clock pulse when the start signal detecting module detects the start signal, generates a clock stop signal to control the pressure sensor to stop the clock pulse when the end signal detecting module detects the end signal, starts the clock pulse to read and write data when the external chip sends the start signal through reasonable clock switch control, and closes the clock pulse when the external chip sends the end signal, so as to avoid power consumption caused by the clock pulse still being in an on state when the pressure sensor needs to read and write data with the external chip, the power consumption of the pressure sensor is saved.
Referring to fig. 2, in one embodiment, the start signal detecting module 100 includes a first flip-flop D1, the CP terminal of the first flip-flop D1 is connected to the data line of the bus, the D terminal of the first flip-flop D1 is connected to the clock line of the bus, the Q terminal of the first flip-flop D1 is electrically connected to the input terminal of the clock switch signal generating module 120, and the first flip-flop D1 is a falling edge D flip-flop.
For a more intuitive explanation, fig. 3 shows a signal waveform diagram of I2C. Wherein, S is a start signal, B is a data transmission waveform, and P is an end signal. In the start signal S, the SDA signal is a falling edge, and the SCL signal is high. In the received signal P, the SDA signal is at a rising edge and the SCL signal is at a high level. The start signal detecting module 100 of this embodiment can detect the start signal S, and the end signal detecting module 110 can detect the end signal P.
In this embodiment, the D terminal of the first flip-flop D1 is connected to the SCL line of the bus, and the first flip-flop D1 is a falling edge D flip-flop, i.e., when the CP terminal of the first flip-flop D1 receives a falling edge pulse signal, the first flip-flop D1 is triggered to generate a high level and output the high level through the Q terminal. It is understood that the first flip-flop D1 of the present embodiment can directly detect the start signal transmitted from the I2C, that is, when the Q terminal of the first flip-flop D1 generates a high level, it indicates that the first flip-flop D1 detects the start signal on the I2C, and the high level signal generated by the Q terminal is the start detection signal. It should be noted that the start signal is sent by an external chip.
In this embodiment, the start signal of I2C can be easily and conveniently detected by using the characteristics of the falling edge D flip-flop. It should be understood that in other embodiments, other types of flip-flops, such as JK flip-flops or RS flip-flops, may be used to form the start signal detecting module 100 of the present invention.
In one embodiment, the start signal detecting module 100 further includes a second flip-flop D2 and a first not gate INV1, a D terminal of the second flip-flop D2 is electrically connected to a Q terminal of the first flip-flop D1, a Q terminal of the second flip-flop D2 is electrically connected to an input terminal of the first not gate INV1, and an output terminal of the first not gate INV1 is electrically connected to a CLR terminal of the first flip-flop D1.
In this embodiment, the first flip-flop D1 and the second flip-flop D2 are cascaded to form a closed loop structure with the first inverter INV 1. The cascade of the first flip-flop D1 and the second flip-flop D2 forms a 2-bit shift register for storing the level signal at the Q terminal of the first flip-flop D1. When the start signal arrives, the first flip-flop D1 will output a high level signal, and when the high level signal is transmitted to the D terminal of the second flip-flop D2, the second flip-flop D2 will directly output a high level signal at the Q terminal, and the high level signal is transmitted to the CLR terminal of the first flip-flop D1 after being inverted and delayed by the first not gate INV1, so that the Q terminal of the first flip-flop D1 outputs a low level, and the first flip-flop D1 outputs a "low level-high level-low level" pulse signal, which is the start detection signal. Wherein the duration of the high level is a transmission delay time during which the high level signal output from the first flip-flop D1 is transmitted to the CLR terminal of the first flip-flop D1 via the second flip-flop D2 and the first not gate INV 1. It should be noted that, in this embodiment, when the SCL signal is at a low level, the start signal detecting module 100 latches the start detection signal, so as to avoid the misjudgment caused by the change of the start detection signal due to the state change of the SDA signal during data reading and writing. In this embodiment, data is transmitted when the SCL signal in I2C is at low level. When the SCL signal is high, the start signal is detected.
In one embodiment, the end signal detecting module 110 includes a third flip-flop D3, the CP of the third flip-flop D3 is connected to the data line of the bus, the D of the third flip-flop D3 is connected to the clock line of the bus, the Q of the third flip-flop D3 is electrically connected to the input of the clock switch signal generating module 120, and the third flip-flop D3 is a rising edge D flip-flop.
In this embodiment, the D terminal of the third flip-flop D3 is connected to the SCL line of the bus, and the third flip-flop D3 is a rising edge D flip-flop, i.e., when the CP terminal of the third flip-flop D3 receives a rising edge pulse signal, the third flip-flop D3 generates a high level for being triggered and outputs the high level through the Q terminal thereof. It is understood that the third flip-flop D3 of the present embodiment can directly detect the end signal transmitted from the I2C, that is, when the Q terminal of the third flip-flop D3 generates a high level, it indicates that the third flip-flop D3 detects the end signal on the I2C, and the high level signal generated by the Q terminal is the end detection signal. The present embodiment utilizes the characteristic of the rising edge D flip-flop to easily and conveniently detect the end signal of I2C. It should be understood that in other embodiments, other types of flip-flops, such as JK flip-flops or RS flip-flops, may be used to form the ending signal detecting module 110 of the present invention.
In one embodiment, the end signal detecting module 120 further includes a fourth flip-flop D4 and a second not gate INV2, a D terminal of the fourth flip-flop D4 is electrically connected to a Q terminal of the second flip-flop D2, a Q terminal of the fourth flip-flop D4 is electrically connected to an input terminal of the second not gate INV2, and an output terminal of the second not gate INV2 is electrically connected to a CLR terminal of the second flip-flop D2.
In this embodiment, the third flip-flop D3 and the fourth flip-flop D4 are cascaded and then form a closed loop structure with the second inverter INV 2. The cascade of the third flip-flop D3 and the fourth flip-flop D4 forms a 2-bit shift register for storing the level signal at the Q terminal of the third flip-flop D3. When the end signal arrives, the third flip-flop D3 will output a high level signal, and when the high level signal is transmitted to the D terminal of the four flip-flop D4, the four flip-flop D4 will directly output a high level signal at the Q terminal, and the high level signal is transmitted to the CLR terminal of the third flip-flop D3 after being inverted and delayed by the second not gate INV2, so that the Q terminal of the third flip-flop D3 outputs a low level, and the third flip-flop D3 outputs a "low level-high level-low level" pulse signal, which is the end detection signal. Wherein the duration of the high level is a transmission delay time during which the high level signal output from the third flip-flop D3 is transmitted to the CLR terminal of the third flip-flop D3 via the four flip-flop D4 and the second not gate INV 2. It should be noted that, in this embodiment, when the SCL signal is at a low level, the end signal detecting module 100 latches the end detection signal, so as to avoid the erroneous determination caused by the change of the end detection signal due to the state change of the SDA signal during data reading and writing.
In one embodiment, the clock switch signal generating module 120 includes a fifth flip-flop D5 and a third not gate INV3, a CP terminal of the fifth flip-flop D5 is electrically connected to the output terminal of the start signal detecting module 100, an input terminal of the third not gate INV3 is electrically connected to the output terminal of the end signal detecting module 110, and an output terminal of the third not gate INV3 is electrically connected to the CLR terminal of the fifth flip-flop D5.
It should be noted that the CP terminal of the fifth flip-flop D5 is electrically connected to the output terminal of the start signal detecting module 100 as an input terminal, and the CLR terminal of the fifth flip-flop D5 is electrically connected to the output terminal of the end signal detecting module 110 as an output terminal. When the start signal detecting module 100 detects the start signal, it generates a start detection signal and transmits the start detection signal to the CP end of the fifth flip-flop D5 through the output end, the D end of the fifth flip-flop D5 of the embodiment is set high, and when the CP end of the fifth flip-flop D5 receives the start detection signal, the Q end outputs a high level signal, i.e., a clock start signal. The end detection signal is inverted by the third not gate INV3 and transmitted to the CLR terminal of the fifth flip-flop D5, and when the CLR terminal of the fifth flip-flop D5 receives the end detection signal, the Q terminal outputs a low level signal, i.e., a clock end signal. It should be understood that the fifth flip-flop D5 is a falling edge D flip-flop, and the fifth flip-flop D5 is triggered when the CP receives the start detection signal of "low-high-low".
In this embodiment, the characteristics that the CP end and the CLR end of the D flip-flop output corresponding signals after receiving the signals are utilized to discriminate the start detection signal transmitted by the start signal detection module 100 and the end detection signal transmitted by the end signal detection module 110, so as to further generate a clock start signal or a clock stop signal, so as to control the pressure sensor to start or stop the clock pulse, so as to implement the start or stop of the clock pulse according to the detected start signal or end signal, which is very simple and effective.
In one embodiment, the pressure sensor comprises a switching circuit embodiment of a pressure sensor as described above.
An embodiment of a method for clocking a pressure sensor is based on a switching circuit of the pressure sensor, the switching circuit of the pressure sensor comprising: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when receiving the starting signal detected by the starting signal detecting module; and generating a clock closing signal when receiving the ending signal detected by the ending signal detecting module.
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Fig. 4 is a schematic structural diagram of a clock control device of a pressure sensor in a hardware operating environment according to an embodiment of a clock control method of a pressure sensor of the present invention.
The clock control device of the pressure sensor in the embodiment of the invention can be a movable computer device with a display function.
As shown in fig. 4, the clock control apparatus of the pressure sensor may include: a processor 4001, for example a CPU, a network interface 4004, a user interface 4003, a memory 4005, and a communication bus 4002. The communication bus 4002 is used for realizing connection communication among the components, and the communication bus 4002 may be an I2C bus. The user interface 4003 may include a Display (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 4003 may also include a standard wired interface, a wireless interface. Network interface 4004 may optionally include a standard wired interface, a wireless interface (e.g., a WI-FI interface). The memory 4005 may be a high-speed RAM memory or a non-volatile memory (non-volatile memory). The memory 4005 may alternatively be a storage device separate from the processor 4001.
Those skilled in the art will appreciate that the configuration shown in fig. 4 does not constitute a limitation of the clocking arrangement for the pressure sensor, which may include more or fewer components than shown, or some components in combination, or a different arrangement of components.
The memory 4005, which is a kind of computer storage medium, may include therein an operating system, a network communication module, a user interface module, and a clock control program of the pressure sensor. In the terminal shown in fig. 4, the network interface 4004 is mainly used for connecting to a background server and performing data communication with the background server; the user interface 4003 is mainly used for connecting an external chip and performing data communication with the external chip; and the processor 4001 may be configured to call up a clock control program of the pressure sensor stored in the memory 4005 and perform the following operations: when a clock starting signal of a clock switch signal generating module is received, starting clock pulse; and when a clock closing signal of the clock switch signal generation module is received, closing the clock pulse.
In this embodiment, the start signal detecting module detects a start signal sent by an external chip through a bus, the end signal detecting module detects an end signal sent by the external chip through the bus, the clock switch signal generating module generates a clock start signal when the start signal detecting module detects the start signal, and generates a clock off signal when the end signal detecting module detects the end signal, in this embodiment, a clock pulse is started when the clock start signal of the clock switch signal generating module is received, the clock pulse is closed when the clock off signal of the clock switch signal generating module is received, the clock pulse is started when the external chip sends the start signal to read and write data, the clock pulse is closed when the external chip sends the end signal, and thus avoiding the pressure sensor from reading and writing data with the external chip when the pressure sensor needs to read and write data with the external chip, the electric quantity consumed by the clock pulse still in the starting state saves the power consumption of the pressure sensor.
Referring to fig. 5, an embodiment of a clock control apparatus for a pressure sensor based on a switching circuit for the pressure sensor, the switching circuit for the pressure sensor comprising: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when receiving the starting signal detected by the starting signal detecting module; and generating a clock closing signal when receiving the ending signal detected by the ending signal detecting module.
The clock control device of the pressure sensor comprises: a clock starting module 510, configured to start a clock pulse when receiving a clock starting signal of the clock switching signal generating module; the clock turning-off module 520 turns off the clock pulse when receiving the clock turning-off signal of the clock switching signal generating module.
In this embodiment, the start signal detecting module detects a start signal sent by an external chip through a bus, the end signal detecting module detects an end signal sent by the external chip through the bus, the clock switch signal generating module generates a clock start signal when the start signal detecting module detects the start signal, and generates a clock off signal when the end signal detecting module detects the end signal, in this embodiment, a clock pulse is started when the clock start signal of the clock switch signal generating module is received, the clock pulse is closed when the clock off signal of the clock switch signal generating module is received, the clock pulse is started when the external chip sends the start signal to read and write data, the clock pulse is closed when the external chip sends the end signal, and thus avoiding the pressure sensor from reading and writing data with the external chip when the pressure sensor needs to read and write data with the external chip, the electric quantity consumed by the clock pulse still in the starting state saves the power consumption of the pressure sensor.
The embodiment of the present invention further provides a clock control device of a pressure sensor, where the clock control device of the pressure sensor includes: a memory, a processor and a clock control program for a pressure sensor stored on the memory and operable on the processor, the clock control program for a pressure sensor when executed by the processor implementing the steps of the embodiments of a clock control method for a pressure sensor as described above.
The embodiment of the present invention further provides a storage medium, where a clock control program of the pressure sensor is stored on the storage medium, and the clock control program of the pressure sensor, when executed by a processor, implements the steps of the embodiment of the clock control method of the pressure sensor.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for causing a clock control device of a pressure sensor to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (11)
1. A switching circuit for a pressure sensor, the switching circuit comprising:
the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus;
the end signal detection module is used for detecting an end signal sent by an external chip through a bus;
the clock switch signal generating module is used for generating a clock starting signal when the starting signal detecting module detects a starting signal so as to control the pressure sensor to start clock pulse; and when the ending signal is detected by the ending signal detecting module, generating a clock closing signal to control the pressure sensor to close clock pulses.
2. The switching circuit of claim 1, wherein the start signal detecting module comprises a first flip-flop, a CP of the first flip-flop is connected to a data line of a bus, a D of the first flip-flop is connected to a clock line of the bus, a Q of the first flip-flop is electrically connected to an input of the clock switching signal generating module, and the first flip-flop is a falling edge D flip-flop.
3. The switching circuit of claim 2, wherein the start signal detecting module further comprises a second flip-flop and a first not gate, a D terminal of the second flip-flop is electrically connected to a Q terminal of the first flip-flop, the Q terminal of the second flip-flop is electrically connected to an input terminal of the first not gate, and an output terminal of the first not gate is electrically connected to a CLR terminal of the first flip-flop.
4. The switching circuit of claim 1, wherein the end signal detection module comprises a third flip-flop, a CP of the third flip-flop is connected to a data line of a bus, a D of the third flip-flop is connected to a clock line of the bus, a Q of the third flip-flop is electrically connected to the input of the clock switch signal generation module, and the third flip-flop is a rising edge D flip-flop.
5. The switching circuit of claim 4, wherein the end signal detection module further comprises a fourth flip-flop and a second NOT gate, a D terminal of the fourth flip-flop is electrically connected to a Q terminal of the third flip-flop, a Q terminal of the fourth flip-flop is electrically connected to an input terminal of the second NOT gate, and an output terminal of the second NOT gate is electrically connected to a CLR terminal of the third flip-flop.
6. The switching circuit of a pressure sensor according to claim 1, wherein the clock switching signal generating module comprises a fifth flip-flop and a third not gate, a CP terminal of the fifth flip-flop is electrically connected to the output terminal of the start signal detecting module, an input terminal of the third not gate is electrically connected to the output terminal of the end signal detecting module, and an output terminal of the third not gate is electrically connected to the CLR terminal of the fifth flip-flop.
7. A pressure sensor, characterized in that it comprises a switching circuit of a pressure sensor according to any one of claims 1 to 6.
8. A method for clocking a pressure sensor, the method being based on a switching circuit of the pressure sensor, the switching circuit of the pressure sensor comprising: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when receiving the starting signal detected by the starting signal detecting module; generating a clock closing signal when receiving the ending signal detected by the ending signal detecting module;
the clock control method of the pressure sensor comprises the following steps:
when a clock starting signal of a clock switch signal generating module is received, starting clock pulse;
and when a clock closing signal of the clock switch signal generation module is received, closing the clock pulse.
9. A pressure sensor clock control apparatus, the pressure sensor clock control apparatus based on a pressure sensor switching circuit, the pressure sensor switching circuit comprising: the starting signal detection module is used for detecting a starting signal sent by an external chip through a bus; the end signal detection module is used for detecting an end signal sent by an external chip through a bus; the clock switch signal generating module is used for generating a clock starting signal when receiving the starting signal detected by the starting signal detecting module; generating a clock closing signal when receiving the ending signal detected by the ending signal detecting module;
the clock control device of the pressure sensor comprises:
the clock starting module is used for starting clock pulses when receiving clock starting signals of the clock switching signal generating module;
and the clock closing module is used for closing the clock pulse when receiving the clock closing signal of the clock switch signal generating module.
10. A clock control apparatus for a pressure sensor, the clock control apparatus comprising: memory, a processor and a clock control program for a pressure sensor stored on the memory and executable on the processor, the clock control program for a pressure sensor when executed by the processor implementing the steps of the clock control method for a pressure sensor according to claim 8.
11. A storage medium having stored thereon a clock control program for a pressure sensor, the clock control program for a pressure sensor when executed by a processor implementing the steps of the clock control method for a pressure sensor according to claim 8.
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| CN201911425543.7A CN110971219A (en) | 2019-12-31 | 2019-12-31 | Pressure sensor, switch circuit thereof, clock control method and clock control device |
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| CN201911425543.7A CN110971219A (en) | 2019-12-31 | 2019-12-31 | Pressure sensor, switch circuit thereof, clock control method and clock control device |
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Address after: Room 103, 396 Songling Road, Laoshan District, Qingdao City, Shandong Province 266100 Applicant after: Geer Microelectronics Co.,Ltd. Address before: Room 103, 396 Songling Road, Laoshan District, Qingdao City, Shandong Province 266100 Applicant before: Goer Microelectronics Co.,Ltd. |