CN115565890A - Folding type multi-chip flexible integrated packaging method and flexible integrated packaging chip - Google Patents

Folding type multi-chip flexible integrated packaging method and flexible integrated packaging chip Download PDF

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CN115565890A
CN115565890A CN202211560253.5A CN202211560253A CN115565890A CN 115565890 A CN115565890 A CN 115565890A CN 202211560253 A CN202211560253 A CN 202211560253A CN 115565890 A CN115565890 A CN 115565890A
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chip
flexible
flexible polymer
groove
crease
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CN115565890B (en
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申强
张学优
邓力豪
毕腾飞
常洪龙
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Northwestern Polytechnical University
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Northwestern Polytechnical University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention relates to a folding multi-chip flexible integrated packaging method and a flexible integrated packaging chip, relating to the field of chip packaging, wherein the method comprises the steps of spin-coating a first flexible polymer on a substrate to form a flexible polymer base layer, and arranging a chip mounting groove and a reinforced mark folding groove; installing a chip to be packaged to the chip installation groove; mounting a reinforcing crease material to the reinforcing crease groove to form a reinforcing crease; covering the chip to be packaged and the reinforcing crease with a second flexible polymer to obtain a flexible polymer intermediate layer; preparing a lead cavity and a columnar groove on the flexible polymer intermediate layer; performing spin coating on the flexible polymer intermediate layer after the electrical interconnection is completed by using a third flexible polymer to obtain a flexible packaging structure; and splitting the flexible packaging structure and the substrate, and folding the flexible packaging structure according to the reinforced crease mark to obtain the flexible integrated packaging chip. The invention can realize flexible integration of multiple chips, has folding shape retention, improves the utilization rate of packaging space and prolongs the service life.

Description

Folding type multi-chip flexible integrated packaging method and flexible integrated packaging chip
Technical Field
The invention relates to the field of chip packaging, in particular to a folding type multi-chip flexible integrated packaging method and a flexible integrated packaging chip.
Background
With the development of semiconductor technology and flexible electronic technology, flexible packaging of chips becomes a new method for improving the integration level of semiconductor packaging, and bending within a certain range is one of the most basic advantages of flexible packaging compared with rigid packaging. In the existing flexible chip packaging method, the adopted flexible substrate does not have a memory function, and has a tendency of recovering the original shape after being bent, and the mutual action of the adopted external force shape constraint and the tendency of recovering the original shape of the flexible chip can cause the installation internal stress, so that the packaged device has the problems of internal lead interconnection failure risk or chip internal stress deformation cracking and the like, and the service life of the device is influenced.
Although the existing packaging technology can be simply bent after packaging, the deformation cannot be reserved; simultaneously with single-chip direct bonding on the different basement of material in manufacturing process, heterogeneous material thermal expansion degree difference can produce the internal stress in the course of working, and the chip has the crackle risk under the internal stress effect.
There are packaging methods that complete the packaging of a single chip. The base layer and the top sealing layer are made of PI materials, but BCB materials are used as middle layers for wrapping the chip, so that the upper layer of the metal wire is BCB and the bottom layer of the metal wire is PI. In the same processing process, the internal stress generated by different thermal expansion degrees among different packaging layers can cause the metal lead and the joint of the metal lead and the chip pin to have fracture risks, so that circuit connection failure and packaging failure are caused.
In the existing packaging method, a bending region is reserved between electronic elements to realize the folding function, but the deformation after folding cannot be controlled, and the service life of the packaged device is still influenced by the problem of internal stress; meanwhile, grooves are formed by cutting with laser or a mechanical cutter, no relevant alignment design exists, the problem that welding spots and a conducting circuit layer cannot be completely aligned easily occurs, and the electrical connection reliability is low.
Based on the analysis, the existing flexible integrated package is of a planar structure, and functions are achieved by attaching a target surface, so that on one hand, the risk of device failure caused by the problems of heterogeneous material internal stress, thermal expansion internal stress and bending internal stress in the packaging process can exist, and the service life is reduced; on the other hand, the chips and the electronic elements are tiled and packaged, so that the space utilization rate of the packaging structure is low; in addition, alignment problems are easily caused in the direct mounting of the chip by means of laser, mechanical cutter cutting and the like, resulting in unreliable circuit connection at the pin.
Disclosure of Invention
The invention aims to provide a folding multi-chip flexible integrated packaging method and a flexible integrated packaged chip, so as to realize multi-chip flexible integration, enable the flexible package to have certain folding shape retention, improve the packaging space utilization rate and avoid the reduction of the service life of the structure after packaging due to the influence of internal stress after folding.
In order to achieve the purpose, the invention provides the following scheme:
a folding multi-chip flexible integrated packaging method comprises the following steps:
spin coating a first flexible polymer on a substrate to form a flexible polymer base layer;
arranging a chip mounting groove and a reinforcing crease groove on the flexible polymer substrate layer;
installing a chip to be packaged to the chip installation groove;
mounting a reinforcing fold material to the reinforcing fold groove to form a reinforcing fold;
covering the chip to be packaged and the reinforcing crease with a second flexible polymer to obtain a flexible polymer intermediate layer;
preparing a lead cavity and a columnar groove on the flexible polymer intermediate layer; forming an electrical interconnection medium between the wire cavity and the cylindrical groove; the electrical appliance interconnection medium is used for completing electrical interconnection among the chips to be packaged;
performing spin coating on the flexible polymer intermediate layer after the electrical interconnection is completed by using a third flexible polymer to obtain a flexible packaging structure;
and splitting the flexible packaging structure and the substrate base plate, and folding the flexible packaging structure according to the reinforced crease mark to obtain the flexible integrated packaging chip.
Optionally, before the spin coating a first flexible polymer on a substrate to form a flexible polymer base layer, the method further includes:
and arranging a metal alignment mark on the substrate base plate.
Optionally, the materials of the first flexible polymer, the second flexible polymer and the third flexible polymer are all the same.
Optionally, the stiffening crease material is metal.
Optionally, the preparing of the wire cavity and the columnar groove on the flexible polymer intermediate layer specifically includes:
and forming a lead cavity and a columnar groove on the flexible polymer intermediate layer by using a physical penetration method, a laser etching method or a photoetching method.
Optionally, the forming of the electrical interconnection medium in the wire cavity and the columnar groove specifically includes:
and forming an electrical interconnection medium in the wire cavity and the columnar groove by using metal sputtering, chemical deposition or direct mounting method.
Optionally, the forming method of the reinforcing crease comprises metal sputtering, chemical deposition and direct mounting.
Optionally, the material of the electrical interconnection medium is metal.
The invention also provides a flexible integrated packaging chip, which is packaged by adopting any one of the folding multi-chip flexible integrated packaging methods, and the flexible integrated packaging chip comprises: the chip packaging structure comprises a first flexible polymer, a chip mounting groove, a reinforcing crease groove, a chip to be packaged, a reinforcing crease material, a lead cavity, a columnar groove, an electrical interconnection medium, a second flexible polymer and a third flexible polymer;
the chip to be packaged is arranged in the chip mounting groove; the reinforced crease material is arranged in the reinforced crease groove; the chip mounting groove and the reinforcing crease groove are both arranged on the first flexible polymer; the second flexible polymer is coated on the first flexible polymer in a spinning mode, and the second flexible polymer is used for covering the chip to be packaged and reinforcing creases; the lead cavity is communicated with the columnar groove through the electronic interconnection medium; the lead lumen extends through the second flexible polymer; the electrical interconnection medium is used for completing electrical interconnection among a plurality of chips to be packaged; the third flexible polymer is spin coated on the second flexible polymer, the third flexible polymer for covering the electrical interconnection medium.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the method comprises the steps of spin-coating a first flexible polymer on a substrate to form a flexible polymer base layer; arranging a chip mounting groove and a reinforcing crease groove on the flexible polymer substrate layer; installing a chip to be packaged to the chip installation groove; mounting a reinforcing fold material to the reinforcing fold groove to form a reinforcing fold; covering the chip to be packaged and the reinforcing crease with a second flexible polymer to obtain a flexible polymer intermediate layer; preparing a lead cavity and a columnar groove on the flexible polymer intermediate layer; the electrical interconnection medium is used for completing electrical interconnection among a plurality of chips to be packaged; spin-coating the flexible polymer intermediate layer which is electrically interconnected by using a third flexible polymer to obtain a flexible packaging structure; and splitting the flexible packaging structure and the substrate base plate, and folding the flexible packaging structure according to the reinforced crease mark to obtain the flexible integrated packaging chip. The three-dimensional layout characteristic of the multi-chip flexible packaging structure is given by the design of the reinforced crease, so that the problems that the traditional flexible packaging chip can only be slightly bent as a whole, has internal stress and has low space utilization rate are solved; the multi-chip flexible packaging is realized by the processes of coating flexible polymers by double-sided spin coating and the like, so that not only are the internal chips protected, but also the whole packaging has certain flexibility.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
FIG. 1 is a schematic view of a flexible polymeric substrate layer provided by the present invention spin-coated with a first flexible polymer;
FIG. 2 is a schematic view of a flexible polymer substrate layer provided with a chip mounting groove and a reinforced mark groove according to the present invention;
FIG. 3 is a schematic view of a second flexible polymer coated flexible polymer interlayer provided by the present invention;
FIG. 4 is a schematic diagram of a flexible polymer interlayer after etching a wire cavity and a columnar groove according to the present invention;
FIG. 5 is a schematic view of a flexible polymer interlayer provided by the present invention to complete an electrical interconnect;
FIG. 6 is a schematic diagram of a flexible package structure obtained by spin coating a third flexible polymer provided by the present invention;
fig. 7 is a flowchart of a method for packaging a foldable multi-chip flexible package according to the present invention.
Description of the symbols:
1-a first flexible polymer, 2-a substrate base plate, 3-a chip mounting groove, 4-a reinforcing crease groove, 5-a chip to be packaged, 6-a reinforcing crease, 7-a second flexible polymer, 8-a lead cavity, 9-an electrical interconnection medium and 10-a third flexible polymer.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
The invention aims to provide a folding multi-chip flexible integrated packaging method and a flexible integrated packaged chip, so as to realize multi-chip flexible integration, enable the flexible package to have certain folding shape retention, improve the packaging space utilization rate and avoid the reduction of the service life of the structure after packaging due to the influence of internal stress after folding.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
As shown in fig. 7, the method for packaging a foldable multi-chip flexible package according to the present invention includes:
step 101: a first flexible polymer is spin coated on a substrate base to form a flexible polymer base layer.
Step 102: and arranging a chip mounting groove and a reinforced mark folding groove on the flexible polymer substrate layer. The forming method of the reinforcing crease comprises metal sputtering and direct installation.
Step 103: and installing a chip to be packaged to the chip installation groove.
Step 104: mounting a reinforcing crease material to the reinforcing crease channels forms reinforcing creases. The reinforced crease material is metal. The forming method of the reinforcing crease comprises metal sputtering, chemical deposition and direct installation.
Step 105: and covering the chip to be packaged and the reinforcing crease with a second flexible polymer to obtain a flexible polymer intermediate layer.
Step 106: preparing a lead cavity and a columnar groove on the flexible polymer intermediate layer; and forming an electrical interconnection medium between the wire cavity and the columnar groove, wherein the electrical interconnection medium is used for completing electrical interconnection among a plurality of chips to be packaged. The electrical interconnection medium in the present invention is specifically an electrical interconnection lead. The material of the electrical interconnection medium is metal.
Step 106, specifically comprising: and etching a lead cavity and a columnar groove on the flexible polymer intermediate layer by using a physical penetration method, a laser etching method or a photoetching method.
Step 107: and carrying out spin coating on the flexible polymer intermediate layer after the electrical interconnection is completed by using a third flexible polymer to obtain the flexible packaging structure. The first flexible polymer, the second flexible polymer and the third flexible polymer are all the same material.
Step 108: and splitting the flexible packaging structure and the substrate base plate, and folding the flexible packaging structure according to the reinforced crease mark to obtain the flexible integrated packaging chip.
In practical applications, before the spin coating the first flexible polymer on the substrate to form the flexible polymer base layer, the method further includes: and arranging a metal alignment mark on the substrate base plate.
In practical application, the forming of the electrical interconnection medium in the wire cavity and the columnar groove specifically includes: and forming an electrical interconnection medium in the wire cavity and the columnar groove by using metal sputtering, chemical deposition or direct mounting method. The electrical interconnection medium in the present invention is an electrical interconnection lead.
In order to realize multi-chip flexible integration, ensure that flexible packaging has certain folding shape retention, improve the packaging space utilization rate and avoid the reduction of the service life of the structure subjected to internal stress when the packaging is folded, the invention provides a specific working flow of the folding multi-chip flexible integration packaging method in practical application.
The first step is as follows: a package substrate is prepared. As shown in fig. 1, after forming a metal alignment mark on a substrate base plate 2, a first flexible polymer 1 is mounted on the base plate, and the first flexible polymer 1 is spin-coated to form a flexible polymer base layer. Substrate base plate 2 materials include, but are not limited to, silicon, sapphire, or glass.
And secondly, preparing for installation. And forming a chip mounting groove 3 and a reinforcing crease groove 4 on the flexible polymer substrate layer. As shown in fig. 2, a predetermined chip mounting groove 3 and a reinforcing crease groove 4 are formed on a first flexible polymer 1 through a photolithography process.
The third step: the chip and the reinforcing fold 6 are mounted. As shown in fig. 3, a chip 5 to be packaged is mounted at the chip mounting groove 3 by a chip mounter, a metal copper sheet is mounted in the reinforcing crease groove 4 to form a reinforcing crease 6, and a second flexible polymer 7 is spin-coated to completely cover the chip and the reinforcing crease 6, so as to form a flexible polymer intermediate layer.
The fourth step: electrical interconnect preparation. As shown in fig. 4, by positioning the metal alignment mark on the substrate base plate 2 formed in the first step, a photolithography method is used to form a conductive wire cavity 8 communicating with the outside through a chip pin and a cylindrical groove on the surface of the second flexible polymer 7 in the flexible polymer intermediate layer.
The fifth step: the chips are electrically interconnected. As shown in fig. 5, a metal sputtering process is performed in the wire cavity 8 formed in the fourth step and the columnar groove on the surface of the second flexible polymer 7 to form an electrical interconnection lead, thereby completing electrical interconnection; completing the electrical interconnect, comprising: and forming a hole-shaped micro-cavity and a columnar groove structure on the surface of the flexible polymer intermediate layer by a physical penetration, laser or photoetching method, forming a metal wire in the micro-cavity and the groove by evaporating or sputtering a conductive metal layer, and connecting the metal wire with a chip pin.
And a sixth step: and (6) capping. As shown in fig. 6, a flexible polymer capping layer is formed by spin coating a third flexible polymer 10, completely coating the third flexible polymer 10 over the electrical interconnect leads formed in said fifth step.
The seventh step: and (4) releasing. After the steps are completed, the formed folding multi-chip flexible integrated package is taken down from the substrate 2 in a physical stripping mode and is folded along the reinforced crease 6 according to application requirements, and a folding flexible integrated package chip is obtained.
The first flexible polymer 1, the second flexible polymer 7, and the third flexible polymer 10 are made of the same material, and include, but are not limited to, polyimide, benzocyclobutene, hexamethyldisilazane, polydimethylsiloxane, and parylene.
The reinforced fold material includes, but is not limited to, copper and gold, which makes the reinforced fold 6 foldable and shapeable so that the chip can be shaped by the reinforced fold 6 after folding.
The multi-chip flexible packaging structure is endowed with a three-dimensional layout characteristic by the design of the reinforced crease 6, so that the problems that the traditional flexible packaging chip can only be slightly bent as a whole, has internal stress and is low in space utilization rate are solved; by coating and processing the same material, the problem that the package fails due to the internal stress of a heterogeneous material in the processing process is solved; the multi-chip flexible packaging is realized by the processes of coating flexible polymers by double-sided spin coating and the like, so that not only are the internal chips protected, but also the whole packaging has certain flexibility; in addition, the invention avoids the problem of position precision of manually installing the chip by the design of the metal alignment mark, the chip placing groove and the crease groove.
The invention also provides a flexible integrated packaging chip, which is packaged by adopting the folding multi-chip flexible integrated packaging method, and comprises the following steps: the chip packaging structure comprises a first flexible polymer 1, a chip mounting groove 3, a reinforcing crease groove 4, a chip 5 to be packaged, a reinforcing crease material, a lead cavity 8, a columnar groove, an electrical interconnection medium 9, a second flexible polymer 7 and a third flexible polymer 10.
The chip 5 to be packaged is arranged in the chip mounting groove 3; the reinforced crease material is arranged in the reinforced crease groove 4; the chip mounting groove 3 and the reinforcing crease line 4 are both arranged on the first flexible polymer 1; the second flexible polymer 7 is spin-coated on the first flexible polymer 1, and the second flexible polymer 7 is used for covering the chip 5 to be packaged and the reinforcing crease 6; the wire cavity 8 is communicated with the columnar groove through the electrical interconnection medium 9; the lead cavity 8 extends through the second flexible polymer 7; the electrical interconnection medium 9 is used for completing electrical interconnection among a plurality of chips 5 to be packaged; the third flexible polymer 10 is spin coated on the second flexible polymer 7, the third flexible polymer 10 being used to cover the electrical interconnect medium 9.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.

Claims (9)

1. A folding multi-chip flexible integrated packaging method is characterized by comprising the following steps:
spin coating a first flexible polymer on a substrate to form a flexible polymer base layer;
arranging a chip mounting groove and a reinforced mark folding groove on the flexible polymer substrate layer;
installing a chip to be packaged to the chip installation groove;
mounting a reinforcing fold material to the reinforcing fold groove to form a reinforcing fold;
covering the chip to be packaged and the reinforcing crease with a second flexible polymer to obtain a flexible polymer intermediate layer;
preparing a lead cavity and a columnar groove on the flexible polymer intermediate layer; forming an electrical interconnection medium between the wire cavity and the columnar groove, wherein the electrical interconnection medium is used for completing electrical interconnection among a plurality of chips to be packaged;
performing spin coating on the flexible polymer intermediate layer after the electrical interconnection is completed by using a third flexible polymer to obtain a flexible packaging structure;
and splitting the flexible packaging structure and the substrate base plate, and folding the flexible packaging structure according to the reinforced crease mark to obtain the flexible integrated packaging chip.
2. The folded multi-chip flexible integrated package method of claim 1, further comprising, prior to the spin coating a first flexible polymer on a substrate to form a flexible polymer base layer:
and arranging a metal alignment mark on the substrate base plate.
3. The folded multi-chip flexible integrated package method of claim 1, wherein the first flexible polymer, the second flexible polymer, and the third flexible polymer are all the same material.
4. The folded multi-chip flexible integrated package method of claim 3, wherein the stiffening crease material is a metal.
5. The method for packaging folded multichip flexible integration according to claim 1, wherein the forming of the wire cavities and the post-like recesses in the flexible polymer intermediate layer comprises:
and etching a lead cavity and a columnar groove on the flexible polymer intermediate layer by using a physical penetration method, a laser etching method or a photoetching method.
6. The method according to claim 1, wherein forming an electrical interconnection medium between the wire cavity and the pillar-shaped groove comprises:
and forming an electrical interconnection medium in the wire cavity and the columnar groove by using metal sputtering, chemical deposition or direct mounting method.
7. The folded multi-chip flexible integrated package method of claim 1, wherein the forming of the stiffening creases comprises metal sputtering, chemical deposition, and direct mounting.
8. The folded multi-chip flexible integrated package method of claim 1, wherein the material of the electrical interconnection medium is a metal.
9. A flexible integrated package chip, wherein the flexible integrated package chip is packaged by the folded multi-chip flexible integrated package method according to any one of claims 1-8, and the flexible integrated package chip comprises: the chip packaging structure comprises a first flexible polymer, a chip mounting groove, a reinforcing crease groove, a chip to be packaged, a reinforcing crease material, a lead cavity, a columnar groove, an electrical interconnection medium, a second flexible polymer and a third flexible polymer;
the chip to be packaged is arranged in the chip mounting groove; the reinforced crease material is arranged in the reinforced crease groove; the chip mounting groove and the reinforcing crease groove are both arranged on the first flexible polymer; the second flexible polymer is coated on the first flexible polymer in a spinning mode, and the second flexible polymer is used for covering the chip to be packaged and reinforcing creases; the lead cavity is communicated with the columnar groove through the electronic interconnection medium; the lead lumen extends through the second flexible polymer; the electrical interconnection medium is used for completing electrical interconnection among a plurality of chips to be packaged; the third flexible polymer is spin coated on the second flexible polymer, the third flexible polymer for covering the electrical interconnection medium.
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CN111717885A (en) * 2020-05-20 2020-09-29 北京协同创新研究院 Flexible processing method for silicon-based micro-nano structure
CN112053961A (en) * 2020-09-10 2020-12-08 山东傲天环保科技有限公司 Semiconductor package and forming method thereof
CN112053962A (en) * 2020-09-14 2020-12-08 山东傲天环保科技有限公司 System-level stack package and preparation method thereof
CN113113540A (en) * 2021-03-01 2021-07-13 北京大学 Flexible hybrid electronic system processing method and flexible hybrid electronic system

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