CN115561859A

CN115561859A - Passive coupling method

Info

Publication number: CN115561859A
Application number: CN202211226854.2A
Authority: CN
Inventors: 陈世平; 傅焰峰; 王栋; 严杰
Original assignee: Wuhan Optical Valley Information Optoelectronic Innovation Center Co Ltd
Current assignee: Wuhan Optical Valley Information Optoelectronic Innovation Center Co Ltd
Priority date: 2022-10-09
Filing date: 2022-10-09
Publication date: 2023-01-03

Abstract

The embodiment of the application discloses a passive coupling method, which comprises the following steps: forming a silicon optical chip on a wafer; acquiring waveguide parameters of the silicon optical chip and the laser chip; the waveguide parameters include position parameters of the waveguide layer; forming a coupling groove exposing a coupling end face of the silicon optical chip on the wafer based on the waveguide parameters of the silicon optical chip and the laser chip; and fixing the laser chip in the coupling groove so as to couple the waveguide layer of the laser chip with the waveguide layer of the silicon optical chip. The coupling groove is formed based on waveguide parameters of the silicon optical chip and the laser chip, the laser chip is fixed in the coupling groove, passive coupling of the silicon optical chip and the laser chip is achieved, and coupling efficiency and reliability of the silicon optical chip and the laser chip are improved.

Description

Passive coupling method

Technical Field

The application relates to the technical field of optical communication, in particular to a passive coupling method of a silicon optical chip and a laser chip.

Background

With the increasing demand for high-speed data transmission, data processing, high-performance computation and inter-chip and intra-chip optical networks in optical communication, photonic signal transmission and photonic signal processing technologies based on photonic integrated circuits are widely used because of their advantages of low interconnection delay, large bandwidth, no electromagnetic interference, and low power consumption.

Silicon photonics chips with high degree of optoelectronic integration are important components in photonic integrated circuits, but there are still some technical difficulties in their practical application, one of which is silicon photonics. Since the bulk silicon material is used as an indirect bandgap semiconductor, the light emitting efficiency is extremely low, and the bulk silicon material is not suitable for manufacturing a light source, and how to couple the semiconductor laser and the silicon optical chip with high efficiency becomes a problem which needs to be solved at present.

Disclosure of Invention

In view of the above, the embodiments of the present application provide a passive coupling method to solve at least one problem in the prior art.

In order to achieve the above purpose, the technical solution of the embodiment of the present application is implemented as follows:

the embodiment of the application provides a passive coupling method, which comprises the following steps:

forming a silicon optical chip on a wafer;

acquiring waveguide parameters of the silicon optical chip and the laser chip; the waveguide parameters include position parameters of the waveguide layer;

forming a coupling groove for exposing a coupling end face of the silicon optical chip on the wafer based on the waveguide parameters of the silicon optical chip and the laser chip;

and fixing the laser chip in the coupling groove so as to couple the waveguide layer of the laser chip with the waveguide layer of the silicon optical chip.

In an optional embodiment, the obtaining waveguide parameters of the silicon optical chip and the laser chip includes:

acquiring a first position parameter of a waveguide layer of the silicon optical chip relative to the surface of the wafer;

and acquiring a second position parameter of the waveguide layer of the laser chip relative to the bottom surface of the laser chip.

In an alternative embodiment, the forming a coupling groove on the wafer, which exposes a coupling end face of the silicon optical chip based on the waveguide parameters of the silicon optical chip and the laser chip, includes:

forming the coupling groove on the wafer based on the first position parameter and the second position parameter; the bottom surface of the coupling groove is provided with a third position parameter relative to the surface of the wafer, and the third position parameter is equal to the sum of the first position parameter and the second position parameter.

In an optional embodiment, the method further comprises:

acquiring a coupling margin;

forming a coupling groove on the wafer to expose a coupling end face of the silicon optical chip based on the waveguide parameters of the silicon optical chip and the laser chip, the method comprising:

and forming a coupling groove for exposing the coupling end face of the silicon optical chip on the wafer based on the coupling margin, the waveguide parameters of the silicon optical chip and the laser chip.

In an optional embodiment, the obtaining the coupling margin includes:

and obtaining the coupling margin according to the thickness of the waveguide layer of the silicon optical chip and/or the thickness of the waveguide layer of the laser chip.

In an optional embodiment, the forming, on the wafer and based on the waveguide parameters of the silicon optical chip and the laser chip, a coupling groove that exposes a coupling end face of the silicon optical chip includes:

and forming the coupling groove by using a wet etching process, a dry etching process or a laser micro-nano machining process.

In an alternative embodiment, the fixing the laser chip in the coupling groove to couple the waveguide layer of the laser chip with the waveguide layer of the silicon optical chip includes:

and fixing the bottom surface and/or the side surface of the laser chip in the coupling groove by using a curable adhesive so as to couple the waveguide layer of the laser chip with the waveguide layer of the silicon optical chip.

In an alternative embodiment, the curable adhesive comprises: ultraviolet curing glue, conductive glue or solder paste.

In an alternative embodiment, the width of the waveguide layer of the laser chip is in the range of 50 to 2000nm and the thickness of the waveguide layer of the laser chip is in the range of 200 to 3000nm.

In an alternative embodiment, the width of the waveguide layer of the silicon photonics chip is in a range of 300 to 1200nm, and the thickness of the waveguide layer of the silicon photonics chip is in a range of 100 to 600nm.

In an embodiment provided by the present application, a passive coupling method is provided, where the method includes: forming a silicon optical chip on a wafer; acquiring waveguide parameters of the silicon optical chip and the laser chip; the waveguide parameters include position parameters of the waveguide layer; forming a coupling groove for exposing a coupling end face of the silicon optical chip on the wafer based on the waveguide parameters of the silicon optical chip and the laser chip; and fixing the laser chip in the coupling groove so as to couple the waveguide layer of the laser chip with the waveguide layer of the silicon optical chip. The coupling groove is formed based on waveguide parameters of the silicon optical chip and the laser chip, the laser chip is fixed in the coupling groove, passive coupling of the silicon optical chip and the laser chip is achieved, and coupling efficiency and reliability of the silicon optical chip and the laser chip are improved.

Drawings

Fig. 1 is a schematic flowchart of a passive coupling method according to an embodiment of the present disclosure;

FIGS. 2a-2b are top and cross-sectional views of a wafer after forming a silicon photonics chip in accordance with an embodiment of the present application;

fig. 3 is a cross-sectional view of a laser chip provided by an embodiment of the present application;

4a-4b are top and cross-sectional views of a wafer after forming coupling grooves as provided by embodiments of the present application;

FIGS. 5a-5b are cross-sectional views of a wafer during the formation of a coupling groove as provided in one embodiment of the present application;

6a-6b are top and cross-sectional views of a parasitic coupling structure formed by a method of providing parasitic coupling according to embodiments of the present application;

fig. 7 is a top view of a wafer after forming a plurality of passive coupling structures thereon as provided in an embodiment of the present application.

Detailed Description

Exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art, that the present application may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present application; that is, not all features of an actual embodiment are described herein, and well-known functions and constructions are not described in detail.

In the drawings, the size of layers, regions, elements, and relative sizes may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

It should be understood that spatial relationship terms such as "under" \8230; under "", "' under 8230; \8230; under" \8230;, "' over 8230; over" "," "over", etc., may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "at 8230; \8230; below" and "at 8230; \8230; below" may include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially descriptive terms used herein are interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

In the following description, for purposes of explanation, specific details are set forth, such as particular steps and particular structures, in order to provide a thorough understanding of the present invention. The following detailed description of the preferred embodiments of the invention, however, the invention can be practiced otherwise than as specifically described.

In order to realize a silicon light source, there are three main schemes currently adopted, the first scheme is to epitaxially grow a III-V group semiconductor optoelectronic material on a silicon light chip and then perform a laser processing technology on the III-V group semiconductor optoelectronic material to manufacture the light source. However, due to the problem of lattice mismatch between silicon materials and III-V semiconductor optoelectronic materials, forming a laser on a silicon photonic chip through an epitaxial growth process and a laser processing process may generate large stress, which affects the reliability of the chip. The second scheme is that a light source component is manufactured by a distributed feedback laser chip, a coupling lens and an isolator, and then the light source component is adhered to a silicon optical chip by glue. However, the processing and sealing processes of the light source assembly are complicated, and the process cost of this solution is high. The third scheme is that the laser chip waveguide is inversely arranged on the silicon waveguide, and the coupling of the laser chip and the silicon optical chip is realized through evanescent wave coupling. However, in order to realize evanescent coupling, ultra-high precision coupling alignment equipment is required, and the requirements on equipment and processes are extremely high.

The three schemes couple the semiconductor laser and the silicon optical chip by different means to realize the silicon optical light source, but all have certain technical defects. Therefore, how to improve the coupling efficiency and reliability of the semiconductor laser and the silicon optical chip becomes a problem to be solved urgently.

In view of this, the present application proposes the following embodiments.

The embodiment of the application provides a passive coupling method of a laser chip and a silicon optical chip. Fig. 1 is a schematic flowchart of a passive coupling method according to an embodiment of the present disclosure. As shown in fig. 1, the passive coupling method includes the steps of:

step 101: and forming a silicon optical chip on the wafer.

Fig. 2a is a top view of a wafer after a silicon photo chip is formed according to an embodiment of the present disclosure, and fig. 2b is a cross-sectional view of fig. 2a along line AA'. As shown in connection with fig. 2a and 2b, a silicon photonics chip 201 formed on wafer 10 includes a silicon photonics chip waveguide layer 202.

In a specific example, the silicon photonics waveguide layer 202 includes a high index of refraction material, such as silicon nitride, with a low index of refraction material surrounding the waveguide layer 202. Thus, light waves input from one end of the silicon photonic chip 201 may be confined in the waveguide layer 202 and coupled to the other end of the silicon photonic chip 201 via the waveguide layer 202.

Step 102: acquiring waveguide parameters of the silicon optical chip and the laser chip; the waveguide parameters include a position parameter of the waveguide layer.

In some embodiments, obtaining waveguide parameters of silicon photonics chip 201 and laser chip 301 includes: acquiring a first position parameter of a waveguide layer 202 of a silicon optical chip 201 relative to the surface of a wafer 10; a second positional parameter of the waveguide layer 302 of the laser chip 301 with respect to the bottom surface of the laser chip 301 is acquired.

In some embodiments, obtaining waveguide parameters of silicon photonics chip 201 and laser chip 301 includes: acquiring a first position parameter T1 of a waveguide shaft 203 of a silicon optical chip 201 relative to the surface of a wafer 10; a second positional parameter T2 of the waveguide axis 303 of the laser chip 301 with respect to the bottom surface of the laser chip 301 is acquired. Here, the waveguide axis 203 of the silicon photonic chip 201 is the central axis of the actual laser transmission path in the waveguide layer 202 of the silicon photonic chip 201; the waveguide axis 303 of the laser chip 301 is the central axis of the actual laser transmission path in the waveguide layer 302 of the laser chip 301.

In the embodiment of the present application, the waveguide parameters of the silicon optical chip 201 may be obtained by using an online thickness gauge. After the silicon optical chip 201 is formed on the wafer 10, the wafer 10 is transferred to an online thickness gauge, and the thickness of each film layer in the silicon optical chip 201 is measured by a nondestructive thickness measurement technology. In a specific example, the nondestructive thickness measurement technique is a near-infrared online thickness measurement technique, in a thickness meter, near-infrared light is incident into the silicon optical chip 201 along a direction intersecting with the upper surface of the silicon optical chip 201, and the thickness of each film layer in the silicon optical chip 201 can be obtained by fitting according to the difference between the intensity of reflected light of different film layers and the reflection angle, so as to further obtain the first position parameter T1 of the waveguide axis 203 of the silicon optical chip 201 relative to the surface of the wafer 10 as shown in fig. 2 b. Through using online thickness gauge, can acquire the position parameter of silicon optical chip waveguide layer under the condition of guaranteeing the wafer integrality, not only can effectively improve efficiency of software testing, still provide convenience for follow-up realization laser instrument chip and wafer level silicon optical chip's passive coupling.

Here, when the first position parameter T1 of the waveguide axis 203 of the silicon photonic chip 201 with respect to the surface of the wafer 10 is calculated from the thicknesses of the respective film layers measured by the in-line thickness gauge, the waveguide axis 203 is equivalent to the physical central axis of the waveguide layer 202 of the silicon photonic chip 201 in the direction along which the optical wave propagates. In practical applications, there is a coupling margin between the waveguide layer of the laser chip and the waveguide layer of the silicon photonics chip, the coupling margin being related to the thickness of the waveguide layer of the silicon photonics chip and/or the thickness of the waveguide layer of the laser chip. For example, the coupling margin is 5% of the thickness of the silicon optical chip waveguide layer, when the thickness of the silicon optical chip waveguide layer is 500nm, the coupling of the laser chip waveguide layer and the silicon optical chip waveguide layer in the Z direction can be realized as long as the height of the laser chip waveguide shaft is set within the range of ± 25nm of the height of the silicon optical chip waveguide shaft relative to the same plane in the Z direction. For another example, the coupling margin is 50% of the difference between the thickness of the silicon optical chip waveguide layer and the thickness of the laser chip waveguide layer, when the thickness of the silicon optical chip waveguide layer is 500nm and the thickness of the laser chip waveguide layer is 200nm, the laser chip waveguide layer and the silicon optical chip waveguide layer can be coupled in the Z direction as long as the height of the laser chip waveguide shaft is set within the range of +/-150 nm of the height of the silicon optical chip waveguide shaft relative to the same plane in the Z direction.

In some embodiments, before obtaining the waveguide parameters of the laser chip, the method comprises: a laser chip is formed.

Fig. 3 is a cross-sectional view of a laser chip provided in an embodiment of the present application, and as shown in fig. 3, the laser chip 301 includes a laser chip waveguide layer 302. The laser chip 301 further comprises front and rear electrodes (not shown in the figure), and when a voltage applied between the front and rear electrodes exceeds a threshold value, the active layer in the waveguide layer 302 generates laser light, thereby achieving electro-optical conversion, and the laser light is transmitted along the waveguide axis 303 to the exit end face 304 of the laser chip due to confinement by the waveguide layer 302.

In a specific example, the laser chip waveguide layer 302 includes a III-V semiconductor material.

In some embodiments, the method of obtaining the waveguide parameters of laser chip 301 may be the same as or different from the method of obtaining the waveguide parameters of silicon photonics chip 201. Since the laser chip 301 is a single chip obtained by cutting the laser wafer, the waveguide parameters of the laser chip 301 can be obtained by an online thickness gauge before the laser wafer is cut, and can also be obtained by an offline measurement means after the laser wafer is cut. For example, in the offline testing stage of the laser chip 301, it is required to verify whether the laser chip 301 can emit laser light, and during the verification process, the position parameter of the laser emitting point, that is, the position parameter of the waveguide axis 303 of the laser chip 301, can be measured at the same time, so as to obtain the second position parameter T2 of the waveguide axis 303 of the laser chip 301 relative to the bottom surface of the laser chip 301 as shown in fig. 3.

Here, when the second position parameter T2 of the waveguide axis 303 of the laser chip 301 is obtained in the offline test stage of the laser chip, the waveguide axis 303 is a central axis of an actual laser transmission path in the laser chip waveguide layer 302, and may or may not coincide with a geometric central axis of the laser chip waveguide layer 302 in the laser transmission direction. Therefore, accurate position parameters of the waveguide layer can be obtained, and the coupling reliability of the subsequent silicon optical chip and the laser chip is improved.

Step 103: and forming a coupling groove exposing the coupling end face of the silicon optical chip on the wafer based on the waveguide parameters of the silicon optical chip and the laser chip.

Fig. 4a is a top view of the wafer 10 after forming the coupling grooves 401 according to an embodiment of the present disclosure, and fig. 4b is a cross-sectional view of fig. 4a along line AA'. With reference to fig. 4a and 4b, in the embodiment of the present application, after the first position parameter T1 and the second position parameter T2 are obtained, a coupling groove 401 is formed on the wafer 10 based on the first position parameter T1 and the second position parameter T2, the coupling groove 401 exposes the coupling end surface 204 of the silicon photo chip 201, and a bottom surface of the coupling groove 401 has a third position parameter T3 relative to the surface of the wafer 10, which is equal to a sum of the first position parameter T1 and the second position parameter T2. Thus, the waveguide layer 302 of the laser chip 301 and the waveguide layer 202 of the silicon optical chip 201 can be coupled in the Z direction by simply fixing the laser chip 301 in the coupling groove 401.

In the embodiment of the present application, the coupling groove 401 is formed by using a wet etching process, a plasma dry etching process, or a laser micro-nano processing process.

In a specific example, referring to fig. 5a and 5b, when the coupling groove 401 is formed by a plasma dry etching process, a mask layer 501 is formed on the wafer 10, an opening 502 is formed in the mask layer 501 by a photolithography process to form a mask pattern layer 503, the opening 502 corresponds to a formation position of the coupling groove 401, and a portion exposed by the opening 502 is etched by a plasma etching gas to form the coupling groove 401 as shown in fig. 4b, in the process, the bottom surface of the coupling groove 401 has a third position parameter T3 with respect to the surface of the wafer 10 by adjusting and controlling the etching process parameters, and the size of the third position parameter T3 is equal to the sum of the first position parameter T1 and the second position parameter T2. The plasma dry etching process can accurately control the size of the coupling groove, and effectively improves the coupling reliability of the silicon optical chip and the laser chip.

It should be noted that the shape and size of the coupling groove 401 in the XOY plane shown in fig. 4a are only examples, and the shape and size of the coupling groove in the XOY plane may be set according to the specific shape and size of the laser chip. Therefore, the passive coupling method provided by the embodiment of the application can be suitable for various laser chips of different models, and the flexibility of coupling the silicon optical chip and the laser chip is effectively improved.

Step 104: and fixing the laser chip in the coupling groove so as to couple the waveguide layer of the laser chip with the waveguide layer of the silicon optical chip.

In some embodiments, securing the laser chip 301 within the coupling slot 401 to couple the waveguide layer 302 of the laser chip 301 with the waveguide layer 202 of the silicon photonics chip 201 includes: the bottom and/or side surfaces of the laser chip 301 are fixed in the coupling groove 401 by a curable adhesive to couple the waveguide layer 302 of the laser chip 301 with the waveguide layer 202 of the silicon photonics chip 201.

In the embodiment of the present application, when the bottom surface of the laser chip 301 is fixed in the coupling groove 401 by the curable adhesive, the thickness of the curable adhesive needs to be as thin as possible to control the coupling error within the coupling margin.

In the embodiment of the present application, when the side surface of the laser chip 301 is fixed in the coupling groove 401 by the curable adhesive, the curable adhesive applied to the side surface of the chip does not affect the height of the waveguide layer 302 of the laser chip 301 in the Z direction, and therefore, the coupling error can be reduced.

Fig. 6a is a top view of a passive coupling structure formed by a passive coupling method according to an embodiment of the present disclosure for a silicon optical chip 201 and a laser chip 301, and fig. 6b is a cross-sectional view of fig. 6a along line AA'. Referring to fig. 6a and 6b, in the passive coupling structure finally formed by the passive coupling method, the laser chip 301 is fixed in the coupling groove 401, the exit end face 304 of the laser chip 301 faces the coupling end face 204 of the silicon photonic chip 201, and the waveguide layer 302 of the laser chip 301 is coupled with the waveguide layer 202 of the silicon photonic chip 201.

In the embodiment of the present application, after obtaining the first position parameter of the waveguide axis 203 of the silicon optical chip 201 and the second position parameter of the waveguide axis 303 of the laser chip 301, the coupling groove 401 exposing the coupling end face 204 of the silicon optical chip 201 is formed based on the first position parameter T1 and the second position parameter T2, and the coupling groove 401 has a third position parameter T3 with a size equal to the sum of the first position parameter T1 and the second position parameter T2, so that when the laser chip 301 is placed in the coupling groove 401 in a face-up manner as shown in fig. 6b, the coupling in the Z-axis direction between the waveguide layer 202 of the silicon optical chip 201 and the waveguide layer 302 of the laser chip 301 is achieved.

In the embodiment of the present application, the laser chip 301 is fixed in the coupling groove 401 by using the curable adhesive, the curable adhesive may be first dot-coated on the bottom surface and/or the side surface of the laser chip 301, and then the laser chip 301 dot-coated with the curable adhesive is placed in the coupling groove 401, since there is a large difference between the refractive index of the silicon photonics waveguide layer 202 and the refractive index of the other materials in the silicon photonics chip 201, and there is a large difference between the refractive index of the laser chip waveguide layer 302 and the refractive index of the other materials in the laser chip 301, when the silicon photonics waveguide layer 201 and the laser chip 301 are observed from the direction perpendicular to the surface of the wafer 10 by the optical device, the wavelength of the incident light of the optical device is adjusted, so that the silicon photonics waveguide layer 202 and the laser chip 302 can be observed at the same time at a certain wavelength, and thus the laser chip 301 can be adjusted under the optical device, so that the silicon photonics waveguide layer 202 and the waveguide layer 302 of the laser chip 201 are coupled in the X direction and the Y direction. Next, the curable adhesive dotted on the bottom surface and/or the side surface of the laser chip 301 is cured, thereby fixing the laser chip 301 in the coupling groove 401. Therefore, the waveguide layer 202 of the silicon optical chip 201 and the waveguide layer 302 of the laser chip 301 complete the coupling in three directions of X, Y and Z, i.e. the silicon optical chip 201 and the laser chip 301 realize the passive coupling.

In this embodiment of the application, the laser chip 301 is fixed in the coupling groove 401 by using a way of normally mounting a patch, that is, the bottom surface of the laser chip 301 is attached to the bottom surface of the coupling groove 401, so that the laser chip 301 faces upward, and the waveguide layer 302 thereof can be directly observed through an optical device, and further the waveguide layer 202 of the silicon optical chip 201 and the waveguide layer 302 of the laser chip 301 can be coupled in the X direction and the Y direction by adjusting the laser chip 301 under the optical device, without using an active coupling way to couple the silicon optical chip 201 and the laser chip 301.

Here, active coupling refers to adjusting the relative positions of a silicon optical chip and a laser chip under optical power or current monitoring using a high-precision device to achieve coupling. In the embodiment of the present application, since the position parameters of the waveguide layers of the silicon optical chip 201 and the laser chip 301 are obtained in advance, and the coupling groove 401 is formed based on the position parameters of the waveguide layers, then the laser chip 301 is fixed in the coupling groove 401 in a way of being mounted on a patch by using a curable adhesive, so that the waveguide layer 202 of the silicon optical chip 201 is coupled with the waveguide layer 302 of the laser chip 301 in the Z direction; before curing the curable adhesive, the laser chip may be adjusted under the optical equipment to align the waveguide layer 202 of the silicon photonics chip 201 with the waveguide layer 302 of the laser chip 301 in the X-direction and the Y-direction. Therefore, the passive coupling of the silicon optical chip and the laser chip can be realized without applying voltage to the laser chip and monitoring the optical power or current in the coupling process and arranging optical elements such as a lens between the chips, and the coupling efficiency of the silicon optical chip and the laser chip is effectively improved.

In some embodiments, the curable adhesive comprises: ultraviolet curing agent, conductive adhesive or solder paste.

In a specific example, the laser chip 301 is fixed in the coupling groove 401 by using an ultraviolet curing agent, the ultraviolet curing agent is firstly spot-coated on the side surface of the laser chip 301, and after the laser chip 301 is placed in the coupling groove 401 and adjusted, the ultraviolet curing agent is irradiated by using an ultraviolet lamp to cure the ultraviolet curing agent.

In another specific example, the laser chip 301 is fixed in the coupling groove 401 by using a conductive adhesive, the conductive adhesive is firstly applied to the side surface and the bottom surface of the laser chip 301, the laser chip 301 is placed in the coupling groove 401, and after the adjustment is completed, the wafer 10 is locally heated to cure the conductive adhesive.

In another specific example, the laser chip 301 is fixed in the coupling slot 401 by using solder paste, the solder paste is first applied on the bottom surface of the laser chip 301 by dots, the laser chip 301 is placed in the coupling slot 401 and after the adjustment is completed, the laser is used to locally heat the bottom surface of the laser chip 301 from the back surface of the wafer 10 to cure the solder paste.

In the present embodiment, the laser chip waveguide layer 302 has a width in the range of 50-2000nm and a thickness in the range of 200-3000nm.

In the present embodiment, the silicon photonics waveguide layer 202 has a width in the range of 300-1200nm and a thickness in the range of 100-600nm.

In some embodiments, the thickness of the silicon photonics waveguide layer 202 is the same as or different than the thickness of the laser chip waveguide layer 302.

In a specific example, the thickness of the silicon photonics waveguide layer 202 is greater than the thickness of the laser chip waveguide layer 302. Since the larger the thickness of the silicon microchip waveguide layer 202 is, or the larger the difference between the thickness of the silicon microchip waveguide layer 202 and the thickness of the laser chip waveguide layer 302 is, the larger the allowable error range in the Z direction when fixing the laser chip 301 in the coupling groove 401 is based on the coupling margin between the laser chip waveguide layer and the silicon microchip waveguide layer, and therefore, the reliability of coupling between the silicon microchip and the laser chip can be further improved.

In the embodiments of the present application, the passive coupling method is described by taking only the passive coupling structure in which one silicon optical chip and one laser chip are formed on a wafer as an example, but the present application is not limited thereto.

In some embodiments, a plurality of passive coupling structures of the silicon optical chip and the laser chip may be formed in the wafer by the above passive coupling method, so that the production efficiency of the coupling structure of the silicon optical chip and the laser chip may be significantly improved.

In a specific example, as shown in fig. 7, the wafer 10 includes a plurality of repeating units 101, and a passive coupling structure of a silicon optical chip 201 and a laser chip 301 can be formed in each repeating unit 101 by the above passive coupling method. Specifically, by the passive coupling method, a silicon optical chip 201 may be formed in each repeating unit 101 of the wafer 10, then the waveguide parameters of the silicon optical chip 201 and the laser chip 301 are obtained, a coupling groove 401 exposing the coupling end face of the silicon optical chip 201 is formed in each repeating unit 101 based on the waveguide parameters, and a plurality of laser chips 301 formed separately are fixed in each coupling groove 401 using a curable adhesive, so as to realize the passive coupling of the silicon optical chip 201 and the laser chip 301. Here, the silicon optical Chip 201 is a Wafer-level silicon optical Chip directly formed on the Wafer 10, and the plurality of independent laser chips 301 are fixed in the plurality of coupling grooves 401 formed on the Wafer, so that hybrid photoelectric integration of Chip to Wafer (Chip to Wafer) is realized, which can facilitate mass production of a coupling structure composed of the silicon optical Chip and the laser Chip, and significantly improve production efficiency.

The passive coupling method provided by the embodiment of the application is based on the waveguide parameters of the silicon optical chip and the laser chip, the coupling groove is formed on the wafer, the passive coupling of the wafer-level silicon optical chip and the laser chip is realized by accurately controlling the position parameters of the bottom surface of the coupling groove relative to the surface of the wafer and fixing the laser chip in the coupling groove by using the curable adhesive, the coupling step of the silicon optical chip and the laser chip is simplified, and the coupling efficiency and reliability of the silicon optical chip and the laser chip are effectively improved.

Based on the same technical concept of the aforementioned passive coupling method, the embodiments of the present application provide a passive coupling structure. Fig. 6a is a top view of a passive coupling structure provided in an embodiment of the present application, and fig. 6b is a cross-sectional view of fig. 6a along line AA'. As shown in fig. 6a and 6b, the passive coupling structure includes: a silicon optical chip 201 formed on the wafer 10, a coupling groove 401 formed on the wafer 10, and a laser chip 301 fixed in the coupling groove 401; the coupling groove 401 exposes the coupling end face 204 of the silicon photonic chip 201, and the emission end face 304 of the laser chip 301 faces the coupling end face 204 of the silicon photonic chip 201; the waveguide layer 202 of the silicon photonics chip 201 is coupled with the waveguide layer 302 of the laser chip 301.

In some embodiments, the waveguide axis 203 of the silicon photonic chip 201 has a first position parameter T1 relative to the surface of the wafer 10, the waveguide axis 303 of the laser chip 301 has a second position parameter T2 relative to the bottom surface of the laser chip 301, the bottom surface of the coupling groove 401 has a third position parameter T3 relative to the surface of the wafer 10, and the third position parameter T3 is equal to the sum of the first position parameter T1 and the second position parameter T2.

In some embodiments, the thickness of the silicon photonics waveguide layer 202 is greater than the thickness of the laser chip waveguide layer 302.

In some embodiments, the silicon photonics waveguide layer 202 includes a silicon nitride material.

In some embodiments, the laser chip waveguide layer 302 comprises a III-V semiconductor material.

The passive coupling structure composed of the silicon optical chip and the laser chip is prepared by the passive coupling method, and has high reliability. In addition, the coupling structure has high integration level because optical elements such as lenses do not need to be arranged between the silicon optical chip and the laser chip.

The methods disclosed in the several method embodiments provided in the present application may be combined arbitrarily without conflict to obtain new method embodiments.

The features disclosed in the several apparatus embodiments provided in the present application may be combined in any combination without conflict to arrive at a new apparatus embodiment.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method of passive coupling, comprising:

forming a silicon optical chip on a wafer;

2. The passive coupling method of claim 1, wherein the obtaining waveguide parameters of the silicon optical chip and the laser chip comprises:

3. The passive coupling method of claim 2, wherein the forming a coupling groove on the wafer exposing a coupling end face of the silicon photonic chip based on the waveguide parameters of the silicon photonic chip and the laser chip comprises:

4. A passive coupling method according to any of claims 1 to 3, characterized in that the method further comprises:

acquiring a coupling margin;

and forming a coupling groove exposing the coupling end face of the silicon optical chip on the wafer based on the coupling margin, the waveguide parameters of the silicon optical chip and the laser chip.

5. The method of claim 4, wherein the obtaining the coupling margin comprises:

6. A passive coupling method according to any of claims 1 to 3, wherein the forming a coupling groove on the wafer exposing a coupling end face of the silicon photonic chip based on the waveguide parameters of the silicon photonic chip and the laser chip comprises:

7. The method of claim 1, wherein said securing the laser chip within the coupling slot to couple the waveguide layer of the laser chip with the waveguide layer of the silicon photonics chip comprises:

8. The method of claim 7, wherein the curable adhesive comprises: ultraviolet curing glue, conductive glue or solder paste.

9. The passive coupling method of claim 1, wherein the width of the waveguide layer of the laser chip is in the range of 50 to 2000nm and the thickness of the waveguide layer of the laser chip is in the range of 200 to 3000nm.

10. The method of claim 1, wherein the width of the waveguide layer of the silicon photonics chip is in a range of 300 to 1200nm, and the thickness of the waveguide layer of the silicon photonics chip is in a range of 100 to 600nm.