CN115549497A - Cockcroft-Walton voltage doubling rectifying circuit optimization design method - Google Patents

Cockcroft-Walton voltage doubling rectifying circuit optimization design method Download PDF

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CN115549497A
CN115549497A CN202211126269.5A CN202211126269A CN115549497A CN 115549497 A CN115549497 A CN 115549497A CN 202211126269 A CN202211126269 A CN 202211126269A CN 115549497 A CN115549497 A CN 115549497A
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voltage
cockcroft
walton
circuit
rectifying circuit
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孟凡刚
李峰
马秀娟
李泉慧
殷昕羽
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WEIHAI TONSLOAD POWER-TECH CO LTD
Weihai Tianfan Power Technology Co ltd
Harbin Institute of Technology Weihai
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WEIHAI TONSLOAD POWER-TECH CO LTD
Weihai Tianfan Power Technology Co ltd
Harbin Institute of Technology Weihai
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/06Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
    • H02M7/10Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode arranged for operation in series, e.g. for multiplication of voltage
    • H02M7/103Containing passive elements (capacitively coupled) which are ordered in cascade on one source
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • G06F30/27Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/373Design optimisation
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention provides an optimal design method of a Cockcroft-Walton voltage doubling rectifying circuit, belongs to the technical field of power electronics, and aims to solve the problem of parasitic parameters caused by a large turn ratio transformer used by a low-input voltage DC-DC converter. The optimal design method establishes a calculation model of the steady-state output voltage and the voltage ripple of the current source type Cockcroft-Walton voltage-multiplying rectification circuit by using a charge conservation method. For square wave current used in theoretical analysis, a series resonance circuit is used in an actual circuit to generate sinusoidal current as equivalent input, and an empirical method for selecting a resonance capacitor under a high-frequency condition is provided. And finally, optimizing capacitance value parameters of the capacitor in the rectifier circuit by using a particle swarm optimization on the basis of the mathematical model provided by the invention. Under the condition that the total capacitance value is the same, compared with two traditional capacitance value design methods, the capacitance value optimization design method provided by the invention has the advantage that the voltage ripple is respectively reduced by 45% and 37%.

Description

Cockcroft-Walton voltage doubling rectifying circuit optimization design method
(I) the technical field
The invention relates to a voltage-multiplying rectification circuit, in particular to an optimal design method of a Cockcroft-Walton voltage-multiplying rectification circuit, and belongs to the technical field of power electronics.
(II) background of the invention
The vehicle-mounted high-power DC-AC converter generally adopts a two-stage structure, and the front-stage DC-DC converter provides a direct-current bus voltage of about 400V by using a large turn ratio transformer. Due to the large leakage inductance and parasitic capacitance of the transformer with large turn ratio, the voltage and current peak of the converter is large, and the loss is also large. The voltage doubling rectifying circuit can realize secondary voltage boosting, and the turn ratio and parasitic parameters of the transformer are reduced. In medium and high power application occasions, most documents realize secondary boosting through a voltage doubling rectifying structure; the boost capability is limited, and the influence on the parasitic parameters of the transformer is small. The Cockcroft-Walton voltage doubling rectifying circuit has the characteristics of high voltage gain and low device stress, and is suitable for reducing the turn ratio of a transformer by secondary boosting. However, due to the alternating-current impedance of the capacitor, the Cockcroft-Walton voltage doubling rectifying circuit under large load current has a serious voltage drop phenomenon, and an accurate model needs to be established to calculate the steady-state output voltage of the circuit when the circuit is used; the power density is yet to be further improved.
The voltage drop analysis of the Cockcroft-Walton voltage doubling rectifying circuit related to voltage source input is more, but the Cockcroft-Walton voltage doubling rectifying circuit is used as a switched capacitor circuit, and the loss of the current source input is lower. Regarding voltage drop Analysis of current source input, the literature of Analysis of the dynamic and steady-state performance of Cockcroft-Walton cascade reciever proposes an Analysis method based on digital simulation, and a black box model is formed by using simulation software to finally obtain steady-state output voltage. The document of the thermal performance of the capacitor-diode voltage feedback a current source takes an incomplete Cockcroft-Walton voltage doubling rectifying circuit as an example, and provides a method for calculating voltage ripple and capacitance voltage, and analysis of the method is based on a traditional capacitance value selection scheme and requires that the magnitude of output voltage is known.
Regarding the implementation of the input current source, the resonant converter can be used for providing the current source required by the Cockcroft-Walton voltage doubling rectifying circuit and realizing soft switching to reduce the switching loss. The document, the Cockcroft-Walton voltage multiplier fed by an inverter in The high The series resonance type phenyl-mena power used, provides a design method of a series resonance type Cockcroft-Walton voltage multiplier rectification circuit, but The design of a resonance capacitor is difficult because only a wide range of The resonance frequency is given.
In order to reduce cost and increase power density, the capacitance value parameter of the capacitor should be carefully designed. However, the capacitance values of the capacitors in the conventional design method are the same, and only a few documents use capacitors with different capacitance values at each stage. The literature Optimal design of a half-wave Cockcroft-Walton voltage multiplexer with minimum total capacitance provides an Optimal design method of capacitance values by comparing the voltage ripple sizes under four different capacitance value selection schemes, but the capacitance value selection scheme has a priori constraint condition, and the reduction of the voltage ripple is limited to a certain extent.
Disclosure of the invention
The invention provides an optimization design method of a Cockcroft-Walton voltage-multiplying rectification circuit, which is used for solving the problems. And the particle swarm optimization is used for optimizing capacitance value parameters in the rectifier circuit on the basis of the output voltage calculation model, voltage ripples are reduced on the basis of not increasing the total capacitance value, and an optimization design method is provided for the use of the Cockcroft-Walton voltage-multiplying rectifier circuit in medium and high power occasions.
A Cockcroft-Walton voltage doubling rectifying circuit optimization design method comprises the following specific steps: and calculating the output voltage and voltage ripple of the Cockcroft-Walton voltage doubling rectifying circuit by using an average output current model, and optimizing the capacitance value of the Cockcroft-Walton voltage doubling rectifying circuit by using a particle swarm algorithm based on the calculation result of the average output current model.
The invention relates to an optimization method of a Cockcroft-Walton voltage doubling rectifying circuit, which specifically comprises the following steps of calculating the output voltage and the voltage ripple of the Cockcroft-Walton voltage doubling rectifying circuit by using an average output current model:
establishing a model for accurately calculating output voltage and voltage ripple of a Cockcroft-Walton voltage doubling rectifying circuit:
average output current I of positive half cycle of Cockcroft-Walton voltage-multiplying rectifying circuit without considering resistance load R a ' is:
Figure BDA0003848405320000021
in which I a Inputting square wave current amplitude for a Cockcroft-Walton voltage doubling rectifying circuit, wherein N is the number of stages of the voltage doubling rectifying circuit, and k is 1 、α i 、β i 、γ i 、δ i Is the split coefficient;
average output current I of negative half period of Cockcroft-Walton voltage-multiplying rectifying circuit without considering resistance load R a "is:
Figure BDA0003848405320000022
wherein λ i 、θ i 、ρ i 、σ N 、μ i Is the split coefficient;
average output current requirement considering load RCorrected value I ave Comprises the following steps:
Figure BDA0003848405320000023
wherein T is the input square wave current period, C eq Is the capacitor C in FIG. 1 B1 To C BN The series equivalent capacitor of (A), E is output voltage of a Cockcroft-Walton voltage doubling rectifying circuit, and C is a filter capacitor;
use of I ave The corrected average output current is:
Figure BDA0003848405320000031
in which I A ' average output current of corrected positive half-cycle, I A "is the corrected average output current of the negative half period; the output voltage E obtained from the corrected average output current is:
Figure BDA0003848405320000032
the voltage ripple Δ E is:
Figure BDA0003848405320000033
the invention relates to an optimization method of a Cockcroft-Walton voltage doubling rectifying circuit, which is characterized in that when a series resonant circuit is used as an input current source of the voltage doubling rectifying circuit in an actual circuit, the average value of resonant frequencies of different modes of positive and negative half periods is used as the integral resonant frequency of the voltage doubling rectifying circuit to select a resonant cavity capacitor C rr
The invention relates to a Cockcroft-Walton voltage doubling rectifying circuit optimization method, wherein a particle swarm algorithm initializes particle swarm parameters according to circuit hardware limitation, sets algorithm iteration times, particle swarm scale, inertia weight coefficient, learning factor and particle variation probability, and finally outputs the output voltage ripple size and CoTotal capacity value of ckcroft-Walton voltage doubling rectifying circuit
Figure BDA0003848405320000034
Obtaining the capacitance C as the objective function of the particle swarm algorithm Ai (1≤i≤N)、C Bi (i is more than or equal to 1 and less than or equal to N) capacity value.
Compared with the existing design method, the method has the remarkable advantages that:
a mathematical model for accurately calculating the output voltage and the voltage ripple of the current type Cockcroft-Walton voltage doubling rectifying circuit is provided; it provides a series resonant circuit resonant capacitor C as the input current source of the voltage doubling rectifying circuit rr Selecting a capacity value; optimizing the capacitance value of a voltage doubling rectifying circuit capacitor by using a particle swarm algorithm; compared with two traditional capacitance value design methods, the capacitance value optimization design method provided by the invention has the advantages that under the condition that the total capacitance values of the voltage-multiplying rectification circuits are the same, the output voltage ripples are respectively reduced by 47% and 35%.
(IV) description of the drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a Cockcroft-Walton voltage doubling rectifier circuit according to the present invention, wherein C is Ai (i is more than or equal to 1 and less than or equal to N) is a side capacitance of A of the voltage doubling rectifying circuit, C Bi (i is more than or equal to 1 and less than or equal to N) is a side capacitance of a voltage-multiplying rectification circuit B, D di (i is more than or equal to 1 and less than or equal to N) is a forward rectifier diode, D si (I is more than or equal to 1 and less than or equal to N) is a reverse rectifier diode, C is an output filter capacitor, R is a resistance load, I is a The amplitude of the input square wave current is obtained.
FIG. 2 is a schematic diagram of equivalent circuits of different working modes of a Cockcroft-Walton voltage-doubling rectifying circuit according to the present invention, wherein C is eq1 Is a capacitor C B1 To C BN Series equivalent capacitance of C eq2 Is a capacitor C B(i+1) To C BN Series equivalent capacitance of C eq3 Is a capacitor C B1 To C Bi Series equivalent capacitance of C eq4 Is a capacitor C A(i+1) To C AN The series equivalent capacitance of (2). C eq5 Is a capacitor C B1 To C B(N-1) Equivalent capacitance in series, C eq6 Is a capacitor C Bi To a capacitor C B(N-1) Series equivalent capacitance of C eq7 Is a capacitor C B1 To a capacitor C B(i-1) Series equivalent capacitance of (C) eq8 Is a capacitor C A(i+1) To a capacitance C AN The series equivalent capacitance of (2).
FIG. 3 is a schematic diagram of an equivalent circuit of a Cockcroft-Walton voltage doubling rectifier circuit for calculating an output current correction value considering a resistive load R according to the present invention, wherein C is eq Is a capacitor C B1 To C BN The equivalent capacitance in series.
FIG. 4 is a schematic diagram of an equivalent model of a Cockcroft-Walton voltage-doubling rectifying circuit according to the present invention.
Fig. 5 is an embodiment of the present invention, which generates a square wave voltage through a full bridge configuration and inputs the square wave voltage to a series resonant circuit, and the series resonant circuit generates a sinusoidal current as an input of a Cockcroft-Walton voltage doubling rectifying circuit.
FIG. 6 is a diagram of selecting a capacitor C by using the method for selecting a resonant capacitor according to the present invention rr Graph of time-resonant inductor current versus ideal sinusoidal current.
Fig. 7 is an optimal boundary diagram of capacitance pareto of the Cockcroft-Walton voltage-multiplying rectifier circuit according to the embodiment of the present invention.
Fig. 8 shows the actual output voltage ripple according to the embodiment of the present invention.
Fig. 9 shows the actual output voltage ripple of comparative example 1 of the present invention.
Fig. 10 shows the actual output voltage ripple of comparative example 2 of the present invention.
Fig. 11 shows two operating modes of the N =2 positive half-cycle voltage-doubler rectifier circuit.
(V) detailed description of the preferred embodiments
The present invention will be further described with reference to the following drawings and detailed description, it being understood that the examples described herein are illustrative and explanatory only and are not restrictive of the invention.
The first embodiment is as follows: as shown in fig. 1 to 5, the method for optimally designing a Cockcroft-Walton voltage-doubling rectifier circuit according to this embodiment specifically includes:
establishing a model for accurately calculating output voltage and voltage ripple of a Cockcroft-Walton voltage-multiplying rectification circuit;
average output current I of positive half cycle of Cockcroft-Walton voltage doubling rectifying circuit without considering resistance load R a ' is:
Figure BDA0003848405320000041
in which I a Inputting square wave current amplitude for a Cockcroft-Walton voltage doubling rectifying circuit, wherein N is the number of stages of the voltage doubling rectifying circuit, and k is 1 、α i 、β i 、γ i 、δ i Is the split coefficient;
average output current I of negative half period of Cockcroft-Walton voltage doubling rectifying circuit without considering resistance load R a "is:
Figure BDA0003848405320000051
wherein λ is i 、θ i 、ρ i 、σ N 、μ i Is the split coefficient;
value I of the average output current to be corrected taking into account the load R ave Comprises the following steps:
Figure BDA0003848405320000052
wherein T is the input square wave current period, C eq Is a capacitor C B1 To C BN The equivalent capacitance in series connection, E is the output voltage of the Cockcroft-Walton voltage doubling rectifying circuit;
use of I ave The corrected average output current is:
Figure BDA0003848405320000053
in which I A ' average output current of corrected positive half cycle, I A "is the corrected average output current of the negative half period;
as a calculation model proposed by the present invention, an output voltage E obtained from the corrected average output current is:
Figure BDA0003848405320000054
the voltage ripple Δ E is:
Figure BDA0003848405320000055
the computational model is the basis for subsequent optimization.
Since the square wave current used in the above analysis is difficult to obtain by an actual circuit, the circuit shown in fig. 5 is obtained without using a series resonant circuit as a sinusoidal current source instead of the square wave current source in fig. 1; wherein L is r Is a resonant inductor, C rr Is a resonant capacitor;
according to the fundamental wave approximation method, the sinusoidal current source having the same effect as the square wave current source has the relationship shown in the formula (7) in amplitude
Figure BDA0003848405320000056
In which I a Is a square wave current amplitude, I p Is a sine wave current amplitude;
resonance capacitor C of conventional resonance circuit rr The capacitance value can be directly calculated. The Cockcroft-Walton voltage doubling rectifying circuit is complex in structure and mode, and the capacitance of the Cockcroft-Walton voltage doubling rectifying circuit participating in resonance divides C rr In addition to other capacitors, C rr The capacitance value is difficult to calculate, and the resonant capacitor C is described below by taking a Cockcroft-Walton voltage doubling rectifying circuit with N =2 as an example rr The selection method of (1);
fig. 11 shows two operating modes of the N =2 positive half-cycle voltage doubler rectifier circuit, and it can be found that the resonant frequencies of the mode 1 and the mode 2 are respectively
Figure BDA0003848405320000061
Figure BDA0003848405320000062
Taking the average resonant frequency of the mode 1 and the mode 2 as the resonant frequency omega of the positive half period of the voltage-doubling rectifying circuit r1 Similarly available negative half-cycle resonant frequency ω r2 Then, the average value of the positive and negative half-period resonant frequency is used as the full-period resonant frequency omega r
Figure BDA0003848405320000063
According to the quasi-resonance state, the resonance frequency is equal to the switching frequency
Figure BDA0003848405320000064
Wherein f is s For the switching frequency, the resonant capacitor C can be obtained by solving the equations (8) to (11) by numerical values rr And (4) capacity value.
Determining a resonant capacitance C rr After the capacity value, the voltage ripple can be calculated by the formulas (5) to (7). Determining C by using particle swarm optimization algorithm according to the size of voltage ripple Ai (1≤i≤N)、C Bi (i is more than or equal to 1 and less than or equal to N) capacitance value;
definition C tot Is a Cockcroft-Walton voltage doubling rectifying circuit C Ai 、C Bi Sum of capacitance values of capacitors
Figure BDA0003848405320000065
Due to C Ai 、C Bi The capacitance value has limited influence on the gain of the output voltage onlyUsing output voltage ripple magnitude delta E and C tot The capacity value is two objective functions to reduce the complexity of the algorithm. For the initialization parameters of the particle swarm algorithm, in order to reduce the resonance capacitance C rr The selection error and the switching loss are set, and the switching frequency range is about 50 kHz-100 kHz; c Ai 、C Bi The capacity value range is set to be 2-20 mu F so as to consider the cost and the current capacity; the filter capacitor C can be an electrolytic capacitor with a slightly larger capacitance value so as to further reduce voltage ripples; the number of stages N of the voltage doubler rectifier circuit can be estimated approximately using the output gain equation (13) without considering the voltage drop
E=2NV in (19)
After the initialization of the parameters is completed, uniformly distributed particles of population-scale quantity are generated, the size of the objective function value is calculated for each particle one by one, and each particle is updated according to the size of the objective function value by using the speed and position formulas shown in (14) and (15)
v k+1 =wv k +c 1 rand 1 (PBset k -x k )+c 2 rand 2 (gBset k -x k ) (20)
x k+1 =x k +v k (21)
Wherein v is a velocity vector; x is a position vector; w is an inertial weight factor used to adjust the search range for the solution space; c. C 1 、c 2 Is an individual learning factor and a social learning factor and is used for adjusting the learning step length; rand 1 And rand 2 Two random functions are adopted to increase the randomness of the search; pbest is the historical best vector and gbest is the global best vector.
And (3) applying a variation strategy to enable the particles to vary and update the speed and the position information with a certain probability, so as to prevent the particle swarm from falling into local optimum. After the maximum iteration times of iteration are completed, the capacitor C can be obtained Ai 、C Bi Pareto optimal boundary map of (a).
The second embodiment: the method for optimally designing the Cockcroft-Walton voltage-multiplying rectification circuit related by the embodiment specifically comprises the following steps of:
FIG. 1 shows a Cockcroft-Walton voltage doubler rectifier circuit. For ease of analysis, the following assumptions were made:
1. the diode is an ideal device and has no threshold voltage, leakage current and reverse recovery characteristics;
2. the diode has no parallel buffer circuit;
3. the capacitance is an ideal device, regardless of its series equivalent resistance.
According to equivalent circuits of different working modes of the Cockcroft-Walton voltage-multiplying rectification circuit shown in the figure 2, the equivalent impedance of capacitors with different capacitance values is considered, and then the current of each branch of the equivalent circuit under each mode can be obtained.
1. Positive half cycle diode D dN Is independently conducted
Branch 1 has a current of
Figure BDA0003848405320000071
Branch 2 has a current of
Figure BDA0003848405320000072
2. Positive half cycle diode D dN And D di (i is more than or equal to 1 and less than or equal to N-1) are conducted simultaneously
Current of branch 1 is
Figure BDA0003848405320000073
Current of branch 2 is
Figure BDA0003848405320000081
Current of branch 3 is
Figure BDA0003848405320000082
Current of branch 4 is
Figure BDA0003848405320000083
3. Positive half cycle diode D di (1 ≦ i ≦ N-1) single conduction
Branch 1 has a current of
Figure BDA0003848405320000084
Branch 2 has a current of
Figure BDA0003848405320000085
4. Negative half-cycle diode D sN Is independently conducted
Branch 1 has a current of
Figure BDA0003848405320000086
Branch 2 has a current of
Figure BDA0003848405320000087
5. Negative half-cycle diode D sN And D si Are simultaneously conducted
Branch 1 has a current of
Figure BDA0003848405320000091
Wherein C is eq9 Is C BN And a series equivalent capacitor of the output filter capacitor C.
Current of branch 2 is
Figure BDA0003848405320000092
Current of branch 3 is
Figure BDA0003848405320000093
Current of branch 4 is
Figure BDA0003848405320000094
6. Negative half-cycle diode D s1 Is independently conducted
Obviously, the current of branch 1 is I a
Since the charges of the half cycles passing through different diodes are equal, the on-time of the diode can be obtained by knowing the current flowing through the diode. The current flowing to the filter capacitor C from the Cockcroft-Walton rectification network is called as output current, and the average value of the output current of the positive half period and the output current of the negative half period are respectively obtained. Obtaining the average value I of the output current of the positive half period and the negative half period a '、I a The formulae are shown in the formulas (1) and (2).
Calculating I a ' and I a "load R is not considered, in fact resistive load R affects the current distribution and thus I a ' and I a "size of the composition. Observing fig. 1, it can be seen that C is the conduction state of the diode, regardless Bi (i is more than or equal to 1 and less than or equal to N) and the filter capacitor C and the resistance load R form a closed loop shown in the figure 3.
The average value of the capacitor discharge current of the branch 1 in the figure 3 is easily obtained as the formula (3), and the current is used for compensating I a ' and I a "then, the current source equivalent model of the circuit is shown in fig. 4. The output voltage E obtained by the current source equivalent model is as follows:
Figure BDA0003848405320000095
the voltage ripple Δ E is:
Figure BDA0003848405320000101
example three: in the actual circuit shown in fig. 5, the full bridge circuit generates a square wave voltage with a frequency of 80KHz, a duty ratio of 49.5% and an amplitude of 48V as an input of the series resonant circuit and the Cockcroft-Walton voltage doubling rectifying circuit.
The particle swarm algorithm parameters and the circuit parameters are set as follows: c when the number of stages N is small Ai 、C Bi The capacitance value has limited influence on the gain of the output voltage, and the algorithm complexity can be reduced only by using two objective functions of the output voltage ripple and the total capacitance value of the voltage-multiplying rectifying circuit; the switching frequency is selected to be 80KHz to reduce the resonant capacitance C rr Selecting an error; c Ai 、C Bi The capacity value range is set to be 1-10 mu F so as to consider the cost and the current capacity; in order to facilitate observation and comparison of output voltage ripples, the capacitance value of the filter capacitor C is selected to be 3.9 muF; the number N of the stages of the voltage-multiplying rectifying circuit is selected to be 4 from the requirement of the output voltage above 311V according to the formula (13); the load resistance is determined by the output power, taking R =100 Ω as an example, the population scale is generally selected to be 20-40, the iteration number empirical value is 30, and the population scale is set to be 60 and the iteration number is set to be 50 to ensure the solving effect. At this time, C Ai 、C Bi The pareto optimal boundaries for the volumetric values are shown in fig. 7.
Comprehensively considering the magnitude of voltage ripple and the total capacitance value C of the voltage doubling rectifying circuit from the pareto optimal boundary diagram tot Selection of C A1 =C A2 =C A3 =C A4 =C B4 =1μF、C B1 =5μF、C B2 =10μF、C B3 Optimal solution of =3.9 μ F. Due to the smaller C Ai The capacitance value of the capacitor and the resonance inductance need to be selected to be slightly larger, and is taken as 15 muH. According to the selection method provided by the invention, the resonant capacitor C rr =800nF. In order to facilitate the oscilloscope to observe the voltage ripple size, the filter capacitor C =3.9 μ F, and at this time, the actual output voltage ripple of the embodiment is as shown in fig. 8.
Comparative example 1
Comparative example 1 Using a conventionalC Ai 、C Bi The capacity value being selected by C Ai 、C Bi The capacity values are the same. Since in example C tot =23.9 μ F, C to ensure example is similar to comparative example tot Capacitance value, comparative example 1 selects C according to actual capacitance value Ai =C Bi =3.3 μ F, then C tot =26.4 μ F slightly larger than the examples. Resonant capacitor C rr The capacitance was 330nF according to the proposed selection method, and the remaining parameters were the same as in the example. The actual output voltage ripple of this comparative example is shown in fig. 9.
Comparative example 2
Comparative example 2 use of the document Optimal design of a half-wave Cockcroft-wave voltage multiplexer with minimum total capacitance C Ai 、C Bi Method for selecting capacity value, i.e. C Ai =C Bi =(N+1-i)C AN . According to C tot Selecting C according to the principle of capacitance value approximation and combining the actual capacitance value of the capacitor A1 =C B1 =1.2μF、C A2 =C B2 =2.7μF、C A3 =C B3 =3.3μF、C A4 =C B4 =5 μ F, then C tot =24.4 μ F slightly larger than in the examples. Resonant capacitor C rr The capacitance was chosen as 430nF according to the proposed method of the invention, and the remaining parameters were the same as in the example. The actual output voltage ripple of this comparative example is shown in fig. 10.
From fig. 8 to 10, it can be seen that the peak-to-peak voltage ripple Δ E of comparative example 1 is 4.44V, the peak-to-peak voltage ripple Δ E of comparative example 2 is 3.64V, and the minimum peak-to-peak voltage ripple Δ E of the example is 2.36V. In the embodiment, the voltage ripple is reduced by 47% compared with comparative example 1 and is reduced by 35% compared with comparative example 2, and the actually optimized capacitor has a good suppression effect on the voltage ripple, so that the superiority of the proposed capacitor optimization method is fully demonstrated.
While the invention has been described with reference to specific preferred embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but is intended to cover various modifications and alternative embodiments, which may be apparent to those skilled in the art, within the spirit and scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (4)

1. The method for optimizing the Cockcroft-Walton voltage-multiplying rectifier circuit is characterized by comprising the following steps of: and calculating the output voltage and the voltage ripple of the Cockcroft-Walton voltage doubling rectifying circuit by using an average output current model, and optimizing the capacitance value of the Cockcroft-Walton voltage doubling rectifying circuit by using a particle swarm algorithm based on the calculation result of the average output current model.
2. The method for optimizing the Cockcroft-Walton voltage doubling rectifier circuit according to claim 1, wherein the calculating the output voltage and the voltage ripple of the Cockcroft-Walton voltage doubling rectifier circuit by using the average output current model specifically comprises:
establishing a model for accurately calculating output voltage and voltage ripple of a Cockcroft-Walton voltage doubling rectifying circuit:
average output current I of positive half cycle of Cockcroft-Walton voltage-multiplying rectifying circuit without considering resistance load R a ' is:
Figure FDA0003848405310000011
wherein I a Inputting square wave current amplitude for a Cockcroft-Walton voltage doubling rectifying circuit, wherein N is the number of stages of the voltage doubling rectifying circuit, and k is 1 、α i 、β i 、γ i 、δ i Is the split coefficient;
average output current I of negative half period of Cockcroft-Walton voltage-multiplying rectifying circuit without considering resistance load R a "is:
Figure FDA0003848405310000012
wherein λ is i 、θ i 、ρ i 、σ N 、μ i Is the split coefficient;
value I of the average output current to be corrected taking into account the load R ave Comprises the following steps:
Figure FDA0003848405310000013
where T is the input square wave current period, C eq Is the capacitor C in FIG. 1 B1 To C BN The series equivalent capacitor of (A), E is output voltage of a Cockcroft-Walton voltage doubling rectifying circuit, and C is a filter capacitor;
use of I ave The corrected average output current is:
Figure FDA0003848405310000014
in which I A ' average output current of corrected positive half-cycle, I A "is the corrected average output current of the negative half period;
the output voltage E obtained from the corrected average output current is:
Figure FDA0003848405310000015
the voltage ripple Δ E is:
Figure FDA0003848405310000021
3. the method for optimizing the Cockcroft-Walton voltage doubling rectifier circuit according to claim 1, wherein when the series resonant circuit is used as the input current source of the voltage doubling rectifier circuit in the actual circuit, the average value of the resonant frequencies of different modes in the positive and negative half periods is used as the integral resonant frequency of the voltage doubling rectifier circuit to select the resonant cavity capacitor C rr (see the specification for a specific method).
4. The method for optimizing the Cockcroft-Walton voltage-multiplying rectifier circuit according to claim 1, wherein the particle swarm algorithm initializes the parameters of the particle swarm according to the hardware limitation of the circuit, sets the iteration times, the particle swarm size, the inertia weight coefficient, the learning factor and the particle variation probability of the algorithm, and finally obtains the ripple magnitude of the output voltage and the total capacitance value of the Cockcroft-Walton voltage-multiplying rectifier circuit
Figure FDA0003848405310000022
Obtaining capacitance C as a particle swarm algorithm objective function Ai (1≤i≤N)、C Bi (i is more than or equal to 1 and less than or equal to N) capacity value.
CN202211126269.5A 2022-09-16 2022-09-16 Cockcroft-Walton voltage doubling rectifying circuit optimization design method Pending CN115549497A (en)

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