CN115548180A - Low-current Micro-LED chip epitaxial structure, preparation method thereof and Micro-LED chip - Google Patents
Low-current Micro-LED chip epitaxial structure, preparation method thereof and Micro-LED chip Download PDFInfo
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Abstract
The invention discloses a low-current Micro-LED chip epitaxial structure, a preparation method thereof and a Micro-LED chip, and relates to the field of semiconductor photoelectric devices. The low-current Micro-LED chip epitaxial structure comprises a substrate, and a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially grown on the substrate; the active layer is of a periodic structure, and each period comprises an InGaN potential well layer and a GaN potential barrier layer which are sequentially stacked; the periodicity of the active layer is more than or equal to 2; an AlGaN layer is interposed between at least one GaN barrier layer. By implementing the invention, the recombination of electron holes can be improved, and the luminous efficiency can be improved.
Description
Technical Field
The invention relates to the field of semiconductor photoelectric devices, in particular to a low-current Micro-LED chip epitaxial structure, a preparation method thereof and a Micro-LED chip.
Background
With the vigorous development of emerging wearable and portable technologies, micron-sized LED chips (Micro-LEDs) have gained great attention and research in research institutions and enterprises due to their application prospects in the fields of display, visible light communication, biomedicine, and the like. Moreover, micro-LEDs exhibit excellent properties such as nanosecond (ns) -level high-speed response, stability of inorganic materials, high light efficiency, high reliability, high color purity and contrast, transparency, etc., and the combination of these properties is not achieved by Liquid Crystal Displays (LCDs) and Organic LEDs (OLEDs).
Although Micro-LEDs have many excellent characteristics, they also face challenges in terms of fabrication techniques and material device physics. If the problems of reduction of the peak EQE of the device and increase of the corresponding current density along with the reduction of the chip size are not completely solved, the working current density is between 0.01 and 0.5A/cm 2 The efficiency of the Micro-LED in the interval is still obviously insufficient. In fact, even with conventional-sized chips for general illumination and backlit display applications, the efficiency at this current density is relatively low because the conventional-sized chips operate at a current density of 20A/cm for efficiency and cost reasons 2 To 40A/cm 2 Meanwhile, the corresponding epitaxial structure design and material growth aim at improving the efficiency under high current density, and the peak value EQE is usually between 1 and 4A/cm 2 Current density interval without concern for device efficiency at low current density. Under different current densities, the leading causes of the light-emitting mechanism of the LED device are different, and the corresponding epitaxial layer structure should be changed. For example, 0.01-0.5A/cm in the operating range of Micro-LED 2 Under low current density, the carrier concentration in the quantum well is relatively low, the Auger recombination ratio is less, the recombination volume of the corresponding quantum well can be reduced, namely the number of the quantum wells can be reduced, the defect number can be reduced, and the EQE of the device under low current density can be improved; meanwhile, under low current density, electron leakage does not occur or the proportion is very low, and the electron blocking layer structure has no electron blocking effect but can block electronsBlocking the injection of holes reduces the quantum efficiency of the device. Therefore, the LED designed by the traditional epitaxial structure can not meet the application requirements of the Micro-LED.
Disclosure of Invention
The invention aims to provide a low-current Micro-LED chip epitaxial wafer which has high luminous efficiency under low working current.
The invention also aims to solve the technical problem of providing a Micro-LED chip which is small in size, low in working current density and high in luminous efficiency.
In order to solve the problems, the invention discloses a low-current Micro-LED chip epitaxial structure which comprises a substrate, and a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially grown on the substrate; the active layer is of a periodic structure, and each period comprises an InGaN potential well layer and a GaN potential barrier layer which are sequentially stacked; the periodicity of the active layer is more than or equal to 2;
wherein, an AlGaN layer is inserted in at least one GaN barrier layer.
As an improvement of the technical scheme, alGaN layers are inserted into a plurality of GaN barrier layers close to the P-type semiconductor layer, and the content of Al components in the plurality of AlGaN layers is in a descending trend along the growth direction of the epitaxial wafer.
As an improvement of the technical scheme, the number of the periods of the active layer is 3-8.
As an improvement of the technical scheme, alGaN layers are inserted into 2-4 periods of GaN barrier layers close to the P-type semiconductor layer, and the Al component content of the AlGaN layers is in a descending trend along the growth direction of an epitaxial wafer.
As an improvement of the technical scheme, the In component content of the InGaN well layers is In a trend of decreasing gradually and then increasing gradually along the growth direction of the epitaxial wafer.
As an improvement of the technical scheme, the In component content of the InGaN well layer is 0.1-0.4, and the Al component content of the AlGaN layer is 0.1-0.8.
As an improvement of the technical scheme, the thickness of the AlGaN layer is 0.1nm-20nm, the thickness of the InGaN potential well layer is 1nm-10nm, and the thickness of the GaN barrier layer is 3nm-40nm.
As an improvement of the technical scheme, the N-type semiconductor layer is N-type Al x Ga 1-x N layer with doping concentration of 1 × 10 18 cm -3 -1×10 20 cm -3 The thickness is 0.1-6 μm;
the P-type semiconductor layer is P-type Al y Ga z In 1-y-z N layer with doping concentration of 1 × 10 18 cm -3 -1×10 20 cm -3 The thickness is 0.1-2 μm;
wherein x is 0-0.6, y is 0-0.6, and z is 0-0.6.
Correspondingly, the invention also discloses a preparation method of the low-current Micro-LED chip epitaxial structure, which is used for preparing the low-current Micro-LED chip epitaxial structure and comprises the following steps:
providing a substrate, and growing a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate in sequence; the active layer is of a periodic structure, and each period comprises an InGaN potential well layer and a GaN potential barrier layer which are sequentially stacked; the periodicity of the active layer is more than or equal to 2; an AlGaN layer is interposed between at least one of the GaN barrier layers.
Correspondingly, the invention also discloses a low-current Micro-LED chip which comprises the low-current Micro-LED chip epitaxial structure.
The implementation of the invention has the following beneficial effects:
the Micro-LED chip epitaxial wafer comprises a substrate, and a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially grown on the substrate, wherein the active layer comprises a periodically laminated InGaN potential well layer and a GaN potential barrier layer. The epitaxial wafer of the invention is not provided with an electron blocking layer, and an AlGaN layer is inserted into at least one GaN barrier layer of an active layer. Based on the structure, electrons can be effectively limited in the active layer, the blocking effect of the high barrier region on holes can be fully weakened, the hole injection efficiency is improved, the electron hole matching degree is increased, and therefore the luminous efficiency of the Micro LED chip is improved.
Drawings
FIG. 1 is a schematic structural diagram of a low current Micro-LED chip epitaxial structure according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of an active layer according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for manufacturing an epitaxial structure of a low-current Micro-LED chip according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below.
Referring to fig. 1 and fig. 2, the invention discloses a low-current michor-LED chip epitaxial wafer, which comprises a substrate 1, a buffer layer 2, an N-type semiconductor layer 3, an active layer 4 and a P-type semiconductor layer 5, which are sequentially grown on the substrate 1. The active layer 4 has a periodic structure, each period includes an InGaN well layer 41 and a GaN barrier layer 42 stacked in sequence, and an AlGaN layer 43 is inserted in at least one GaN barrier layer 42. The epitaxial wafer structure is not provided with the electron blocking layer, so that the blocking effect of the epitaxial wafer structure on holes is reduced, the injection efficiency of the holes to the active layer 4 is improved, the recombination efficiency of the electron holes is improved, and the luminous efficiency is improved. Further, by inserting the AlGaN layer 43 into at least one GaN barrier layer 42 of the active layer 4, leakage of electrons in the active layer 4 can be reduced, electrons are prevented from entering the P-type semiconductor layer 5, and the amount of holes is reduced, thereby improving the light emitting efficiency. Based on the structure, the Micro-LED chip is enabled to be at 0.01A/cm 2 ～5A/cm 2 Has a relatively high luminous efficiency at a small current density.
Wherein the number of the periods of the active layer 4 is more than or equal to 2, specifically 2 to 10, preferably 3 to 8. The Micro-LED chip has relatively low carrier concentration in the active layer. Therefore, the number of periods of the active layer 4 is also relatively small.
The AlGaN layer 43 is interposed in the middle of the GaN barrier layer 42 to divide the GaN barrier layer 42 into two barrier sublayers 42a and 42b having the same thickness, but is not limited thereto. The number of AlGaN layers 43 may be one or more, and a plurality of AlGaN layers 43 are each interposed in different GaN barrier layers 42.
The AlGaN layer 43 is inserted at any one/multiple periods of the GaN barrier layer 42. Preferably, in one embodiment of the present invention, the number of AlGaN layers 43 is plural, which are inserted in the plural GaN barrier layers 42 adjacent to the P-type semiconductor layer 5. Based on the arrangement, the Micro-LED chip can play a role in blocking electrons, so that the Micro-LED chip can use relatively high driving current (0.5A/cm) 2 ～6A/cm 2 ) Thereby improving the light emitting efficiency. Furthermore, a plurality of AlGaN layers 43 are inserted into the plurality of GaN barrier layers 42 adjacent to the P-type semiconductor layer 5, and the Al composition content in the plurality of AlGaN layers 43 is gradually decreased along the epitaxial growth direction, specifically, gradually decreased from 0.6-0.8 to 0-0.1. The Al composition content in each AlGaN layer 43 tends to be constant or decreasing. It is further preferable that 1 AlGaN layer 43 is inserted into each of the 2 to 4 periods of the GaN barrier layer 42 adjacent to the P-type semiconductor layer 5, the Al composition content of the plurality of AlGaN layers 43 decreases in the growth direction of the epitaxial wafer, and the Al composition content in each AlGaN layer 43 is maintained constant.
The thickness of the single AlGaN layer 43 is 0.1nm to 20nm, and is illustratively 0.5nm, 2nm, 4nm, 5nm, 8nm, 11nm, 13nm, 15nm, 18nm, or 19.5nm, but is not limited thereto.
The thickness of the single GaN barrier layer 42 is 3nm to 40nm, and is illustratively 5nm, 10nm, 13nm, 18nm, 21nm, 27nm, 32nm, 38nm, 44nm, 48nm, or 49nm, but is not limited thereto. When the AlGaN layer 43 is inserted into the GaN barrier layer 42, the thicknesses of the barrier sublayers 42a and 42b obtained by division are the same, i.e., 1.5nm to 20nm.
The thickness of the single InGaN well layer 41 is 1nm to 10nm, and is exemplarily 2.5nm, 4nm, 5.5nm, 7nm, 8.5nm, or 9nm, but is not limited thereto. The In component content (molar ratio) In the single InGaN well layer 41 is 0.1 to 0.4, illustratively 0.14, 0.18, 0.22, 0.26, 0.3, 0.34, or 0.38, but is not limited thereto.
Specifically, the In content In each InGaN well layer 41 is the same, and the In content In the InGaN well layers 41 tends to decrease and then increase along the growth direction of the epitaxial wafer. Specifically, in one embodiment, the In content of the InGaN well layer 41 decreases from 0.35 to 0.4 to 0.1 to 0.2 In the first 2 to 4 periods, and increases from 0.1 to 0.2 to 0.35 to 0.4 In the last 4 to 6 periods, so that the light emitting efficiency can be further improved based on the above arrangement.
Specifically, the structure of the active layer 4 can be suitable for common GaN-based Micro-LED chips, namely the N-type semiconductor layer 3 is an N-GaN layer, and the P-type semiconductor layer 5 is a P-GaN layer; but not limited to, the chip is also applicable to AlGaN-based Micro-LED chips and AlGaInN-based Micro-LED chips.
Preferably, in an embodiment of the present invention, the N-type semiconductor layer is N-type Al x Ga 1-x N layer (x = 0-0.6) with a doping concentration of 1 × 10 18 cm -3 -1×10 20 cm -3 The thickness is 0.1-6 μm. The P-type semiconductor layer 5 is P-type Al y Ga z In 1-y- z N layers (y =0-0.6, z = 0-0.6) having a doping concentration of 1 × 10 18 cm -3 -1×10 20 cm -3 The thickness is 0.1-2 μm.
The substrate 1 may be a sapphire substrate, a silicon substrate, or a silicon carbide substrate, but is not limited thereto.
The buffer layer 2 may be, but not limited to, an AlN layer or an AlGaN layer. The buffer layer 2 has a thickness of 10nm to 80nm, and illustratively 14nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, or 75nm, but is not limited thereto.
In one embodiment of the present invention, an intrinsic semiconductor layer is further disposed between the buffer layer 2 and the N-type semiconductor layer 3. Specifically, when the Micro-LED chip is a GaN-based chip, the Micro-LED chip is a U-GaN layer; when the Micro-LED chip is an AlGaN-based chip, it is a U-AlGaN layer, but is not limited thereto. The thickness of the intrinsic semiconductor layer may be 0.5 to 5 μm.
Correspondingly, referring to fig. 3, the invention also discloses a preparation method of the low-current Micro-LED chip, which comprises the following steps:
s1: providing an epitaxial wafer;
specifically, the substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate, but is not limited thereto. Preferably a patterned sapphire substrate.
S2: growing a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer on a substrate in sequence;
specifically, S2 includes:
s21: growing a buffer layer on a substrate;
specifically, an AlN layer can be grown through PVD to be used as a buffer layer; or an AlGaN layer may be grown as a buffer layer by MOCVD, but is not limited thereto. When the AlGaN layer is grown by MOCVD, the growth temperature is 500-700 ℃, and the growth pressure is 100-500torr.
S22: growing an N-type semiconductor layer on the buffer layer;
wherein, in one embodiment of the present invention, the N-type semiconductor layer is grown in MOCVD. The growth temperature is 1000-1200 deg.C, and the growth pressure is 100-400 torr.
S23: growing an active layer on the N-type semiconductor layer;
specifically, S23 includes:
s231: growing an InGaN potential well layer;
in one embodiment of the present invention, among others, an InGaN well layer is grown in MOCVD. The growth temperature is 700-800 deg.c and the growth pressure is 100-500torr.
S232: growing a GaN barrier layer;
wherein, in one embodiment of the present invention, a GaN barrier layer is grown in MOCVD. The growth temperature is 800-900 deg.C, and the growth pressure is 100-500torr.
Preferably, in one embodiment of the present invention, the AlGaN layer is grown at a growth temperature of 900 ℃ to 1000 ℃ and a growth pressure of 100torr to 500torr during the growth of the GaN barrier layer.
S233: steps S231 and S232 are periodically repeated until an active layer is obtained.
S24: growing a P-type semiconductor layer on the active layer;
in one embodiment of the invention, the P-type GaN layer is grown in MOCVD at a growth temperature of 800-1000 ℃ and a growth pressure of 100-500torr.
The invention is further illustrated by the following specific examples:
example 1
The embodiment provides a low-current Micro-LED chip epitaxial structure, which, referring to fig. 1 and fig. 2, includes a substrate 1, and a buffer layer 2, an N-type semiconductor layer 3, an active layer 4, and a P-type semiconductor layer 5 sequentially grown on the substrate 1. The active layer 4 is a periodic structure, and the period number is 8. Each period comprises an InGaN well layer 41 and a GaN barrier layer 42 which are sequentially stacked; an AlGaN layer 43 is interposed between the GaN barrier layer 42 of the 3 rd cycle.
Wherein the thickness of the single InGaN well layer 41 is 3nm, the In component content is 0.25, and the In component contents In the plurality of InGaN well layers 41 are all the same. The thickness of the single GaN barrier layer 42 was 10nm, the thickness of the single AlGaN layer 43 was 5nm, and the al component content was 0.6.
Wherein the substrate 1 is a sapphire substrate. The buffer layer 2 is an AlN layer with a thickness of 25nm, the N-type semiconductor layer 3 is N-type Al x Ga 1-x N layer (x = 0.3) doped with Si at a doping concentration of 5 × 10 19 cm -3 The thickness was 3.5. Mu.m. The P-type semiconductor layer 5 is P-type Al y Ga z In 1-y-z N layer with Mg as doping element and doping concentration of 8 × 10 18 cm -3 The thickness was 0.8. Mu.m.
The preparation method of the light emitting diode epitaxial wafer in the embodiment includes the following steps:
(1) Providing a substrate;
(2) Growing a buffer layer on a substrate;
specifically, an AlN layer is deposited by PVD as a buffer layer.
(3) Growing an N-type semiconductor layer on the buffer layer;
specifically, N-type Al is grown in MOCVD x Ga 1-x And the N layer is used as an N-type semiconductor layer. The growth temperature is 1100 ℃ and the growth pressure is 220torr.
(4) Growing an InGaN potential well layer on the substrate obtained in the step (3);
specifically, an InGaN well layer is grown in MOCVD. The growth temperature is 720 ℃ and the growth pressure is 300torr.
(5) Growing a GaN barrier layer on the InGaN potential well layer;
specifically, a GaN barrier layer is grown in MOCVD. The growth temperature was 880 ℃ and the growth pressure was 300torr.
(6) Periodically repeating the step (4) and the step (5) until an active layer is obtained;
and growing the AlGaN layer at 920 ℃ and 350torr in the growth process of the GaN barrier layer in the 3 rd period.
(7) Growing a P-type semiconductor layer on the active layer;
specifically, P-type Al is grown in MOCVD y Ga z In 1-y-z And the N layer is used as a P-type semiconductor layer, the growth temperature is 350 ℃, and the growth pressure is 300torr.
Example 2
The embodiment provides a low-current Micro-LED chip epitaxial structure, which, referring to fig. 1 and fig. 2, includes a substrate 1, and a buffer layer 2, an N-type semiconductor layer 3, an active layer 4, and a P-type semiconductor layer 5 sequentially grown on the substrate 1. The active layer 4 is a periodic structure, and the period number is 8. Each period comprises an InGaN well layer 41 and a GaN barrier layer 42 which are sequentially stacked; an AlGaN layer 43 is interposed between the GaN barrier layers 42 of the 5 th to 8 th periods.
Wherein the thickness of the single InGaN well layer 41 is 3nm, the In component content is 0.25, and the In component contents In the plurality of InGaN well layers 41 are all the same. The thickness of the single GaN barrier layer 42 is 10nm, the thickness of the single AlGaN layer 43 is 5nm, the Al component content is 0.4, and the Al component contents of the plurality of AlGaN layers 43 are all the same.
Wherein the substrate 1 is a sapphire substrate. The buffer layer 2 is AlN layer with thickness of 25nm, and the N-type semiconductor layer 3 is N-type Al x Ga 1-x N layer (x = 0.3) doped with Si at a doping concentration of 5 × 10 19 cm -3 The thickness was 3.5. Mu.m. The P-type semiconductor layer 5 is P-type Al y Ga z In 1-y-z N layer with Mg as doping element and doping concentration of 8 × 10 18 cm -3 The thickness was 0.8. Mu.m.
The preparation method of the light emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) Providing a substrate;
(2) Growing a buffer layer on a substrate;
specifically, an AlN layer is deposited by PVD as a buffer layer.
(3) Growing an N-type semiconductor layer on the buffer layer;
specifically, N-type Al is grown in MOCVD x Ga 1-x And an N layer as an N-type semiconductor layer. The growth temperature is 1100 ℃ and the growth pressure is 220torr.
(4) Growing an InGaN potential well layer on the substrate obtained in the step (3);
specifically, an InGaN well layer is grown in MOCVD. The growth temperature was 720 ℃ and the growth pressure was 300torr.
(5) Growing a GaN barrier layer on the InGaN potential well layer;
specifically, a GaN barrier layer is grown in MOCVD. The growth temperature was 880 ℃ and the growth pressure was 300torr.
(6) Periodically repeating the step (4) and the step (5) until an active layer is obtained;
wherein, in the growth process of the GaN barrier layer of the 5 th to 8 th periods, an AlGaN layer grows at the growth temperature of 920 ℃ and the growth pressure of 350torr.
(7) Growing a P-type semiconductor layer on the active layer;
specifically, P-type Al is grown in MOCVD y Ga z In 1-y-z And the N layer is used as a P-type semiconductor layer, the growth temperature is 350 ℃, and the growth pressure is 300torr.
Example 3
The embodiment provides a low-current Micro-LED chip epitaxial structure, referring to fig. 1 and fig. 2, which includes a substrate 1, and a buffer layer 2, an N-type semiconductor layer 3, an active layer 4, and a P-type semiconductor layer 5 sequentially grown on the substrate 1. The active layer 4 is a periodic structure, and the period number is 8. Each period comprises an InGaN well layer 41 and a GaN barrier layer 42 which are sequentially stacked; an AlGaN layer 43 is interposed between the GaN barrier layers 42 of the 5 th to 8 th periods.
Wherein the thickness of the single InGaN well layer 41 is 3nm, the In component content is 0.25, and the In component contents In the plurality of InGaN well layers 41 are all the same. The thickness of the single GaN barrier layer 42 is 10nm, the thickness of the single AlGaN layer 43 is 5nm, and the Al composition content of the plurality of AlGaN layers 43 is reduced from 0.6 to 0. That is, in the 5 th period, the content of the Al component of the AlGaN layer 43 is 0.6, in the 6 th period, the content of the Al component of the AlGaN layer 43 is 0.4, in the 7 th period, the content of the Al component of the AlGaN layer 43 is 0.2, and in the 8 th period, the content of the Al component of the AlGaN layer 43 is 0.
Wherein the substrate 1 is a sapphire substrate. The buffer layer 2 is an AlN layer with a thickness of 25nm, the N-type semiconductor layer 3 is N-type Al x Ga 1-x N layer (x = 0.3) doped with Si at a doping concentration of 5 × 10 19 cm -3 The thickness was 3.5. Mu.m. The P-type semiconductor layer 5 is P-type Al y Ga z In 1-y-z N layer with Mg as doping element and doping concentration of 8 × 10 18 cm -3 The thickness was 0.8. Mu.m.
The preparation method of the light emitting diode epitaxial wafer in the embodiment includes the following steps:
(1) Providing a substrate;
(2) Growing a buffer layer on a substrate;
specifically, an AlN layer is deposited by PVD as a buffer layer.
(3) Growing an N-type semiconductor layer on the buffer layer;
specifically, N-type Al is grown in MOCVD x Ga 1-x And an N layer as an N-type semiconductor layer. The growth temperature was 1100 ℃ and the growth pressure was 220torr.
(4) Growing an InGaN potential well layer on the substrate obtained in the step (3);
specifically, an InGaN well layer is grown in MOCVD. The growth temperature was 720 ℃ and the growth pressure was 300torr.
(5) Growing a GaN barrier layer on the InGaN potential well layer;
specifically, a GaN barrier layer is grown in MOCVD. The growth temperature was 880 ℃ and the growth pressure was 300torr.
(6) Periodically repeating the step (4) and the step (5) until an active layer is obtained;
wherein, in the growth process of the GaN barrier layer of the 5 th to 8 th periods, an AlGaN layer grows at the growth temperature of 920 ℃ and the growth pressure of 350torr.
(7) Growing a P-type semiconductor layer on the active layer;
specifically, P-type Al is grown in MOCVD y Ga z In 1-y-z And the N layer is used as a P-type semiconductor layer, the growth temperature is 350 ℃, and the growth pressure is 300torr.
Example 4
The embodiment provides a low-current Micro-LED chip epitaxial structure, which, referring to fig. 1 and fig. 2, includes a substrate 1, and a buffer layer 2, an N-type semiconductor layer 3, an active layer 4, and a P-type semiconductor layer 5 sequentially grown on the substrate 1. The active layer 4 is a periodic structure, and the period number is 8. Each period comprises an InGaN well layer 41 and a GaN barrier layer 42 which are sequentially stacked; an AlGaN layer 43 is interposed between the GaN barrier layers 42 of the 5 th to 8 th periods.
Wherein, the thickness of a single InGaN well layer 41 is 3nm, the In component content In the InGaN well layers 41 decreases from 0.29 to 0.08, that is, in the 1 st to 8 th periods, the In component content In the InGaN well layer 41 is 0.29, 0.26, 0.23, 0.20, 0.17, 0.14, 0.11, 0.08 respectively. The thickness of the single GaN barrier layer 42 is 10nm, the thickness of the single AlGaN layer 43 is 5nm, and the Al composition content of the plurality of AlGaN layers 43 is reduced from 0.6 to 0. That is, in the 5 th period, the content of the Al component of the AlGaN layer 43 is 0.6, in the 6 th period, the content of the Al component of the AlGaN layer 43 is 0.4, in the 7 th period, the content of the Al component of the AlGaN layer 43 is 0.2, and in the 8 th period, the content of the Al component of the AlGaN layer 43 is 0.
Wherein the substrate 1 is a sapphire substrate. The buffer layer 2 is an AlN layer with a thickness of 25nm, the N-type semiconductor layer 3 is N-type Al x Ga 1-x N layer (x = 0.3) doped with Si at a doping concentration of 5 × 10 19 cm -3 The thickness was 3.5. Mu.m. The P-type semiconductor layer 5 is P-type Al y Ga z In 1-y-z N layer with Mg as doping element and doping concentration of 8 × 10 18 cm -3 The thickness was 0.8. Mu.m.
The preparation method of the light emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) Providing a substrate;
(2) Growing a buffer layer on a substrate;
specifically, an AlN layer is deposited by PVD as a buffer layer.
(3) Growing an N-type semiconductor layer on the buffer layer;
specifically, N-type Al is grown in MOCVD x Ga 1-x And an N layer as an N-type semiconductor layer. The growth temperature was 1100 ℃ and the growth pressure was 220torr.
(4) Growing an InGaN potential well layer on the substrate obtained in the step (3);
specifically, an InGaN well layer is grown in MOCVD. The growth temperature was 720 ℃ and the growth pressure was 300torr.
(5) Growing a GaN barrier layer on the InGaN well layer;
specifically, a GaN barrier layer is grown in MOCVD. The growth temperature was 880 ℃ and the growth pressure was 300torr.
(6) Periodically repeating the step (4) and the step (5) until an active layer is obtained;
wherein, in the growth process of the GaN barrier layer of the 5 th to 8 th periods, the AlGaN layer grows at the growth temperature of 920 ℃ and the growth pressure of 350torr.
(7) Growing a P-type semiconductor layer on the active layer;
specifically, P-type Al is grown in MOCVD y Ga z In 1-y-z And the N layer is used as a P-type semiconductor layer, the growth temperature is 350 ℃, and the growth pressure is 300torr.
Example 5
The embodiment provides a low-current Micro-LED chip epitaxial structure, referring to fig. 1 and fig. 2, which includes a substrate 1, and a buffer layer 2, an N-type semiconductor layer 3, an active layer 4, and a P-type semiconductor layer 5 sequentially grown on the substrate 1. The active layer 4 is a periodic structure, and the period number is 8. Each period comprises an InGaN well layer 41 and a GaN barrier layer 42 which are sequentially stacked; an AlGaN layer 43 is interposed between the GaN barrier layers 42 of the 5 th to 8 th periods.
Wherein, the thickness of a single InGaN well layer 41 is 3nm, the In component content In a plurality of InGaN well layers 41 is decreased from 0.29 to 0.08, and then is increased to 0.28; that is, in periods 1 to 8, the In component contents of the InGaN well layer 41 are 0.29, 0.22, 0.15, 0.08, 0.15, 0.55, and 0.29, respectively. The thickness of the single GaN barrier layer 42 is 10nm, the thickness of the single AlGaN layer 43 is 5nm, and the Al composition content of the plurality of AlGaN layers 43 is reduced from 0.6 to 0. That is, in the 5 th cycle, the content of the Al component of the AlGaN layer 43 is 0.6, in the 6 th cycle, the content of the Al component of the AlGaN layer 43 is 0.4, in the 7 th cycle, the content of the Al component of the AlGaN layer 43 is 0.2, and in the 8 th cycle, the content of the Al component of the AlGaN layer 43 is 0.
Wherein the substrate 1 is a sapphire substrate. The buffer layer 2 is an AlN layer with a thickness of 25nm, the N-type semiconductor layer 3 is N-type Al x Ga 1-x N layer (x = 0.3) doped with Si at a doping concentration of 5 × 10 19 cm -3 The thickness was 3.5. Mu.m. The P-type semiconductor layer 5 is P-type Al y Ga z In 1-y-z N layer with Mg as doping element and doping concentration of 8 × 10 18 cm -3 The thickness was 0.8. Mu.m.
The preparation method of the light emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) Providing a substrate;
(2) Growing a buffer layer on a substrate;
specifically, an AlN layer is deposited by PVD as a buffer layer.
(3) Growing an N-type semiconductor layer on the buffer layer;
specifically, N-type Al is grown in MOCVD x Ga 1-x And an N layer as an N-type semiconductor layer. The growth temperature was 1100 ℃ and the growth pressure was 220torr.
(4) Growing an InGaN potential well layer on the substrate obtained in the step (3);
specifically, an InGaN well layer is grown in MOCVD. The growth temperature was 720 ℃ and the growth pressure was 300torr.
(5) Growing a GaN barrier layer on the InGaN well layer;
specifically, a GaN barrier layer is grown in MOCVD. The growth temperature was 880 ℃ and the growth pressure was 300torr.
(6) Periodically repeating the step (4) and the step (5) until an active layer is obtained;
wherein, in the growth process of the GaN barrier layer of the 5 th to 8 th periods, the AlGaN layer grows at the growth temperature of 920 ℃ and the growth pressure of 350torr.
(7) Growing a P-type semiconductor layer on the active layer;
specifically, P-type Al is grown in MOCVD y Ga z In 1-y-z And the N layer is used as a P-type semiconductor layer, the growth temperature is 350 ℃, and the growth pressure is 300torr.
Comparative example 1
This comparative example differs from example 1 in that AlGaN layer 43 is not inserted in GaN barrier layer 42, and accordingly, a step of growing AlGaN layer 43 is not provided in the manufacturing method.
In addition, an electron blocking layer is grown between the active layer 4 and the P-type semiconductor layer 5, and specifically, the electron blocking layer is Al α Ga 1-α N layers (α = 0.8) with a thickness of 80nm. The electron blocking layer is grown by MOCVD at 940 deg.C under 250torr.
Comparative example 2
This comparative example differs from example 1 in that AlGaN layer 43 is not inserted in GaN barrier layer 42, and accordingly, a step of growing AlGaN layer 43 is not provided in the manufacturing method.
The epitaxial wafers obtained in examples 1 to 5 and comparative examples 1 to 2 were processed to prepare LED chips having a vertical structure of 50 μm × 50 μm in size, each at a current density of 0.2A/cm 2 、1A/cm 2 And 5A/cm 2 And 10A/cm 2 The electroluminescence intensity was tested under the conditions of (1):
while the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.
Claims (10)
1. A low-current Micro-LED chip epitaxial structure is characterized by comprising a substrate, and a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer which are sequentially grown on the substrate; the active layer is of a periodic structure, and each period comprises an InGaN potential well layer and a GaN potential barrier layer which are sequentially stacked; the periodicity of the active layer is more than or equal to 2;
wherein an AlGaN layer is inserted in at least one GaN barrier layer.
2. The low current Micro-LED chip epitaxial structure of claim 1, wherein AlGaN layers are inserted into the GaN barrier layers adjacent to the P-type semiconductor layer, and the Al composition content of the AlGaN layers decreases in the direction of growth of the epitaxial wafer.
3. The low current Micro-LED chip epitaxial structure of claim 1, wherein the number of active layer cycles is 3-8.
4. The low-current Micro-LED chip epitaxial structure of claim 3, wherein AlGaN layers are inserted into 2-4 periods of GaN barrier layers adjacent to said P-type semiconductor layer, and the Al composition content of said AlGaN layers decreases in the direction of epitaxial wafer growth.
5. The low current Micro-LED chip epitaxial structure of claim 1, wherein the In component content of the InGaN well layers decreases and increases In the direction of the epitaxial wafer growth.
6. The low current Micro-LED chip epitaxial structure of claim 1, wherein the In component content In said InGaN well layer is 0.1-0.4, and the Al component content In said AlGaN layer is 0.1-0.8.
7. The low current Micro-LED chip epitaxial structure of claim 1, wherein the AlGaN layer is 0.1nm to 20nm thick, the InGaN well layer is 1nm to 10nm thick, and the GaN barrier layer is 3nm to 40nm thick.
8. The low current Micro-LED chip epitaxial structure of claim 1, wherein said N type semiconductor layer is N type Al x Ga 1-x N layer with doping concentration of 1 × 10 18 cm -3 -1×10 20 cm -3 The thickness is 0.1-6 μm;
the P-type semiconductor layer is P-type Al y Ga z In 1-y-z N layer with doping concentration of 1 × 10 18 cm -3 -1×10 20 cm -3 The thickness is 0.1-2 μm;
wherein x is 0-0.6, y is 0-0.6, and z is 0-0.6.
9. A method for preparing a low current Micro-LED chip epitaxial structure, for preparing a low current Micro-LED chip epitaxial structure according to any one of claims 1 to 8, comprising:
providing a substrate, and growing a buffer layer, an N-type semiconductor layer, an active layer and a P-type semiconductor layer on the substrate in sequence; the active layer is of a periodic structure, and each period comprises an InGaN potential well layer and a GaN potential barrier layer which are sequentially stacked; the periodicity of the active layer is more than or equal to 2; an AlGaN layer is interposed between at least one of the GaN barrier layers.
10. A low current Micro-LED chip comprising a low current Micro-LED chip epitaxial structure according to any one of claims 1 to 8.
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| CN116344689A (en) * | 2023-05-26 | 2023-06-27 | 中诚华隆计算机技术有限公司 | Light-emitting chip with coating and manufacturing method thereof |
| CN116344688A (en) * | 2023-05-26 | 2023-06-27 | 中诚华隆计算机技术有限公司 | Light-emitting chip and manufacturing method thereof |
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| CN116344689A (en) * | 2023-05-26 | 2023-06-27 | 中诚华隆计算机技术有限公司 | Light-emitting chip with coating and manufacturing method thereof |
| CN116344688A (en) * | 2023-05-26 | 2023-06-27 | 中诚华隆计算机技术有限公司 | Light-emitting chip and manufacturing method thereof |
| CN116344689B (en) * | 2023-05-26 | 2023-07-21 | 中诚华隆计算机技术有限公司 | Light-emitting chip with coating and manufacturing method thereof |
| CN116344688B (en) * | 2023-05-26 | 2023-07-28 | 中诚华隆计算机技术有限公司 | Light-emitting chip and manufacturing method thereof |
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