CN115548146B - Laser battery and preparation method thereof - Google Patents
Laser battery and preparation method thereof Download PDFInfo
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Abstract
A laser battery and its preparation method, the laser battery includes: a semiconductor substrate layer; a lattice variation buffer structure; the lattice variation buffer structure comprises a first buffer unit, an Nth buffer unit and an N +1 th component stepping layer, wherein the first buffer unit, the Nth buffer unit and the N +1 th component stepping layer are sequentially stacked from bottom to top; any nth buffer unit from the first buffer unit to the nth buffer unit comprises an nth component stepping layer and an nth component return layer which are stacked from bottom to top; the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the component contents of the lattice adjusting elements in the first component stepping layer to the (N + 1) th component stepping layer are gradually increased; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; a light absorbing layer. The laser battery can emit required wavelength, and can realize lower cost and better quality.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a laser battery and a preparation method thereof.
Background
The laser energy transmission technology is a main way of converting laser energy into electric energy through a photovoltaic system, so that the electric energy can be continuously supplied under extreme conditions. The laser fiber energy transmission is one of laser energy transmission technologies, and has the advantages that on one hand, the laser fiber energy transmission has the characteristic of complete electromagnetic isolation, so that the problem of electromagnetic interference caused by electric energy transmission of the traditional metal wire is avoided; on the other hand, the monochromaticity, collimation and high energy density of laser light make it applicable to long-distance energy transmission. At present, laser fiber energy transmission is widely applied to infrastructures such as national defense and power grids. In the transmission process of the silicon-based optical fiber, the attenuation coefficient of the 1310nm wavelength in the transmission process is 0.5 dB/km-0.8 dB/km, so the laser optical fiber energy transmission system based on the 1310nm wavelength has unique advantages in energy information transmission, and can realize long-distance and low-loss energy transmission.
The laser battery is an important component of a laser optical fiber energy transmission system, and at present, the research and preparation of 1310nm laser batteries at home and abroad are still in an initial stage. From the material selection, III-V semiconductor materials such as In x Al y Ga 1-x-y As、In x Ga 1-x As y P 1-y And In x Ga 1-x As is characterized by direct band gap and high absorption coefficient, can be used for preparing 1310nm laser batteries. At present, in lattice-matched to InP substrate x Al y Ga 1-x-y As and In x Ga 1-x As y P 1-y Laser cell materials have been reported, however, inP substrates are expensive and difficult to achieve large wafer area growth and fabrication, resulting in high production costs. The large-size wafer area metal vapor deposition (MOCVD) growth and preparation technology based on the GaAs substrate is mature and has lower cost.
However, how to prepare a 1310nm laser cell with better quality on a substrate with lower cost is a technical problem to be solved.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is how to prepare a laser battery with better quality and required wavelength on a substrate with lower cost, thereby providing a laser battery and a preparation method thereof.
The present invention provides a laser battery, including: a semiconductor substrate layer; a lattice variation buffer structure located on the semiconductor substrate layer; the lattice variation buffer structure comprises a first buffer unit, an Nth buffer unit and an N +1 th component stepping layer, wherein the first buffer unit, the Nth buffer unit and the N +1 th component stepping layer are sequentially stacked from bottom to top; n is an integer greater than or equal to 2; any nth buffer unit from the first buffer unit to the nth buffer unit comprises an nth component stepping layer and an nth component return layer which are stacked from bottom to top; n is an integer greater than or equal to 1 and less than or equal to N; the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes a lattice adjusting element; the component contents of the lattice adjusting elements in the first component stepping layer to the (N + 1) th component stepping layer are gradually increased; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; for any nth 1 Composition of stepwise layer, n 2 Composition of the stepping layer and the n-th layer 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjustment element in the composition step layer is larger than the nth 1 The composition of the lattice adjusting element in the composition stepping layer; n is 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N 2 -n 1 =1; and the light absorption layer is positioned on one side of the lattice variation buffer structure, which is far away from the semiconductor substrate layer.
Optionally, the semiconductor substrate layer is an n-type GaAs substrate; the element group comprises an n-type doping element, an In element, a Ga element and an As element, and the crystal lattice adjusting element is the In element; the light absorption layer is made of In doped with conductive ions x Ga 1-x As。
Optionally, N is an integer greater than or equal to 3; the component content differences of the lattice adjusting elements in any adjacent component stepping layers from the first component stepping layer to the (N + 1) th component stepping layer are equal; the difference of the component contents of the lattice adjusting elements in any adjacent component tempering layers from the first component tempering layer to the Nth component tempering layer is equal.
Optionally, the thicknesses of the first component stepping layer to the (N + 1) th component stepping layer are all equal; the thicknesses of the first component return layer and the Nth component return layer are equal.
Optionally, the step value of the component content of the lattice adjusting element in any adjacent component step layer from the first component step layer to the N +1 th component step layer is 2% to 4%; the step value of the composition content of the lattice adjusting element in any adjacent one of the first to nth component tuning layers is 1 to 3%.
Optionally, the element group includes an intrinsic element group and a doping element, and the intrinsic element group includes the lattice adjustment element; the light absorption layer has a group of intrinsic elements therein; the component contents of each element in the intrinsic element group in the N +1 th component stepping layer are correspondingly the same as the component contents of each element in the intrinsic element group in the light absorption layer.
Optionally, the lattice variation buffer structure further includes: the component overshoot layer is positioned on the surface of one side, away from the semiconductor substrate layer, of the N +1 component stepping layer; the target layer is positioned on the surface of one side, away from the (N + 1) th component stepping layer, of the component overshoot layer; the component content of the lattice adjusting element in the component overshoot layer is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer; the component content of each element in the target layer is correspondingly the same as that of each element in the (N + 1) th component stepping layer.
Optionally, the difference between the component content of the lattice adjusting element in the component overshoot layer and the component content of the lattice adjusting element in the N +1 th component stepping layer is 0.02 to 0.1.
Optionally, the chemical formula of the component overshoot layer is In y Ga 1-y As,0.48<y<0.6。
Optionally, the thickness of the component overshoot layer is 400nm-600nm.
Optionally, the thicknesses of the first buffer unit to the nth buffer unit are all 100nm to 400nm.
Optionally, the light absorbing layer includes: the conductive type of the base region layer is the same as that of the lattice variation buffer structure; and the emitting layer is positioned on the surface of one side, back to the semiconductor substrate layer, of the base region layer, and the conduction type of the emitting layer is opposite to that of the base region layer.
The invention also provides a preparation method of the laser battery, which comprises the following steps: providing a semiconductor substrate layer; forming a lattice variation buffer structure on the semiconductor substrate layer, wherein the step of forming the lattice variation buffer structure comprises forming a first buffer unit to an Nth buffer unit which are sequentially stacked from bottom to top; forming an N +1 component stepping layer on one side of the Nth buffer unit, which is far away from the semiconductor substrate layer; n is an integer greater than or equal to 2; the forming of any nth buffer unit of the first to nth buffer units includes: forming an nth component stepping layer; forming an nth component return layer on the surface of one side, away from the semiconductor substrate layer, of the nth component stepping layer; n is an integer greater than or equal to 1 and less than or equal to N; the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes a lattice adjusting element; the component contents of the lattice adjusting elements in the first component stepping layer to the N +1 component stepping layer gradually increase; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; for any nth 1 Composition of stepwise layer, n 2 Composition stepping layer and n 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjustment element in the composition step layer is larger than the nth 1 The composition of the lattice adjusting element in the composition stepping layer; n is 1 Is an integer greater than or equal to 1 and less than or equal to N, N 2 Is an integer greater than or equal to 1 and less than or equal to N 2 -n 1 =1; and forming a light absorption layer on one side of the lattice variation buffer structure, which is far away from the semiconductor substrate layer.
Optionally, the step of forming the lattice variation buffer structure further includes: forming a component overshoot layer on the surface of one side, away from the semiconductor substrate layer, of the N +1 component stepping layer; forming a target layer on the surface of one side of the component overshoot layer, which is away from the (N + 1) th component stepping layer; the component content of the lattice adjusting element in the component overshoot layer is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer; the component content of each element in the target layer is correspondingly the same as that of each element in the (N + 1) th component stepping layer.
The technical scheme of the invention has the following beneficial effects:
the laser cell provided by the invention is provided with a lattice variation buffer structure between a light absorption layer and a semiconductor substrate layer, wherein the lattice variation buffer structure comprises a first buffer unit to an Nth buffer unit which are sequentially stacked from bottom to top and an N +1 component stepping layer which is positioned on one side of the Nth buffer unit, which is far away from the semiconductor substrate layer; n is an integer greater than or equal to 2; any nth buffer unit from the first buffer unit to the nth buffer unit comprises an nth component stepping layer and an nth component return layer which are stacked from bottom to top; n is an integer greater than or equal to 1 and less than or equal to N; the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes lattice adjusting elements. The component contents of the lattice adjusting elements in the first component stepping layer to the (N + 1) th component stepping layer are gradually increased, and the component contents of the lattice adjusting elements in the first component returning layer to the (N) th component returning layer are gradually increased, so that the roughness of the top surface of the lattice variation buffer structure can be realized by the first component stepping layer to the (N + 1) th component stepping layer and the first component returning layer to the (N) th component returning layer, the scattering of photons by the top surface of the lattice variation buffer structure is reduced, the orderliness of an optical field is increased, the directional mobility of the photons is good, and the photons can directionally move to the light absorption layer to contribute to photogenerated charges. Secondly, the lattice constant of the lattice variation buffer structure can be gradually increased by adjusting the component content of the lattice adjusting element from the first component stepping layer to the (N + 1) th component stepping layer in a stepping manner, so that the relaxation degree of the lattice variation buffer structure is matched with the lattice constant of the light absorption layer. Again, for the arbitrary nth 1 Composition of step layer, secondn 2 Composition of the stepping layer and the n-th layer 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjusting element in the composition step layer is larger than the nth 1 The composition of the lattice adjusting element in the composition stepping layer; n is a radical of an alkyl radical 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N 2 -n 1 The n component tempering layer can increase the dislocation cancellation probability at the interface of the n component stepping layer and the n component tempering layer, promote the slippage of dislocations at the interface of the n component stepping layer and the n component tempering layer, and achieve the probability that the release stress hinders the penetration of the dislocations to the light absorption layer; the lattice variation buffer structure has high lattice relaxation degree, low surface roughness and low probability of penetration of dislocation to the light absorption layer, so that lattice matching growth of the light absorption layer is facilitated, the growth quality of the light absorption layer is facilitated to be improved, and the photoelectric conversion performance of the laser battery is further improved. In addition, the light absorption layer can realize high-quality growth by depending on the lattice variation buffer structure without being limited by the material of the semiconductor substrate layer, and the semiconductor substrate layer can be made of a material with lower cost, so that the cost of the laser battery is reduced.
Furthermore, the semiconductor substrate layer is an n-type GaAs substrate, the cost of the GaAs substrate is low, and the cost of the laser battery is low.
Further, the lattice variation buffer structure further includes: the component overshoot layer is positioned on the surface of one side, away from the semiconductor substrate layer, of the N +1 component stepping layer; the target layer is positioned on the surface of one side, away from the (N + 1) th component stepping layer, of the component overshoot layer; the component content of the lattice adjusting element in the component overshoot layer is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer; the component content of each element in the target layer is correspondingly the same as that of each element in the (N + 1) th component stepping layer. The component overshoot layer can improve the lattice relaxation degree of the lattice variation buffer structure, so that defects caused by residual stress during the growth of the laser battery are effectively prevented from entering an active region of the laser battery, the stress is further released, and the lattice variation buffer structure which is designed and grown based on the first component stepping layer to the (N + 1) th component stepping layer, the first component return layer to the (N) th component return layer and the component overshoot layer is high in lattice relaxation degree, low in surface roughness and low in probability of penetration of dislocation to the light absorption layer, is beneficial to lattice matching growth of the light absorption layer, is beneficial to forming the high-quality light absorption layer, and further improves the photoelectric conversion performance of the laser battery.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic structural diagram of a laser battery according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a lattice variation buffer structure in a laser cell according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a lattice variation buffer structure in a laser cell according to another embodiment of the present invention;
fig. 4 to 6 are schematic structural diagrams of a manufacturing process of a laser battery according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Example 1
The present embodiment provides a laser battery, which is combined with fig. 1 and fig. 2, and includes:
a semiconductor substrate layer 1;
a lattice variation buffer structure 2 located on the semiconductor substrate layer 1; the lattice variation buffer structure 2 comprises a first buffer unit A1 to AN Nth buffer unit AN which are sequentially stacked from bottom to top, and AN N +1 th component stepping layer B which is positioned on one side of the Nth buffer unit AN away from the semiconductor substrate layer 1; n is an integer greater than or equal to 2; any nth buffer unit from the first buffer unit A1 to the nth buffer unit AN comprises AN nth component stepping layer and AN nth component returning layer which are stacked from bottom to top; n is an integer greater than or equal to 1 and less than or equal to N;
the first group of step-by-step layers 11 to the (N + 1) th component step-by-step layer B and the first component tempering layer 12 to the nth component tempering layer N2 all contain the same element group; the group of elements includes a lattice adjusting element;
the component contents of the lattice adjusting elements in the first group of stepped layers 11 to the (N + 1) th component stepped layer B are gradually increased; the composition contents of the lattice adjusting elements in the first component tempering layer 12 to the nth component tempering layer N2 gradually increase; for any nth 1 Composition of stepwise layer, n 2 Composition stepping layer and n 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjustment element in the composition step layer is larger than the nth 1 ComponentsThe composition content of the lattice adjusting element in the stepping layer; n is 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N, N 2 -n 1 =1;
And the light absorption layer 3 is positioned on one side of the lattice variation buffer structure 2, which is far away from the semiconductor substrate layer 1.
In the laser cell provided by this embodiment, because the component contents of the lattice adjusting elements in the first group stepping layer 11 to the N +1 th group stepping layer B gradually increase, and the component contents of the lattice adjusting elements in the first group returning layer 12 to the N2 th group returning layer gradually increase, the roughness of the top surface of the lattice variation buffer structure can be reduced by the first group stepping layer to the N +1 th group stepping layer, and the roughness of the top surface of the lattice variation buffer structure can be reduced by the first group returning layer to the N2 th group returning layer, so that the order of the optical field is increased, the directional mobility of photons is good, and the photons can directionally move to the light absorption layer to contribute to photogenerated charges. Secondly, the lattice constant of the lattice variation buffer structure can be gradually increased by adjusting the component content of the lattice adjusting element from the first component stepping layer to the (N + 1) th component stepping layer in a stepping manner, so that the relaxation degree of the lattice variation buffer structure is matched with the lattice constant of the light absorption layer. Again, for the arbitrary nth 1 Composition of stepwise layer, n 2 Composition of the stepping layer and the n-th layer 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjustment element in the composition step layer is larger than the nth 1 The composition of the lattice adjusting element in the composition stepping layer; n is 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N, N 2 -n 1 The n component callback layer can increase the dislocation cancellation probability at the interface of the n component stepping layer and the n component callback layer, promote the slippage of dislocations at the interface of the n component stepping layer and the n component callback layer, achieve the probability that releasing stress hinders the penetration of dislocations to the light absorption layer, and avoid the electric leakage phenomenon of the laser battery; crystals of the lattice variation buffer structureThe lattice relaxation degree is high, the surface roughness is low, and the probability of the dislocation penetrating into the light absorption layer is low, so that the lattice matching growth of the light absorption layer is facilitated, the growth quality of the light absorption layer is facilitated to be improved, and the photoelectric conversion performance of the laser battery is further improved. In addition, the light absorption layer can realize high-quality growth by depending on the lattice variation buffer structure without being limited by the material of the semiconductor substrate layer, and the semiconductor substrate layer can be made of a material with lower cost, so that the cost of the laser battery is reduced.
In one embodiment, the semiconductor substrate layer 1 is an n-type GaAs substrate, which has a low cost, on the one hand, and on the other hand, the technology for large wafer area metal vapor deposition growth and epitaxial layer preparation based on the GaAs substrate is well established, and therefore, the cost of the laser cell is low.
In one embodiment, the semiconductor substrate layer 1 has a doping concentration of 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 。
In one embodiment, the laser cell further comprises: and the bottom layer buffer layer 4 is positioned between the semiconductor substrate layer 1 and the lattice variation buffer structure 2.
In one embodiment, the material of the bottom buffer layer 4 comprises gallium arsenide doped with n-type conductivity ions. The n-type conductive ions comprise silicon ions, and the doping concentration of the n-type conductive ions in the bottom buffer layer is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 。
In one embodiment, the underlying buffer layer 4 has a thickness of 50nm to 100nm, such as 60nm, 70nm, 80nm, 90nm.
In one embodiment, the element group includes an n-type doping element, an In element, a Ga element, and an As element, and the lattice adjustment element is the In element; the light absorption layer is made of In doped with conductive ions x Ga 1-x As, wherein the component content of In element determines the wavelength absorbed by the light absorption layer, x is 0.1-0.5, corresponding to the wavelength range of 950-1450 nm. For example, the light absorption layer is made of a material doped with a conductive materialIn of the ion 0.44 Ga 0.56 As, corresponding to absorption wavelength of 1310nm.
In one embodiment, referring to fig. 2, the lattice variation buffer structure 2 includes a first buffer unit A1, a second buffer unit A2 to AN nth buffer unit AN, and AN N +1 th composition step layer B located on a side of the nth buffer unit AN away from the semiconductor substrate layer 1, which are sequentially stacked from bottom to top; the first buffer unit A1 includes a first component stepping layer 11 and a first component tempering layer 12 stacked from bottom to top, the second buffer unit A2 includes a second component stepping layer 21 and a second component tempering layer 22 stacked from bottom to top, and the nth buffer unit AN includes AN nth component stepping layer N1 and AN nth component tempering layer N2 stacked from bottom to top.
In this embodiment, referring to fig. 3, as indicated by N being equal to 3, the lattice variation buffer structure 2 includes a first buffer unit A1, a second buffer unit A2, a third buffer unit A3, and a fourth component step layer B' located on a side of the third buffer unit A3 away from the semiconductor substrate layer 1, which are sequentially stacked from bottom to top. The first buffer unit A1 includes a first component stepping layer 11 and a first component tempering layer 12 stacked from bottom to top, the second buffer unit A2 includes a second component stepping layer 21 and a second component tempering layer 22 stacked from bottom to top, and the third buffer unit A3 includes a third component stepping layer 31 and a third component tempering layer 33 stacked from bottom to top.
N-type doping elements are doped in the first group of stepping layers 11 to the (N + 1) th component stepping layer B and the first group of returning layers 12 to the N2 of the Nth component returning layer, the N-type doping elements comprise silicon elements, and the doping concentration of the N-type doping elements in the first group of stepping layers to the (N + 1) th component stepping layer is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 The doping concentration of the N-type doping elements in the first to the Nth component tempering layers is 1E18atom/cm 3 ~5E18atom/cm 3 E.g. 3E18atom/cm 3 。
When N is equal to 3, the first group of step-by-step progression layer 11, the second group of step-by-step progression layer 21, the third group of step-by-step progression layer 31, the fourth group of step-by-step progression layer B', the first component tempering layer 12, the second component tempering layer 22, and the third component tempering layerThe component return layers 32 are all doped with n-type doping elements, the n-type doping elements comprise silicon elements, and the doping concentration of the n-type doping elements in the first component stepping layer 11, the second component stepping layer 21, the third component stepping layer 31 and the fourth component stepping layer B' is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 The doping concentration of the n-type doping element in the first, second and third component trimming layers 12, 22 and 32 is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 。
In one embodiment, the thicknesses of the first to nth buffer units A1 to AN are equal, and the benefits include: the growth speed of the first buffer unit A1 to the Nth buffer unit AN and the component content of the crystal lattice adjusting elements in the first buffer unit A1 to the Nth buffer unit AN are favorably controlled in a programming mode, and the process for preparing the first buffer unit A1 to the Nth buffer unit AN is simplified. In other embodiments, the thicknesses of the first to nth buffer units are at least partially equal or are all different.
In one embodiment, when N is equal to 3, the thicknesses of the first, second, and third buffer units A1, A2, and A3 are equal.
In one embodiment, the thickness of each of the first to nth buffer units A1 to AN is 100nm to 400nm, such as 200nm, 280nm, 300nm, or 350nm; if the thicknesses of the first buffer unit to the Nth buffer unit are smaller than 100nm, the thicknesses of the first buffer unit to the Nth buffer unit are too small, and the degree of reducing the top surface defects of the lattice variation buffer structure is smaller; if the thicknesses of the first buffer unit to the nth buffer unit are greater than 400nm, the thicknesses of the first buffer unit to the nth buffer unit are too large, and the thickness of the formed lattice variation buffer structure is too large, so that the nth buffer unit is easily relaxed in advance, and the effect of improving lattice matching growth of the lattice variation buffer structure is not obvious.
When N is equal to 3, the thicknesses of the first, second, and third buffer units A1, A2, and A3 are each 100nm to 400nm, for example, 200nm, 280nm, 300nm, or 350nm.
In one embodiment, the first set of stepped layers 11 through the (N + 1) th component stepped layer B are all of equal thickness, and benefits include: the method is favorable for controlling the growth speed from the first component stepping layer to the (N + 1) th component stepping layer in a programming way and the component content of the crystal lattice adjusting element in the first component stepping layer 11 to the (N + 1) th component stepping layer, and simplifies the process for preparing the first component stepping layer to the (N + 1) th component stepping layer. In other embodiments, the thickness of the first component stepping layer to the N +1 th component stepping layer is at least partially equal or not equal throughout.
When N is equal to 3, the thicknesses of the first group of step-by-step layers 11, the second group of step-by-step layers 21, the third group of step-by-step layers 31 and the fourth group of step-by-step layers B' are all equal.
In one embodiment, the first set of step-wise layers 11 through the (N + 1) th component step-wise layer each have a thickness of 80nm to 250nm, such as 100nm, 150nm, 180nm, or 210nm.
In one embodiment, when N is equal to 3, the first, second, third and fourth sets of step-wise layers 11, 21, 31 and B' each have a thickness of 80nm to 250nm, such as 100nm, 150nm, 180nm or 210nm.
In one embodiment, the first component tempering layer 12 through the nth component tempering layer are all of equal thickness, and benefits include: the growth speed of the first to nth component tempering layers 12 to 12 and the component content of the lattice adjusting element in the first to nth component tempering layers are favorably controlled in a programming manner, and the process for preparing the first to nth component tempering layers 12 to 12 is simplified. In other embodiments, the thicknesses of the first component tempering layer through the nth component tempering layer are at least partially equal or all different.
In one embodiment, when N is equal to 3, the thicknesses of the first component tempering layer 12, the second component tempering layer 22 and the third component tempering layer 32 are all equal.
In one embodiment, the thickness of the first component tempering layer to the nth component tempering layer is 60nm to 150nm, such as 65nm, 70nm, 80nm or 120nm.
In one embodiment, when N is equal to 3, the first component tempering layer 12, the second component tempering layer 22 and the third component tempering layer 32 each have a thickness of 60nm-150nm, such as 65nm, 70nm, 80nm or 120nm.
In one embodiment, N is an integer greater than or equal to 3; the composition content differences of the lattice adjusting elements in any adjacent composition stepping layers from the first composition stepping layer to the (N + 1) th composition stepping layer are equal, and the advantages comprise that: the component content of the lattice adjusting element in the first component stepping layer to the (N + 1) th component stepping layer can be controlled in a programmed manner, and the process for preparing the first component stepping layer to the (N + 1) th component stepping layer is simplified; in other embodiments, the difference in the composition content of the lattice adjustment element in any adjacent one of the first to N +1 th compositional gradient layers is at least partially equal or not equal in all.
In one embodiment, when N is equal to 3, the difference in the composition amounts of the lattice-adjusting element in any adjacent one of the first, second, third and fourth component-stepping layers 11, 21, 31 and B' is equal.
In one embodiment, N is an integer greater than or equal to 3; the difference values of the component contents of the lattice adjusting elements in any adjacent component tempering layers from the first component tempering layer to the Nth component tempering layer are equal; the benefits include: the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer can be controlled in a programmed mode, and the processes for preparing the first component tempering layer to the Nth component tempering layer are simplified; in other embodiments, the difference in the composition contents of the lattice adjusting elements in any adjacent one of the first to nth component tempering layers is at least partially equal or is not equal in all.
In one embodiment, when N is equal to 3, the difference in the composition contents of the lattice adjusting element in any adjacent one of the first component tempering layer 12, the second component tempering layer 22, and the third component tempering layer 32 is equal.
In one embodiment, the step value of the composition content of the lattice adjustment element in any adjacent component step layer from the first component step layer to the N +1 th component step layer is 2% to 4%, for example, 2.2%, 2.4%, 2.6%, 2.8%, 3.2%, 3.6% or 3.8%, if the step value of the composition content of the lattice adjustment element in any adjacent component step layer from the first component step layer to the N +1 th component step layer is less than 2%, the degree of increasing the lattice constant of the lattice variation buffer structure is small, which results in the need of adding a plurality of buffer units so that the lattice constant of the N +1 th component step layer matches the lattice constant of the light absorption layer, and if the thickness of any buffer unit is kept unchanged, which results in the lattice variation buffer structure being too thick and possibly exceeding the free path of the carrier, so that the carrier reaches the N metal plane, thereby improving the photoelectric conversion efficiency of the laser cell is small; if the step value of the component content of the lattice adjusting element in any adjacent component stepping layer from the first group of stepping layers to the (N + 1) th component stepping layer is larger than 4%, the degree of reducing the stress between any adjacent component stepping layer and the component adjusting layer is smaller.
In one embodiment, when N is equal to 3, the step value of the composition content of the lattice-adjusting element in any adjacent one of the first, second, third and fourth component step layers 11, 21, 31 and B' is 2% to 4%, for example 2.2%, 2.4%, 2.6%, 2.8%, 3.2%, 3.6% or 3.8%.
In one embodiment, the step value of the composition content of the lattice adjustment element in any adjacent one of the first to nth component tuning layers is 1% to 3%, for example 1.2%, 1.4%, 1.6%, 1.8%, 2.0%, 2.4%, 2.6%, or 2.8%, and if the step value of the composition content of the lattice adjustment element in any adjacent one of the first to nth component tuning layers is less than 1%, the degree of increasing the dislocation cancellation probability at the interface of the nth component step layer and the nth component tuning layer is small, and the degree of promoting slippage of dislocations at the interface of the nth component step layer and the nth component tuning layer is small; if the step value of the component content of the lattice adjusting element in any adjacent component tempering layer from the first component tempering layer to the Nth component tempering layer is larger than 3%, the degree of reducing the stress between any adjacent component step layer and the component tempering layer is small.
In one embodiment, when N is equal to 3, the compositional content of the lattice-adjusting element in first component tempering layer 12, second component tempering layer 22, and third component tempering layer 32 is stepped by a value of 1% to 3%, such as 1.2%, 1.4%, 1.6%, 1.8%, 2.0%, 2.4%, 2.6%, or 2.8%.
In one embodiment, the element group includes an intrinsic element group and a doping element, the intrinsic element group including the lattice adjusting element; the light absorption layer has a group of intrinsic elements therein; the component contents of each element in the intrinsic element group in the N +1 th component stepping layer are correspondingly the same as the component contents of each element in the intrinsic element group in the light absorption layer. For example, the element group includes an N-type doping element, an In element, a Ga element, and an As element, the intrinsic element group includes an In element, a Ga element, and an As element, the lattice adjustment element is an In element, a composition content of the In element In the N +1 th component step layer is the same As a composition content of the In element In the light absorbing layer, a composition content of the Ga element In the N +1 th component step layer is the same As a composition content of the Ga element In the light absorbing layer, and a composition content of the As element In the N +1 th component step layer is the same As a composition content of the As element In the light absorbing layer.
When N is equal to 3, the component contents of each element in the intrinsic element group in the fourth group step-by-step layer B' are correspondingly the same as the component contents of each element in the intrinsic element group in the light absorbing layer. The intrinsic element group In the fourth group of step-by-step layers comprises an In element, a Ga element and an As element, the In element content In the fourth group of step-by-step layers is the same As the In element content In the light absorbing layer, the Ga element content In the fourth group of step-by-step layers is the same As the Ga element content In the light absorbing layer, and the As element content In the fourth group of step-by-step layers is the same As the As element content In the light absorbing layer.
In one embodiment, N is an integer between 10 and 25, for example N =16, N =18 or N =20, and in other embodiments, N may be another integer.
In one embodiment, the lattice variation buffer structure 2 further includes: the component overshoot layer C is positioned on the surface of one side, away from the semiconductor substrate layer 1, of the (N + 1) th component stepping layer B; the target layer D is positioned on the surface of one side, away from the (N + 1) th component stepping layer B, of the component overshoot layer C; the component content of the lattice adjusting element in the component overshoot layer C is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer B; the component contents of each element in the target layer D are correspondingly the same as those of each element in the (N + 1) th component stepping layer B. The component overshoot layer can improve the lattice relaxation degree of the lattice variation buffer structure, so that defects caused by residual stress during the growth of the laser battery are effectively prevented from entering an active region of the laser battery, the stress is further released, and the lattice variation buffer structure which is designed and grown based on the first component stepping layer to the (N + 1) th component stepping layer, the first component return layer to the (N) th component return layer and the component overshoot layer is high in lattice relaxation degree, low in surface roughness and low in probability of penetration of dislocation to the light absorption layer, is beneficial to lattice matching growth of the light absorption layer, is beneficial to forming the high-quality light absorption layer, and further improves the photoelectric conversion performance of the laser battery.
In one embodiment, the compositional overshoot layer C has the formula In y Ga 1-y As,0.48<y<0.6, e.g. y =0.50, 0.52, 0.55 or 0.58.
In one embodiment, the thickness of the component overshoot layer C is 400nm-600nm, such as 500nm; if the thickness of the component overshoot layer is less than 400nm, the effect of improving the lattice relaxation degree of the lattice variation buffer structure is not obvious, and the effect of releasing stress is not obvious, and if the thickness of the component overshoot layer is more than 600nm, the degree of improving the quality of the target layer is small.
In one embodiment, the lattice-change buffer structure has a relaxation degree of 90% to 99%, e.g., 94.5%, a surface roughness of 5nm to 10nm, e.g., 7.4nm, and a threading dislocation density of 5 × 10 6 cm -2 ~5×10 7 cm -2 ,1×10 7 cm -2 。
In one embodiment, the composition overshoot layer C comprises an n-type doping element, the n-type doping element comprises silicon, and the doping concentration of the n-type doping element is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 。
In one embodiment, the difference between the component content of the lattice adjustment element in the component overshoot layer C and the component content of the lattice adjustment element in the (N + 1) th component stepping layer is 0.02 to 0.1, such as 0.04, 0.06 or 0.08; if the difference between the component content of the lattice adjusting element in the component overshoot layer and the component content of the lattice adjusting element in the (N + 1) -th component stepping layer is larger than 0.1, the degree of improving the quality of the target layer is small.
When N is equal to 3, the difference between the composition content of the lattice adjustment element in the composition overshoot layer C and the composition content of the lattice adjustment element in the fourth group step-by-step layer is 0.02 to 0.1, for example, 0.07.
In one embodiment, the thickness of the target layer D is 300nm to 700nm, such as 400nm, 450nm, 500nm, 600nm, or 650nm; if the thickness of the target layer is less than 300nm, the effect of improving the lattice relaxation degree of the lattice variation buffer structure is not obvious, and if the thickness of the target layer is more than 700nm, resources are wasted.
In one embodiment, the target layer D comprises an n-type doping element, the n-type doping element comprises silicon, and the doping concentration of the n-type doping element is 1E18atom/cm 3 ~5E18atom/cm 3 E.g. 3E18atom/cm 3 。
The component content of each element in the target layer D is correspondingly the same as that of each element in the (N + 1) th component stepping layer. The intrinsic element group In the target layer comprises an In element, a Ga element and an As element, the In element component content In the target layer is the same As the In element component content In the (N + 1) th component stepping layer, the Ga element component content In the target layer is the same As the Ga element component content In the (N + 1) th component stepping layer, and the As element component content In the target layer is the same As the As element component content In the (N + 1) th component stepping layer.
In one embodiment, with continued reference to fig. 1, the light absorbing layer 3 comprises: a base layer 31, wherein the conductivity type of the base layer 31 is the same as the conductivity type of the lattice variation buffer structure 200; and the emitting layer 32 is positioned on the surface of one side, back to the semiconductor substrate layer 1, of the base layer 31, and the conduction type of the emitting layer 32 is opposite to that of the base layer 31.
In one embodiment, the base region layer 31 has a thickness of 3000nm to 4000nm, such as 3200nm, 3300nm, 3500nm or 3800nm.
In one embodiment, the base layer 31 comprises an n-type dopant element comprising silicon, the n-type dopant element having a dopant concentration of 1E17atom/cm 3 ~2E18atom/cm 3 E.g. 1.5E18atom/cm 3 。
In one embodiment, the base layer 31 is In doped with n-type conductivity ions x Ga 1-x As, e.g., x =0.44.
In one embodiment, the thickness of the emissive layer 32 is 300nm to 600nm, such as 350nm, 400nm, 450nm, or 500nm.
In one embodiment, the emissive layer 32 comprises a p-type dopant element comprising CBr 4 The doping concentration of the p-type doping element is 1E17atom/cm 3 ~2E18atom/cm 3 E.g. 1.5E18atom/cm 3 。
In one embodiment, the emissive layer 32 is In doped with p-type conductivity ions x Ga 1-x As, e.g., x =0.44.
In one embodiment, with continued reference to fig. 1, the laser cell further comprises: a back field layer 5 positioned between the lattice variation buffer structure 2 and the light absorption layer 3, and a window layer 6 positioned on the surface of one side of the emission layer 32, which faces away from the semiconductor substrate layer 1. The back field layer 533 has a conductivity type identical to that of the lattice modification buffer structure 2, and the window layer 6 has a conductivity type opposite to that of the lattice modification buffer structure 2.
In one embodiment, the back field layer 5 has a thickness of 50nm to 100nm, for example 80nm.
In one embodiment of the present invention,the back field layer 5 contains an element group including an n-type doping element, an In element, a Ga element, and an As element. The n-type doping element comprises silicon, and the doping concentration of the n-type doping element is 1E18atom/cm -3 ~5E18atom/cm -3 For example 3E18atom/cm -3 。
In one embodiment, the back field layer 5 is InGaAs doped with n-type conductivity ions.
In one embodiment, the window layer 6 has a thickness of 50nm to 100nm, for example 80nm.
In one embodiment, the window layer 6 includes p-type doping elements, in elements, ga elements, as elements, and Al elements therein. The p-type doping element comprises C, and the doping concentration of the p-type doping element is 1E17atom/cm 3 ~8E18atom/cm 3 E.g. 1.5E18atom/cm 3 。
In one embodiment, the window layer 6 is inalgas doped with p-type conductivity ions.
In one embodiment, with continued reference to fig. 1, the laser cell further comprises: and the antireflection film layer 7 is positioned on the surface of one side, facing away from the semiconductor substrate layer 1, of the part of the window layer 6, and the material of the antireflection film layer 7 comprises silicon nitride.
In one embodiment, the thickness of the anti-reflection film layer 7 is 150nm to 170nm, for example 160nm.
In one embodiment, with continued reference to fig. 2, the laser cell further comprises: and the ohmic contact layer 8 is positioned on the surface of one side, facing away from the semiconductor substrate layer 1, of the part of the window layer 6, and the ohmic contact layer 8 surrounds the side wall of the antireflection film layer 7.
In one embodiment, the ohmic contact layer 8 has a thickness of 300nm to 500nm, for example 450nm.
In one embodiment, the material of the ohmic contact layer 8 comprises gallium arsenide. The ohmic contact layer comprises p-type doping elements, the p-type doping elements comprise C, and the doping concentration of the p-type doping elements is 5E18atom/cm 3 ~2E19atom/cm 3 E.g. 5.5E18atom/cm 3 。
In one embodiment, the ohmic contact layer 8 is GaAs doped with p-type conductivity ions.
In one embodiment, the laser cell further comprises: a first electrode 9 located on the surface of the semiconductor substrate layer 1 on the side away from the lattice variation buffer structure 2 and a second electrode 10 located on the surface of the ohmic contact layer 8 on the side away from the semiconductor substrate layer 1.
In one embodiment, the material of the first electrode 9 is Au, ge, ni or Au; the material of the second electrode 10 is Ti, pt or Au.
Example 2
The embodiment also provides a preparation method of the laser battery, which comprises the following steps:
s1, providing a semiconductor substrate layer;
s2, forming a lattice variation buffer structure on the semiconductor substrate layer, wherein the step of forming the lattice variation buffer structure comprises the steps of forming a first buffer unit to an Nth buffer unit which are sequentially stacked from bottom to top; forming an N +1 component stepping layer on one side of the Nth buffer unit, which is far away from the semiconductor substrate layer; n is an integer greater than or equal to 2; the forming of any nth buffer unit of the first to nth buffer units includes: forming an nth component stepping layer; forming an nth component return layer on the surface of one side, away from the semiconductor substrate layer, of the nth component stepping layer; n is an integer greater than or equal to 1 and less than or equal to N; the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes a lattice adjusting element; the component contents of the lattice adjusting elements in the first component stepping layer to the (N + 1) th component stepping layer are gradually increased; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; for any nth 1 Composition of stepwise layers, n 2 Composition of the stepping layer and the n-th layer 2 Component-recycling layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjustment element in the composition step layer is larger than the nth 1 Groups of lattice adjusting elements in compositional stepping layersDividing the content; n is a radical of an alkyl radical 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N, N 2 -n 1 =1;
And S3, forming a light absorption layer on one side of the lattice variation buffer structure, which is far away from the semiconductor substrate layer.
The method for manufacturing the laser battery will be described in detail with reference to fig. 4 to 6.
Referring to fig. 4, a semiconductor substrate layer 1 is provided, and a bottom buffer layer 4 is formed on one side surface of the semiconductor substrate layer 1.
In one embodiment, the process of forming the underlayer buffer layer 4 includes MOCVD.
In one embodiment, si is used in the formation of the underlayer buffer layer 4 2 H 6 As an n-type doping source, the doping concentration is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 The temperature for forming the underlayer buffer layer 4 is 550 to 700 c, for example, 600 c.
Continuing to refer to fig. 4, forming a lattice variation buffer structure on a surface of the bottom buffer layer 4 facing away from the semiconductor substrate layer 1, wherein the step of forming the lattice variation buffer structure includes forming a first buffer unit to an nth buffer unit which are sequentially stacked from bottom to top; forming an N +1 component stepping layer on one side of the Nth buffer unit, which is far away from the semiconductor substrate layer; n is an integer greater than or equal to 2; the forming of any nth buffer unit of the first to nth buffer units includes: forming an nth component stepping layer; forming an nth component return layer on the surface of one side, away from the semiconductor substrate layer, of the nth component stepping layer; n is an integer greater than or equal to 1 and less than or equal to N; the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes a lattice adjusting element; the component contents of the lattice adjusting elements in the first component stepping layer to the N +1 component stepping layer gradually increase; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; for any nth 1 Composition of stepwise layer, n 2 Composition of the stepping layer and the n-th layer 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component-returning layer is less than the nth component 2 The composition content of the lattice adjusting element in the composition step layer is larger than the nth 1 The composition of the lattice adjusting element in the composition stepping layer; n is a radical of an alkyl radical 1 Is an integer greater than or equal to 1 and less than or equal to N, N 2 Is an integer greater than or equal to 1 and less than or equal to N 2 -n 1 =1。
In one embodiment, si is used in forming the nth component step layer, the nth component return layer and the N +1 th component step layer 2 H 6 As an n-type doping source, the doping concentration is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 The temperature for forming the lattice variation buffer structure is 550 ℃ to 700 ℃, for example 600 ℃.
In one embodiment, the process of forming the lattice-modification buffer structure 2 includes MOCVD.
In one embodiment, the step of forming the lattice variation buffer structure 2 further comprises: forming a component overshoot layer on the surface of one side, away from the semiconductor substrate layer, of the N +1 th component stepping layer; forming a target layer on the surface of one side of the component overshoot layer, which is away from the (N + 1) th component stepping layer; the component content of the lattice adjusting element in the component overshoot layer is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer; the component content of each element in the target layer is correspondingly the same as that of each element in the (N + 1) th component stepping layer.
In one embodiment, si is used in forming the compositional overshoot layer 2 H 6 As an n-type doping source, the doping concentration is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 The temperature at which the compositional overshoot layer is formed is 550 ℃ to 700 ℃, for example 600 ℃. Processes for forming the compositional overshoot layer include MOCVD.
In one embodiment, si is used in the formation of the target layer 2 H 6 As an n-type doping source, the doping concentration is 1E18atom/cm 3 ~5E18atom/cm 3 For example 3E18atom/cm 3 The temperature at which the target layer is formed is 550 ℃ to 700 ℃, for example 600 ℃. The process of forming the target layer includes MOCVD.
In one embodiment, the first through nth buffer units, the (N + 1) th component step layer, the component overshoot layer, and the target layer are formed in the same chamber.
Referring to fig. 5, a light absorbing layer 3 is formed on a side of the lattice-variation buffer structure 2 away from the semiconductor substrate layer 1.
The step of forming the light absorbing layer 3 includes: forming a base layer 31 on one side of the lattice variation buffer structure 200, which faces away from the semiconductor substrate layer 1, wherein the conductivity type of the base layer 31 is the same as that of the lattice variation buffer structure 200; an emitting layer 32 is formed on the surface of one side, opposite to the semiconductor substrate layer 1, of the base layer 31, and the conduction type of the emitting layer 32 is opposite to that of the base layer 31.
In one embodiment, si is used in the process of forming the base layer 31 2 H 6 As an n-type doping source, the doping concentration is 1E17atom/cm 3 ~2E18atom/cm 3 E.g. 1.5E18atom/cm 3 . The temperature at which the base layer 31 is formed is 550 to 700 c, for example, 600 c. The process of forming the base layer includes MOCVD.
In one embodiment, CBr is used in forming emissive layer 32 4 As a p-type doping source, the doping concentration is 1E17atom/cm 3 ~2E18atom/cm 3 E.g. 1.5E18atom/cm 3 . The temperature at which emissive layer 32 is formed is 550 c to 700 c, for example 600 c. The process of forming the emitter layer includes MOCVD.
The preparation method of the laser battery further comprises the following steps: before forming the light absorption layer 3, forming a back field layer 5 on the surface of one side of the lattice variation buffer structure, which faces away from the semiconductor substrate layer 1; after the light absorbing layer 3 is formed, the back field layer 5 is located between the lattice-variation buffer structure 2 and the base layer 31.
In one embodiment, si is used in the process of forming the back field layer 5 2 H 6 As an n-type doping source, the doping concentration is 5E18atom/cm -3 ~2E19atom/cm -3 E.g. 7E18atom/cm -3 . The temperature at which the back field layer 5 is formed is 550 to 700 c, for example 600 c. The process of forming the base layer includes MOCVD.
In one embodiment, with continued reference to fig. 5, further comprising: a window layer 6 is formed on the surface of the emission layer 32 facing away from the semiconductor substrate layer 1.
In one embodiment, CBr is used in the formation of the window layer 6 4 As a p-type doping source, the doping concentration of the p-type doping element is 1E17atom/cm 3 ~2E18atom/cm 3 E.g. 1.5E18atom/cm 3 . The temperature at which the window layer 6 is formed is 550 to 700 c, for example 600 c. The process of forming the window layer 6 includes MOCVD.
Referring to fig. 6, the method for manufacturing the laser battery further includes: and an antireflection film layer 7 is formed on the surface of one side, which faces away from the semiconductor substrate layer 1, of part of the window layer 6.
The process of forming the antireflective film layer 7 includes a plasma enhanced chemical vapor deposition process.
With continued reference to fig. 6, the method of fabricating a laser cell further comprises: an ohmic contact layer 8 is formed on one side surface of a part of the window layer 6, which faces away from the semiconductor substrate layer 1, and the ohmic contact layer 8 surrounds the antireflection film layer 7.
In one embodiment, an antireflection film layer is formed on a side surface, opposite to the semiconductor substrate layer, of a part of the window layer, and then an ohmic contact layer is formed on a side surface, opposite to the semiconductor substrate layer, of a part of the window layer. In another embodiment, an ohmic contact layer is firstly formed on one side surface of a part of the window layer, which faces away from the semiconductor substrate layer, and then an antireflection film layer is formed on one side surface of a part of the window layer, which faces away from the semiconductor substrate layer.
With continued reference to fig. 6, the method of fabricating a laser cell further comprises: forming a first electrode 9 on the surface of one side of the semiconductor substrate layer 1, which is far away from the lattice variation buffer structure 2; and forming a second electrode 10 on the surface of one side, which faces away from the semiconductor substrate layer 1, of the ohmic contact layer 8.
In one embodiment, the process of forming the first electrode 9 includes an evaporation process.
In one embodiment, the process of forming the second electrode 10 includes a sputtering process.
The same contents of the present embodiment as those of the previous embodiments will not be described in detail.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (14)
1. A laser cell, comprising:
a semiconductor substrate layer;
a lattice variation buffer structure located on the semiconductor substrate layer; the lattice variation buffer structure comprises a first buffer unit, an Nth buffer unit and an N +1 th component stepping layer, wherein the first buffer unit, the Nth buffer unit and the N +1 th component stepping layer are sequentially stacked from bottom to top; n is an integer greater than or equal to 2; any nth buffer unit from the first buffer unit to the nth buffer unit comprises an nth component stepping layer and an nth component return layer which are stacked from bottom to top; n is an integer greater than or equal to 1 and less than or equal to N;
the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes a lattice adjusting element;
the component contents of the lattice adjusting elements in the first component stepping layer to the N +1 component stepping layer gradually increase; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; for the arbitrary n-th 1 Composition of stepwise layer, n 2 Composition of the stepping layer and the n-th layer 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 ComponentsThe composition content of the lattice adjusting element in the step layer is larger than that of the n-th layer 1 The composition of the lattice adjusting element in the composition stepping layer; n is 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N 2 -n 1 =1;
And the light absorption layer is positioned on one side of the lattice variation buffer structure, which is far away from the semiconductor substrate layer.
2. The laser cell of claim 1, wherein the semiconductor substrate layer is an n-type GaAs substrate; the element group comprises an n-type doping element, an In element, a Ga element and an As element, and the crystal lattice adjusting element is the In element; the light absorption layer is made of In doped with conductive ions x Ga 1-x As。
3. The laser cell of claim 1, wherein N is an integer greater than or equal to 3; the component content differences of the lattice adjusting elements in any adjacent component stepping layers from the first component stepping layer to the (N + 1) th component stepping layer are equal; the difference of the component contents of the lattice adjusting elements in any adjacent component tempering layers from the first component tempering layer to the Nth component tempering layer is equal.
4. The laser cell of claim 1, wherein the thicknesses of the first component stepping layer to the N +1 th component stepping layer are all equal; the thicknesses of the first component tempering layer to the Nth component tempering layer are equal.
5. The laser cell of claim 1, wherein the step value of the composition content of the lattice adjustment element in any adjacent composition step layer from the first composition step layer to the N +1 th composition step layer is 2% to 4%; the step value of the composition content of the lattice adjusting element in any adjacent one of the first to nth component tuning layers is 1 to 3%.
6. The laser cell of claim 1, wherein the element group comprises an intrinsic element group and a doping element, the intrinsic element group comprising the lattice adjusting element; the light absorption layer has a group of intrinsic elements therein; the component contents of each element in the intrinsic element group in the N +1 th component stepping layer are correspondingly the same as the component contents of each element in the intrinsic element group in the light absorption layer.
7. The laser cell of any of claims 1 to 6, wherein the lattice-variation buffer structure further comprises: the component overshoot layer is positioned on the surface of one side, away from the semiconductor substrate layer, of the N +1 component stepping layer; the target layer is positioned on the surface of one side, away from the (N + 1) th component stepping layer, of the component overshoot layer; the component content of the lattice adjusting element in the component overshoot layer is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer; the component content of each element in the target layer is correspondingly the same as that of each element in the (N + 1) th component stepping layer.
8. The laser cell of claim 7, wherein the difference between the composition content of the lattice adjustment element in the composition overshoot layer and the composition content of the lattice adjustment element in the N +1 th composition step layer is 0.02 to 0.1.
9. The laser cell of claim 7, wherein the compositional overshoot layer has a chemical formula In y Ga 1- y As,0.48<y<0.6。
10. The laser cell of claim 7, wherein the thickness of the component overshoot layer is 400nm to 600nm.
11. The laser battery according to claim 1, wherein the first to nth buffer units each have a thickness of 100nm to 400nm.
12. The laser cell of claim 1, wherein the light absorbing layer comprises: the conductive type of the base region layer is the same as that of the lattice variation buffer structure; and the emitting layer is positioned on the surface of one side, back to the semiconductor substrate layer, of the base region layer, and the conduction type of the emitting layer is opposite to that of the base region layer.
13. The preparation method of the laser battery is characterized by comprising the following steps:
providing a semiconductor substrate layer;
forming a lattice variation buffer structure on the semiconductor substrate layer, wherein the step of forming the lattice variation buffer structure comprises forming a first buffer unit to an Nth buffer unit which are sequentially stacked from bottom to top; forming an N +1 component stepping layer on one side of the Nth buffer unit, which is far away from the semiconductor substrate layer; n is an integer greater than or equal to 2; the forming of any nth buffer unit of the first to nth buffer units includes: forming an nth component stepping layer; forming an nth component return layer on the surface of one side, away from the semiconductor substrate layer, of the nth component stepping layer; n is an integer greater than or equal to 1 and less than or equal to N;
the first component stepping layer to the (N + 1) th component stepping layer and the first component tempering layer to the Nth component tempering layer all contain the same element group; the group of elements includes a lattice adjusting element;
the component contents of the lattice adjusting elements in the first component stepping layer to the N +1 component stepping layer gradually increase; the component contents of the lattice adjusting elements in the first component tempering layer to the Nth component tempering layer are gradually increased; for any nth 1 Composition of stepwise layers, n 2 Composition of the stepping layer and the n-th layer 2 Component adjustment layer, n 2 The component content of the lattice adjusting element in the component adjustment layer is less than the nth 2 The composition content of the lattice adjustment element in the composition step layer is larger than the nth 1 The composition of the lattice adjusting element in the composition stepping layer; n is 1 Is an integer greater than or equal to 1 and less than or equal to N 2 Is an integer greater than or equal to 1 and less than or equal to N 2 -n 1 =1;
And forming a light absorption layer on one side of the lattice variation buffer structure, which is far away from the semiconductor substrate layer.
14. The method of claim 13, wherein the step of forming the lattice-variation buffer structure further comprises: forming a component overshoot layer on the surface of one side, away from the semiconductor substrate layer, of the N +1 th component stepping layer; forming a target layer on the surface of one side of the component overshoot layer, which is far away from the (N + 1) th component stepping layer; the component content of the lattice adjusting element in the component overshoot layer is greater than that of the lattice adjusting element in the (N + 1) th component stepping layer; the component content of each element in the target layer is correspondingly the same as that of each element in the (N + 1) th component stepping layer.
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