CN115547397A - Method, device and equipment for reading chip configuration file information and storage medium - Google Patents
Method, device and equipment for reading chip configuration file information and storage medium Download PDFInfo
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- CN115547397A CN115547397A CN202211491412.0A CN202211491412A CN115547397A CN 115547397 A CN115547397 A CN 115547397A CN 202211491412 A CN202211491412 A CN 202211491412A CN 115547397 A CN115547397 A CN 115547397A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/12005—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising voltage or current generators
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Abstract
The method comprises the steps of reading check code information and configuration file information in a configuration area in a chip according to power-on reading voltage, generating volatile check code information and volatile mismatch file information, wherein the check code information is binary data; according to the method, the power-on reading voltage is adjusted according to the number of 0 and/or 1 in the volatile check code information, the configuration area of the chip is read again according to the adjusted power-on reading voltage, the increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information in the NorFLASH chip is read.
Description
Technical Field
The present application relates to the field of chip technologies, and in particular, to a method, an apparatus, a device, and a storage medium for reading chip configuration file information.
Background
When the NorFLASH chip is powered on, configuration file information in the chip needs to be read, and in the reading process, due to the interference of external factors such as voltage, temperature and the like, the read configuration file information is wrong, so that the flash memory data cannot be correctly read by the chip in a normal flow, and a user mistakenly thinks that the chip has a problem.
The existing method for solving the above problems is generally to place a check code in the configured content area, repeat reading for multiple times if the check code is read incorrectly, and determine that the chip is damaged if the check code is read incorrectly for multiple times, which easily causes the user to mistakenly treat the chip without problems as a damaged chip.
In view of the above problems, no effective technical solution exists at present.
Disclosure of Invention
The present application aims to provide a method, an apparatus, a device and a storage medium for reading chip configuration file information, and aims to solve the problem that a user needs to change reading conditions frequently and spend more time to read correct configuration file information.
In a first aspect, the present application provides a method for reading chip configuration file information, which is used for reading configuration file information in a NorFLASH chip, and the method includes the following steps:
s100, generating volatile check code information and volatile mismatch file information according to check code information and configuration file information in a configuration area in a power-on read voltage reading chip, wherein the check code information is binary data;
s200, adjusting the power-on reading voltage according to the number of 0S and/or 1S in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
According to the method, check code information is set in a configuration area, the check code information corresponds to power-on reading voltage capable of correctly reading configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after adjustment, correct configuration file information is read finally, correct power-on reading voltage can be quickly adjusted through the reading method, and therefore correct configuration information files in a NorFLASH chip can be read quickly.
Optionally, in the method for reading chip configuration file information provided by the present application, when the volatile configuration file information is consistent with the configuration file information, the numbers of 0 and 1 in the volatile check code information are equal.
In the present application, preferably, when the number of 0 s and 1 s in the check code information is equal, the correct configuration file information can be read.
Optionally, in the method for reading chip configuration file information provided by the present application, the step of adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information includes:
s210, if the volatile configuration file information is consistent with the configuration file information, the number of 0S and 1S in the volatile check code information is equal, when the number of 0S in the volatile check code information is more than 1, the power-on reading voltage is increased, and when the number of 0S in the volatile check code information is less than 1, the power-on reading voltage is reduced.
In the application, the power-on reading voltage can be judged to be increased or decreased by comparing the number of 0 s and the number of 1 s in the information of the easy-to-lose check code.
Optionally, in the method for reading chip configuration file information provided by the present application, the step of adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information includes:
s220, calculating the quantity difference value of 0 and 1 in the volatile check code information;
and S221, adjusting the power-on reading voltage according to the quantity difference.
According to the method and the device, the difference value of 0 and 1 in the volatile check code information is calculated, and the adjusting amplitude of the power-on reading voltage is controlled according to the difference value, so that the correct power-on reading voltage is quickly adjusted.
Optionally, in a method for reading chip configuration file information provided by the present application, step S221 includes:
and adjusting the power-on reading voltage according to the product of the number difference and the preset unit voltage adjusting amplitude.
Optionally, in the method for reading chip configuration file information provided by the present application, a plurality of check code information are stored in the configuration area, and the plurality of check code information are set at intervals in the configuration area.
Optionally, in the method for reading chip configuration file information provided by the present application, the check code information is multiple, the multiple check code information is respectively stored in the multiple continuously set storage units in the configuration area in a nonvolatile manner, and the storage units corresponding to different check code information have different threshold voltages.
According to the method for reading the configuration file information of the chip, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 s and 1 s in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information is read.
In a second aspect, the present application provides an apparatus for reading chip configuration file information, where the apparatus for reading chip configuration file information includes:
the reading generation module is used for generating volatile check code information and volatile mismatch configuration file information according to the check code information and the configuration file information in the configuration area of the power-on reading voltage reading chip, wherein the check code information is binary data;
and the adjusting and re-reading module is used for adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
According to the device for reading the configuration file information of the chip, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, the check code information and the configuration file information in the configuration area can be read by reading the generation module, volatile check code information and volatile configuration file information are generated, then the increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 and 1 in the volatile check code information of the regulation and re-reading module, the configuration area is read again after the adjustment, correct configuration file information is finally read, the correct power-on reading voltage can be quickly adjusted by the reading device provided by the application, and therefore the correct configuration information file in the NorFLASH chip can be quickly read.
In a third aspect, the present application provides an electronic device, including a processor and a memory, where the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the electronic device performs the steps as provided in the first aspect: generating volatile check code information and volatile mismatch file information according to check code information and configuration file information in a configuration area in the power-on read voltage read chip, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
In a fourth aspect, the present application provides a storage medium, on which a computer program is stored, and the computer program, when executed by a processor, performs the steps as provided in the first aspect above: generating volatile check code information and volatile mismatch file information according to check code information and configuration file information in a configuration area in the power-on read voltage read chip, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the number of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
It can be known from the above that, according to the method, the check code information is set in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information are generated, increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information is read.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
Fig. 1 is a flowchart illustrating steps of a method for reading chip configuration file information according to an embodiment of the present disclosure.
FIG. 2 is a flowchart illustrating the steps for adjusting the power-on read voltage according to the number of 0 s and/or 1 s in the volatile check code information.
Fig. 3 is a schematic structural diagram of an apparatus for reading chip configuration file information according to this embodiment.
Fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Description of reference numerals: 100. a reading generation module; 200. adjusting a rereading module; 91. a processor; 92. a memory; 93. a communication bus.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. The components of the embodiments of the present application, as generally described and illustrated in the figures herein, could be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as presented in the figures, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Generally, in order to correctly read configuration file information in a configuration area in a NorFLASH chip, a user adds check code information in the configuration area, compares the read check code information with the check code information in the configuration area, and adjusts a power-on reading voltage according to a comparison condition.
In a first aspect, referring to fig. 1, fig. 1 is a flowchart illustrating steps of a method for reading chip configuration file information according to an embodiment of the present application, and the method for reading chip configuration file information shown in fig. 1 is used for reading configuration file information in a NorFLASH chip, and the method includes the following steps:
s100, generating volatile check code information and volatile mismatch configuration file information according to check code information and configuration file information in a configuration area in a power-on read voltage reading chip, wherein the check code information is binary data;
s200, adjusting the power-on reading voltage according to the number of 0S and/or 1S in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
According to the method for reading the configuration file information of the chip, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 s and 1 s in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information is read.
Specifically, a configuration area is arranged in the NorFLASH chip, configuration file information is arranged in the configuration area, correct configuration file information can be read according to correct power-on reading voltage, and if the power-on reading voltage is larger or smaller, the configuration file information cannot be read accurately.
Specifically, the check code information and the configuration file information are fixed information initially written into a configuration area of the NorFLASH chip, the volatile check code information and the volatile configuration file information are temporary read information generated by reading the check code information and the configuration file information based on the power-on reading voltage, the chip can read different volatile check code information and volatile configuration file information according to different power-on reading voltages, and when the volatile check code is correct, the volatile configuration file information is also correct, so that the correctness of the volatile configuration file information can be judged through whether the volatile check code is correct, meanwhile, as the check code information is binary data, when the power-on reading voltage is larger or smaller, the number of 0 s and 1 s in the volatile check code information can be changed, so that the power-on reading voltage can be directionally adjusted according to the number of 0 s and/or 1 s in the volatile check code information, and finally the correct power-on reading voltage is adjusted to read the configuration area, so that the accurate configuration file information is read.
It should be understood that, when the volatile check code information and the volatile configuration file information are obtained, if the volatile check code information is correct, that is, the volatile configuration file information is correct, it is proved that the chip can be normally used, and at this time, the volatile configuration file information read according to the correct power-on reading voltage is directly written into the cache region for subsequent related operations according to the volatile configuration file information.
In some preferred embodiments, in a method for reading chip configuration file information, when volatile configuration file information is consistent with configuration file information, the number of 0 s and 1 s in the volatile check code information is equal.
According to the scheme, the number of 0 s and the number of 1 s in the volatile check code information are equal, so that the voltage for electrifying and reading has two adjusting directions of increasing or decreasing, and the adjusting ranges in the two directions are equal.
In general, reading errors may be caused by incomplete establishment of the power-on reading voltage, in which case the power-on reading voltage is usually low, and generally, a situation that the power-on reading voltage is large does not occur, so that the power-on reading voltage needs to be increased, in other embodiments, all 1 in the check code information may be set, that is, a part 1 in the check code information reads 0 when the power-on reading voltage is not completely established, so that the power-on reading voltage may be accurately adjusted by comparing a difference between the number of 1 in the volatile check code information and the number of 1 in the check code information, for example, the check code information is 8-bit binary data, which is 11111111, the chip presets 8 voltage adjustment steps according to the number of 1, and due to incomplete establishment of the power-on reading voltage, the volatile check code information acquired during reading is 11110, that the number of 1 in the volatile check code information is 1 less than the number of 1 in the check code information, the power-on reading voltage needs to be increased by one step, so that multiple power-on adjustment operations can be avoided.
Optionally, in some embodiments, the numbers of 0 and 1 in the check code information are not equal, and if the numbers of 0 and 1 in the check code information are not equal, the adjustable ranges for increasing and decreasing the power-on read voltage in the two adjustment directions are not the same, as in the above embodiment (where the check code information is all 1), the case where the power-on read voltage needs to be decreased cannot be processed, therefore, preferably, in this embodiment, the numbers of 0 and 1 in the check code information are set to be equal, so that the adjustable intervals for increasing or decreasing the power-on read voltage are equal, and the adaptability to various cases where the power-on read voltage needs to be adjusted is improved.
In some preferred embodiments, in a method for reading chip configuration file information provided by the present application, the step of adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information includes:
s210, if the volatile configuration file information is consistent with the configuration file information, the number of 0S and 1S in the volatile check code information is equal, when the number of 0S in the volatile check code information is more than 1, the power-on reading voltage is increased, and when the number of 0S in the volatile check code information is less than 1, the power-on reading voltage is reduced.
Specifically, in some embodiments, whether the power-on reading voltage is correct may be determined by determining the number of 0 s and 1 s in the volatile check code information, and preferably, in this embodiment, when the number of 0 s and 1 s in the volatile check code information is equal, the read profile information (i.e., the volatile profile information) is accurate, and when the number of 0 s and 1 s in the volatile check code information is not the same, for example, when the number of 0 s is greater than the number of 1 s, the power-on reading voltage is smaller and lower than the threshold voltage of the memory cell where part of data 1 is located, so that 1 s read to be 0, and thus the power-on reading voltage needs to be increased.
In some embodiments, the check code information is 8-bit binary data, when the number of 0 s and 1 s in the volatile check code information is 4, the corresponding power-on read voltage is a correct value, and if the check code information is 01010101, when the volatile check code information is 01010111, that is, the number of 0 s is less than 1, the power-on read voltage needs to be reduced, and reading is performed again after adjustment until the read volatile check code information is 01010101, so that the configuration file information can be read correctly.
In some embodiments, the check code information is set to be 8-bit binary data, and when the number of 0 s and 1 s in the volatile check code information is 4, the corresponding used power-on read voltage is a correct value, the power-on read voltage is adjusted by judging the number of 0 s and 1 s in the volatile check code information, before adjustment, a fixed voltage adjustment amplitude is preset in the chip, that is, each time the power-on read voltage is adjusted, the adjustment amplitude is a preset voltage adjustment amplitude, for example, the preset voltage adjustment amplitude is Vm, when the check code information is 01010101 and the read volatile check code information is 01010100, the power-on read voltage needs to be increased by Vm, re-read is performed according to the increased power-on read voltage, and if the read volatile check code information is not equal to the check code information, adjustment needs to be continued until the volatile check code information is equal to the check code information, and the method can be used for reading the power-on read voltage.
Preferably, in the above embodiment, although directional adjustment of the power-on read voltage is implemented, since the adjustment range is fixed, if the voltage difference is large, multiple times of adjustment are required, therefore, preferably, in this embodiment, multiple gear positions may be set for voltage adjustment according to the number of 0 or 1 in the volatile check code, for example, if the check code information is 8-bit binary data, and when the number of 0 and 1 in the volatile check code information is 4, the power-on read voltage used correspondingly is a correct value, if the volatile check code information is 01010101, i.e., the number of 0 is 4, there is no need to adjust the gear position, the number of 0 is set to be 4 as a standard value, if the volatile check code information is 01010111, i.e., the number of 0 is 3, which is 1 less than the standard value, one gear position needs to be lowered, if the volatile check code information is 01011111, i.e., the number of 0 is 2, which is 2 less than the standard value, two gear positions need to be lowered, and so on; if the check code information that volatilizees is 01010100, and the quantity of 0 is 5, more 1 than the standard value, then need increase a gear, if the check code information that volatilizees is 01010000, the quantity of 0 is 6, more 2 than the standard value, then need increase two gears, so on, can adjust accurate numerical value through this mode with the electricity reading voltage fast, improve and read efficiency.
Preferably, in this embodiment, in order to accurately control the adjustment range of the power-on read voltage, gear division may be performed on the adjustment range, where the gear is a gear preset by the chip to adjust the power-on read voltage, if the check code information is 8-bit binary data, and when the number of 0 s and 1 s in the volatile check code information is 4, the correspondingly used power-on read voltage is a correct value, the voltage increase gear and the voltage decrease gear are both four gears, for example, if the volatile check code information is 01010111 (there is 0 s read into 1 at one position), the power-on read voltage is decreased by one gear, and if the volatile check code information is 01011111 (there are 0 s read into 1 at two positions), the power-on read voltage is decreased by two gears, and so on; if the volatile check code information is 01010100 (1 at one position is read as 0), the power-on reading voltage is increased by one gear, and if the volatile check code information is 01010000 (1 at two positions is read as 0), the power-on reading voltage is increased by two gears, so that the power-on reading voltage can be adjusted to a correct value quickly by the method, and the reading efficiency is improved.
In some preferred embodiments, as shown in fig. 2, fig. 2 is a flowchart illustrating the steps of adjusting the power-on read voltage according to the number of 0 s and/or 1 s in the volatile check code information, where the steps include:
s220, calculating the quantity difference value of 0 and 1 in the volatile check code information;
and S221, adjusting the power-on reading voltage according to the quantity difference.
In this embodiment, preferably, the check code information is 8-bit binary data, and when the number of 0 and 1 in the volatile check code information is 4, the correspondingly used power-on read voltage is a correct value, at this time, whether the power-on read voltage is correct or not can be determined according to the difference between the number of 0 and 1 in the volatile check code information, preferably, in this embodiment, when the number of 0 and 1 in the volatile check code information is equal, the read configuration file information (i.e., volatile configuration file information) is accurate, and when the number of 0 and 1 in the volatile check code information is different, it represents that the used power-on read voltage is incorrect, and the configuration file information cannot be correctly read, so that the power-on read voltage needs to be adjusted.
In some preferred embodiments, in a method for reading chip configuration file information, step S221 includes:
and adjusting the power-on reading voltage according to the product of the number difference and the preset unit voltage adjusting amplitude.
Specifically, in the present application, a unit voltage adjustment amplitude is preset, after a quantity difference between 0 and 1 in volatile check code information is calculated, the quantity difference is multiplied by the unit voltage adjustment amplitude, so as to obtain a power-on read voltage value to be adjusted, and the power-on read voltage value to be adjusted is adjusted, if the check code information is 8-bit binary data, when the quantity of 0 and 1 in the volatile check code information is 4, the correspondingly used power-on read voltage is a correct value, a unit voltage adjustment amplitude is set to Vh before reading, if the volatile check code information is 01010111, that is, the quantity difference between 0 and 1 is-2, the voltage value to be adjusted is-2 Vh, that is, the volatile check code information obtained by re-reading after 2Vh is reduced is 01010101, so that correct configuration file information can be read according to the adjusted power-on read voltage, similarly, if the volatile check code information is 01010100, that is, the quantity difference between 0 and 1 is 2, the voltage value to be adjusted is 2Vh, that the correct configuration file information is read after 2Vh is read according to the volatile check code information obtained by increasing 2Vh, so that the correct configuration file information can be read by adjusting the power-on read, and the read by adjusting the power-on read voltage, so that the correct configuration file reading efficiency can be accurately read by adjusting the configuration file.
In some preferred embodiments, in the method for reading chip configuration file information provided by the present application, a plurality of check code information are stored in a configuration area, and the plurality of check code information are arranged at intervals in the configuration area.
Specifically, a plurality of configuration file information are arranged in the NorFLASH chip, and in the reading process, the power-on reading voltage may be changed due to the fact that current passes through each element in the chip, so that all the configuration file information in the chip can be read completely when the chip is read, check code information is arranged among the configuration file information at intervals, the power-on reading voltage is automatically corrected in the reading process, specifically, the next check code information is read after one piece of configuration file information is read completely, if the volatile check code information is equal to the check code information, the next configuration file information is continuously read, if the read volatile check code information is not equal to the check code information, the power-on reading voltage needs to be adjusted according to the volatile check code information, the check code information is read again until the volatile check code information is equal to the check code information, and then the next configuration file information is read, so that the reading accuracy and stability are guaranteed.
In some preferred embodiments, in the method for reading chip configuration file information provided by the present application, a plurality of check code information are provided, and the plurality of check code information are respectively stored in a nonvolatile manner in a plurality of continuously arranged memory cells in a configuration area, where the memory cells corresponding to different check code information have different threshold voltages.
Specifically, in this embodiment, different check code information corresponds to different power-on read voltages, and the magnitude of the power-on read voltages needs to be reflected by the different check code information in the reading process, so that a plurality of storage units are disposed in the configuration area and used for storing the different check code information, specifically, the different storage units have different threshold voltages, and when reading, the storage units in the corresponding threshold voltage interval are read according to the power-on read voltages, so as to read the check code information in the storage units, thereby comparing the read check code information (i.e., volatile check code information) with the check code information, and adjusting the power-on read voltages according to the comparison result.
According to the method for reading the configuration file information of the chip, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 s and 1 s in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information is read.
In a second aspect, referring to fig. 3, fig. 3 is a schematic structural diagram of an apparatus for reading chip configuration file information according to this embodiment, and the apparatus for reading chip configuration file information shown in fig. 3 includes:
the reading generation module 100 is configured to generate volatile check code information and volatile mismatch configuration file information according to check code information and configuration file information in a configuration area in the power-on read voltage read chip, where the check code information is binary data;
and the adjusting and re-reading module 200 is configured to adjust the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information, and re-read the configuration area of the chip according to the adjusted power-on reading voltage.
According to the device for reading the configuration file information of the chip, the check code information is arranged in the configuration area and corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, the check code information and the configuration file information in the configuration area can be read through the reading generation module 100, volatile check code information and volatile configuration file information are generated, then the increase or decrease of the power-on reading voltage can be adjusted through adjusting the re-reading module 200 according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information is read.
In a third aspect, referring to fig. 4, fig. 4 is an electronic device provided by the present application, including: the processor 91 and the memory 92, the processor 91 and the memory 92 being interconnected and in communication via a communication bus 93 and/or other form of connection mechanism (not shown), the memory 92 storing computer-readable instructions executable by the processor 91, the processor 91 executing the computer-readable instructions when the electronic device is operating to perform any of the alternative implementations of the above embodiments to implement the following functions: generating volatile check code information and volatile mismatch file information according to check code information and configuration file information in a configuration area in the power-on read voltage read chip, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
In a fourth aspect, the present application provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor 91, the computer program performs the method in any optional implementation manner of the foregoing embodiment to implement the following functions: generating volatile check code information and volatile mismatch file information according to check code information and configuration file information in a configuration area in the power-on read voltage read chip, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
According to the method, the device, the equipment and the storage medium for reading the configuration file information of the chip, check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally adjusted according to the number of 0 s and 1 s in the volatile check code information, the configuration area is read again after adjustment, and finally correct configuration file information is read.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, a division of a unit is merely a division of one logic function, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist alone, or two or more modules may be integrated to form an independent part.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A method for reading chip configuration file information is used for reading configuration file information in a NorFLASH chip, and is characterized by comprising the following steps:
s100, reading check code information and configuration file information in a configuration area in the chip according to the power-on reading voltage, and generating volatile check code information and volatile mismatch file information, wherein the check code information is binary data;
s200, adjusting the power-on reading voltage according to the number of 0S and/or 1S in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
2. The method as claimed in claim 1, wherein when the volatile configuration file information is identical to the configuration file information, the volatile check code information has an equal number of 0's and 1's.
3. The method for reading chip configuration file information according to claim 2, wherein the step of adjusting the power-on read voltage according to the number of 0 s and/or 1 s in the volatile check code information comprises:
s210, if the volatile configuration file information is consistent with the configuration file information, and the number of 0 and 1 in the volatile check code information is equal, when the number of 0 in the volatile check code information is more than 1, the power-on reading voltage is increased, and when the number of 0 in the volatile check code information is less than 1, the power-on reading voltage is decreased.
4. The method for reading chip configuration file information according to claim 1, wherein the step of adjusting the power-on read voltage according to the number of 0 s and/or 1 s in the volatile check code information comprises:
s220, calculating the quantity difference value of 0 and 1 in the volatile check code information;
and S221, adjusting the power-on reading voltage according to the quantity difference.
5. The method of claim 4, wherein step S221 comprises:
and adjusting the power-on reading voltage according to the product of the quantity difference and a preset unit voltage adjusting amplitude.
6. The method according to claim 1, wherein a plurality of check code information are stored in the configuration area, and the check code information is arranged at intervals in the configuration area.
7. The method for reading chip configuration file information according to claim 1, wherein a plurality of check code information are provided, the plurality of check code information are respectively stored in a nonvolatile manner in a plurality of consecutively arranged storage units in the configuration area, and the storage units corresponding to different check code information have different threshold voltages.
8. An apparatus for reading chip configuration file information, the apparatus for reading chip configuration file information comprising:
the reading generation module (100) is used for reading the check code information and the configuration file information in the configuration area in the chip according to the power-on reading voltage and generating volatile check code information and volatile mismatch file information, wherein the check code information is binary data;
and the adjusting and re-reading module (200) is used for adjusting the power-on reading voltage according to the number of 0 s and/or 1 s in the volatile check code information and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
9. An electronic device, comprising a processor (91) and a memory (92), the memory (92) storing computer readable instructions which, when executed by the processor (91), perform the steps of the method according to any one of claims 1-7.
10. A storage medium on which a computer program is stored, wherein the computer program, when being executed by a processor (91), performs the steps of the method according to any one of the claims 1-7.
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