CN115547397B - Method, device, equipment and storage medium for reading chip configuration file information - Google Patents
Method, device, equipment and storage medium for reading chip configuration file information Download PDFInfo
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- CN115547397B CN115547397B CN202211491412.0A CN202211491412A CN115547397B CN 115547397 B CN115547397 B CN 115547397B CN 202211491412 A CN202211491412 A CN 202211491412A CN 115547397 B CN115547397 B CN 115547397B
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- G11—INFORMATION STORAGE
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- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/12005—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising voltage or current generators
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Abstract
The application relates to the technical field of chips, in particular to a method, a device, equipment and a storage medium for reading chip configuration file information, wherein the method is used for reading check code information and configuration file information in a configuration area in a chip according to power-on reading voltage to generate volatile check code information and volatile configuration file information, wherein the check code information is binary data; the power-on reading voltage is adjusted according to the quantity of 0 and/or 1 in the volatile check code information, and the configuration area of the chip is read again according to the adjusted power-on reading voltage.
Description
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to a method, an apparatus, a device, and a storage medium for reading chip configuration file information.
Background
When the NorFLASH chip is powered on, configuration file information in the chip needs to be read, and in the reading process, the read configuration file information is wrong due to the interference of external factors such as voltage, temperature and the like, so that the chip cannot correctly read flash memory data under the normal flow, and a user mistakenly considers that the chip has a problem.
In the conventional method for solving the above problems, a check code is generally placed in a configuration content area, if the check code is read in error, the check code is read repeatedly for multiple times, and if the check code is read in error for multiple times, the chip is determined to be damaged, so that a user can treat the chip without problems as a bad chip by mistake.
In view of the above problems, no effective technical solution is currently available.
Disclosure of Invention
The invention aims to provide a method, a device, equipment and a storage medium for reading chip configuration file information, which aim to solve the problem that a user needs to change reading conditions frequently and takes more time to read correct configuration file information.
In a first aspect, the present application provides a method for reading chip configuration file information, configured to read configuration file information in a NorFLASH chip, where the method includes the following steps:
s100, reading check code information and configuration file information in a configuration area in a chip according to a power-on reading voltage, and generating volatile check code information and volatile configuration file information, wherein the check code information is binary data;
s200, adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
In the application, check code information is set in a configuration area, the check code information corresponds to power-on reading voltage capable of correctly reading configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information are generated, the increase or decrease of the power-on reading voltage can be directionally regulated according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after regulation, and finally correct configuration file information is read, and correct power-on reading voltage can be quickly regulated by the reading method provided by the application, so that correct configuration information files in a NorFLASH chip can be quickly read.
Optionally, in the method for reading the chip configuration file information provided by the application, when the easy-to-mismatch configuration file information is consistent with the configuration file information, the number of 0 s and 1 s in the easy-to-mismatch check code information is equal.
In this application, preferably, when the number of 0 s and 1 s in the check code information is equal, the correct configuration file information can be read out.
Optionally, the method for reading the chip configuration file information provided by the present application includes the steps of adjusting the power-on reading voltage according to the number of 0 and/or 1 in the volatile check code information:
s210, if the number of 0S and 1S in the volatile check code information is equal to the number of the configuration file information when the volatile check code information is consistent with the configuration file information, increasing the power-on reading voltage when the number of 0S in the volatile check code information is more than 1S, and decreasing the power-on reading voltage when the number of 0S in the volatile check code information is less than 1S.
In the application, the power-on reading voltage can be judged to be increased or decreased by comparing the number of 0 and 1 in the volatile check code information.
Optionally, the method for reading the chip configuration file information provided by the present application includes the steps of adjusting the power-on reading voltage according to the number of 0 and/or 1 in the volatile check code information:
s220, calculating the quantity difference value of 0 and 1 in the volatile check code information;
s221, adjusting the power-on reading voltage according to the quantity difference value.
According to the method and the device, the difference value of the quantity 0 and the quantity 1 in the volatile check code information is calculated, and the adjustment amplitude of the power-on reading voltage is controlled according to the quantity difference value, so that the correct power-on reading voltage is quickly adjusted.
Optionally, the method for reading chip configuration file information provided in the present application, step S221 includes:
and adjusting the power-on reading voltage according to the product of the quantity difference value and the preset unit voltage adjusting amplitude.
Optionally, in the method for reading the configuration file information of the chip provided by the present application, a plurality of pieces of check code information are stored in the configuration area, and the plurality of pieces of check code information are set at intervals in the configuration area.
Optionally, in the method for reading chip configuration file information provided by the present application, the number of check code information is multiple, and the multiple check code information is respectively stored in multiple storage units in the configuration area, where the storage units corresponding to different check code information have different threshold voltages.
According to the method for reading the chip configuration file information, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally regulated according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after regulation, and the correct configuration file information is finally read.
In a second aspect, the present application provides an apparatus for reading chip profile information, where the apparatus for reading chip profile information includes:
the reading generation module is used for reading the check code information and the configuration file information in the configuration area in the chip according to the power-on reading voltage to generate volatile check code information and volatile configuration file information, wherein the check code information is binary data;
the adjusting rereading module is used for adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information and rereading the configuration area of the chip according to the adjusted power-on reading voltage.
According to the device for reading the configuration file information of the chip, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, the check code information and the configuration file information in the configuration area can be read through the reading generation module, volatile check code information and volatile configuration file information are generated, then the power-on reading voltage can be directionally adjusted to increase or decrease according to the quantity of 0 and 1 in the volatile check code information of the re-reading module, the configuration area is re-read after adjustment, and finally correct configuration file information is read, and the correct power-on reading voltage can be quickly adjusted through the reading device provided by the application, so that the correct configuration file in the NorFLASH chip can be quickly read.
In a third aspect, the present application provides an electronic device comprising a processor and a memory storing computer readable instructions which, when executed by the processor, perform the steps as provided in the first aspect above: reading check code information and configuration file information in a configuration area in the chip according to the power-on reading voltage, and generating volatile check code information and volatile configuration file information, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
In a fourth aspect, the present application provides a storage medium having stored thereon a computer program which, when executed by a processor, performs the steps as provided in the first aspect above: reading check code information and configuration file information in a configuration area in the chip according to the power-on reading voltage, and generating volatile check code information and volatile configuration file information, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
As can be seen from the foregoing, according to the method, the device, the apparatus and the storage medium for reading the configuration file information of the chip provided by the present application, the check code information is set in the configuration area, and the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. The objects and other advantages of the present application may be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
Fig. 1 is a flowchart of steps of a method for reading chip configuration file information according to an embodiment of the present application.
FIG. 2 is a flowchart illustrating the steps for adjusting the power-on read voltage according to the number of 0 and/or 1 in the volatile check code information.
Fig. 3 is a schematic structural diagram of an apparatus for reading chip configuration file information according to the present embodiment.
Fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Description of the reference numerals: 100. a reading generation module; 200. adjusting the rereading module; 91. a processor; 92. a memory; 93. a communication bus.
Detailed Description
The following description of the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the drawings in the embodiments of the present application, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to be within the scope of the present application.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
In general, in order to correctly read configuration file information in a configuration area in a NorFLASH chip, a user adds check code information in the configuration area, compares the read check code information with the check code information in the configuration area, and adjusts a power-on reading voltage according to the comparison condition, however, in general, the adjustment is not directional adjustment, and the user is required to continuously adjust to finally obtain an accurate power-on reading voltage.
In a first aspect, referring to fig. 1, fig. 1 is a flowchart illustrating steps of a method for reading chip configuration file information according to an embodiment of the present application, and a method for reading chip configuration file information shown in fig. 1 is used for reading configuration file information in a NorFLASH chip, where the method includes the following steps:
s100, reading check code information and configuration file information in a configuration area in a chip according to a power-on reading voltage, and generating volatile check code information and volatile configuration file information, wherein the check code information is binary data;
s200, adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
According to the method for reading the configuration file information of the chip, check code information is arranged in the configuration area, the check code information corresponds to power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally regulated according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after regulation, and finally correct configuration file information is read, and the correct power-on reading voltage can be quickly regulated through the reading method provided by the application, so that a correct configuration file in a NorFLASH chip can be quickly read.
Specifically, a configuration area is arranged in the NorFLASH chip, configuration file information is arranged in the configuration area, the correct configuration file information can be read according to correct power-on reading voltage, if the power-on reading voltage is larger or smaller, the configuration file information cannot be accurately read, and therefore check code information is also arranged in the configuration area, whether the current power-on reading voltage is correct or not can be judged through reading the check code information, and if the power-on reading voltage is incorrect, adjustment can be performed.
Specifically, the check code information and the configuration file information are fixed information which is initially written in the configuration area of the NorFLASH chip, the volatile check code information and the volatile configuration file information are temporary read information generated by reading the check code information and the configuration file information based on the power-on read voltage, the chip can read different volatile check code information and volatile configuration file information according to different power-on read voltages, when the volatile check code is correct, the volatile configuration file information is also correct, so that whether the volatile configuration file information is correct or not can be judged through the volatile check code, meanwhile, because the check code information is binary data, the quantity of 0 and 1 in the volatile check code information is changed when the power-on read voltage is larger or smaller, the power-on read voltage can be directionally adjusted according to the quantity of 0 and/or 1 in the volatile check code information, and finally the configuration area is read according to the correct power-on read voltage, so that the accurate configuration file information is read.
It should be understood that when the volatile check code information and the volatile configuration file information are obtained, if the volatile check code information is correct, the volatile configuration file information is correct, so that the chip can be proved to be used normally, and the volatile configuration file information read according to the correct power-on reading voltage is directly written into the cache area for subsequent related operation according to the volatile configuration file information.
In some preferred embodiments, in the method for reading chip configuration file information provided in the present application, when the volatile configuration file information is consistent with the configuration file information, the number of 0 s and 1 s in the volatile check code information is equal.
The volatile check code information is equal in number of 0 and 1, so that the power-on reading voltage has two adjusting directions for increasing or decreasing, and the adjusting ranges in the two directions are equal.
In general, the power-on read voltage may not be fully established, so that a read error may be caused, in this case, the power-on read voltage is generally lower, and a situation that the power-on read voltage is larger does not generally occur, so that an increase process is required for the power-on read voltage, in other embodiments, all 1 s in the check code information may be set, that is, when the power-on read voltage is not fully established, a part 1 s in the check code information may be read as 0 s, and thus, by comparing the difference value between the number of 1 s in the volatile check code information and the number of 1 s in the check code information, the power-on read voltage may be accurately adjusted, for example, the check code information is 8-bit binary data, and is 11111111, 8 voltage adjustment steps may be preset according to the number of 1 s, and because the power-on read voltage is not fully established, so that the number of 1 s in the volatile check code information acquired during reading is 11111111110, that the number of 1 s in the volatile check code information is less than 1 s in the check code information, the power-on read voltage needs to be adjusted by one step, and multiple power-on read steps may be avoided.
Optionally, in some embodiments, the number of 0 s and 1 s in the check code information is not equal, if the number of 0 s and 1 s in the check code information is not equal, the adjustable ranges of the two adjustment directions for increasing and decreasing the power-on read voltage are not the same, in the previous embodiment (the check code information is all 1 s), the situation that the power-on read voltage needs to be decreased cannot be processed, so preferably, in the present embodiment, the number of 0 s and 1 s in the check code information is set to be equal, so that the adjustable intervals for increasing or decreasing the power-on read voltage are equal, and the adaptability to various situations that need to adjust the power-on read voltage is improved.
In some preferred embodiments, a method for reading chip configuration file information according to the present application includes the steps of adjusting a power-on read voltage according to the number of 0 and/or 1 in volatile check code information:
s210, if the number of 0S and 1S in the volatile check code information is equal to the number of the configuration file information when the volatile check code information is consistent with the configuration file information, increasing the power-on reading voltage when the number of 0S in the volatile check code information is more than 1S, and decreasing the power-on reading voltage when the number of 0S in the volatile check code information is less than 1S.
Specifically, in some embodiments, whether the power-on read voltage is correct may be determined by determining the number of 0 s and 1 s in the volatile check code information, preferably, in this embodiment, when the number of 0 s and 1 s in the volatile check code information is equal, the read configuration file information (i.e., the volatile configuration file information) is accurate, and when the number of 0 s and 1 s in the volatile check code information is different, for example, the number of 0 s is greater than the number of 1 s, because the power-on read voltage is smaller and is lower than the threshold voltage of the memory cell where the partial data 1 is located, resulting in reading 1 as 0 s, so that the power-on read voltage needs to be increased.
In some embodiments, the check code information is 8-bit binary data, when the number of 0 and 1 in the volatile check code information is 4, the corresponding power-on read voltage is the correct value, when the check code information is 01010101, and when the volatile check code information is 01010111, that is, the number of 0 is less than 1, the power-on read voltage needs to be reduced, and after adjustment, the read is performed again until the read volatile check code information is 01010101, and the configuration file information can be correctly read.
In some embodiments, the check code information is set to be 8-bit binary data, when the number of 0 and 1 in the volatile check code information is 4, the corresponding power-on read voltage is set to be the correct value, the power-on read voltage is adjusted by judging the number of 0 and 1 in the volatile check code information, and before adjustment, a fixed voltage adjustment amplitude is preset in the chip, that is, each time the power-on read voltage is adjusted, the adjustment amplitude is preset, for example, the preset voltage adjustment amplitude is Vm, when the check code information is 01010101, and the read volatile check code information is 01010100, the power-on read voltage needs to be adjusted to be Vm, re-read according to the adjusted power-on read voltage, if the read volatile check code information is still unequal to the check code information, the adjustment is continued until the volatile check code information is equal to the check code information, and the power-on read voltage can be directionally read.
Preferably, although the above embodiment implements directional adjustment of the power-on read voltage, since the adjustment amplitude is fixed, if the voltage difference is large, multiple adjustments are required, so in this embodiment, preferably, multiple gears may be set for voltage adjustment according to the number of 0 or 1 in the volatile check code, for example, if the check code information is 8-bit binary data, and when the number of 0 and 1 in the volatile check code information is 4, the power-on read voltage used is the correct value, if the volatile check code information is 01010101, that is, the number of 0 is 4, there is no need to adjust the gears, the number of 0 is set to be 4 as a standard value, if the volatile check code information is 10111, that is, the number of 0 is 3, less than the standard value is 1, there is a need to reduce one gear, if the volatile check code information is 01011111, that is the number of 0 is 2, less than the standard value is 2, there is a need to reduce two gears, and so on; if the number of volatile check code information is 01010100, namely 0 is 5 and is more than 1 than the standard value, one gear needs to be increased, if the number of volatile check code information is 01010000, namely 0 is 6 and is more than 2 than the standard value, two gears need to be increased, and the like, the power-on reading voltage can be quickly adjusted to the correct value by the mode, and the reading efficiency is improved.
Preferably, in this embodiment, in order to accurately control the adjustment range of the power-on read voltage, the adjustment range may be divided into a power-on read voltage adjustment range preset by the chip, if the check code information is 8-bit binary data, and when the number of 0 and 1 in the volatile check code information is 4, the power-on read voltage correspondingly used is a correct value, the voltage increasing range and the voltage decreasing range are both four ranges, for example, if the volatile check code information is 01010111 (0 in one position is read into 1), the power-on read voltage is decreased by one range, if the volatile check code information is 01011111 (0 in two positions is read into 1), the power-on read voltage is decreased by two ranges, and so on; if the volatile check code information is 01010100 (1 at one position is read into 0), the power-on reading voltage is increased by one step, if the volatile check code information is 01010000 (1 at two positions is read into 0), the power-on reading voltage is increased by two steps, and the like, so that the power-on reading voltage can be quickly regulated to a correct value, and the reading efficiency is improved.
In some preferred embodiments, as shown in fig. 2, fig. 2 is a flowchart of a step of adjusting a power-on read voltage according to the number of 0 and/or 1 in the volatile check code information, where the step includes:
s220, calculating the quantity difference value of 0 and 1 in the volatile check code information;
s221, adjusting the power-on reading voltage according to the quantity difference value.
In this embodiment, preferably, the check code information is 8-bit binary data, when the number of 0 and 1 in the volatile check code information is 4, the corresponding power-on read voltage is the correct value, at this time, it may be determined whether the power-on read voltage is correct according to the number difference between 0 and 1 in the volatile check code information, preferably, in this embodiment, when the number of 0 and 1 in the volatile check code information is equal, the read configuration file information (i.e. the volatile configuration file information) is accurate, when the number of 0 and 1 in the volatile check code information is different, it represents that the power-on read voltage used is incorrect, and the configuration file information cannot be correctly read, so that the power-on read voltage needs to be adjusted.
In some preferred embodiments, a method for reading chip configuration file information, step S221 includes:
and adjusting the power-on reading voltage according to the product of the quantity difference value and the preset unit voltage adjusting amplitude.
Specifically, in the application, a unit voltage adjustment amplitude is preset, after the number difference between 0 and 1 in the volatile check code information is calculated, the number difference is multiplied by the unit voltage adjustment amplitude, so that a power-on reading voltage value to be adjusted is obtained, and adjustment is performed, if the check code information is 8-bit binary data, when the number of 0 and 1 in the volatile check code information is 4, the power-on reading voltage to be correspondingly used is a correct value, the unit voltage adjustment amplitude is set to be Vh before reading, if the volatile check code information is 01010111, namely, the number difference between 0 and 1 is-2, the voltage value to be adjusted is-2 Vh, namely, the volatile check code information to be re-read after reducing by 2Vh is 01010101, so that correct configuration file information can be read according to the adjusted power-on reading voltage, and similarly, if the volatile check code information is 01010100, namely, the number difference between 0 and 1 is 2, the voltage value to be adjusted is 2 h, namely, the voltage value to be re-read is 01010101 after increasing 2 h, and the power-on reading efficiency can be accurately read according to the configuration file after adjustment.
In some preferred embodiments, in the method for reading chip configuration file information provided by the present application, a plurality of pieces of check code information are stored in a configuration area, and the plurality of pieces of check code information are set at intervals in the configuration area.
Specifically, a plurality of configuration file information are arranged in the NorFLASH chip, in the reading process, current passes through each element in the chip, so that the power-on reading voltage possibly changes, in order to ensure that all configuration file information in the chip can be read out when the chip is read, check code information is arranged among the plurality of configuration file information at intervals, so that the power-on reading voltage is automatically corrected in the reading process, specifically, the next check code information is read after one configuration file information is read out, if the volatile check code information is equal to the check code information, the next configuration file information is continuously read, if the read volatile check code information is unequal to the check code information, the power-on reading voltage is regulated according to the volatile check code information, and the check code information is re-read until the volatile check code information is equal to the check code information, so that the accuracy and the stability of the reading are ensured.
In some preferred embodiments, in the method for reading chip configuration file information provided by the present application, a plurality of pieces of check code information are provided, and the plurality of pieces of check code information are respectively stored in a plurality of storage units which are arranged in a configuration area in a nonvolatile manner, and the storage units corresponding to different pieces of check code information have different threshold voltages.
Specifically, in this embodiment, different pieces of check code information correspond to different power-on read voltages, and in the reading process, the magnitude of the power-on read voltage needs to be reflected by the different pieces of check code information, so a plurality of storage units are provided in a configuration area and are used for storing different pieces of check code information, specifically, the different storage units have different threshold voltages, and when reading, the storage units in the corresponding threshold voltage intervals are read according to the power-on read voltages, so that the check code information in the storage units is read, and therefore, the read check code information (i.e., volatile check code information) is compared with the check code information, and the power-on read voltage is adjusted according to a comparison result.
According to the method for reading the configuration file information of the chip, check code information is arranged in the configuration area, the check code information corresponds to power-on reading voltage capable of correctly reading the configuration file information in the configuration area, when a user reads the check code information and the configuration file information in the configuration area, volatile check code information and volatile configuration file information can be generated, the increase or decrease of the power-on reading voltage can be directionally regulated according to the number of 0 and 1 in the volatile check code information, the configuration area is read again after regulation, and finally correct configuration file information is read, and the correct power-on reading voltage can be quickly regulated through the reading method provided by the application, so that a correct configuration file in a NorFLASH chip can be quickly read.
In a second aspect, referring to fig. 3, fig. 3 is a schematic structural diagram of an apparatus for reading chip configuration file information according to the present embodiment, and the apparatus for reading chip configuration file information shown in fig. 3 includes:
the reading generation module 100 is configured to read the check code information and the configuration file information in the configuration area of the chip according to the power-on reading voltage, and generate volatile check code information and volatile configuration file information, where the check code information is binary data;
the adjusting rereading module 200 is configured to adjust the power-on reading voltage according to the number of 0 and/or 1 in the volatile check code information, and reread the configuration area of the chip according to the adjusted power-on reading voltage.
According to the device for reading the configuration file information of the chip, the check code information is arranged in the configuration area, the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area, the check code information and the configuration file information in the configuration area can be read through the reading generation module 100, volatile check code information and volatile configuration file information are generated, then the power-on reading voltage can be adjusted to be increased or decreased according to the number of 0 and 1 in the volatile check code information through the adjusting re-reading module 200, the configuration area is re-read after adjustment, and finally correct configuration file information is read, and the correct power-on reading voltage can be quickly adjusted through the reading device provided by the application, so that the correct configuration file in the NorFLASH chip can be quickly read.
In a third aspect, referring to fig. 4, fig. 4 is an electronic device provided in the present application, including: processor 91 and memory 92, the processor 91 and memory 92 being interconnected and in communication with each other by a communication bus 93 and/or other form of connection mechanism (not shown), the memory 92 storing computer readable instructions executable by the processor 91 for execution by the processor 91 when the electronic device is operating to perform any of the alternative implementations of the above embodiments to perform the functions of: reading check code information and configuration file information in a configuration area in the chip according to the power-on reading voltage, and generating volatile check code information and volatile configuration file information, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
In a fourth aspect, the present application provides a storage medium having stored thereon a computer program which, when executed by the processor 91, performs a method in any of the alternative implementations of the above embodiments to implement the following functions: reading check code information and configuration file information in a configuration area in the chip according to the power-on reading voltage, and generating volatile check code information and volatile configuration file information, wherein the check code information is binary data; and adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage.
As can be seen from the foregoing, according to the method, the device, the apparatus and the storage medium for reading the configuration file information of the chip provided by the present application, the check code information is set in the configuration area, and the check code information corresponds to the power-on reading voltage capable of correctly reading the configuration file information in the configuration area.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The above-described apparatus embodiments are merely illustrative, for example, the division of units is merely a logical function division, and there may be other manners of division in actual implementation, and for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some communication interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form.
Further, the units described as separate units may or may not be physically separate, and units displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Furthermore, functional modules in various embodiments of the present application may be integrated together to form a single portion, or each module may exist alone, or two or more modules may be integrated to form a single portion.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above is only an example of the present application, and is not intended to limit the scope of the present application, and various modifications and variations will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.
Claims (5)
1. The method for reading the configuration file information of the chip is used for reading the configuration file information in the NorFLASH chip, and is characterized in that a plurality of gears for adjusting the power-on reading voltage are preset in the NorFLASH chip, and the method comprises the following steps:
s100, reading check code information and configuration file information in a configuration area in the chip according to a power-on reading voltage, generating volatile check code information and volatile configuration file information, wherein the check code information is binary data, a plurality of check code information arranged at intervals are arranged in the configuration area, and storage units corresponding to different check code information have different threshold voltages;
s200, adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information, and re-reading the configuration area of the chip according to the adjusted power-on reading voltage, wherein the step of adjusting the power-on reading voltage according to the quantity of 0 and/or 1 in the volatile check code information comprises the following steps: and obtaining the number of 0 or 1 in the volatile check code information, comparing the number with a preset standard value of the number of 0 or 1, and adjusting the power-on reading voltage to the corresponding gear according to the difference value.
2. The method of claim 1, wherein the number of 0 s and 1 s in the volatile check code information is equal when the volatile configuration file information is identical to the configuration file information.
3. The device for reading the chip configuration file information is characterized in that a plurality of gears for adjusting the power-on reading voltage are preset in a NorFLASH chip, and the device for reading the chip configuration file information comprises:
the reading generation module (100) is used for reading the check code information and the configuration file information in the configuration area in the chip according to the power-on reading voltage to generate volatile check code information and volatile configuration file information, the check code information is binary data, a plurality of check code information arranged at intervals are arranged in the configuration area, and storage units corresponding to different check code information have different threshold voltages;
the adjusting rereading module (200) is configured to adjust the power-on reading voltage according to the number of 0 and/or 1 in the volatile check code information, and reread the configuration area of the chip according to the adjusted power-on reading voltage, and the step of adjusting the power-on reading voltage according to the number of 0 and/or 1 in the volatile check code information includes: and obtaining the number of 0 or 1 in the volatile check code information, comparing the number with a preset standard value of the number of 0 or 1, and adjusting the power-on reading voltage to the corresponding gear according to the difference value.
4. An electronic device comprising a processor (91) and a memory (92), the memory (92) storing computer readable instructions which, when executed by the processor (91), perform the steps of the method according to any of claims 1-2.
5. A storage medium having stored thereon a computer program which, when executed by a processor (91), performs the steps of the method according to any of claims 1-2.
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| CN109119110B (en) * | 2017-06-26 | 2021-02-23 | 中国科学院微电子研究所 | Method for reinforcing total dose effect resistance of flash memory circuit |
| US11521700B2 (en) * | 2021-01-04 | 2022-12-06 | Innogrit Technologies Co., Ltd. | Reference voltage adjustment based on post-decoding and pre-decoding state information |
| CN113409837A (en) * | 2021-06-28 | 2021-09-17 | 芯天下技术股份有限公司 | Method and device for adjusting read operation voltage value, electronic equipment and storage medium |
| CN114333951A (en) * | 2021-12-30 | 2022-04-12 | 合肥大唐存储科技有限公司 | Method and device for re-reading flash memory |
| CN115312104B (en) * | 2022-09-30 | 2022-12-13 | 芯天下技术股份有限公司 | Flash memory chip configuration information reading method and device, electronic equipment and storage medium |
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