CN115544954A - Device leakage current model and extraction method thereof - Google Patents
Device leakage current model and extraction method thereof Download PDFInfo
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Abstract
The invention discloses a device leakage current model used for simulating leakage current of a semiconductor device. The leakage current of the device leakage current model is formed by multiplying the body function by the first function. The first function is a function formed by the environment parameters of the active area of the semiconductor device and is used for simulating the influence of the environment of the active area on the leakage current. The invention also discloses an extraction method of the device leakage current model. The method can simulate the influence of the active region environment on the leakage current of the device, thereby improving the fitting precision of the model and being beneficial to designing a more reasonable layout.
Description
Technical Field
The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a device leakage current model. The invention also relates to an extraction method of the device leakage current model.
Background
As the size of the transistor is smaller, the proportion of leakage power consumption (leakage power) in the overall power consumption of the chip is larger, and thus the static power consumption of the device is affected. Accurate and comprehensive characterization of the leakage characteristics of integrated circuits has become a goal of the industry. Leakage current is known to consist of several components: 1, substrate current (IB); 2, source end current (IS); 3, gate terminal current (IG), etc.
The present application focuses on leakage caused by the gate induced drain leakage current (GIDL) effect. As shown in fig. 1, the structure diagram 101 of the current leakage model of the conventional device is shown, and the formula of the current leakage model of the conventional device is as follows:
Idoff＝f(w,l,vgs,T) (1)；
wherein, idoff represents device leakage current, mainly GIDL leakage current; f () represents a function of GIDL leakage current, w represents a width of a channel region of the semiconductor device, l represents a length of the channel region of the semiconductor device, vgs represents a gate-source voltage of the semiconductor device, and T represents an operating temperature of the semiconductor device. It can be seen that w, l, vgs, T are all related to the structural parameters of the semiconductor device itself.
In fact, however, due to the influence of mechanical stress generated by a Shallow Trench Isolation (STI) technology in the manufacturing process, physical parameters such as carrier mobility, impurity diffusion coefficient, carrier effective mass and the like of the device are changed in series, so that electrical parameters of the device, such as threshold voltage, drain saturation current and the like, are changed along with the length dimension (LOD) of an active region, namely the distance from a gate of the device to the Shallow Trench Isolation (STI).
In advanced integrated circuits, the power consumption of devices, particularly the leakage current and the modeling thereof, are increasingly emphasized, and particularly, the power consumption is more important in high-performance analog circuits. The introduction of a number of stress enhancement techniques in advanced processes to improve the mobility of the device carriers has led to an increasing impact of the environment surrounding the device on the electrical properties of the device itself. However, the environments of different active regions have different effects on the generation of compressive stress of the device channel, which is not considered in the current device leakage model.
Disclosure of Invention
The invention aims to solve the technical problem of providing a device leakage current model which can simulate the influence of the active area environment on the device leakage current, thereby improving the model fitting precision and being beneficial to designing a more reasonable layout. Therefore, the invention also provides an extraction method of the device leakage current model.
In order to solve the technical problem, the device leakage current model provided by the invention is used for simulating the leakage current of the semiconductor device.
The leakage current of the device leakage current model is formed by multiplying a body function by a first function.
The first function is a function formed by an active area environment parameter of the semiconductor device and is used for simulating the influence of the active area environment on the leakage current.
In a further refinement, the active region environmental parameters include a first active region length and a second active region length; the length of the first active region is the distance between the first side surface of the grid structure of the semiconductor device and the field oxygen outside the first side surface of the grid structure; the second active region length is a distance between a second side of the gate structure of the semiconductor device and field oxygen outside the second side of the gate structure, and the field oxygen surrounds the periphery of the active region of the semiconductor device.
In a further refinement, the parameters of the first function further include a length and a width of the channel region.
In a further refinement, the first function is formulated as:
wherein f1 () represents the first function; pwr () represents a power function;
SA represents the first active region length, SB represents the second active region length;
w represents a width of the channel region, L represents a length of the channel region;
The further improvement is that the main function of the device leakage current model is a GIDL leakage current function; the parameters of the GIDL leakage current function include:
the width and length of the channel region, the gate-source voltage and the temperature.
In a further improvement, under the condition that the body function is kept unchanged, each fitting parameter of the first function is obtained by changing the length of the first active region and the length of the second active region and fitting a leakage current curve formed by the device leakage current model and an actually measured leakage current curve.
In a further improvement, the first active region length and the second active region length are modified in layout design.
In order to solve the above technical problem, in the method for extracting the device leakage current model provided by the present invention, the device leakage current model is used for simulating the leakage current of the semiconductor device, and the method comprises the following steps:
step one, setting the leakage current of the device leakage current model to be formed by multiplying a main function by a first function;
the first function is a function formed by an active area environment parameter of the semiconductor device and is used for simulating the influence of the active area environment on the leakage current.
And secondly, performing parameter fitting on the body function by using the semiconductor device which is not influenced by the environment of the active region.
And thirdly, under the condition that the main function is kept unchanged, fitting the first function by changing the environmental parameters of the active area of the semiconductor device to obtain the fitting parameters of the first function.
In a further refinement, the active region environmental parameters include a first active region length and a second active region length; the length of the first active region is the distance between the first side surface of the grid structure of the semiconductor device and the field oxygen outside the first side surface of the grid structure; the second active region length is a distance between a second side of the gate structure of the semiconductor device and field oxygen outside the second side of the gate structure, and the field oxygen surrounds the periphery of the active region of the semiconductor device.
In a further refinement, the parameters of the first function further include a length and a width of the channel region.
In a further refinement, the first function is formulated as:
wherein f1 () represents the first function; pwr () represents a power function;
SA represents the first active region length, SB represents the second active region length;
w represents the width of the channel region, L represents the length of the channel region;
The further improvement is that the main function of the device leakage current model is a GIDL leakage current function; the parameters of the GIDL leakage current function include:
the width and length of the channel region, the gate-source voltage and the temperature.
In a further improvement, in the third step, each fitting parameter of the first function is obtained by fitting a leakage current curve formed by the device leakage current model and an actually measured leakage current curve by changing the length of the first active region and the length of the second active region.
In a further improvement, the first active region length and the second active region length are modified in layout design.
The further improvement is that after the third step is completed, the method further comprises the step of verifying the device leakage current model.
The invention adds the product term composed of the first function on the basis of the main function of the leakage current of the device leakage current model, and the first function is the function formed by the environmental parameters of the active area of the semiconductor device, thus when the environmental parameters of the active area are changed, the invention can accurately simulate the influence of the change on the leakage current, therefore, the invention can simulate the influence of the environment of the active area on the leakage current of the device, thereby improving the fitting precision of the model.
The environmental parameters of the active region of the invention are mainly the length of the active region, namely the length of the first active region and the length of the second active region, so the invention can more accurately establish a leakage current model for various active region lengths and better reflect the characteristics of the actual circuit of the device.
The invention can also design a more reasonable layout based on a device leakage current model.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a diagram of a prior art device leakage current model;
FIG. 2 is a layout of a semiconductor device according to an embodiment of the present invention;
FIG. 3 is a diagram of the architecture of a device leakage current model according to an embodiment of the present invention;
FIG. 4 is an architectural diagram of a first function of a device leakage current model according to an embodiment of the invention;
FIG. 5 is a flow chart of a method for extracting a device leakage current model according to an embodiment of the present invention;
FIG. 6A is a leakage current fit curve using a prior art device leakage current model;
fig. 6B is a leakage current fitting curve of a device leakage current model using an embodiment of the present invention.
Detailed Description
As shown in fig. 2, it is a layout of a semiconductor device according to an embodiment of the present invention; as shown in fig. 3, there is a diagram 301 illustrating the structure of a leakage current model of a device according to an embodiment of the present invention; as shown in fig. 4, is an architecture diagram 302 of a first function of a leakage current model of a device according to an embodiment of the present invention; the device leakage current model is used for simulating the leakage current of the semiconductor device.
The leakage current of the device leakage current model is formed by multiplying a body function by a first function.
The first function is a function formed by an active area environment parameter of the semiconductor device and is used for simulating the influence of the active area environment on the leakage current. As shown in fig. 2, in the embodiment of the present invention, a semiconductor device is formed in an active region 201, and a peripheral side of the active region 201 is field oxide such as Shallow Trench Isolation (STI). The semiconductor device includes a gate structure 202. The gate structure 202 is generally formed by stacking a gate dielectric layer and a gate conductive material layer, wherein the gate dielectric layer includes a gate oxide layer or a high dielectric constant layer. The gate conductive material layer comprises a polysilicon gate or a metal gate. Forming a channel region 203 in a surface area of the active region 201 covered by the gate structure 202; a source region and a drain region are formed in the active region 201 on both sides of the gate structure 202. The source region, the drain region, and the top of the gate structure 202 are formed with contact holes 204 and connected to the source, drain, and gate electrodes composed of a front metal layer through contact holes 205.
The active region environmental parameters comprise a first active region length SA and a second active region length SB; the first active region length SA is a distance between a first side of a gate structure 202 of the semiconductor device and field oxygen outside the first side of the gate structure 202; the second active region length SB is a distance between the second side of the gate structure 202 of the semiconductor device and field oxygen outside the second side of the gate structure 202, which surrounds the periphery of the active region of the semiconductor device.
The parameters of the first function further include a length L and a width W of the channel region.
In the embodiment of the invention, the main function of the device leakage current model is a GIDL leakage current function; the parameters of the GIDL leakage current function include:
the width and length of the channel region, the gate-source voltage and the temperature.
As shown in fig. 3, in the embodiment of the present invention, the formula of the leakage current of the device leakage current model is as follows:
Idoff＝f(w,l,vgs,T)*f1(SA，SB) (3)
idoff represents the leakage current.
Wherein Idoff represents device leakage current, mainly GIDL leakage current
As in equation (1), f () represents the body function, i.e., the function of GIDL leakage current, w represents the width of the channel region of the semiconductor device, l represents the length of the channel region of the semiconductor device, vgs represents the gate-source voltage of the semiconductor device, and T represents the operating temperature of the semiconductor device. It can be seen that w, l, vgs, T are all related to the structural parameters of the semiconductor device itself.
As shown in fig. 4, the formula of the first function is:
wherein f1 () represents the first function; pwr () represents a power function;
SA represents the first active region length, SB represents the second active region length;
w represents the width of the channel region, L represents the length of the channel region;
In this embodiment of the present invention, under the condition that the body function is kept unchanged, each fitting parameter of the first function is obtained by fitting a leakage current curve formed by the device leakage current model and an actually measured leakage current curve by changing the first active region length SA and the second active region length SB.
The first active region length SA and the second active region length SB are modified by being in layout design.
According to the embodiment of the invention, on the basis of an original device leakage current model, namely a main function, the influence of the length change of the active region on the device leakage current is considered, so that a function related to the length change of the active region is introduced into the original leakage current model, the influence of the length change of the device in the active region on the leakage current is increased, great help is provided for a designer to consider the influence of the length change of the active region on the device during circuit design, and the novel leakage current model has better applicability.
According to the embodiment of the invention, the product term consisting of the first function is added on the basis of the main function of the leakage current of the device leakage current model, and the first function is a function formed by the environmental parameters of the active area of the semiconductor device, so that when the environmental parameters of the active area are changed, the embodiment of the invention can accurately simulate the influence of the change on the leakage current, therefore, the embodiment of the invention can simulate the influence of the environment of the active area on the leakage current of the device, and the model fitting precision can be improved.
The active region environmental parameters of the embodiment of the invention are mainly the lengths of the active regions, namely the length SA of the first active region and the length SB of the second active region, so that the embodiment of the invention can more accurately establish a leakage current model for various active region lengths and can better reflect the characteristics of the actual circuit of the device.
The embodiment of the invention can also design a more reasonable layout based on a device leakage current model.
FIG. 5 is a flow chart of a method for extracting a device leakage current model according to an embodiment of the present invention; in the method for extracting the device leakage current model in the embodiment of the invention, the device leakage current model is used for simulating the leakage current of the semiconductor device, and the method comprises the following steps:
step one, the leakage current of the device leakage current model is set to be formed by multiplying a main function by a first function.
The first function is a function formed by an active area environment parameter of the semiconductor device and is used for simulating the influence of the active area environment on the leakage current.
Thereafter, the method according to the embodiment of the present invention further includes step S101 and step S102 shown in fig. 5.
In step S101, device structures with different active region length sizes are designed. As shown in fig. 2, by layout design, the length dimension of the active region can be changed, and further, the length SA of the first active region and the length SB of the second active region shown in fig. 2 can be changed.
And then manufacturing the semiconductor device on the semiconductor substrate according to the layout design.
Step S102 is to measure device data. Step S102 can measure structural parameters and electrical parameters of the semiconductor device.
And secondly, performing parameter fitting on the body function by using the semiconductor device which is not influenced by the environment of the active region.
In fig. 5, step two is realized by looping through step S103 and step S104.
In step S103, basic leakage current model parameters are established and modified.
In the method of the embodiment of the present invention, the basic leakage current model is the subject function, the subject function is the GIDL leakage current function, and the parameters include: the width and length of the channel region, the gate-source voltage and the temperature. The width and length of the channel region, gate-source voltage and temperature are all measurable parameters. The subject function is: f (w, l, vgs, T);
wherein w represents a width of a channel region of the semiconductor device, l represents a length of the channel region of the semiconductor device, vgs represents a gate-source voltage of the semiconductor device, and T represents an operating temperature of the semiconductor device. It can be seen that w, l, vgs, T are all related to the structural parameters of the semiconductor device itself, and can be obtained through measurement. f (w, l, vgs, T) are also provided with fitting parameters.
In step S104, curve fitting is performed on the data related to the size and the temperature, that is, fitting is performed according to w, l, vgs, and T, and fitting parameters of f (w, l, vgs, T) are obtained. And if the fitting is not good, modifying the fitting parameters of (w, l, vgs, T) until the fitting is good, and obtaining the main body function, namely f (w, l, vgs, T) if the fitting is good. After fitting, the subsequent step S105 is performed.
And thirdly, under the condition that the main function is kept unchanged, fitting the first function by changing the environmental parameters of the active area of the semiconductor device to obtain the fitting parameters of the first function.
In the method of the embodiment of the invention, the fitting of the model curve related to the length of the active region mainly comprises the following steps:
and fitting each fitting parameter of the first function to a leakage current curve formed by the device leakage current model and an actually measured leakage current curve by changing the length SA of the first active region and the length SB of the second active region.
The first active region length SA and the second active region length SB are implemented by modification in layout design, i.e., in the previous step S101.
In fig. 5, step three is realized by looping through step S105 and step S106.
Step S105 is to establish and modify models related to different active area environments. In the method of the embodiment of the present invention, the environmental parameters of the active region include a first active region length SA and a second active region length SB; the first active region length SA is a distance between a first side of a gate structure 202 of the semiconductor device and field oxygen outside the first side of the gate structure 202; the second active region length SB is a distance between the second side of the gate structure 202 of the semiconductor device and field oxygen outside the second side of the gate structure 202, which surrounds the periphery of the active region of the semiconductor device.
The parameters of the first function further include a length and a width of the channel region.
The formula of the first function is:
wherein f1 () represents the first function; pwr () represents a power function;
SA represents the first active region length SA and SB represents the second active region length SB;
w represents the width of the channel region, L represents the length of the channel region;
Step S106 is to fit a model curve related to the active region length.
If the fitting in step S106 is not good, returning to step S105 to modify the fitting parameter values, and then performing step S106; and if the fitting result of the step S106 is good, establishing the device leakage current model.
In the method of the embodiment of the present invention, after the third step is completed, the method further includes a step of verifying the device leakage current model, that is, step S107 of fig. 5 is performed, and step S107 is verification of the device leakage current model.
As shown in fig. 6A, a leakage current fitting curve using a leakage current model of a conventional device is shown; in fig. 6A, curves 401, 402 and 403 are test curves of leakage currents of semiconductor devices corresponding to three active region lengths, i.e., SA and SB, under the test conditions: the source-drain voltage vds is equal to 0.8V, the substrate voltage Vbs is equal to 0V, idoff is the gate current Id _ Vg.
The curve 404 is a leakage current fitting curve of the existing device leakage current model, and it can be seen that the fitting values of the leakage currents of the semiconductor devices corresponding to the lengths of the three active regions are the same, so that the existing device leakage current model cannot simulate the influence of the lengths of the active regions on the leakage currents.
FIG. 6B shows a leakage current fitting curve of a device leakage current model according to an embodiment of the present invention; curves 401 to 403 are the same as in fig. 6A; curves 501, 502 and 503 are leakage current curves of the semiconductor device with three active region lengths obtained by fitting the device leakage current model according to the embodiment of the present invention, and it can be seen that the coincidence degree of the curves 501 and 401, the curves 502 and 402, and the curves 503 and 403 is better, so that the device leakage current model according to the embodiment of the present invention can better simulate the influence of the active region lengths on the leakage current, thereby improving the simulation accuracy.
In the method of the embodiment of the invention, in order to represent the influence of different active region lengths on the device performance of the active region, the layout related to the active region is designed to be increased firstly. In the added design layout, the following are noted: the method comprises the steps of drawing the length of an active region different from the structure of a device body, measuring according to a wafer (wafer) run out from a design layout, analyzing measurement data, simulating the conventional device leakage current model, and then starting to adjust the fitting parameters of a function coefficient, namely f1 () related to the length and the size of the different active regions. As can be seen by comparing FIG. 6A to FIG. 6B, FIG. 6B fits better than FIG. 6A; therefore, leakage current models with different active region lengths can be obtained, designers can know the characteristic conditions of the device under different active region lengths through simulating the models, and can take the factors into consideration when designing, so that the novel model can reflect the characteristics of the actual device.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.
Claims (15)
1. A device leakage current model, comprising: the device leakage current model is used for simulating the leakage current of the semiconductor device;
the leakage current of the device leakage current model is formed by multiplying a main function by a first function;
the first function is a function formed by an active area environment parameter of the semiconductor device and is used for simulating the influence of the active area environment on the leakage current.
2. The device leakage current model of claim 1, wherein: the active region environmental parameters comprise a first active region length and a second active region length; the length of the first active region is the distance between the first side surface of the grid structure of the semiconductor device and the field oxygen outside the first side surface of the grid structure; the second active region length is a distance between a second side of the gate structure of the semiconductor device and field oxygen outside the second side of the gate structure, and the field oxygen surrounds the periphery of the active region of the semiconductor device.
3. The device leakage current model of claim 2, wherein: the parameters of the first function further include a length and a width of the channel region.
4. The device leakage current model of claim 3, wherein: the formula of the first function is:
wherein f1 () represents the first function; pwr () represents a power function;
SA represents the first active region length, SB represents the second active region length;
w represents the width of the channel region, L represents the length of the channel region;
gamma 1, alpha 1, A1, B1, b1, C1, c1, D1, d1, gamma 2, alpha 2, A2, B2, b2, C2, c2, D2, d2 are all fitting parameters.
5. The device leakage current model of claim 4, wherein: the main function of the device leakage current model is a GIDL leakage current function; the parameters of the GIDL leakage current function include:
the width and length of the channel region, the gate-source voltage and the temperature.
6. The device leakage current model of claim 5, wherein: under the condition that the main function is kept unchanged, fitting parameters of the first function are obtained by changing the length of the first active region and the length of the second active region and fitting a leakage current curve formed by the device leakage current model and an actually measured leakage current curve.
7. The device leakage current model of claim 6, wherein: the length of the first active region and the length of the second active region are modified in layout design.
8. A method for extracting a device leakage current model is characterized in that the device leakage current model is used for simulating leakage current of a semiconductor device, and comprises the following steps:
step one, setting the leakage current of the device leakage current model to be formed by multiplying a main function by a first function;
the first function is a function formed by active area environment parameters of the semiconductor device and is used for simulating the influence of the active area environment on the leakage current;
secondly, performing parameter fitting on the main body function by adopting the semiconductor device which is not influenced by the environment of the active region;
and thirdly, under the condition that the main function is kept unchanged, fitting the first function by changing the environmental parameters of the active area of the semiconductor device to obtain the fitting parameters of the first function.
9. The method of extracting a device leakage current model according to claim 8, wherein: the active region environmental parameters comprise a first active region length and a second active region length; the length of the first active region is the distance between the first side surface of the grid structure of the semiconductor device and the field oxygen outside the first side surface of the grid structure; the length of the second active region is the distance between the second side face of the grid structure of the semiconductor device and the field oxygen outside the second side face of the grid structure, and the field oxygen surrounds the periphery side of the active region of the semiconductor device.
10. The method of extracting a device leakage current model according to claim 9, wherein: the parameters of the first function further include a length and a width of the channel region.
11. The method of extracting a device leakage current model according to claim 10, wherein: the formula of the first function is:
wherein f1 () represents the first function; pwr () represents a power function;
SA represents the first active region length and SB represents the second active region length;
w represents a width of the channel region, L represents a length of the channel region;
gamma 1, alpha 1, A1, B1, b1, C1, c1, D1, d1, gamma 2, alpha 2, A2, B2, b2, C2, c2, D2, d2 are all fitting parameters.
12. The method of extracting a device leakage current model according to claim 11, wherein: the main function of the device leakage current model is a GIDL leakage current function; the parameters of the GIDL leakage current function include:
the width and length of the channel region, the gate-source voltage and the temperature.
13. The method of extracting a device leakage current model according to claim 12, wherein: in the third step, each fitting parameter of the first function is obtained by fitting a leakage current curve formed by the device leakage current model and an actually measured leakage current curve by changing the length of the first active region and the length of the second active region.
14. The method of extracting a device leakage current model as claimed in claim 13, wherein: the length of the first active region and the length of the second active region are modified in layout design.
15. The method of extracting a device leakage current model according to claim 8, wherein: and after the third step is finished, the method also comprises the step of verifying the device leakage current model.
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