CN115544948B - Layout decomposition coloring method in integrated circuit - Google Patents

Layout decomposition coloring method in integrated circuit Download PDF

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CN115544948B
CN115544948B CN202211386469.4A CN202211386469A CN115544948B CN 115544948 B CN115544948 B CN 115544948B CN 202211386469 A CN202211386469 A CN 202211386469A CN 115544948 B CN115544948 B CN 115544948B
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徐永健
张亚东
李起宏
陆涛涛
刘晓明
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Beijing Empyrean Technology Co Ltd
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Abstract

The invention provides a layout decomposition coloring method in an integrated circuit, which comprises the following steps: 1) Constructing an undirected layout according to the layout information, and constructing an adjacency matrix according to the undirected layout; 2) Inputting conflict graphs and color numbers, initializing a distribution population, generating a solution population, and storing an optimal binary solution as a value of an optimal solution and fitness thereof; 3) Iteratively solving the distributed population, including: sampling the distributed population in the previous solving round to determine a sampling distributed population and a sampling solution population; searching the sampling solution population by utilizing a tabu search algorithm, and determining the optimal solution of the tabu search; comparing the optimal solution of the tabu search with the optimal solution in the previous round of solution, and updating the optimal solution according to the comparison result; and updating the distributed population according to the updating result of the optimal solution. The invention can obtain the MPL layout decomposition scheme with higher quality in a shorter time.

Description

Layout decomposition coloring method in integrated circuit
Technical Field
The invention relates to the technical field of integrated circuit design, in particular to the technical field of layout decomposition of multiple lithography in the integrated circuit industry, and in particular relates to a method for decomposing and coloring a layout in an integrated circuit.
Background
With the continued shrinkage of transistor feature sizes, manufacturability has become a major issue in the semiconductor industry. In order to improve manufacturability, various resolution enhancement techniques have been proposed, and multi-pattern lithography (MPL) is one of the most practical solutions to improve manufacturability and is widely used in industry.
The core problem of MPL is layout decomposition, i.e. assigning one or more masks to each feature on the layout to improve printability, a process also known as multiple-plate lithography decomposition (Multiple Patterning Lithography decomposition, MPLD).
If two features closer than the minimum coloring distance are assigned to the same mask, a conflict may occur. To reduce collisions, sutures may be inserted, but introduction of the sutures may cause losses during production.
Thus, the goal of MPL is to find a mask allocation scheme that has the least number of collisions and stitches. The process of assigning masks to different features may also be viewed as marking different characteristics with different colors. Thus MPL may be converted to a special graph coloring problem, and accordingly TPL may be converted to a special 3-coloring problem, and QPL may be converted to a special 4-coloring problem. MPL is an np-complete problem, and conventionally, an Integer Linear Programming (ILP) method or a relaxation method is often used as a method for solving MPL.
While ILP can optimally address the problem, its runtime is exponential. The relaxation method proposed for MPL layout decomposition problem accelerates the decomposition process but also correspondingly reduces the quality of knowledge.
Thus, there is a need for a solution to MPL layout decomposition problem that can speed up the decomposition process while guaranteeing the quality of the solution.
Disclosure of Invention
In order to solve the defects existing in the prior art, the invention aims to provide a layout decomposition coloring method in an integrated circuit, which can obtain an MPL layout decomposition scheme with higher quality in a shorter time.
In order to achieve the above object, the present invention provides a layout decomposition coloring method in an integrated circuit, comprising the steps of:
1) Constructing an undirected layout according to the layout information, and constructing an adjacency matrix according to the undirected layout;
2) Inputting conflict graphs and color numbers, initializing a distribution population, generating a solution population, and storing an optimal binary solution as a value of an optimal solution and fitness thereof;
3) Iteratively solving the distributed population, including:
sampling the distributed population in the previous solving round to determine a sampling distributed population and a sampling solution population;
Searching the sampling solution population by utilizing a tabu search algorithm, and determining the optimal solution of the tabu search;
comparing the optimal solution of the tabu search with the optimal solution in the previous round of solution, and updating the optimal solution according to the comparison result;
And updating the distributed population according to the updating result of the optimal solution.
Further, the step 1) further includes reading information of each feature in the gds file, constructing an undirected graph, and constructing the undirected graph with a dotted line and a solid line after finishing suture insertion, wherein two vertexes connected by the dotted line means that the two vertexes are connected by the suture, and a distance between the two features is smaller than a minimum coloring distance, and is marked by the solid line.
Further, the fitness expression is:
Wherein f (S) represents fitness, u, v represents two vertices, and α is 0.1.
Further, the tabu search algorithm in the step 3) includes the steps of:
Initializing a tabu list, wherein the tabu list is a matrix of k x n, k represents a color number, n represents a top point number, and the matrix is a zero matrix in the initial stage;
for each x e P, each time the best legal move < v, i, j > is selected;
The best legal move is performed and updated to tl with element T vi in the updated tabu list, where tl = count +0.6 (10 x y c+ys)+r+1,yc is the number of collisions in y, y s is the number of stitches in y, y represents the current solution, r is a random integer between [1,10], if there is T vj > count, The count is used to record the number of iterations of the tabu search algorithm.
Further, the termination condition of the tabu search algorithm is that the iteration number of the tabu search algorithm reaches an upper limit or a conflict-free and suture-free solution is obtained.
Further, the best legal movement refers to a legal movement with the minimum fitness value corresponding to a solution obtained by the legal movement, the legal movement is denoted as < v, i, j >, the color i of the vertex v is changed to be a color j, and the following three conditions are to be satisfied: (1) When the color of the vertex v is i, the sum of the conflict number related to v and the stitch number is not 0; (2) i+.j; (3) In the tabu list, color j is assigned to vertex v, which is not prohibited unless < v, i, j >,I+.j, a better solution than x can be obtained.
Further, the step 3) further includes the steps of:
If the optimal solution of the tabu search is better than the current optimal solution, replacing the current optimal solution with the optimal solution of the tabu search;
if the optimal solution of the tabu search is inferior to the current optimal solution, the current optimal solution is kept unchanged.
Still further, the step 3) further includes, given a probability threshold p 0, ifUpdating the columns of the distributed population with the development strategy; otherwise, the columns of the distributed population are updated according to the exploration strategy.
In order to achieve the above object, the present invention further provides an electronic device, including a memory and a processor, where the memory stores a program running on the processor, and the processor executes the steps of the layout decomposition coloring method in an integrated circuit when running the program.
To achieve the above object, the present invention further provides a computer readable storage medium having stored thereon computer instructions which when executed perform the steps of the above-described layout decomposition coloring method in an integrated circuit.
Compared with the prior art, the layout decomposition coloring method in the integrated circuit has the following beneficial effects: the invention provides a novel distribution evolution algorithm aiming at layout decomposition, which takes individual distribution matrixes as individuals in a distribution population to improve the capability of the algorithm to jump out a local optimal solution, and takes a tabu search algorithm as a local search algorithm to improve the exploration capability of the algorithm.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, and do not limit the invention. In the drawings:
FIG. 1 is a flow chart of a layout decomposition coloring method in an integrated circuit according to the present invention;
FIG. 2 (a) is a schematic diagram of layout features according to an embodiment of the present invention;
FIG. 2 (b) is an undirected graphical illustration of the geometric information construction from the features in FIG. 2 (a);
FIG. 2 (c) is a schematic illustration of the undirected view of FIG. 2 (b) after insertion of a suture;
Fig. 2 (d) is a schematic diagram of the color result assigned to each vertex of the undirected graph.
Detailed Description
Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While the invention is susceptible of embodiment in the drawings, it is to be understood that the invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided to provide a more thorough and complete understanding of the invention. It should be understood that the drawings and embodiments of the invention are for illustration purposes only and are not intended to limit the scope of the present invention.
It should be understood that the various steps recited in the method embodiments of the present invention may be performed in a different order and/or performed in parallel. Furthermore, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the invention is not limited in this respect.
The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is based at least in part on. The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.
It should be noted that references to "one", "a plurality" and "a plurality" in this disclosure are intended to be illustrative rather than limiting, and those skilled in the art will appreciate that "one or more" is intended to be construed as "one or more" unless the context clearly indicates otherwise. "plurality" is understood to mean two or more.
Terminology
Multi-pattern layout decomposition (MPLD): given 1) a wiring layout of a set of polygonal features; 2) The number k of mask plates; 3) A minimum collision space d; 4) The goal of other constraints (e.g., pre-coloring constraints) is to assign one or more reticles (if stitching is enabled) to each feature to minimize the weighted sum of the collision cost and stitching cost.
Coloring (coloring): the process of assigning design patterns to different reticles, which are represented by different colors in the EDA tool.
Suture (stitch): the same pattern needs to be assigned to two reticles because of some design rule conflicts, where different colors meet is called a stitch.
Conflict graph (conflict graph): in addition to the fact that two graphics in the minimum conflict space are connected by one side, the side in the conflict graph further comprises stitching, the vertices in the graph are the graphics, the stitching divides one graphic into a plurality of graphics, and therefore the number of the vertices in the graph increases with the insertion of the stitching.
The conflict edge (conflict edge): and the two graphs in the minimum conflict space are colored with the same color, and in the corresponding conflict graph, the connecting edge between the two graphs is the conflict edge.
In order to better understand the technical scheme of the invention, a layout decomposition process of a layout is briefly introduced, and the layout decomposition process comprises the following steps:
(1) Constructing a conflict graph G;
(2) Simplifying the conflict graph G, resulting in a series of subgraphs G i (i=1,., N);
(3) For G i (i=1,., N) insert all candidate sutures;
(4) G i (i=1,., N.) was simplified;
(5) G i (i=1,., N) was colored;
(6) Recovery of solution.
The method of the present invention is applied to step 5 to color G i (i=1, …, n) and reduce the number of conflicting sides and stitches.
The specific mathematical model of the step 5 and the corresponding steps are as follows:
The mathematical model corresponding to the algorithm of the invention is as follows:
Taking the layout decomposition in TPL as an example, we explain the symbols in the above formula, where s= (V 1,V2,V3) represents dividing the vertices of the conflict graph G into 3 sets V 1,V2,V3, with the vertices in each set being of the same color. { u, v } ∈E indicates that the conflict edge E connects adjacent vertexes u, v, when u, v are put into the same vertex set, δ uv =1 indicates that u, v is colored in the same color, otherwise δ uv =0 indicates that u, v is colored in different colors.
F (S) represents the number of all conflict sides in the 3 sets, and the conflict sides, namely the two vertexes connected by the sides, are colored in the same color.
{ U, v } ∈c indicates that suture C connects two vertices u, v, when u, v are put into the same vertex set, there is C uv =0, indicating that u, v is colored the same color, meaning that suture C can be removed, otherwise δ uv =0, indicating that u, v is colored a different color, indicating that suture C cannot be removed. In addition, α is 0.1.
Since MPL layout decomposition is a special class of 2/3/4-coloring problem of the graph, and in the case of inserting a suture, the 2/3/4-coloring problem of the graph is an NP-hard problem that cannot be solved in polynomial time.
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example 1
FIG. 1 is a flowchart of a method for decomposing and coloring a layout in an integrated circuit according to the present invention, and the method for decomposing and coloring a layout in an integrated circuit according to the present invention will be described in detail with reference to FIG. 1.
In step 101, an undirected layout is constructed from the layout information, and an adjacency matrix is constructed from the undirected layout.
In the embodiment of the present invention, firstly, information of each feature in the gds file is read to construct an undirected layout, as shown in (c) in fig. 2, after the suture insertion is completed, an undirected layout with a dotted line and a solid line is constructed, wherein two vertexes connected by the dotted line refer to that the two vertexes are connected by the suture, and a space between two features (features correspond to polygons in (a) in fig. 1) is smaller than a minimum coloring space, and then the space is marked by the solid line. Next, an adjacency matrix is constructed from the constructed undirected layout.
In step 102, a conflict graph G i (i=1, …, N) and a number of colors k are input, a distribution population Q is initialized, a solution population P is generated, and an optimal binary solution best and its fitness value f (best) are saved.
In the embodiment of the invention, the distributed population Q is solved 1 to maxgen times, if the scale of the population Q is n, the distributed population Q is formed by n distribution matrixes, and each individual (P1, P2, …, P n) in the solution population P corresponds to each individual (Q 1,q2,…,qn) in the distributed population Q one by one. p 1,p2,…,pn is a solution obtained by sampling q 1,q2,…,qn.
The distribution population Q initialization population is marked as Q (0), correspondingly, the solution population is marked as P (0), the fitness of the connected population P (0) is calculated by using the fitness expression, and the fitness expression is as follows:
the solution population P (0) is saved as the best binary solution best, and its fitness is saved as the best fitness f (best).
The coloring scheme for k colors and n vertices may be represented by a kxn matrix x= (x i,j)k×n, where each column has only one element value of 1. If x i,j = 1, it means that the j-th vertex is colored with the i-th color.
Knowing the representation of the color distribution scheme of MPL, the application proposes a probability model of the distributed population as follows:
and each element q ij in q (i=1, 2, …, k) satisfies
Thus doing soThe probability of assigning color i to vertex j may be represented, and the j-th column of q represents the probability distribution of the color assignment of vertex j. By sub-sampling each column of q, we can always get the color assignment scheme for the n vertices of graph G i.
DEA-PPM performs searches in both solution space and distribution space by deploying solution population p= { x 1,x2,…,xNP } and distribution population q= { Q 1,q2,…,qNP }.
In step 103, the distributed population in the previous solution round is sampled to determine a sampled distributed population and a sampled solution population.
In the embodiment of the invention, the distributed population in the previous round of solution is denoted as Q (gen-1), and Q (gen)' is equal to the distributed population Q (gen-1);
And then sampling the Q (gen) 'to obtain a corresponding sampling solution group P (gen)' by the following specific sampling modes: for any distribution matrix in Q (gen) 'each column is sampled to obtain a sampling distribution population, and then one solution in the sampling solution population P (gen)' corresponding to the sampling distribution population can be obtained.
For each column of elements in the distribution matrix, the square alpha 1n 22n 2,…,αKn 2 is selected by using a roulette method, if alpha kn 2 is selected, the nth vertex will be colored in the kth color, and in the corresponding binary matrix of the solution, the nth column except the kth element takes 1, and the rest elements are all 0, namely the nth vertex is colored in the kth color. The process of allocating color to the nth vertex according to the nth column of the distribution matrix is sampling operation.
In step 104, the sampled solution population is searched using a tabu search algorithm and the optimal solution for the tabu search is determined.
In the embodiment of the invention, a tabu search is executed on a sampling solution population (P (gen)'), the adaptability of the tabu search solution is calculated, and the optimal tabu search solution is determined according to the adaptability and is marked as b 1. Wherein a smaller fitness value indicates a better solution.
In the embodiment of the invention, the tabu search algorithm is as follows:
Firstly, initializing a tabu list, wherein the tabu list is a matrix of k x n, k represents a color number, n represents a top point number, and the matrix is a zero matrix initially. For each x e P, the best legal move < v, i, j > is selected each time. Legal move < v, i, j > refers to changing the color i of vertex v to color j, and the following three conditions are to be satisfied: (1) When the color of the vertex v is i, the sum of the conflict number related to v and the stitch number is not 0; (2) i+.j; (3) In the tabu list, color j is assigned to vertex v, which is not prohibited unless < v, i, j >, I+.j, a better solution than x can be obtained.
The best legal movement refers to the best movement among all legal movements of the current solution y, as exemplified: assuming that for solution y there are m legal moves, we perform these m moves on y separately, we can get m different solutions, and note these m solutions as { y 1,y2,…,ym } separately, if min { f (y 1),f(y2),…,f(ym) } =f (yi), i e {1,2, …, k }, i.e. the i-th move is the best legal move. That is, the legal movement for which the fitness value corresponding to the solution obtained by the legal movement is the smallest is called the optimal legal movement.
Next, a legal best move is performed and updated to tl with element T vi in the updated tabu list, where tl = count +0.6 (10 x y c+ys)+r+1,yc is the number of collisions in y, y s is the number of stitches in y, r is a random integer between 1, 10. If there is T vj > count,Is prohibited, wherein count is used to record the number of iterations of the tabu search algorithm. Notably, the termination condition (1) is that the iteration number of the tabu search algorithm reaches an upper limit or a conflict-free and suture-free solution is obtained.
In step 105, the optimal solution of the tabu search is compared with the optimal solution in the previous round of solution, and the optimal solution is updated according to the comparison result.
In the embodiment of the present invention, the optimal solution b 1 of the tabu search is compared with the current optimal solution b, if b 1 is better than b, b=b 1, otherwise, b is not updated.
In step 106, the distributed population is updated according to the update result of the optimal solution.
In the embodiment of the invention, if the optimal solution is updated, updating the distributed population Q (gen)', so as to obtain a new distributed population Q (gen); if the optimal solution is not updated, the new distribution population is equal to the distribution population in the previous round of this solution.
Updating the distribution population requires an update strategy, and when updating the distribution population, a development strategy and an exploration strategy can be adopted, wherein the development strategy is used for executing local development. To prevent premature convergence of Q (t), the distribution population is updated with the exploration strategy.
Given a probability threshold p 0, ifThen the column of q is updated with the development policy; otherwise, the columns of q will be updated according to the survey strategy, with the probability threshold p 0 taking 0.98.
Developing strategies: to develop a local neighborhood of q= (q ij)k×n), we update it as (4) - (6) equation (4) globally perturbs the distribution matrix q controlled by the tuning parameter α.
Then, the following orthogonal transformation is performed:
Wherein the method comprises the steps of
Equation (5) performs partial development by slightly adjusting (q vj,quj)T) the subvector (q vj,quj)T rotates counter-clockwise by Δθ i, where u, v are the colors of the j-th vertex of the optimal solution and the current solution, respectively, and the adjustment parameter α is 0.2, Δθ i is 0.05 pi.
Exploration strategies: to prevent premature convergence of Q (t), Q is updated herein as in equations (7) - (8). First, the probability of obtaining the current optimal solution is reduced as per equation (7) herein,
Where t uj 2 is the value q uj 2 multiplied by λ, and q uj 2 is the probability that the jth vertex is colored with the jth color. u is the color of the jth vertex of the optimal solution.
The distribution vector is then normalized according to equation (8).
And stopping the iterative solution when the iteration times reach the upper limit or a conflict-free seamless solution is obtained.
The present invention aims to reduce the stitches and conflicts generated during the existing MPL layout resolution process and to improve the time efficiency in MPL layout resolution. Since the problem of layout decomposition in MPL is an NP-hard problem, conventional mathematical methods require significant time, such as ILP. At run time, the relaxation method has a higher time efficiency, but it is far lower in solution quality than ILP. The invention has the positive effect of obtaining the solution with higher quality in a shorter time.
Example 2
The method for decomposing and coloring a layout in an integrated circuit according to the present invention will be described in detail with reference to a specific example.
Firstly, according to step 101, an adjacency matrix is constructed, firstly, information of each feature in the gds file is read, as shown in fig. 2 (a), an undirected graph is constructed, as shown in fig. 2 (b), after the suture insertion is completed, an undirected graph with a broken line and a solid line is constructed, as shown in fig. 2 (c), wherein two vertexes connected by the broken line refer to the two vertexes connected by the suture, the distance between the two features is smaller than the minimum coloring distance, and the two vertexes are marked by the solid line. Next, an adjacency matrix is constructed from the constructed undirected graph.
Then, according to steps 102-106, a solution population and a distribution population are constructed, and by deploying solution population P and distribution population Q, searches can be performed in both solution space and distribution space. The distribution matrix is utilized to have the advantages of jumping out of the local optimal solution and strong exploring capability of the tabu search algorithm so as to update the optimal solution best iteratively, and the final coloring result is shown in fig. 2 (d).
The invention is suitable for the problem of MPL layout decomposition, which comprises TPL and QPL, aiming at the two problems, only the color numbers in the distribution population are required to be respectively set to 3 and 4.
Example 3
The embodiment of the invention also provides a device for decomposing and coloring the layout of the integrated circuit, which comprises a memory and a processor, wherein the memory stores a program running on the processor, and the processor executes the steps of the method for decomposing and coloring the layout of the integrated circuit when running the program.
Example 4
The embodiment of the invention also provides a computer readable storage medium, on which computer instructions are stored, wherein the computer instructions execute the steps of the layout decomposition coloring method in the integrated circuit when running, and the layout decomposition coloring method in the integrated circuit is referred to the description of the previous parts and is not repeated.
Those of ordinary skill in the art will appreciate that: the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. A layout decomposition coloring method in an integrated circuit comprises the following steps:
1) Constructing an undirected layout according to the layout information, and constructing an adjacency matrix according to the undirected layout: reading information of each feature in the gds file, constructing an undirected graph, and after finishing suture insertion, constructing an undirected graph with a dotted line and a solid line, wherein two vertexes connected by the dotted line refer to the two vertexes connected by the suture, and the distance between the two features is smaller than the minimum coloring distance, and is marked by the solid line;
2) Inputting conflict graphs and color numbers, initializing a distribution population, generating a solution population, and storing an optimal binary solution as a value of an optimal solution and a fitness thereof, wherein the conflict graphs are that two graphs in a minimum conflict space are connected by one side, the sides in the conflict graphs comprise sutures, vertexes in the conflict graphs are all graphs, the sutures divide one graph into a plurality of graphs, and the number of vertexes in the graphs is increased along with the insertion of the sutures;
3) Iteratively solving the distributed population, including:
sampling the distributed population in the previous solving round to determine a sampling distributed population and a sampling solution population;
Searching the sampling solution population by utilizing a tabu search algorithm, and determining the optimal solution of the tabu search;
comparing the optimal solution of the tabu search with the optimal solution in the previous round of solution, and updating the optimal solution according to the comparison result;
Updating the distributed population according to the updating result of the optimal solution;
Wherein, the fitness expression is:
Wherein f (S) represents fitness, u, v represents two vertices, and α is 0.1.
2. The method of claim 1, wherein the tabu search algorithm in step 3) comprises the steps of:
Initializing a tabu list, wherein the tabu list is a matrix of k x n, k represents a color number, n represents a top point number, and the matrix is a zero matrix in the initial stage;
for each x e P, each time the best legal move < v, i, j > is selected;
The best legal move is performed and updated to tl with element T vi in the updated tabu list, where tl = count +0.6 (10 x y c+ys)+r+1,yc is the number of collisions in y, y s is the number of stitches in y, y represents the current solution, r is a random integer between [1,10], if there is T vj > count, The count is used to record the number of iterations of the tabu search algorithm.
3. The method of claim 2, wherein the termination condition of the tabu search algorithm is that the number of iterations of the tabu search algorithm reaches an upper limit or a conflict-free and stitch-free solution is obtained.
4. The method for decomposing and coloring a layout in an integrated circuit according to claim 2, wherein the optimal legal movement is a legal movement with a minimum fitness value corresponding to a solution obtained by the legal movement, and the legal movement is denoted as < v, i, j >, which means that a color i of a vertex v is changed to a color j, and the following three conditions are satisfied: (1) When the color of the vertex v is i, the sum of the conflict number related to v and the stitch number is not 0; (2) i+.j; (3) In the tabu list, color j is assigned to vertex v, which is not prohibited unless performedA better solution than x can be obtained.
5. The method of layout decomposition coloring in an integrated circuit according to claim 1, wherein said step 3) further comprises the steps of:
If the optimal solution of the tabu search is better than the current optimal solution, replacing the current optimal solution with the optimal solution of the tabu search;
if the optimal solution of the tabu search is inferior to the current optimal solution, the current optimal solution is kept unchanged.
6. The method of claim 1, wherein said step 3) further comprises, given a probability threshold p 0, ifUpdating the columns of the distributed population with the development strategy; otherwise, the columns of the distributed population are updated according to the exploration strategy.
7. An electronic device comprising a memory and a processor, the memory having stored thereon a program running on the processor, the processor executing the steps of the layout decomposition coloring method in an integrated circuit according to any of claims 1-6 when the program is run.
8. A computer readable storage medium having stored thereon computer instructions which, when run, perform the steps of the layout decomposition coloring method in an integrated circuit as claimed in any one of claims 1-6.
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