CN115544947A - Large-scale integrated circuit layout optimization method based on genetic algorithm - Google Patents
Large-scale integrated circuit layout optimization method based on genetic algorithm Download PDFInfo
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Abstract
The invention relates to the technical field of integrated circuit layout, in particular to a large-scale integrated circuit layout optimization method based on a genetic algorithm, which comprises the following steps: the method comprises the steps of parameter setting, clustering operation, further partition clustering operation, optimization by adopting a genetic algorithm, decoding operation, selection operation, cross operation, mutation operation and judgment on whether a termination condition is met, wherein when the method is used, a clustering method based on modularity is firstly adopted to determine cells which are to be closely connected in a subsequent placing process, the parameters and the termination condition do not need to be manually set, the process can be automatically completed through the algorithm, the placing position of each Cell is searched, the final layout is more compact, the bus length is shorter, and the method is convenient to use.
Description
Technical Field
The invention relates to a circuit layout optimization method, in particular to a large-scale integrated circuit layout optimization method based on a genetic algorithm, and belongs to the technical field of integrated circuit layout.
Background
With the rapid development of integrated circuits, the circuit scale is continuously increased, and the integration level is continuously improved, which all bring greater challenges to chip design, especially to physical design, due to its high computational complexity, and the characteristics of multiple targets included in the optimization process, and the physical design process is usually divided into the following stages: the method comprises the following steps that circuit division, layout, clock tree synthesis and wiring are carried out, wherein the layout process has great influence on the design of an integrated circuit, the work to be completed in the layout stage is to place standard cells or macro modules in a circuit logic diagram at proper positions of a chip according to the connection information of the circuit logic diagram, the research on the layout problem of the very large scale integrated circuit can be traced back to the last 60 years at the earliest, the method adopted in the industry for the first time is a netlist division-based method, and the current mainstream methods can be divided into the following three categories along with the continuous deepening and development of the research: 1. random methods, such as the method of simulated annealing, are not suitable for dealing with large scale integrated circuit problems due to the high time complexity and long time consumption of the method along with the continuous increase of the circuit scale; 2. partitioning-based methods, such as Fiducia-Mattheys (FM), require that the number of partitions be preset to balance the nodes contained in different partitions; 3. the method based on analysis is to define a suitable cost function and then to minimize the cost function by using a mathematical optimization method, which usually requires that the cost function is derivable, which brings certain difficulties to the selection of the objective function.
If the publication number is: CN109033510A, a method and a device for optimizing the length of a three-dimensional integrated circuit interconnection line based on a genetic algorithm, the method comprises the following steps: initializing genetic algorithm parameters, and taking an even number of three-dimensional integrated circuit layouts meeting fixed frame constraints as input; pairwise pairing is carried out on the input three-dimensional integrated circuit layout, and cross operation is carried out on each pair according to cross probability; performing variation operation on all three-dimensional integrated circuit layouts according to the variation probability; distributing storage probabilities for all three-dimensional integrated circuit layouts according to the lengths of the interconnection lines, and reserving the three-dimensional integrated circuit layouts according to the storage probabilities and using the three-dimensional integrated circuit layouts as new solutions; and judging whether the number of times of the termination operation is reached, if so, taking the new solution as the optimized three-dimensional integrated circuit layout output, otherwise, returning to the first step, and replacing the input with the new solution. Therefore, the method can obtain the three-dimensional integrated circuit meeting the requirement of the length of the interconnection line with higher probability, has higher optimization precision and obtains more stable results.
If the publication number is: CN110096823B, a digital integrated circuit wiring method based on binary coding and a terminal device, the method includes: determining a preset number of first connecting modes, calculating a first fitness function value of each first connecting mode according to a wiring subspace corresponding to each connecting line, and processing each first connecting mode according to each first fitness function value to obtain each second connecting mode; selecting a first number of third connecting modes from a set formed by combining the first connecting mode and the second connecting mode, and respectively calculating a second fitness function value of each third connecting mode; and selecting an optimal wiring mode from all third wiring modes according to all the calculated second fitness function values, and connecting the standard unit pins according to the optimal wiring mode. By adopting the binary coding of the uniform grid, the invention avoids the problem of indefinite coding length in the non-grid algorithm, reduces the optimization space range and improves the wiring efficiency.
However, for large-scale integrated circuits, the picking efficiency is low, the algorithm running time is long, and in the optimization process, people with abundant experience are required to operate, so that the large-scale integrated circuits are inconvenient to use.
In view of the above, the present invention is proposed to solve the problem of large-scale integrated circuit layout, and can assist in determining the final layout scheme, and at the same time, less human experience intervention is required, thereby contributing to improving efficiency; the running time of the algorithm is short, and a better layout scheme can be found through multiple running comparisons.
Disclosure of Invention
The invention aims to provide a large-scale integrated circuit layout optimization method based on a genetic algorithm for solving the problems, which adopts a clustering algorithm based on modularity to determine cells which should be closely placed together in the subsequent layout, and can reduce the scale of the problems by using the clustering method, thereby being beneficial to finding out the correct structure in a solution space on one hand, and reducing the running time on the other hand. Furthermore, the invention adopts the genetic algorithm to place the clustered cells, and can search more solution spaces, thereby jumping out the local optimal solution and finding out a better layout scheme with higher probability.
The invention realizes the aim through the following technical scheme, and the large-scale integrated circuit layout optimization method based on the genetic algorithm comprises the following steps:
step one, parameter setting, wherein the group size Np, the cross probability Pc and the variation probability Pm are set, t is an integer which is greater than or equal to 0 and represents the t generation, G is a termination evolution algebra, and rand is a randomly generated number between 0 and 1.
Step two, clustering operation, according to given information, the netlist comprises a plurality of nets, each net comprises a plurality of cells, the same Cell can appear in the plurality of nets, in the process of constructing the network topological graph, the nets are regarded as one node in the graph, if the two nets comprise the common Cell, a connection relation exists between the two nodes, namely one edge exists, the finally constructed graph is an undirected weightless graph, clustering operation is carried out on the graph, and the purpose is to place the cells in the closely-connected nets at adjacent positions as much as possible, so that the bus length is shorter, and the clustering algorithm adopts the modularity as a measurement standard.
And step three, further dividing and clustering operation, wherein after the clustering result is obtained in the last step, when a large-scale circuit is processed, the number of the cells contained in each cluster is still large, so that the further dividing operation is carried out, the problem is decomposed into a plurality of smaller-scale problems to be solved, the net in each cluster is sequentially expanded to obtain the cells contained in each cluster until the total number of the cells is more than or equal to 20, and if a certain Cell appears before, the certain Cell is skipped. Finally each cluster is divided into a combination of several cells.
And step four, optimizing the Cell combinations obtained in the previous step by adopting a genetic algorithm respectively.
And fifthly, decoding operation, namely calling a sliding window algorithm to decode each individual, calculating to obtain the bus length after the placement is finished after decoding, and recording the individual with the minimum bus length as Best.
And step six, selecting operation, namely selecting Np individuals from the parent population by adopting a binary championship method according to the population adaptive value obtained by the last step, putting the Np individuals into a mating pool, and selecting the individuals with shorter line length with higher probability.
And seventhly, performing cross operation, namely randomly selecting a pair of individuals from the mating pool for the individuals in the mating pool if rand < Pc, and optimizing by adopting a cross operator.
Step eight, performing mutation operation, namely optimizing each individual in the population by using a mutation operator if rand is less than Pm, wherein the rule is as follows: two locations are randomly selected and the cells of the two locations are swapped.
And step nine, judging whether a termination condition is met, wherein the termination condition is that the iteration times reach a termination evolution algebra, if the termination condition is not met, continuing to perform iterative optimization, and returning to the step six, otherwise, ending the search process, and outputting the optimal individual Best to obtain a final layout result.
Further, in step four, the population is initialized: the coding mode adopts sequence coding, the coding length is n, n represents the total number of cells to be placed, the position in the coding represents the placement sequence of each Cell, and the initial population is generated according to the following mode:
and A1, sequencing from large to small according to the length of the Cell to obtain the final code.
And A2, sequencing from small to large according to the length of the Cell to obtain the final code.
And A3, randomly arranging the numbers of the cells to obtain a final code.
Further, in the seventh step, the crossover operator uses a sequential crossover operator, and the specific steps are as follows:
and B1, randomly selecting one substring from one parent.
And B2, generating a temporary sub-generation, and copying the sub-string obtained in the previous step to a corresponding position.
And B3, deleting the number contained in the sub-string from the other parent, wherein the rest number is the number required by the temporary sub-string.
And B4, sequentially putting the remaining elements in the previous step into the vacant positions in the temporary offspring according to the sequence from left to right, and finally generating a formal offspring.
Further, in the clustering operation in the second step, one purpose is to divide the cells with relatively close relation into a cluster, and place them at adjacent positions in the subsequent placement process, and another purpose is to decompose the large-scale problem into a plurality of smaller sub-problems, so as to reduce the time required for solving the problem, and the algorithm specifically comprises the following steps:
d1, constructing a graph, wherein a netlist comprises a plurality of nets, each net comprises a plurality of cells according to given information, the same Cell can appear in the plurality of nets, the nets are regarded as a node in the graph in the process of constructing the network topology graph, if two nets comprise a common Cell, a connection relation exists between the two nodes, namely, one edge exists, and the finally constructed graph is an undirected weightless graph.
D2, initializing operation, wherein each node in the graph is regarded as an independent community, and the number of the initial communities is the same as the number of the total nodes.
D3, carrying out node transfer operation among communities, for each node, sequentially trying to distribute the node to the community where each neighbor node is located, calculating the modularity change before and after distribution, and classifying the node into the community with the largest modularity gain.
And D4, repeatedly executing the step D3 until the communities to which all the nodes belong do not change any more, and ending the node transfer among the communities.
D5, reconstructing the graph, namely reconstructing the graph as the community to which the node belongs is changed, folding the community obtained in the previous step, folding each community into one node, updating the weight of the edge between the nodes in the community into the weight of the ring of the new node, updating the weight of the edge between the nodes in the community into the weight of the edge between the new nodes, and then returning to execute the step D3.
Further, in step five, when performing a decoding operation, the objective is to convert the sequence code into a final layout scheme, that is, to determine the location of each Cell, and the algorithm specifically includes the following steps:
e1, initializing, wherein the initial free space list only contains one free space, the size of the free space is equal to the size of a placeable space, the to-be-placed list contains all cells which are not placed, the placed list is initially empty, the size of the largest Cell in the to-be-placed Cell list is recorded and recorded as maxSize, a first window is taken out from the free space, the size of the window is equal to maxSize, so that at least one Cell can be placed down by the window, and then the free space list is updated.
And E2, judging whether the list of the cells to be placed is empty, if so, terminating the algorithm, calculating the length of the bus and returning the result, and otherwise, taking out the next Cell to be placed from the list of the cells to be placed.
E3, judging whether the current window can contain the Cell, if not, executing E4, if so, placing the Cell in the window, deleting the Cell from the list of cells to be placed, adding the Cell into the list of cells to be placed, recording the position information of the Cell, and executing E5.
E4, judging whether all spaces in the free space list are tried, if so, terminating the algorithm, and because all cells are not placed completely, the line length cannot be calculated, and the return value is set to the maximum value which can be represented by the long type, otherwise, taking out the next window from the free space list, and taking out the next window according to the following rules: the general principle is from left to right, top to bottom, with the aim of making the window as compact as possible, the specific rules are as follows:
f1, initializing a window, taking the lower left corner as an origin, and taking out a first window with the size equal to maxSize.
F2, updating the window, and updating the residual space of the window after the Cell is placed in the current window.
And F3, sliding the window, when the remaining space of the current window is not enough for placing the next Cell, sliding the window upwards, simultaneously judging whether a free space is available on the left side of the window or not in order to avoid wasting the space, if so, merging the part of space into the current window, sliding the window to the right by one unit when the top of the space is reached in the process of sliding upwards, and then starting to slide downwards, and similarly sliding the window to the right by one unit when the bottom of the space is reached in the process of sliding downwards, and then starting to slide upwards.
E5, updating the current window, calculating the remaining free space of the current window, and then returning to execute E2.
The invention has the technical effects and advantages that: firstly, a clustering method based on modularity is adopted to determine the cells which are to be kept in close contact in the subsequent placing process, parameters and termination conditions do not need to be set manually, the process can be automatically completed through an algorithm, the placing position of each Cell is searched, the final layout can be more compact, the bus length is shorter, and the use is convenient.
Drawings
FIG. 1 is a flow chart of the present invention as a whole;
FIG. 2 is a schematic diagram of the crossover operator of the present invention;
FIG. 3 is a flow chart of a clustering algorithm in the present invention;
FIG. 4 is a flowchart of a sliding window algorithm of the present invention;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
Referring to fig. 1-4, a method for optimizing a lsi layout based on a genetic algorithm includes the following steps:
step one, parameter setting, wherein a population size Np, a cross probability Pc and a variation probability Pm are set, t is an integer which is greater than or equal to 0 and represents the tth generation, G is a termination evolution algebra, and rand is a randomly generated number between 0 and 1.
Step two, clustering operation, according to given information, the netlist comprises a plurality of nets, each net comprises a plurality of cells, the same Cell can appear in the plurality of nets, in the process of constructing the network topological graph, the nets are regarded as a node in the graph, if two nets comprise the common Cell, a connection relation exists between the two nodes, namely an edge exists, the finally constructed graph is an undirected weightless graph, the graph is clustered, the purpose is to place the cells in the closely-connected nets at adjacent positions as much as possible, so that the total line length is shorter, the clustering algorithm adopts the modularity as a measurement standard, one purpose is to divide the closely-connected cells into a cluster, and place the closely-connected cells at the adjacent positions in the subsequent placement process, and the other purpose is to decompose a large-scale problem into a plurality of smaller subproblems, so that the time required for solving the problem is reduced, and the algorithm specifically comprises the following steps:
d1, constructing a graph, wherein a netlist comprises a plurality of nets, each net comprises a plurality of cells according to given information, the same Cell can appear in the plurality of nets, the nets are regarded as a node in the graph in the process of constructing the network topology graph, if two nets comprise a common Cell, a connection relation exists between the two nodes, namely, one edge exists, and the finally constructed graph is an undirected weightless graph.
D2, initializing operation, wherein each node in the graph is regarded as an independent community, and the number of the initial communities is the same as the number of the total nodes.
D3, carrying out node transfer operation among communities, for each node, sequentially trying to distribute the node to the community where each neighbor node is located, calculating the modularity change before and after distribution, and classifying the node into the community with the largest modularity gain.
And D4, repeatedly executing the step D3 until the communities to which all the nodes belong do not change any more, and ending the node transfer among the communities.
D5, reconstructing the graph, namely reconstructing the graph as the community to which the node belongs is changed, folding the community obtained in the previous step, folding each community into one node, updating the weight of the edge between the nodes in the community into the weight of the ring of the new node, updating the weight of the edge between the nodes in the community into the weight of the edge between the new nodes, and then returning to execute the step D3.
And step three, further dividing and clustering operation, wherein after the clustering result is obtained in the last step, when a large-scale circuit is processed, the number of the cells contained in each cluster is still large, so that the further dividing operation is carried out, the problem is decomposed into a plurality of smaller-scale problems to be solved, the net in each cluster is sequentially expanded to obtain the cells contained in each cluster until the total number of the cells is more than or equal to 20, and if a certain Cell appears before, the certain Cell is skipped. Finally each cluster is divided into a combination of several cells.
Step four, optimizing the Cell combinations obtained in the previous step by adopting a genetic algorithm, and initializing a population: the coding mode adopts sequence coding, the coding length is n, n represents the total number of cells to be placed, the position in the coding represents the placement sequence of each Cell, and an initial population is generated according to the following mode:
and A1, sequencing from large to small according to the length of the Cell to obtain the final code.
And A2, sequencing from small to large according to the length of the Cell to obtain a final code.
And A3, randomly arranging the numbers of the cells to obtain a final code.
Step five, decoding operation, namely calling a sliding window algorithm to decode each individual, calculating to obtain the bus length after the completion of the placement after the decoding, recording the individual with the minimum bus length as Best, and when the decoding operation is carried out, aiming at converting the sequence codes into a final layout scheme, namely determining the position of each Cell, wherein the algorithm specifically comprises the following steps:
e1, initializing, wherein the initial free space list only contains one free space, the size of the free space is equal to the size of a placeable space, the to-be-placed list contains all cells which are not placed, the placed list is initially empty, the size of the largest Cell in the to-be-placed Cell list is recorded and recorded as maxSize, a first window is taken out from the free space, the size of the window is equal to maxSize, so that at least one Cell can be placed down by the window, and then the free space list is updated.
And E2, judging whether the list of the cells to be placed is empty, if so, terminating the algorithm, calculating the length of the bus and returning the result, and otherwise, taking out the next Cell to be placed from the list of the cells to be placed.
E3, judging whether the current window can contain the Cell, if not, executing E4, if so, placing the Cell in the window, deleting the Cell from the list of cells to be placed, adding the Cell into the list of cells to be placed, recording the position information of the Cell, and executing E5.
E4, judging whether all spaces in the free space list are tried, if so, terminating the algorithm, and because all cells are not placed completely, the line length cannot be calculated, and the return value is set to the maximum value which can be represented by the long type, otherwise, taking out the next window from the free space list, and taking out the next window according to the following rules: the general principle is from left to right, top to bottom, with the aim of making the window as compact as possible, the specific rules are as follows:
f1, initializing a window, taking the lower left corner as an origin, and taking out a first window with the size equal to maxSize.
F2, updating the window, and updating the residual space of the window after the Cell is placed in the current window.
And F3, sliding the window, when the residual space of the current window is not enough to put the next Cell, sliding the window upwards, meanwhile, judging whether a free space is available on the left side of the window or not in order to avoid wasting the space, if so, merging the part of space into the current window, sliding the window to the right by one unit when reaching the top of the space in the upward sliding process, and then starting to slide downwards, and similarly, sliding the window to the right by one unit when reaching the bottom of the space in the downward sliding process, and then starting to slide upwards.
E5, updating the current window, calculating the remaining free space of the current window, and then returning to execute E2.
And step six, selecting operation, namely selecting Np individuals from the parent population by adopting a binary championship method according to the population adaptive value obtained by the calculation in the last step, and putting the Np individuals into a mating pool, wherein the individuals with shorter line length have higher probability to be selected.
Step seven, cross operation, namely selecting a pair of individuals from the mating pool at random for the individuals in the mating pool if rand < Pc, optimizing by adopting a cross operator, wherein the cross operator uses a sequential cross operator, and the specific steps are as follows:
and B1, randomly selecting one substring from one parent.
And B2, generating a temporary child, and copying the substring obtained in the previous step to a corresponding position.
And B3, deleting the number contained in the sub-string from the other parent, wherein the rest number is the number required by the temporary child.
And B4, sequentially placing the remaining elements in the previous step into the vacant positions in the temporary offspring from left to right, and finally generating a formal offspring.
Step eight, performing mutation operation, namely optimizing each individual in the population by using a mutation operator if rand < Pm, wherein the rule is as follows: two locations are randomly selected and the cells of the two locations are swapped.
And step nine, judging whether a termination condition is met, wherein the termination condition is that the iteration times reach a termination evolution algebra, if the termination condition is not met, continuing to perform iterative optimization, and returning to the step six, otherwise, ending the search process, and outputting the optimal individual Best to obtain a final layout result.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (9)
1. The layout optimization method of the large-scale integrated circuit based on the genetic algorithm is characterized by comprising the following steps of: the optimization method comprises the following steps:
step one, parameter setting, namely setting population size Np, cross probability Pc and variation probability Pm, wherein t is an integer which is greater than or equal to 0 and represents the tth generation, G is a termination evolution algebra, and rand is a randomly generated number between 0 and 1;
step two, clustering operation, wherein the netlist comprises a plurality of nets, each net comprises a plurality of cells, and the same Cell can appear in the plurality of nets according to given information;
step three, further dividing and clustering operation, wherein after the clustering result is obtained in the previous step, when a large-scale circuit is processed, the number of cells contained in each cluster is still large, so that the further dividing operation is carried out, and the problem is decomposed into a plurality of smaller-scale problems to be solved;
step four, optimizing the Cell combinations obtained in the previous step by adopting a genetic algorithm;
step five, decoding operation, namely calling a sliding window algorithm to decode each individual, calculating to obtain the bus length after the completion of the placement after decoding, and recording the individual with the minimum bus length as Best;
selecting operation, namely calculating a population adaptive value according to the previous step;
step seven, performing cross operation, namely randomly selecting a pair of individuals from the mating pool for the individuals in the mating pool if rand < Pc, and optimizing by adopting a cross operator;
step eight, performing mutation operation, namely optimizing each individual in the population by using a mutation operator if rand is less than Pm, wherein the rule is as follows: randomly selecting two positions, and exchanging cells of the two positions;
and step nine, judging whether a termination condition is met, wherein the termination condition is that the iteration times reach a termination evolution algebra, if the termination condition is not met, continuing to perform iterative optimization, and returning to the step six, otherwise, ending the search process, and outputting the optimal individual Best to obtain a final layout result.
2. The method of claim 1, wherein the LSI layout optimization method based on genetic algorithm comprises: in the second step, in the process of constructing the network topology map, the net is regarded as a node in the map, if two nets contain a common Cell, a connection relationship exists between the two nodes, namely, an edge exists, the finally constructed map is an undirected weightless map, and the map is clustered, so that the Cell in the closely-connected net is placed at a position close to the network as far as possible, the bus length is shorter, and the clustering algorithm adopts the modularity as a measurement standard.
3. The LSI layout optimization method based on genetic algorithm of claim 1, wherein: in step three, the net in each cluster is expanded in sequence to obtain the cells contained therein until the total number of the cells is greater than or equal to 20, and if a certain Cell appears before, the Cell is skipped. Finally each cluster is divided into a combination of several cells.
4. The method of claim 1, wherein the LSI layout optimization method based on genetic algorithm comprises: in step four, the population is initialized: the coding mode adopts sequence coding, the coding length is n, n represents the total number of cells to be placed, the position in the coding represents the placement sequence of each Cell, and the initial population is generated according to the following mode:
a1, sequencing from large to small according to the length of the Cell to obtain a final code;
a2, sequencing from small to large according to the length of the Cell to obtain a final code;
and A3, randomly arranging the numbers of the cells to obtain a final code.
5. The method of claim 1, wherein the LSI layout optimization method based on genetic algorithm comprises: in step six, np individuals are selected from the parent population by adopting a binary tournament method and are placed into a mating pool, and the individuals with shorter line length have higher probability to be selected.
6. The LSI layout optimization method based on genetic algorithm of claim 1, wherein: in the seventh step, the crossover operator uses a sequential crossover operator, and the specific steps are as follows:
b1, randomly selecting a substring from one parent;
b2, generating a temporary offspring, and copying the substring obtained in the previous step to a corresponding position;
b3, deleting the numbers contained in the sub-strings from the other parent, wherein the rest numbers are the numbers required by the temporary child;
and B4, sequentially placing the remaining elements in the previous step into the vacant positions in the temporary offspring from left to right, and finally generating a formal offspring.
7. The method of claim 1, wherein the LSI layout optimization method based on genetic algorithm comprises: in the clustering operation in the second step, one purpose is to divide the cells with relatively close relation into a cluster, and place them at adjacent positions in the subsequent placement process, and the other purpose is to decompose the large-scale problem into a plurality of smaller sub-problems, thereby reducing the time required for solving the problem, and the algorithm specifically comprises the following steps:
d1, constructing a graph, wherein a netlist comprises a plurality of nets according to given information, each net comprises a plurality of cells, the same Cell can appear in the plurality of nets, the nets are regarded as a node in the graph in the process of constructing a network topological graph, if two nets comprise a common Cell, a connection relation exists between the two nodes, namely one edge exists, and the graph obtained through final construction is an undirected weightless graph;
d2, initializing operation, namely regarding each node in the graph as an independent community, wherein the number of the initial communities is the same as the number of the total nodes;
d3, performing inter-community node transfer operation, for each node, sequentially trying to allocate the node to the community where each neighbor node is located, calculating the modularity change before and after allocation, and classifying the node into the community with the largest modularity gain;
d4, repeatedly executing the step D3 until communities to which all the nodes belong do not change any more, and thus, node transfer among the communities is finished;
d5, reconstructing the graph, namely, reconstructing the graph as the community to which the node belongs is changed, folding the community obtained in the previous step, folding each community into a node, updating the weight of the edge between the nodes in the community to the weight of the ring of the new node, updating the weight of the edge between the nodes in the community to the weight of the edge between the new nodes, and then returning to execute the step D3.
8. The LSI layout optimization method based on genetic algorithm of claim 1, wherein: in step five, when performing decoding operation, the purpose is to convert the sequence code into a final layout scheme, that is, to determine the location of each Cell, and the algorithm specifically includes the following steps:
e1, initializing, wherein an initial free space list only comprises one free space, the size of the free space is equal to that of a placeable space, a to-be-placed list comprises all cells which are not placed, the placed list is initially empty, the size of the largest Cell in the to-be-placed Cell list is recorded and recorded as maxSize, a first window is taken out from the free space, the size of the window is equal to maxSize, so that at least one Cell can be placed down by the window, and then the free space list is updated;
e2, judging whether the list of the cells to be placed is empty, if so, terminating the algorithm, calculating the length of the bus and returning the result, and otherwise, taking out the next Cell to be placed from the list of the cells to be placed;
e3, judging whether the current window can contain the Cell or not, if not, executing E4, if so, placing the Cell in the window, deleting the Cell from a list of cells to be placed, adding the Cell into the list of the placed cells, recording position information of the Cell, and executing E5;
e4, judging whether all spaces in the free space list are tried, if so, terminating the algorithm, and because all cells are not placed completely, the line length cannot be calculated, and the return value is set to the maximum value which can be represented by the long type, otherwise, taking out the next window from the free space list, and taking out the next window according to the following rules: the general principle is left to right, top to bottom, with the aim of making the window as compact as possible;
e5, updating the current window, calculating the remaining free space of the current window, and then returning to execute E2.
9. The method of claim 8, wherein the LSI layout optimization method based on genetic algorithm comprises: in step E4, the specific rules are as follows:
f1, initializing a window, taking the lower left corner as an origin, and taking out a first window with the size equal to maxSize;
f2, updating the window, and updating the residual space of the window after the Cell is placed in the current window;
and F3, sliding the window, when the remaining space of the current window is not enough for placing the next Cell, sliding the window upwards, simultaneously judging whether a free space is available on the left side of the window or not in order to avoid wasting the space, if so, merging the part of space into the current window, sliding the window to the right by one unit when the top of the space is reached in the process of sliding upwards, and then starting to slide downwards, and similarly sliding the window to the right by one unit when the bottom of the space is reached in the process of sliding downwards, and then starting to slide upwards.
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