CN115543189A - Data storage method and device of flash memory, terminal equipment and storage medium - Google Patents
Data storage method and device of flash memory, terminal equipment and storage medium Download PDFInfo
- Publication number
- CN115543189A CN115543189A CN202211114195.3A CN202211114195A CN115543189A CN 115543189 A CN115543189 A CN 115543189A CN 202211114195 A CN202211114195 A CN 202211114195A CN 115543189 A CN115543189 A CN 115543189A
- Authority
- CN
- China
- Prior art keywords
- error bit
- flash memory
- bit number
- block
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses a data storage method and device of a flash memory, terminal equipment and a storage medium, wherein the data storage method of the flash memory comprises the following steps: calculating respective first error bit number and basic error bit number of each storage block in the initialized flash memory; adding the basic error bit number and the first error bit number to a wear table of the flash memory, wherein the wear table comprises the respective erasing times of each memory block; determining a target storage block in each storage block according to the wear table, wherein the sum of a second error bit number of the target storage block and the basic error bit number is the minimum in the wear table, and the second error bit number is the product of the first error bit number and the erasing times; and storing the data of the flash memory according to the target memory block. The invention avoids the slow speed of reading data caused by excessive error bit number and excessive erasing times in the data of the memory block.
Description
Technical Field
The present invention relates to the field of memory technologies, and in particular, to a data storage method and apparatus for a flash memory, a terminal device, and a computer storage medium.
Background
The error bit existing in the data stored in the flash memory can be corrected by adopting a hard solution or a soft solution. When the number of error bits in the data stored in the flash memory is small, a hard solution can be adopted for error correction, but when the number of error bits in the data stored in the flash memory exceeds a certain number, a soft solution can be adopted for error correction. The soft solution requires the master control to match with the hard solution module for multiple times of matching, so that when the number of error bits in the data stored in the block in the flash memory is too large, the reading speed is slowed down.
When data in a flash memory needs to be erased, all data in a block where the data is located often needs to be erased. The number of times of erasing each block is limited, and repeated erasing of the same block causes excessive wear of the block, thereby increasing the number of error bits in data of the block, and also causes a slow reading speed due to excessive wear of the block.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide a data storage method and device of a flash memory, a terminal device and a computer storage medium, and aims to solve the technical problems of low reading speed caused by excessive block wear of the flash memory and excessive number of error bits in data stored on a block.
In order to achieve the above object, the present invention provides a data storage method of a flash memory, wherein the data storage of the flash memory comprises the following steps:
calculating respective first error bit number and basic error bit number of each storage block in the initialized flash memory;
adding the basic error bit number and the first error bit number to a wear table of the flash memory, wherein the wear table comprises the respective erasing times of each memory block;
determining a target storage block in each storage block according to the wear table, wherein the sum of a second error bit number of the target storage block and the basic error bit number is the minimum in the wear table, and the second error bit number is the product of the first error bit number and the erasing times;
and storing the data of the flash memory according to the target memory block.
Optionally, the step of calculating the first error bit number of each storage block in the initialized flash memory includes:
erasing data on each storage block in the initialized flash memory and rewriting the data on the storage blocks;
respectively reading the rewritten data from each storage block to obtain the respective basic error bit number of each storage block;
after the preset number of erasing operations are repeatedly carried out on each storage block, rewriting data on each storage block, and respectively reading the rewritten data from each storage block to obtain the respective third error bit number of each storage block;
and calculating the difference between the basic error bit number and the third error bit number aiming at each storage block, dividing the absolute value of the difference by the preset number to obtain the average error bit number of the storage block, and calculating the error bit number in each 2KB data by using the average error bit number.
Optionally, after the step of performing data storage of the flash memory according to the target storage block, the data storage method of the flash memory further includes:
and updating the wear table according to each storage block in the flash memory so as to determine a target storage block in each storage block according to the updated wear table.
Optionally, the data storage method of the flash memory further includes:
monitoring the service life of the flash memory;
the step of updating the wear table according to each of the memory blocks in the flash memory includes:
for each memory block, when the monitored use duration is equal to a preset duration, after a first erasing operation is performed on the memory block after the use duration is equal to the preset duration, calculating a fourth error bit number of the memory block;
updating the wear table using the fourth number of erroneous bits.
Optionally, the step of updating the wear table according to each memory block in the flash memory includes:
when a wear block with the erasing frequency equal to a preset frequency exists in each storage block of the flash memory, calculating a fifth error bit number of the wear block after a first erasing operation is performed on the wear block with the erasing frequency equal to the preset frequency;
updating the wear table using the fifth number of erroneous bits.
Optionally, before the step of calculating the fifth error bit number of the wear block, the data storage method of the flash memory further includes:
performing data exchange aiming at the wear block in each storage block of the flash memory;
the step of calculating a fifth error bit number of the wear block includes:
and calculating the fifth error bit number of the wear block after data exchange.
Optionally, the data storage method of the flash memory further includes:
determining the data storage capacity of the flash memory;
the step of updating the wear table according to each of the memory blocks in the flash memory includes:
aiming at each storage block, when the data storage capacity of the flash memory reaches a preset storage capacity threshold value, after the first erasing operation that the data storage capacity of the storage block reaches the storage capacity threshold value is carried out on the storage block, calculating the sixth error bit number of each storage block;
updating the wear table with each of the sixth error bit numbers.
In order to achieve the above object, the present invention further provides a data storage device of a flash memory, the data storage device of the flash memory including:
the calculation module is used for calculating the respective first error bit number and the basic error bit number of each storage block in the initialized flash memory;
an adding module, configured to add the basic error bit number and the first error bit number to a wear table of the flash memory, where the wear table includes respective erase times of each storage block;
a determining module, configured to determine a target storage block in each storage block according to the wear table, where a sum of a second error bit number of the target storage block and the basic error bit number is the smallest in the wear table, and the second error bit number is a product of the first error bit number and the erasure number;
the determining module is further configured to store data of the flash memory according to the target storage block.
In order to achieve the above object, the present invention further provides a terminal device, including: the data storage program of the flash memory is stored on the memory and can run on the processor, and when being executed by the processor, the data storage program of the flash memory realizes the steps of the data storage method of the flash memory.
In addition, in order to achieve the above object, the present invention further provides a computer storage medium, on which a data storage program of a flash memory is stored, and the data storage program of the flash memory realizes the steps of the data storage method of the flash memory when being executed by a processor.
In the invention, the respective first error bit number and the basic error bit number of each storage block in the initialized flash memory are calculated, the basic error bit number and the first error bit number are added to a wear table of the flash memory, wherein the wear table comprises the respective erasing times of each storage block, a target storage block in each storage block is determined according to the wear table, the sum of the second error bit number and the basic error bit number of the target storage block is the minimum in the wear table, the second error bit number is the product of the first error bit number and the erasing times, and data storage of the flash memory is carried out according to the target storage block. Therefore, the storage block used in each data storage is the block with the minimum sum of the second error bit number and the basic error bit number in each storage block, so that each storage block is used in a balanced manner, the data is prevented from being stored in the storage blocks with excessive part of the first error bit number and the erasing times, and the reading speed is prevented from being slowed down due to the excessive error bit number and the excessive erasing times in the data of the storage blocks.
Drawings
Fig. 1 is a schematic structural diagram of a terminal device in a hardware operating environment according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a first embodiment of a data storage method of a flash memory according to the present invention;
FIG. 3 is a functional block diagram of a data storage device of a flash memory according to an embodiment of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, fig. 1 is a schematic structural diagram of a hardware operating environment related to a terminal device according to an embodiment of the present invention.
It should be noted that fig. 1 is a schematic structural diagram of a hardware operating environment of the terminal device. The terminal device may specifically be a mobile terminal, a data storage control terminal, a PC, a portable computer, or the like.
As shown in fig. 1, the terminal device may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, a communication bus 1002. Wherein a communication bus 1002 is used to enable connective communication between these components. The user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., WI-FI interface). The memory 1005 may be a non-volatile memory (e.g., flash memory), a high-speed RAM memory, or a non-volatile memory (e.g., a disk memory). The memory 1005 may alternatively be a storage device separate from the processor 1001.
Those skilled in the art will appreciate that the terminal device configuration shown in fig. 1 is not limiting of terminal devices and may include more or fewer components than shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, a memory 1005, which is a kind of computer storage medium, may include a communication bus interface, a main control chip, a memory grain, and a data storage program of a flash memory. The main control chip contains firmware program for managing and controlling hardware and software resources of the sample terminal equipment.
In the terminal apparatus shown in fig. 1, the user interface 1003 is mainly used for data communication with each terminal; the network interface 1004 is mainly used for connecting a background server and performing data communication with the background server; and the processor 1001 may be configured to call a data storage program of the flash memory stored in the memory 1005 and perform the following operations:
calculating respective first error bit number and basic error bit number of each storage block in the initialized flash memory;
adding the basic error bit number and the first error bit number to a wear table of the flash memory, wherein the wear table comprises the respective erasing times of each memory block;
determining a target storage block in each storage block according to the wear table, wherein the sum of a second error bit number of the target storage block and the basic error bit number is the minimum in the wear table, and the second error bit number is the product of the first error bit number and the erasing times;
and storing the data of the flash memory according to the target memory block.
Further, the processor 1001 may call a data storage program of the flash memory stored in the memory 1005, and also perform the following operations:
erasing data on each storage block in the initialized flash memory and rewriting the data on the storage blocks;
respectively reading the rewritten data from each storage block to obtain the respective basic error bit number of each storage block;
after the preset number of erasing operations are repeatedly carried out on each storage block, rewriting data on each storage block, and respectively reading the rewritten data from each storage block to obtain the respective third error bit number of each storage block;
and calculating the difference between the basic error bit number and the third error bit number aiming at each storage block, dividing the absolute value of the difference by the preset number to obtain the average error bit number of the storage block, and calculating the error bit number in each 2KB data by using the average error bit number.
Further, the processor 1001 may call a data storage program of the flash memory stored in the memory 1005, and also perform the following operations:
and updating the wear table according to each storage block in the flash memory so as to determine a target storage block in each storage block according to the updated wear table.
Further, the processor 1001 may call a data storage program of the flash memory stored in the memory 1005, and also perform the following operations:
monitoring the use duration of the flash memory;
the operation of updating the wear table according to each of the memory blocks in the flash memory includes:
for each memory block, when the monitored use duration is equal to a preset duration, after a first erasing operation is performed on the memory block after the use duration is equal to the preset duration, calculating a fourth error bit number of the memory block;
updating the wear table using the fourth number of erroneous bits.
Further, the processor 1001 may call a data storage program of the flash memory stored in the memory 1005, and also perform the following operations:
when a wear block with the erasing frequency equal to a preset frequency exists in the storage blocks of the flash memory, calculating a fifth error bit number of the wear block after a first erasing operation is performed on the wear block after the erasing frequency is equal to the preset frequency;
updating the wear table using the fifth number of erroneous bits.
Further, the processor 1001 may call a data storage program of the flash memory stored in the memory 1005, and also perform the following operations:
performing data exchange aiming at the wear block in each storage block of the flash memory;
the operation of calculating the fifth error bit number of the wear block comprises:
and calculating the fifth error bit number of the wear block after data exchange.
Further, the processor 1001 may call a data storage program of the flash memory stored in the memory 1005, and also perform the following operations:
determining the data storage capacity of the flash memory;
the operation of updating the wear table according to each of the memory blocks in the flash memory includes:
aiming at each storage block, when the data storage capacity of the flash memory reaches a preset storage capacity threshold value, after the first erasing operation that the data storage capacity of the storage block reaches the storage capacity threshold value is carried out on the storage block, calculating the sixth error bit number of each storage block;
and updating the wear table by using each sixth error bit number.
Based on the above structure, various embodiments of the data storage method of the flash memory of the present invention are provided. It should be noted that, when the data stored in the flash memory has an error, the data stored in the flash memory may be corrected by using a hard solution or a soft solution. When the number of error bits in the data stored in the flash memory is small, a hard solution can be adopted for error correction, but when the number of error bits in the data stored in the flash memory exceeds a certain number, a soft solution can be adopted for error correction, and the soft solution needs to be matched with a hard solution module by a main control module for multiple times of matching. The flash memory performs data reading operation in units of blocks, so that when the number of error bits in data stored in a block in the flash memory is excessive, the number of error bits affects the decoding speed, and the main control needs to perform error correction, thereby slowing the reading speed of the block.
The flash memory performs data erasing operation in units of blocks, and when data in the flash memory needs to be erased, all data in a block where the data is located often need to be erased. The number of times of erasing each block is limited, repeated erasing of the same block causes excessive wear of the block, thereby increasing the number of error bits in the data of the block, and the reading speed also becomes slow due to the excessive wear of the block and the side length of the decoding time.
In view of the above phenomena, the present embodiment provides a data storage method for a flash memory, which includes calculating an error bit number of each block (hereinafter referred to as a storage block to show differentiation) in an initialized flash memory, adding the error bit number to a wear table, and selecting a storage block storing data from the storage blocks according to the error bit number and the erase frequency in the wear table when selecting the storage block storing data, wherein the storage block with the smallest product of the error bit number and the erase frequency is selected from the storage blocks to be used for storing data, so that a decrease in data reading speed due to an excessive error bit number and an excessive erase frequency in data of the storage block is avoided. For convenience of description, a memory block in which the product of the number of selected error bits and the number of times of erasure is the smallest is referred to as a target memory block.
Referring to fig. 2, fig. 2 is a flowchart illustrating a data storage method of a flash memory according to a first embodiment of the present invention. It should be noted that, although a logical order is shown in the flow chart, in some cases, the steps shown or described may be performed in an order different than that shown or described herein. In this embodiment, the data storage method of the flash memory includes:
step S100, calculating respective first error bit number and basic error bit number of each storage block in the initialized flash memory;
in this embodiment, the number of error bits (hereinafter referred to as a first error bit number to show distinction) caused by each average erase operation of each memory block in the initialized flash memory is calculated, and the number of error bits (hereinafter referred to as a basic error bit number to show distinction) existing in each memory block in the initialized flash memory is calculated. In a specific embodiment, the number of error bits of the storage block may be the number of error bits of every 2KB of data in the storage block, or the number of error bits when the storage block is full of data, and may be specifically set according to an actual requirement, which is not limited herein.
Step S200, adding the basic error bit number and the first error bit number to a wear table of the flash memory, wherein the wear table comprises the erasing times of each storage block;
in order to prolong the service time of the flash memory, a wear leveling algorithm is usually adopted to ensure that the erasing times of each storage block in the flash memory are balanced, so that the performance of the flash memory is prevented from being reduced due to excessive wear caused by excessive erasing times of one storage block. The wear balance of the flash memory is realized by constructing a wear table, recording the accumulated erasing times of each storage block in the wear table, and selecting the storage block with less erasing times in the wear table for operation when writing or erasing operation is performed on the flash memory every time, so that each storage block can be fully utilized.
In this embodiment, the first error bit number and the basic error bit number corresponding to each storage block are added to the wear table to obtain a new wear table, and the wear table to which the first error bit number and the basic error bit number are added is used as a basis for selecting data to be stored.
Step S300, determining a target storage block in each storage block according to the wear table, wherein the sum of a second error bit number of the target storage block and the basic error bit number is the minimum in the wear table, and the second error bit number is the product of the first error bit number and the erasing times;
in this embodiment, the product of the first error bit number and the erasure number in each memory block is calculated to obtain the second error bit number, and it can be understood that the second error bit number is the error bit number generated by the erasure operation of the memory block.
And selecting the target storage block with the minimum sum of the second error bit number and the basic error bit number in each storage block according to the wear table.
Specifically, in an embodiment, the wear table may include a sum of a second error bit number and a basic error bit number corresponding to each storage block in advance, and the minimum and corresponding storage block is directly selected when the target storage block is selected; in another embodiment, the sum of the second error bit number and the basic error bit number may also be calculated when data needs to be stored, and the storage block with the smallest sum of the second error bit number and the basic error bit number is selected as the target storage block. The specific setting can be set according to actual conditions, and is not limited herein.
And step S400, storing the data of the flash memory according to the target memory block.
When data storage is needed in the flash memory, a target storage block is selected for data storage.
Further, in one embodiment, the first number of erroneous bits is the number of erroneous bits existing in every 2KB of data on the memory block, and step S100 includes
Step S101, erasing data on each storage block in the initialized flash memory and rewriting data on the storage blocks;
in this embodiment, the first error bit count is calculated for the initialized flash memory. The initialization flash memory may have data previously stored therein, and thus, each memory block in the flash memory is erased to restore the data.
In a specific embodiment, the data may be written into each memory block in an equal amount, for example, all the memory blocks are full of data, or written into each memory block in an unequal amount, which is not limited herein and may be set according to actual requirements.
Step S102, respectively reading the rewritten data from each storage block to obtain the respective basic error bit number of each storage block;
and reading the data rewritten in each storage block, and calculating the total number of error bits in the data of each storage block according to the written data and the read data, namely the number of basic error bits.
Step S103, after a preset number of erasing operations are repeatedly performed on each storage block, rewriting data on each storage block, and respectively reading the rewritten data from each storage block to obtain a third error bit number of each storage block;
and after the basic error bit number is obtained through calculation, repeatedly carrying out erasing operation of a preset number on each storage block. After the preset number of erasing operations are repeatedly performed on each storage block, data are rewritten on each storage block, and the rewritten data are read from each storage block respectively to obtain the total number of error bits (hereinafter referred to as a third error bit number for distinction) in the respective data of each storage block.
In a specific embodiment, the preset number may be set according to actual requirements, for example, in an embodiment, the preset number may be set to 10.
Step S104, calculating the difference between the basic error bit number and the third error bit number for each storage block, calculating the average error bit number of the storage block by dividing the absolute value of the difference by the preset number, and calculating the error bit number in each 2KB data by using the average error bit number.
And calculating the difference between the basic error bit number and the third error bit number aiming at each storage block, and dividing the absolute value of the difference by the preset number to obtain the average error bit number of the storage block. The average number of erroneous bits is used to calculate the number of erroneous bits in each 2KB of data, resulting in a first number of erroneous bits.
In this embodiment, the data storage of the flash memory is performed according to the target memory block by calculating the respective first error bit number and the base error bit number of each memory block in the initialized flash memory, adding the base error bit number and the first error bit number to a wear table of the flash memory, determining the target memory block in each memory block according to the wear table, where the sum of the second error bit number and the base error bit number of the target memory block is the smallest in the wear table, the second error bit number is the product of the first error bit number and the erase number, and storing the data of the flash memory according to the target memory block. The storage blocks used in each data storage are the blocks with the minimum sum of the second error bit number and the basic error bit number in each storage block, so that each storage block is used in a balanced manner, the data are prevented from being stored in the storage blocks with excessive part of first error bit numbers and excessive erasing times, and the reading speed is prevented from being slowed down due to excessive error bit numbers and excessive erasing times in the data of the storage blocks.
Further, based on the first embodiment, a second embodiment of the data storage method of the flash memory of the present invention is provided.
In this embodiment, after the step S400, the data storage method of the flash memory further includes:
step S500, updating the wear table according to each storage block in the flash memory, so as to determine a target storage block in each storage block according to the updated wear table.
Under the influence of factors in the aspects of the using time, the storage data amount, the performance of the flash memory and the like of the flash memory, after data is stored in the flash memory, the first error bit number in each storage block in the flash memory is changed to a certain extent compared with the initialized flash memory.
In this embodiment, the wear table is updated, and the target storage block is determined according to the updated wear table to use the target storage block for data storage, so that data storage can be performed according to the actual use condition of the flash memory, and each storage block in the flash memory can be used in a balanced manner.
Further, in an embodiment, the data storage method of the flash memory of the present invention further includes:
step S600, monitoring the service life of the flash memory;
in this embodiment, the use duration of the flash memory is detected, and whether to update the wear table is determined according to the use duration of the flash memory.
In this embodiment, step S500 includes:
step S501, aiming at each memory block, when the monitored use duration is equal to a preset duration, after a first erasing operation is carried out on the memory block after the use duration is equal to the preset duration, calculating a fourth error bit number of the memory block;
step S502, the fourth error bit number is used for updating the abrasion table.
In this embodiment, for each memory block, when it is monitored that the use duration of the flash memory is equal to the preset duration, after performing a first erase operation on the memory block after the use duration of the memory block is equal to the preset duration, the number of error bits generated by each erase operation of the memory block is calculated (hereinafter, referred to as a fourth error bit number to indicate distinction). Specifically, the step S101 to the step S104 in the first embodiment may be referred to for calculating the fourth error bit number, which is not described herein.
And after the fourth error bit number is obtained, replacing the error bit number of the corresponding storage block in the wear table by the fourth error bit number to update the wear table, so that the target storage block can be determined according to the updated wear table to use the target storage block for data storage.
Specifically, in an embodiment, the number of the preset time period may be one, that is, the wear table is updated only once; in another embodiment, the number of the preset time periods may also be multiple, that is, the wear table is updated at regular time intervals, which may be specifically set according to actual requirements, and is not limited herein.
It should be noted that, the fourth error bit number of each memory block is calculated for the flash memory with a certain usage duration to update the wear table, so that the calculation times can be reduced, and the operation performance can be ensured.
Further, in an embodiment, step S500 includes:
step S503, when determining that a wear block with the erasing frequency equal to a preset frequency exists in the storage blocks of the flash memory, after performing a first erasing operation on the wear block with the erasing frequency equal to the preset frequency, calculating a fifth error bit number of the wear block;
and step S504, updating the wear table by using the fifth error bit number.
In this embodiment, a memory block with an erase count equal to a preset count is referred to as a wear block, and when it is determined that a wear block exists in the flash memory, after a first erase operation is performed on the wear block with the erase count equal to the preset count, the number of error bits (hereinafter referred to as a fifth error bit number for distinction) generated in each erase operation of the wear block on average is calculated. Specifically, the step S101 to the step S104 in the first embodiment may be referred to for calculating the fifth error bit number, which is not described herein.
And after the fifth error bit number is obtained, replacing the error bit number of the wear block in the wear table corresponding to the fifth error bit number by the fifth error bit number to update the wear table, so that the target storage block can be determined according to the updated wear table to use the target storage block for data storage.
It should be noted that, the wear table is updated by calculating the fifth error bit number of the wear block in the flash memory, so that the calculation times can be reduced, and the operation performance can be ensured.
Further, in an embodiment, before the step of calculating the fifth error bit number of the second storage block in the step S503, the method further includes:
step S505, exchanging data for the wear block in each storage block of the flash memory;
when the number of times of erasing the memory block is large, it can be determined that the data on the memory block is updated frequently, the data on the memory block with the large number of times of erasing is called hot data, and the data in the memory block with the small number of times of erasing is called cold data for distinction.
In this embodiment, data exchange is performed for a wear block with an erase frequency reaching a preset frequency in each memory block, that is, hot data on the wear block is exchanged with cold data on a memory block with a small erase frequency. Thereby reducing the number of times the worn-out block is erased to extend the lifetime of the flash memory.
The step of calculating the fifth error bit number of the second storage block in step S503 includes:
step S5031, calculating the fifth error bit number of the wear block subjected to data exchange;
and after data exchange is carried out, calculating the fifth error bit number of the wear block after the data exchange is carried out. And replacing the error bit number of the wear block in the wear table corresponding to each wear block by using the fifth error bit number to update the wear table, so that the target storage block can be determined according to the updated wear table to use the target storage block for data storage.
It should be noted that, by exchanging data for the worn blocks with the erase times reaching the preset times in each memory block, the erase times of the worn blocks can be reduced to prolong the service life of the flash memory.
And updating the wear table by using the fifth error bit number of the wear block after data exchange, so that the numerical value in the wear table can accord with the actual use condition of the flash memory, and each storage block in the flash memory can be used uniformly.
Further, in an embodiment, the data storage method of the flash memory of the present invention further includes:
step S700, determining the data storage capacity of the flash memory;
in the embodiment, the data storage amount of the flash memory is determined, and whether invalid data in the flash memory is erased or not is determined according to the data storage amount, so that the flash memory can store more useful data, and the service life of the flash memory is prolonged.
In this embodiment, step S500 includes:
step S506, aiming at each storage block, when the data storage capacity of the flash memory reaches a preset storage capacity threshold value, after the first erasing operation after the data storage capacity of the storage block reaches the storage capacity threshold value is carried out on the storage block, calculating the sixth error bit number of each second storage block;
in this embodiment, for each memory block, when the data storage amount of the flash memory reaches a preset storage amount threshold, after the first erasing operation after the data storage amount reaches the storage amount threshold is performed on the memory block, the number of error bits generated by each erasing operation of each memory block on average (hereinafter, referred to as a sixth error bit number for distinction) is calculated. Specifically, the step S101 to the step S104 in the first embodiment may be referred to for calculating the sixth error bit number, which is not described herein.
And step S507, updating the wear table by using each sixth error bit number.
And replacing the error bit number of the corresponding storage block in the wear table by using the sixth error bit number to update the wear table, so that the target storage block can be determined according to the updated wear table to use the target storage block for data storage.
It should be noted that, by updating the wear table with the sixth error bit number, the value in the wear table can be made to conform to the actual use condition of the flash memory, so that each memory block in the flash memory can be used in a balanced manner.
In this embodiment, the wear table of the flash memory under different use conditions is updated, and the target storage block is determined according to the updated wear table to use the target storage block for data storage, so that data storage can be performed according to the actual use condition of the flash memory, and each storage block in the flash memory can be used in a balanced manner.
The present invention also provides a data storage apparatus of a flash memory, and referring to fig. 3, the data storage apparatus of the flash memory includes:
the calculation module 10 is configured to calculate a first error bit number and a basic error bit number of each storage block in the initialized flash memory;
an adding module 20, configured to add the basic error bit number and the first error bit number to a wear table of the flash memory, where the wear table includes respective erase times of each storage block;
a determining module 30, configured to determine a target storage block in each storage block according to the wear table, where a sum of a second error bit number of the target storage block and the basic error bit number is the smallest in the wear table, and the second error bit number is a product of the first error bit number and the erasure number;
the determining module 30 is further configured to store data of the flash memory according to the target storage block.
Further, the first number of erroneous bits is the number of erroneous bits existing in every 2KB of data on the memory block, and the calculation module 10 is further configured to:
erasing data on each storage block in the initialized flash memory and rewriting the data on the storage blocks;
respectively reading the rewritten data from each storage block to obtain the respective basic error bit number of each storage block;
after the preset number of erasing operations are repeatedly carried out on each storage block, rewriting data on each storage block, and respectively reading the rewritten data from each storage block to obtain a third error bit number of each storage block;
and calculating the difference between the basic error bit number and the third error bit number aiming at each storage block, dividing the absolute value of the difference by the preset number to obtain the average error bit number of the storage block, and calculating the error bit number in each 2KB data by using the average error bit number.
Further, the data storage device of the flash memory further comprises an update module, and the update module is configured to:
and updating the wear table according to each storage block in the flash memory so as to determine a target storage block in each storage block according to the updated wear table.
Further, the data storage device of the flash memory further comprises a monitoring module, and the monitoring module is configured to:
monitoring the use duration of the flash memory;
the update module is further to:
for each memory block, when the monitored use duration is equal to a preset duration, after a first erasing operation is performed on the memory block after the use duration is equal to the preset duration, calculating a fourth error bit number of the memory block;
updating the wear table using the fourth number of erroneous bits.
Further, the update module is further configured to:
when a wear block with the erasing frequency equal to a preset frequency exists in the storage blocks of the flash memory, calculating a fifth error bit number of the wear block after a first erasing operation is performed on the wear block after the erasing frequency is equal to the preset frequency;
and updating the wear table by using the fifth error bit number.
Further, the update module is further configured to:
performing data exchange aiming at the wear block in each storage block of the flash memory;
the step of calculating a fifth error bit number of the wear block includes:
and calculating the fifth error bit number of the wear block after data exchange.
Further, the monitoring module is further configured to:
determining the data storage capacity of the flash memory;
the update module is further to:
aiming at each storage block, when the data storage capacity of the flash memory reaches a preset storage capacity threshold value, after the first erasing operation that the data storage capacity of the storage block reaches the storage capacity threshold value is carried out on the storage block, calculating the sixth error bit number of each storage block;
updating the wear table with each of the sixth error bit numbers.
The embodiments of the data storage device of the flash memory of the present invention can refer to the embodiments of the data storage method of the flash memory of the present invention, and are not described herein again.
In addition, an embodiment of the present invention further provides a computer storage medium, where a data storage program of a flash memory is stored on the computer storage medium, and when the data storage program of the flash memory is executed by a processor, the steps of the data storage method of the flash memory described above are implemented.
For the embodiments of the computer storage medium of the present invention, reference may be made to the embodiments of the data storage method of the flash memory of the present invention, and details are not repeated here.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a computer storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A data storage method of a flash memory is characterized by comprising the following steps:
calculating respective first error bit number and basic error bit number of each storage block in the initialized flash memory;
adding the basic error bit number and the first error bit number to a wear table of the flash memory, wherein the wear table comprises the respective erasing times of each memory block;
determining a target storage block in each storage block according to the wear table, wherein the sum of a second error bit number of the target storage block and the basic error bit number is the minimum in the wear table, and the second error bit number is the product of the first error bit number and the erasing times;
and storing the data of the flash memory according to the target memory block.
2. The method as claimed in claim 1, wherein the first error bit number is an error bit number existing in every 2KB of data on the memory block, and the step of calculating the respective first error bit number and the base error bit number of each memory block in the initialized flash memory comprises:
erasing data on each storage block in the initialized flash memory and rewriting the data on the storage blocks;
respectively reading the rewritten data from each storage block to obtain the respective basic error bit number of each storage block;
after the preset number of erasing operations are repeatedly carried out on each storage block, rewriting data on each storage block, and respectively reading the rewritten data from each storage block to obtain the respective third error bit number of each storage block;
and calculating the difference between the basic error bit number and the third error bit number aiming at each storage block, dividing the absolute value of the difference by the preset number to obtain the average error bit number of the storage block, and calculating the error bit number in each 2KB data by using the average error bit number.
3. The data storage method of a flash memory according to claim 1, wherein after the step of performing data storage of the flash memory according to the target block, the data storage method of the flash memory further comprises:
and updating the wear table according to each storage block in the flash memory so as to determine a target storage block in each storage block according to the updated wear table.
4. The data storage method of a flash memory according to claim 3, wherein the data storage method of a flash memory further comprises:
monitoring the use duration of the flash memory;
the step of updating the wear table according to each of the memory blocks in the flash memory includes:
for each memory block, when the monitored use duration is equal to a preset duration, after a first erasing operation is performed on the memory block after the use duration is equal to the preset duration, calculating a fourth error bit number of the memory block;
updating the wear table using the fourth number of erroneous bits.
5. The method of claim 3, wherein said step of updating said wear table for each of said blocks in said flash memory comprises:
when a wear block with the erasing frequency equal to a preset frequency exists in each storage block of the flash memory, calculating a fifth error bit number of the wear block after a first erasing operation is performed on the wear block with the erasing frequency equal to the preset frequency;
updating the wear table using the fifth number of erroneous bits.
6. The data storage method of a flash memory according to claim 5, wherein before the step of calculating the fifth error bit number of the worn block, the data storage method of a flash memory further comprises:
performing data exchange aiming at the wear block in each storage block of the flash memory;
the step of calculating a fifth error bit number of the wear block includes:
and calculating the fifth error bit number of the wear block after data exchange.
7. The data storage method of a flash memory according to claim 3, wherein the data storage method of a flash memory further comprises:
determining the data storage capacity of the flash memory;
the step of updating the wear table according to each of the memory blocks in the flash memory includes:
aiming at each storage block, when the data storage capacity of the flash memory reaches a preset storage capacity threshold value, after the first erasing operation that the data storage capacity of the storage block reaches the storage capacity threshold value is carried out on the storage block, calculating the sixth error bit number of each storage block;
updating the wear table with each of the sixth error bit numbers.
8. A data storage device of a flash memory, the data storage device of the flash memory comprising:
the calculation module is used for calculating the respective first error bit number and basic error bit number of each storage block in the initialized flash memory;
an adding module, configured to add the basic error bit number and the first error bit number to a wear table of the flash memory, where the wear table includes respective erase times of each storage block;
a determining module, configured to determine a target storage block in each storage block according to the wear table, where a sum of a second error bit number of the target storage block and the basic error bit number is the smallest in the wear table, and the second error bit number is a product of the first error bit number and the erasure number;
the determining module is further configured to store data of the flash memory according to the target storage block.
9. A terminal device, characterized in that the terminal device comprises: memory, a processor and a data storage program of a flash memory stored on the memory and being executable on the processor, the data storage program of the flash memory realizing the steps of the data storage method of a flash memory according to any one of claims 1 to 7 when executed by the processor.
10. A computer storage medium, characterized in that the computer storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps of the data storage method of a flash memory according to any one of claims 1 to 7.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211114195.3A CN115543189A (en) | 2022-09-13 | 2022-09-13 | Data storage method and device of flash memory, terminal equipment and storage medium |
| PCT/CN2023/093322 WO2024055612A1 (en) | 2022-09-13 | 2023-05-10 | Data storage method and apparatus for flash memory, and terminal device and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211114195.3A CN115543189A (en) | 2022-09-13 | 2022-09-13 | Data storage method and device of flash memory, terminal equipment and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115543189A true CN115543189A (en) | 2022-12-30 |
Family
ID=84727718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211114195.3A Pending CN115543189A (en) | 2022-09-13 | 2022-09-13 | Data storage method and device of flash memory, terminal equipment and storage medium |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN115543189A (en) |
| WO (1) | WO2024055612A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024055612A1 (en) * | 2022-09-13 | 2024-03-21 | 深圳市硅格半导体有限公司 | Data storage method and apparatus for flash memory, and terminal device and storage medium |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI354996B (en) * | 2007-12-31 | 2011-12-21 | Phison Electronics Corp | Wear leveling method and controller thereof |
| CN104360957A (en) * | 2014-11-26 | 2015-02-18 | 上海爱信诺航芯电子科技有限公司 | Method for maintaining flash memory wear leveling |
| CN111078123B (en) * | 2018-10-19 | 2022-10-04 | 浙江宇视科技有限公司 | Method and device for evaluating wear degree of flash memory block |
| CN112256193A (en) * | 2020-09-16 | 2021-01-22 | 浙江大华存储科技有限公司 | Method, device and storage medium for improving data security of solid state disk |
| CN115543189A (en) * | 2022-09-13 | 2022-12-30 | 深圳市硅格半导体有限公司 | Data storage method and device of flash memory, terminal equipment and storage medium |
-
2022
- 2022-09-13 CN CN202211114195.3A patent/CN115543189A/en active Pending
-
2023
- 2023-05-10 WO PCT/CN2023/093322 patent/WO2024055612A1/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024055612A1 (en) * | 2022-09-13 | 2024-03-21 | 深圳市硅格半导体有限公司 | Data storage method and apparatus for flash memory, and terminal device and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2024055612A1 (en) | 2024-03-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7224604B2 (en) | Method of achieving wear leveling in flash memory using relative grades | |
| US9129699B2 (en) | Semiconductor storage apparatus and method including executing refresh in a flash memory based on a reliability period using degree of deterioration and read frequency | |
| US7962807B2 (en) | Semiconductor storage apparatus managing system, semiconductor storage apparatus, host apparatus, program and method of managing semiconductor storage apparatus | |
| JP5368993B2 (en) | Memory controller, nonvolatile memory module, and nonvolatile memory system | |
| US20170336992A1 (en) | Method, device, and program for managing a flash memory for mass storage | |
| JP2005242897A (en) | Flash disk drive | |
| US20090259819A1 (en) | Method of wear leveling for non-volatile memory | |
| US7934130B2 (en) | System and method for managing non-volatile memory based on health | |
| KR20090105143A (en) | Memory system and wear leveling method thereof | |
| KR20110050443A (en) | Managing storage of cached content | |
| CN115543189A (en) | Data storage method and device of flash memory, terminal equipment and storage medium | |
| US11231854B2 (en) | Methods and apparatus for estimating the wear of a non-volatile memory | |
| KR100624973B1 (en) | An Efficient Wear-leveling Scheme for Flash MemoryK-leveling | |
| CN111651126B (en) | Memory writing operation method, system, electronic device and medium | |
| WO2018154669A1 (en) | Storage system | |
| CN112527203B (en) | Data rewriting method, system, terminal equipment and storage medium of flash memory | |
| JP4645538B2 (en) | Recording apparatus and life information calculation method | |
| CN112379831A (en) | Data management method and device, computer equipment and storage medium | |
| US9146859B2 (en) | Information processing apparatus, method, and program for improving use efficiency of a storage apparatus | |
| CN110895444B (en) | Electronic equipment and data reading and writing method | |
| CN108959517B (en) | File management method and device and electronic equipment | |
| JP2020086748A (en) | Memory controller and memory system | |
| JP2014112419A (en) | Mobile terminal apparatus, software update method, operation control method, and program | |
| KR100885026B1 (en) | Method of equalizing abrasion rate for flash memory | |
| JP6536614B2 (en) | Storage device, storage device control method and program |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |