CN115529108A - Data transmission method and related device - Google Patents
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Abstract
The application provides a data transmission method, a data transmission device, a computer readable storage medium and a computer program product. The technical scheme provided by the application can be applied to the extended reality XR service or other low-delay services. In the technical scheme of the application, all or part of the data packets in the plurality of data packets are shifted, the shifted data packets are subjected to exclusive-or processing, and the data obtained by exclusive-or processing are used as the check data of the plurality of data packets. Since the complexity of the shift processing and the xor processing performed on the data packet is low, the codec complexity of the plurality of data packets can be reduced. Furthermore, in order to reduce the transmission overhead of the check data of the plurality of data packets, the present application also proposes an encoding method that combines the above-mentioned encoding method by shifting and xor processing with other network encoding methods to obtain the check data of the plurality of data packets.
Description
Technical Field
The present application relates to the field of communications, and in particular, to a data transmission method, a data transmission apparatus, a computer storage medium, and a computer program product.
Background
In a wireless communication network, network coding techniques provide a transmission mechanism that is both time-delay and spectral-efficiency. In the network coding technology, a sending end codes a plurality of original data to obtain and send coded data, and sends indication information such as coding coefficients corresponding to the coded data; the receiving end can decode the coded data according to the coding coefficient, thereby obtaining the original data. Through network coding, the system can maximize the throughput of the whole network and effectively improve the transmission performance of the wireless communication system.
Codes commonly used for network coding include Maximum Distance Separable (MDS) codes. The MDS code has high coding efficiency, but high coding and decoding complexity and long coding and decoding time delay.
Disclosure of Invention
The application provides a data transmission method, a data transmission device, a computer readable storage medium and a computer program product, which aim to reduce the encoding and decoding complexity of data packets in the communication field.
In a first aspect, the present application provides a method of data transmission. In the method, a first communication device carries out h times of shift exclusive-or processing on k data packets to obtain h first check data, wherein j-th first check data in the h first check data is a data packet obtained by the first communication device carrying out j times of shift exclusive-or processing in the h times of shift exclusive-or processing on the k data packets, wherein the j-th shift exclusive-or processing comprises k times of shift exclusive-or processing in the k data packets j Shifting the data packet and k j K obtained by shifting data packet j The shifted data packets are XOR' ed, k j Ith in individual shift data packet j The shift data packet is the k for the first communication device j Ith in each data packet j The data packet obtained by shifting the data packet,k is an integer greater than 1, k j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j (ii) a The first communication equipment adds a packet header to the h pieces of first check data to obtain h pieces of first check packets, wherein the jth first check packet in the h pieces of first check packets is a data packet obtained by adding the packet header to the jth first check data in the h pieces of first check data; the first communication device transmits the h first check packets.
In the method of the present application, since the complexity of the shift processing and the xor processing performed on the data packets is low, the encoding and decoding complexity of the network coding of k data packets is low by performing the shift xor processing on the k data packets to obtain h pieces of check data.
In the method of the present application, the shift processing of the packet includes: the data packet is shifted by t data units, t being 0 or an integer greater than 0.
In the method of the present application, for a packet that has been subjected to shift processing with a shift amount greater than zero in at least two shift exclusive-or processings, the shift amount of the packet may be the same or different in different ones of the at least two shift exclusive-or processings.
The more times of shift exclusive-or processing of the data packet with different shift amounts in the at least two shift exclusive-or processing, the more check information carried in the corresponding amount of first check data obtained by the at least two shift exclusive-or processing, so that the k data packets are subjected to shift exclusive-or processing for a smaller number of times, that is, the fewer number of first check data are obtained by encoding, and it can also be ensured that the k data packets can be obtained by decoding the second communication device based on the first check data. The smaller number of first check data helps to reduce the extra bit overhead required for the first check data of the largest bit overhead among all the first check data, so that the transmission overhead can be reduced.
In the method of the present application, in shift exclusive-or processing in which shift processing is performed on at least two data packets, optionally, shift amounts of the at least two data packets in the shift exclusive-or processing of this time may be the same or different.
The more data packets with different shift amounts in the shift exclusive-or processing, the more check information carried in the first check data obtained by the shift exclusive-or processing, so that the k data packets are subjected to shift exclusive-or processing for a smaller number of times, that is, a smaller number of first check data are obtained by encoding, and it can also be ensured that the k data packets can be obtained by decoding the second communication device based on the first check data. The smaller number of first check data helps to reduce the extra bit overhead required for the first check data of the largest bit overhead among all the first check data, so that the transmission overhead can be reduced.
In some implementation manners, a header of each first check data may include first check data type indication information, where the first check data type indication information is used to indicate that the first check data is a check packet obtained by encoding using a shift exclusive-or manner. Therefore, the second communication device can know the coding type or the coding mode of the first check data, and the second communication device can use a corresponding decoding method to decode the first check data to obtain an accurate data packet.
Optionally, the packet header of the jth first check data may include first coding coefficient indication information, where the first coding coefficient indication information is used to indicate the k j The amount of shift data for each of the first data packets. In this way, after receiving the first encoding coefficient indication information, the second communication device may determine, based on the first encoding coefficient indication information, what shift xor processing is performed on the jth first parity data for the k data packets, so that the encoded data packet may be obtained by decoding based on the jth first parity data.
As an example, the packet header of the jth first check data may include an index of a coding coefficient vector, where the index is used to indicate an index of a coding coefficient vector, which is obtained by coding the jth first check data, in a coding coefficient vector set, where the coding coefficient vector set may include multiple coding coefficient vectors, and the jth first check data corresponds to the coding coefficient vector setThe coding coefficient vector comprises said k j K of the first data packet j The data is shifted. In this way, the coding coefficient vector corresponding to the jth first check data can be indicated to the second communication device with a small indication overhead.
In a first possible implementation manner of the first aspect, the method may further include the following steps: the first communication device encodes k data packets and h first check data by using a first code to obtain s second check data, wherein s is a positive integer, and the first code comprises a fountain code or a Random Linear Network Coding (RLNC); the first communication equipment adds a packet header to the s second check data to obtain s second check packets, wherein the u-th second check packet in the s second check packets is a data packet obtained by adding the packet header to the u-th second check data in the s second check data, and u =1,2 \8230a; the first communication device sends s second check packets to the second communication device.
Fountain codes include Luby Transform (LT) codes or rapid tornado (Raptor) codes, etc.
In the implementation manner, the fountain code or the random linear network code is used to encode the first check data and the k data packets to obtain s second check data, and compared with the s first check data obtained by encoding the k data packets by using the shift exclusive-or processing method, no additional information bit overhead is added. Therefore, by the method for generating h first check data and s second check data for the k data packets, compared with the method for generating h + s first check data for the k data packets, the transmission overhead of the check data of the k data packets can be reduced while the error correction capability of the h + s check data is ensured, so that the spectral efficiency or the transmission reliability of the communication system can be improved.
In another aspect, in the implementation, the first check data and the second check data in corresponding quantities may be generated based on transmission overhead or spectrum resources in the communication system, so that the first check data and the second check data in corresponding quantities may not only ensure error correction capability meeting requirements, but also adapt to channel quality under limited transmission overhead, thereby improving spectrum efficiency or reliability of the communication system.
In an implementation manner that the first communication device sends the second check data to the second communication device, a header of each second check data may include second check data type indication information, where the second check data type indication information is used to indicate that the second check data is a check packet obtained by encoding using the first code. Therefore, the second communication device can know the coding type or the coding mode of the second check data, and the second communication device can use a corresponding decoding method to decode the second check data to obtain an accurate data packet.
In an implementation manner that the first communication device sends the second parity data to the second communication device, the packet header of the u-th second parity data includes second coding coefficient indication information, and the second coding coefficient indication information is used for a coding coefficient vector corresponding to the u-th second parity data. In this way, after the second communication device receives the second coding coefficient indication information, it can determine and decode the u-th second parity data to obtain the encoded data packet based on the second coding coefficient indication information.
As an example, the encoding coefficient vector index may be included in the packet header of the u-th second parity data. In this way, the coding coefficient vector corresponding to the jth first check data can be indicated to the second communication device with a small indication overhead.
In a second possible implementation manner of the first aspect, before the first communication device performs the shift xor processing on the k data packets h times, the method may further include the following steps: the first communication device encodes g data packets using a second code to obtain k data packets, where the second code may include a Low Density Parity Check (LDPC) code or a Maximum Distance Separable (MDS) code, and g is a positive integer.
The implementation manner can be understood as that g data packets which need to be transmitted to the second communication device by the first communication device are cascade-coded, so that the error correction capability of the first check data is improved. In addition, compared with k + h check data obtained by encoding the g data packets by using a shift exclusive-or method, the implementation method does not increase extra information bit overhead. Therefore, compared with the method of generating h + k first check data for g data packets, the method of generating k check data for g data packets and then generating h first check data can reduce the transmission overhead of the check data of g data packets while ensuring the error correction capability of h + k check data, thereby improving the spectrum efficiency or transmission reliability of the communication system.
In the first aspect or any one of the foregoing possible implementation manners, the following relationship may be satisfied between the h pieces of first check data and the k pieces of data packets:
As an example, F = h. In this case, the matrix G 1 H rows and matrix G of 2 Are in one-to-one correspondence.
In case F is smaller than h, the matrix G 1 May correspond to matrix G 2 One column of (1), i.e. matrix G 1 May be a matrix G 2 An element in one column. An example of this is F =1, i.e. matrix G 1 All non-zero elements in column h of (c) belong to matrix G 2 An element in one column.
In the first aspect or any one of the above possible implementations, k j K = k, or j ＜k。
k j K is equal to k and represents that the shift processing is carried out on each data packet in the k data packets in the j shift exclusive-OR processing, k j And k is less than k, namely that only k data packet parts are subjected to shift processing in the j shift exclusive-or processing. Wherein k is j The larger the value of (d) is, the more the number of data packets subjected to shift processing in shift exclusive-or processing at one time is, and accordingly, the more the parity information included in the parity data obtained by shift exclusive-or processing at this time is, which enables the decoding end to decode the k data packets based on the parity data based on less parity data, thereby facilitating improvement of the coding rate of the k data packets.
For k j In some implementations, k is any integer from 1 to h j K, which means that each data packet is shifted every shift exclusive-or process of the h shift exclusive-or processes; in other implementations, k is any integer from 1 to h for j j Are less than k, which means that only part of the data packets are shifted in each of the h shift exclusive-or processes, and only k is shifted in the j-th shift exclusive-or process j Shifting each data packet; in other embodimentsIn the present embodiment, when j is a partial integer from 1 to h, k j When k is equal to k, j takes other partial integers from 1 to h, k j And if the number of the data packets is less than k, the data packets are subjected to shift processing in some shift exclusive-or processes, and only part of the data packets are subjected to shift processing in some shift exclusive-or processes.
Optionally for k j < k case, matrix G 1 K in the j-th column of (1) j The non-zero elements may comprise a matrix G 2 V of k elements in the corresponding column of (1) j An element, the v j T of individual element i,j Is less than or equal to the value of said k elements divided by said v j T of an element other than the element i,j Value of v j ≤k j 。
In the first aspect or any one of the foregoing possible implementation manners, optionally, there is at least one shift exclusive or process, where shift amounts for shifting any two data packets may be different; alternatively, there is at least one packet whose shift amount is different in any two shift exclusive-or processes.
When the shift amount of any two data packets in each shift exclusive-OR processing of h-1 times is different, and the shift amount of each data packet in k-1 data packets in any two shift exclusive-OR processing is different, the h-1 coding coefficient vectors corresponding to the h-1 shift exclusive-OR processing of the k-1 data packets can be linearly independent, so that the coding efficiency is ensured.
In the first aspect or any one of the above possible implementations, optionally, the matrix G 1 It may be a sparse matrix, wherein the sparse matrix refers to a matrix with partial elements having a value of 0. In some implementations, the matrix G 1 The positions of the non-zero elements in the code are the same as the positions of the non-zero elements in a generator matrix of k rows and h columns used when the third code is used for coding, and the third code comprises a fountain code or a random linear network code.
In the first aspect or any one of the above possible implementations, the matrix G 2 The following relationship can be satisfied:
0＜i 1 ＜i 2 ≤k，0＜j 1 ＜j 2 h is less than or equal to h. In other words, when the shift exclusive-or processing is performed on the k packets, in the shift exclusive-or processing of the same time, the shift amount of the packet that is ordered further back is larger, and the shift amount of the same packet in the shift exclusive-or processing that is ordered further back is larger.
In the first aspect or any one of the above possible implementations, the matrix G 2 May be a matrix satisfying the vandermonde matrix structure. In some implementations, the matrix G 2 The following relationship can be satisfied: t is t i,j And (j-1) = (i-1). Therefore, the error correction information can be carried in the first check data as much as possible, and the shift amount required by the shift processing with the maximum shift amount in the h shift exclusive-OR processing can be reduced, so that the transmission overhead can be reduced.
In the first aspect or any one of the above possible implementations, optionally the matrix G 2 M columns in (1) and matrix G 3 M columns in (1) are in one-to-one correspondence, matrix G 2 M of the M columns of (a) includes a matrix G 3 K elements in corresponding columns of (1), matrix G 3 Is composed of
c＝1,2…K，d＝1,2…R，k≤K，M≤h，h≤R，m＝1,2…M；t c,d ＝t' c,d -t d ，
In
Constructing Cauchy matrix based on set alpha and set beta for using primitive representation method on finite field
Element (1) of
Is shown to be obtained, t d Is t 1,d To t K,d The minimum of these K values is the minimum of the K values,
is a matrix G 3 The element of row c and column d,
is the element of the c-th row and d-th column in the matrix,
is the element of the c row and d column in the matrix; element alpha in the set alpha c And element beta in the set beta d Belonging to the Galois field GF (q) p ) Q is prime number, p is more than or equal to 1, and in the set alpha, alpha is 1 To alpha K Any two of these K elements are not equal, in the set β, β 1 To beta R Any two of the R elements are not equal. As an example, q =2.
α 1 To alpha K Any two of the K elements being unequal may be denoted as
1≤c 1 ≤c 2 ≤K，
And
respectively represent indexes c in the set alpha 1 And c 2 Of (2) is used. Beta is a 1 To beta R Any two of the R elements are not equal and can be expressed as 1 ≦ d 1 ＜d 2 ≤R，
And
respectively represent the index d in the set beta 1 And d 2 Of (2) is used.
In this implementation, matrix G 3 The shift amount of the element in (1) is a matrix
The power of the corresponding element in (a) minus the minimum power in the column in which the corresponding element is located. It will be appreciated that the matrix G 3 The shift amount of an element in (a) may be equal to the power of the corresponding element in the matrix represented by the primitive element described above.
In the foregoing implementation, optionally K = K, and M = h = R. In this case, the matrix G 2 The jth column of (a) can be associated with the matrix G 3 Corresponding to column j. Further, matrix G 2 And the position of each element in the matrix G 3 In matrix G of the element corresponding to the element 3 The same position in (a).
Alternatively, K = K, M = h-1= r, i.e. the matrix G 2 H-1 column in (a) includes a matrix G 3 . In this case, optionally, the matrix G 2 May include a first element "z 0 ". Further, optionally, a matrix G 3 H-1 in (a) is a matrix G 2 The latter h-1 column.
In the case of K < K, the matrix G 2 May include a matrix G 3 K rows in (1). In the case of h < R, the matrix G 2 May include a matrix G 3 Column h or column h-1. Optionally, matrix G 3 The h columns or the h-1 columns in (1) can be respectively a matrix G 3 The first h column or the first h-1 column in (1). Because of the matrix G 3 The first h column or the first h-1 column of elements in the matrix G is shifted by a small amount, so that the matrix G is formed 2 Comprising a matrix G 3 The first h column or the first h-1 column of elements in the first parity data may make the data overhead of the first parity data obtained by shift exclusive-or processing smaller, so as to save the transmission overhead.
First aspect orIn any of the above possible implementations, the matrix G 2 Matrix G comprising k x k dimensions 21 H column of (1), the matrix G 21 The e-th element in the first row of (a) is
e＝1,2…k，G 21 K elements in the X-th row of (b) are the matrix G 21 Is obtained by cyclically shifting k elements in the first row of (1) by X-1 elements, X is an integer less than or equal to k, and X is greater than or equal to 2.
G satisfying the above relation 2 The data overhead of the first check data can be reduced, so that the transmission overhead of the first check packet can be saved.
Matrix G 21 Can be expressed as
As an example, the matrix G 2 H in (c) is the matrix G 21 The first h column of (c).
In the first aspect or any one of the foregoing possible implementation manners, the matrix G 2 Comprises the first h elements of the first row vector, the e-th element of the first row vector being
e =1,2 \ 8230h, said matrix G 2 The first X-1 elements in the X-th row of (a) are the last X-1 elements in the first row vector, the matrix G 2 The last h-X +1 elements in the X row are the first h-X +1 elements in the first row vector, X is an integer less than or equal to k, and X is more than or equal to 2.
As an example, matrix G 2 Can be expressed as
G satisfying the above relationship 2 The data overhead of the first check data can be reduced, so that the transmission overhead of the first check packet can be saved.
In a second aspect, the present application further provides a data transmission method, including: the second communication equipment acquires N data packets to be decoded; and the second communication equipment decodes the N data packets to be decoded to obtain k first data packets. The obtaining of the N data packets to be decoded by the second communication device may be to receive the N data packets to be decoded, for example, receive the N data packets to be decoded from the first communication device, or obtain the N data packets to be decoded from another module of the second communication device, which is not limited herein.
The N to-be-decoded data packets include H first check packets, the H first check packets are check packets in H first check packets, a jth first check packet in the H first check packets is a data packet obtained by adding a packet header to a jth first check data in the H first check data, and the N is a positive integer not less than k.
And the h first check data and the k first data packets satisfy the following relations: the h first check data comprise check data obtained by performing h times of shift XOR processing on k first data packets, wherein the jth first check data in the h first check data is a data packet obtained by performing the jth time of shift XOR processing on the k first data packets in the h times of shift XOR processing, and the jth time of shift XOR processing comprises performing j times of shift XOR processing on k first data packets in the k first data packets j The first data packet is shifted and k is j K obtained by shifting first data packet j XOR processing is carried out on the shift data packets, k is j Ith of shift data packet j A shift number of data packets is to said k j Ith in first data packet j A data packet obtained by shifting the first data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j H is less than or equal to H, and H is a positive integer.
In the second aspect, optionally, the packet header of the jth first check data may include first check data type indication information, where the first check data type indication information is used to indicate that the jth first check data is a check packet obtained through shift and xor processing.
Optionally, the packet header of the jth first check data includes first coding coefficient indication information, where the first coding coefficient indication information is used to indicate k j The amount of shift data for each of the first data packets.
In some possible implementation manners of the second aspect, the N data packets to be decoded further include S second parity packets, where the S second parity packets are from S second parity packets, a u-th second parity packet in the S second parity packets is a data packet obtained by adding a header to a u-th second parity data in the S second parity data, and u =1,2 \8230s, and S, where the S second parity data, the k first data packets, and the h first parity data satisfy the following relationships:
each of the S second parity data is parity data obtained by encoding the k first data packets and the h first parity data using a first code, S is a positive integer, the first code includes a fountain code or a random linear network code, and S is a positive integer less than or equal to S.
In other possible implementations of the second aspect, the method further includes: and the second communication equipment decodes the k first data packets by using a second code to obtain g second data packets, wherein the second code comprises an LDPC code or an MDS code, and g is a positive integer not greater than k.
In the second aspect or any one of the foregoing possible implementation manners, the h pieces of first check data and the k pieces of first data packets satisfy the following relationship:
wherein the content of the first and second substances,
h columns and matrix in (1)
Corresponds to column F in the matrix G 1 J column of (a) contains k-k j A zero element and the momentArray G 2 K in the corresponding column of j F is a positive integer less than or equal to h;
y j represents j (th) first parity data x in the h first parity data i Represents the ith first packet of the k first packets,
i＝1,2…k，
it is indicated that the exclusive or process is performed,
is to represent
Multiplied element shift t i,j A data unit, a i,j Is a matrix G 1 The elements of row i and column j,
is a matrix G 2 Row i and column j.
Alternatively, k j K (= k). Or alternatively, k j ＜k。
k j < k, optionally, matrix G 1 J column of (1) includes k j The non-zero elements include: will matrix G 2 V of k elements in the corresponding column of (1) j An element, the v j T of individual element i,j Is less than or equal to the value of said k elements divided by said v j T of an element other than the element i,j Value of v j ≤k j 。
k j < k, optionally, matrix G 1 The positions of the non-zero elements in the code are the same as the positions of the non-zero elements in a generator matrix of k rows and h columns used when the third code is used for coding, and the third code comprises a fountain code or a random linear network code.
No matter k j Whether k or k j < k, optionally, matrixG 2 The non-zero elements in each column are different.
For matrix G 2 In a first possible implementation,
0＜i 1 ＜i 2 ≤k，0＜j 1 ＜j 2 h is less than or equal to h. Further optionally, t i,j ＝(i-1)(j-1)。
For matrix G 2 In a second possible implementation, the matrix G 2 M columns and matrix G in 3 M columns in (1) are in one-to-one correspondence, matrix G 2 M of the M columns of (a) includes a matrix G 3 K elements in corresponding columns of (1), matrix G 3 Is composed of
c =1,2 \8230, K, d =1,2 \8230, R, K is less than or equal to K, M is less than or equal to h, h is less than or equal to R, M =1,2 \8230, M; wherein, t c,d ＝t' c,d -t d ，
In (1)
Constructing Cauchy matrix based on set alpha and set beta for using primitive representation method on finite field
Element (1) of
Is shown as obtained, t d Is t 1,d To t K,d The minimum of these K values is the minimum of the K values,
is a matrix G 3 The element of row c and column d,
is the element of the c-th row and d-th column in the matrix,
is the element of the c row and d column in the matrix; element alpha in the set alpha c And element beta in the set beta d Belonging to the Galois field GF (q) p ) Q is a prime number, p is greater than or equal to 1, and for any two elements in the set alpha being unequal, any two elements in the set beta being unequal. As an example, q =2.
In this implementation, optionally, K = K, M = h = R. Or, alternatively, K = K, M = h-1= r.
K = K, M = h-1= r, optionally the matrix G 2 Each column other than the M columns includes k first elements, the first element being "z 0 ”。
For matrix G 2 In a third possible implementation, the matrix G 2 Matrix G comprising k x k dimensions 21 H in the matrix, k is more than or equal to h, and the matrix G 21 The e-th element in the first row of (a) is
e＝1,2…k，G 21 K elements in the X-th row of (b) are the matrix G 21 Is obtained by performing right cyclic shift on k elements in the first row by X-1 elements, wherein X is an integer less than or equal to k and is more than or equal to 2.
Optionally, the matrix G 2 H columns in (1) are the matrix G 21 The first h column of (c).
In the second aspect or any one of the foregoing possible implementation manners, the matrix G 2 Comprises the first h elements of the first row vector, the e-th element of the first row vector being
e =1,2 \ 8230h, said matrix G 2 The first X-1 elements in the X-th row of (a) are the last X-1 elements in the first row vector, the matrix G 2 The last h-X +1 elements in the X row are the first h-X +1 elements in the first row vector, X is an integer less than or equal to k, and X is more than or equal to 2.
As an example, matrix G 2 Can be expressed as
In a third aspect, the present application provides a data transmission apparatus, which may include various functional modules for implementing the method in the first aspect.
For example, the apparatus includes an encoding module, a packet header processing module, and a transmitting module. The encoding module is used for performing h-time shift exclusive-or processing on the k data packets to obtain h first check data, wherein the jth first check data in the h first check data is a data packet obtained by performing the jth shift exclusive-or processing in the h-time shift exclusive-or processing on the k data packets by the first communication device, and the jth shift exclusive-or processing comprises performing the jth shift exclusive-or processing on k data packets in the k data packets j Shift processing is performed on the data packet and k is used for the data packet j K obtained by shifting data packet j The shifted data packet is XOR-processed, k j Ith in individual shift data packet j The shift data packet is the first communication device to the k j Ith in each data packet j The data packet is obtained by shifting the data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j (ii) a The packet header processing module is used for adding a packet header to the h pieces of first check data to obtain h pieces of first check packets, wherein the jth first check packet in the h pieces of first check packets is a data packet obtained by adding the packet header to the jth first check data in the h pieces of first check data; the sending module is used for sending the h first check packets.
Optionally, the encoding module is further configured to encode the k-h data packets by using a second code before the first communication device performs the shift xor processing on the k data packets h times, so as to obtain the k data packets, where the second code includes an LDPC code or an MDS code.
Optionally, the encoding module is further configured to encode the k data packets and the h first check data by using a first code to obtain s second check data, where s is a positive integer, and the first code includes a fountain code or a random linear network code; the packet header processing module is further configured to add a packet header to the s second check data to obtain s second check packets, where a u-th second check packet in the s second check packets is a data packet obtained by adding the packet header to a u-th second check data in the s second check data, and u =1,2 \8230s; the sending module is further configured to send the s second check packets to the second communication device.
In some implementations, the modules may be implemented in software and/or hardware. For example, the encoding module and the packet header processing module may be implemented by a processor and program codes stored in a memory, and the transmitting module may be implemented by a transceiver. In this implementation, the apparatus may include a processor and a transceiver, and optionally may also include a memory.
In a fourth aspect, the present application provides a data transmission apparatus, which may include various functional modules for implementing the method in the second aspect.
For example, the apparatus includes an acquisition module and a decoding module. The acquisition module is used for acquiring N data packets to be decoded; the decoding module is used for decoding the N data packets to be decoded to obtain k first data packets.
The N is a positive integer not less than k, the N data packets to be decoded include H first check packets, the H first check packets are check packets in H first check packets, a jth first check packet in the H first check packets is a data packet obtained by adding a packet header to a jth first check data in the H first check data, N is greater than or equal to H, and the H first check data and the k first data packets satisfy the following relationship:
the h first check data comprise check data obtained by performing h times of shift exclusive-or processing on the k first data packets, wherein the jth first check data in the h first check data is the jth shift exclusive-or processing performed on the k first data packets in the h times of shift exclusive-or processingThe j shift XOR processing comprises k first data packets j The first data packet is shifted and k is j K obtained by shifting first data packet j XOR processing is carried out on the shift data packets, k is j Ith of shift data packet j A shift number packet as to k j The ith in the first data packet j A data packet obtained by shifting the first data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j H is less than or equal to H, and H is a positive integer.
The obtaining module may be a receiving module, configured to receive N data packets to be decoded from the first communication device, or receive the N data packets to be decoded from another module of the second communication device.
Optionally, the packet header of the jth first check data may include first check data type indication information, where the first check data type indication information is used to indicate that the jth first check data is a check packet obtained through shift and xor processing.
Optionally, the packet header of the jth first check data includes first coding coefficient indication information, where the first coding coefficient indication information is used to indicate k j The amount of shift data for each of the first data packets.
In some possible implementation manners of the fourth aspect, the N data packets to be decoded further include S second check packets, where the S second check packets are from S second check packets, a u-th second check packet in the S second check packets is a data packet obtained by adding a packet header to a u-th second check data in the S second check data, and u =1,2 \8230s, and S, where the S second check data, the k first data packets, and the h first check data satisfy the following relationships:
each of the S second parity data is parity data obtained by encoding the k first data packets and the h first parity data using a first code, S is a positive integer, the first code includes a fountain code or a random linear network code, and S is a positive integer less than or equal to S.
In some possible implementation manners of the fourth aspect, the decoding module is further configured to decode the k first data packets by using a second code to obtain g second data packets, where the second code includes an LDPC code or an MDS code, and g is a positive integer.
In some implementations, the modules may be implemented in software and/or hardware. For example, the encoding module and the packet header processing module may be implemented by a processor and program codes stored in a memory, and the transmitting module may be implemented by a transceiver. In this implementation, the apparatus may include a processor and a transceiver, and optionally may also include a memory. As another example, the encoding module and/or the packet header processing module may be implemented by a circuit, for example, a digital circuit.
It is to be understood that the data transmission device provided in the third aspect above may be a system-on-chip, and the data transmission device provided in the fourth aspect above may also be a system-on-chip.
In a fifth aspect, the present application provides a computer readable storage medium storing program code for execution by a communication device, the program code comprising instructions for implementing the method of the first or second aspect.
In a sixth aspect, the present application provides a computer program product comprising instructions which, when run on a communication apparatus, cause the communication apparatus to carry out the method of the first or second aspect.
In a seventh aspect, the present application further provides a system comprising at least one of the communication device implementing the method of the first aspect or the communication device implementing the method of the second aspect as described above.
Drawings
FIG. 1 is an exemplary block diagram of a communication system according to one embodiment of the present application;
FIG. 2 is an exemplary block diagram of an application scenario according to an embodiment of the present application;
FIG. 3 is a simplified block diagram of a communication system according to one embodiment of the present application;
fig. 4 is an exemplary flowchart of a data transmission method according to a first embodiment of the present application;
fig. 5 is an exemplary structural diagram of a packet header according to a first embodiment of the present application;
fig. 6 is an exemplary structural diagram of a packet header according to a second embodiment of the present application;
fig. 7 is an exemplary configuration diagram of a packet header according to a third embodiment of the present application;
fig. 8 is an exemplary configuration diagram of a packet header according to a fourth embodiment of the present application;
fig. 9 is an exemplary flowchart of a data transmission method according to a second embodiment of the present application;
fig. 10 is another exemplary flowchart of a data transmission method according to a second embodiment of the present application;
fig. 11 is an exemplary configuration diagram of a packet header according to a fifth embodiment of the present application;
fig. 12 is an exemplary configuration diagram of a packet header according to a sixth embodiment of the present application;
fig. 13 is an exemplary configuration diagram of a packet header according to a seventh embodiment of the present application;
fig. 14 is an exemplary configuration diagram of a packet header according to an eighth embodiment of the present application;
fig. 15 is an exemplary flowchart of a data transmission method according to a third embodiment of the present application;
fig. 16 is another exemplary flowchart of a data transmission method according to a third embodiment of the present application;
fig. 17 is an exemplary flowchart of a data transmission method according to a fourth embodiment of the present application;
FIG. 18 is an exemplary block diagram of a data transfer device according to one embodiment of the present application;
fig. 19 is an exemplary structural diagram of a data transmission apparatus according to another embodiment of the present application;
fig. 20 is an exemplary structural diagram of a data transmission device according to still another embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
In the embodiments of the present application, terms such as "first" and "second" are used to distinguish the same or similar items having substantially the same function and action. For example, the first information and the second information are only for distinguishing different information, and the order of the information is not limited. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance.
In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c; a and b; a and c; b and c; or a and b and c. Wherein a, b and c can be single or multiple.
To facilitate understanding of the data transmission method provided in the embodiments of the present application, a system architecture and an application scenario of the data transmission method provided in the embodiments of the present application will be described below. It can be understood that the system architecture and the application scenario described in the embodiment of the present application are for more clearly explaining the technical solution of the embodiment of the present application, and do not constitute a limitation on the technical solution provided in the embodiment of the present application.
Fig. 1 is a schematic architecture diagram of a communication system 1000 to which an embodiment of the present application is applied. As shown in fig. 1, the communication system includes a radio access network 100. The radio access network 100 may include at least one radio access network device (e.g., 110a and 110b in fig. 1) and may further include at least one terminal (e.g., 120a-120j in fig. 1). The terminal is connected with the wireless access network equipment in a wireless mode, and the wireless access network equipment is connected with the core network in a wireless or wired mode. The core network device and the radio access network device may be separate physical devices, or the function of the core network device and the logical function of the radio access network device may be integrated on the same physical device, or a physical device may be integrated with a part of the function of the core network device and a part of the function of the radio access network device. The terminals and the radio access network devices can be connected with each other in a wired or wireless mode. Fig. 1 is a schematic diagram, and other network devices, such as a wireless relay device and a wireless backhaul device, may also be included in the communication system, which are not shown in fig. 1.
The radio access network device may be a device having a radio transceiving function. The radio access network device may be a device providing wireless communication function services, typically located on the network side, including but not limited to: next generation base station (gnnodeb, gNB) in fifth generation (5g) communication system, next generation base station in sixth generation (6g) mobile communication system, base station in future mobile communication system, access Node in WiFi system, etc., evolved Node B (eNB) in LTE system, radio Network Controller (RNC), node B (NB), base station controller (base station controller, BSC), home base station (e.g., home evolved Node B or home Node B, HNB), base Band Unit (BBU), transmission Reception Point (TRP), transmission Point (TP), base station transceiver station (BTS), etc. In a network configuration, the access network device may comprise a Centralized Unit (CU) node, or a Distributed Unit (DU) node, or a RAN device comprising a CU node and a DU node, or a control plane CU node and a user plane CU node, and a RAN device of a DU node. The access network device provides service for a cell, and a user equipment communicates with a base station through a transmission resource (e.g., a frequency domain resource, or a spectrum resource) used by the cell, where the cell may be a cell corresponding to the base station (e.g., a base station), and the cell may belong to a macro base station or a base station corresponding to a small cell (small cell), where the small cell may include: urban cell (metro cell), micro cell (microcell), pico cell (pico cell), femto cell (femto cell), etc., and these small cells have the characteristics of small coverage and low transmission power, and are suitable for providing high-rate data transmission service. The radio access network device may be a macro base station (e.g., 110a in fig. 1), a micro base station or an indoor station (e.g., 110b in fig. 1), a relay node or a donor node, a device in a V2X communication system that provides a wireless communication service for a user equipment, a radio controller in a Cloud Radio Access Network (CRAN) scenario, a relay station, a vehicle-mounted device, a wearable device, a network device in a future evolution network, and the like. The access network device in this embodiment may also be an open-radio access network (O-RAN) device, and the O-RAN device may include an open-distributed unit (O-DU) and an open-centralized unit (O-CU).
The embodiments of the present application do not limit the specific technologies and the specific device forms adopted by the radio access network device. For convenience of description, the following description will be made with a base station as an example of the radio access network device.
A terminal may also be referred to as a terminal equipment, a User Equipment (UE), a Mobile Station (MS), a Mobile Terminal (MT), etc., and may be an entity for receiving or transmitting signals, such as a mobile phone, at a user side. The terminal device may be a User Equipment (UE), wherein the UE includes a handheld device, a vehicle-mounted device, a wearable device, or a computing device having wireless communication functionality. Illustratively, the UE may be a mobile phone (mobile phone), a tablet computer, or a computer with wireless transceiving function. The terminal device may also be a Virtual Reality (VR) terminal device, an Augmented Reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in unmanned driving, a wireless terminal in telemedicine, a wireless terminal in smart grid, a wireless terminal in smart city (smart city), a wireless terminal in smart home (smart home), and so on. The terminal can be widely applied to various scenes, for example, device-to-device (D2D), vehicle-to-electrical (V2X) communication, machine-type communication (MTC), internet of things (IOT), virtual reality, augmented reality, industrial control, automatic driving, telemedicine, smart grid, smart furniture, smart office, smart wearing, smart transportation, smart city, and the like. The terminal can be cell-phone, panel computer, take the computer of wireless transceiving function, wearable equipment, vehicle, unmanned aerial vehicle, helicopter, aircraft, steamer, robot, arm, intelligent house equipment etc.. In the embodiment of the present application, the apparatus for implementing the function of the terminal may be a terminal; or a device capable of supporting the terminal to implement the function, such as a chip system, or a communication module, or a modem, etc., which may be installed in the terminal. In the embodiment of the present application, the chip system may be composed of a chip, and may also include a chip and other discrete devices. In the technical solution provided in the embodiment of the present application, a device for implementing a function of a terminal is a terminal, and the terminal is a UE as an example, the technical solution provided in the embodiment of the present application is described. The embodiment of the present application does not limit the specific technology and the specific device form adopted by the terminal device.
Optionally, the UE may also be configured to act as a base station. For example, the UE may act as a scheduling entity that provides sidelink signals between UEs in vehicle-to-evolution (V2X), device-to-device (D2D), or peer-to-peer (P2P), among others.
The base stations and terminals may be fixed or mobile. The base station and the terminal can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; can also be deployed on the water surface; it may also be deployed on airborne airplanes, balloons and satellite vehicles. The embodiment of the application does not limit the application scenarios of the base station and the terminal.
The roles of base station and terminal may be opposite, e.g., helicopter or drone 120i in fig. 1 may be configured as a mobile base station, with terminal 120i being the base station for those terminals 120j that access radio access network 100 through 120 i; however, for the base station 110a, 120i is a terminal, i.e. the base station 110a and 120i communicate with each other via a radio interface protocol. Of course, 110a and 120i may communicate with each other through an interface protocol between the base station and the base station, and in this case, 120i is also the base station as compared to 110 a. Therefore, the base station and the terminal may be collectively referred to as a communication apparatus, and 110a, 110b, and 120a to 120j in fig. 1 may be referred to as communication apparatuses having their respective corresponding functions, for example, a communication apparatus having a base station function or a communication apparatus having a terminal function.
The base station and the terminal, the base station and the base station, and the terminal can communicate through a licensed spectrum, an unlicensed spectrum, or both; communication may be performed in a frequency spectrum of 6 gigahertz (GHz) or less, in a frequency spectrum of 6GHz or more, or in a frequency spectrum of 6GHz or less and in a frequency spectrum of 6GHz or more. The embodiments of the present application do not limit the spectrum resources used for wireless communication.
In the embodiment of the present application, the functions of the base station may also be performed by a module (e.g., a chip) in the base station, or may also be performed by a control subsystem including the functions of the base station. The control subsystem including the base station function may be a control center in an application scenario of the terminal, such as a smart grid, industrial control, intelligent transportation, and smart city. The functions of the terminal may be performed by a module (e.g., a chip or a modem) in the terminal, or by a device including the functions of the terminal.
Further, the present application may be applied to various specific communication scenarios, for example, scenarios such as point-to-point transmission between a base station and a terminal or between terminals (e.g., fig. 2 (a) is point-to-point transmission between a base station and a terminal), multi-hop transmission between a base station and a terminal (e.g., fig. 2 (b) and fig. 2 (c)), dual Connectivity (DC) or multi-connection between multiple base stations and terminals (e.g., fig. 2 (d)). It should be noted that, the specific communication application scenarios described above are only examples and are not limiting. In particular, from the perspective of services, the embodiments of the present application are applicable to a variety of service scenarios, such as a data coding scenario in an extended reality (XR) service, an upstream high-capacity scenario, and the like. Moreover, fig. 2 does not impose limitations on the network architecture suitable for the present application, and the present application does not restrict uplink, downlink, access link, backhaul (backhaul) link, sidelink (Sidelink), etc. transmissions.
Referring to fig. 3, fig. 3 is a simplified schematic diagram of a communication system provided in an embodiment of the present application. For simplicity, fig. 3 only shows base station 110, UE 120, and network 130. The base station 110 comprises an interface 111 and a processor 112. The processor 112 may optionally store a program 114. The base station 110 may optionally include a memory 113. Memory 113 may optionally store a program 115.UE 120 includes an interface 121 and a processor 122. The processor 122 may optionally store a program 124.UE 120 may optionally include memory 123. Memory 123 may optionally store a program 125. These components work together to provide the various functions described in this application. For example, processor 112 and interface 121 work together to provide a wireless connection between base station 110 and UE 120. Processor 122 and interface 121 cooperate to implement downlink transmission and/or uplink transmission for UE 120.
The network 130 may include one or more network nodes 130a, 130b to provide core network functionality. The network nodes 130a, 130b may be 5G core network nodes, or earlier generation (e.g. 4G, 3G or 2G) core network nodes. For example, the networks 130a, 130b may be Access Management Functions (AMFs), mobility Management Entities (MMEs), and the like. Network 130 may also include one or more network nodes in a Public Switched Telephone Network (PSTN), a packet data network, an optical network, an Internet Protocol (IP) network. Wide Area Networks (WANs), local Area Networks (LANs), wireless Local Area Networks (WLANs), wired networks, wireless networks, metropolitan area networks, and other networks to enable communication between UEs 120 and/or base stations 110.
A processor (e.g., processor 112 and/or processor 122) may include one or more processors and be implemented as a combination of computing devices. The processors (e.g., processor 112 and/or processor 122) may each include one or more of the following: a microprocessor, a microcontroller, a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Programmable Logic Device (PLD), gating logic, transistor logic, discrete hardware circuitry, processing circuitry, or other suitable hardware, firmware, and/or a combination of hardware and software for performing the various functions described herein. The processor (e.g., processor 112 and/or processor 122) may be a general-purpose processor or a special-purpose processor. For example, processor 112 and/or processor 122 may be a baseband processor or a central processor. The baseband processor may be used to process communication protocols and communication data. The central processor may be used to cause the base station 110 and/or the UE 120 to execute software programs and process data in the software programs.
Interfaces (e.g., interfaces 111 and/or 121) may include components for enabling communication with one or more computer devices (e.g., UEs, BSs, and/or network nodes). In some embodiments, the interface may include wires for coupling a wired connection, or pins for coupling a wireless transceiver, or chips and/or pins for a wireless connection. In some embodiments, the interface may include a transmitter, a receiver, a transceiver, and/or an antenna. The interface may be configured to use any available protocol (e.g., 3GPP standard).
The programs in this application are used to represent software in a broad sense. Non-limiting examples of software are program code, programs, subroutines, instructions, instruction sets, code segments, software modules, applications, software applications, and the like. The programs may be executable in the processor and/or the computer to cause the base station 110 and/or the UE 120 to perform various functions and/or processes described herein.
A memory (e.g., storage 113 and/or storage 123) may store data that is manipulated by the processors 112, 122 when executing software. The memories 113, 123 may be implemented using any memory technology. For example, the memory may be any available storage medium that can be accessed by the processor and/or computer. Non-limiting examples of storage media include: RAM, ROM, EEPROM, CD-ROM, removable media, optical disk storage, magnetic disk storage media, magnetic storage devices, flash memory, registers, state memory, remote mounting storage, local or remote memory components, or any other medium that can carry or store software, data, or information and that can be accessed by a processor/computer.
The memory (e.g., storage 113 and/or storage 123) and the processor (e.g., processor 112 and/or processor 122) may be provided separately or integrated together. The memory may be used in connection with the processor such that the processor can read information from, store information in, and/or write information to the memory. The memory 113 may be integrated in the processor 112. The memory 123 may be integrated in the processor 122. The processor (e.g., processor 113 and/or processor 123) and the memory (e.g., processor 112 and/or processor 122) may be disposed in an integrated circuit (e.g., the integrated circuit may be disposed in a UE or a base station or other network node).
Fig. 4 is an exemplary flowchart of a data transmission method according to an embodiment of the present application. The data transmission method as shown in fig. 4 may include S401, S402, and S403. In the data transmission method shown in fig. 4, the first communication device is a sending end, and the second communication device is a receiving end. Alternatively, the first communication device may also be referred to as an encoding side and the second communication device may also be referred to as a decoding side.
The first communication device may be a device or a chip system or a processor applied to the device for sending data in any one of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and optionally, the device is a radio access network device, such as a base station, or a terminal, such as a UE; accordingly, the second communication device may be a device or a chip system or a processor applied to the device for receiving the data in any one of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and optionally, the device is a radio access network device, such as a base station, or a terminal, such as a UE.
S401, a first communication device carries out h-time shift XOR processing on k data packets to obtain h first check data, wherein the jth first check data in the h first check data is the k data packets to be processed by the first communication deviceCarrying out j-th shift XOR processing on the h times of shift XOR processing on the data packet to obtain the data packet, wherein the j-th shift XOR processing comprises the step of carrying out k-th shift XOR processing on the k data packets j Shifting the data packet and k j K obtained by shifting data packet j XOR processing is performed on the shifted data packets, k j Ith of shift data packet j A plurality of shift data packets as said k for said first communication device j Ith in each data packet j The data packet is obtained by shifting the data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j 。
In this embodiment, the k packets subjected to shift exclusive or processing may be referred to as k original packets. The original data packet includes: a Service Data Unit (SDU), an SDU segment, and a Protocol Data Unit (PDU) of a network coding layer in the first communication device, or a data packet obtained by one or more of three processes of cascading, segmenting, and padding bits of at least one SDU and/or at least one SDU segment, or a data packet obtained by one or more of three processes of cascading, segmenting, and padding bits of at least one PDU.
The network coding layer refers to a protocol layer having a network coding function. The network coding layer in this embodiment may be a Radio Resource Control (RRC) layer, a Packet Data Convergence Protocol (PDCP) layer, a Backhaul Adaptation Protocol (BAP) layer, a Radio Link Control (RLC) layer, a Media Access Control (MAC) layer, or a physical layer (PHY) layer.
Optionally, the network coding layer involved in this embodiment may also be a new protocol layer other than the above layers such as the MAC layer, the RLC layer, the BAP layer, and the PDCP layer. For example, the network coding layer involved in this embodiment may be a protocol layer with a network coding function added above the PDCP layer or the BAP layer, or may be a protocol layer with a network coding function added between the PDCP layer and the RLC layer, or may be a protocol layer with a network coding function added between the RLC layer and the MAC layer, or may be a protocol layer with a network coding function added between the MAC layer and the PHY layer.
The network coding function in the present application includes network coding of an original data packet (referred to as an original data packet, an original packet, etc.) and adding a packet header of the coded packet. In a possible implementation, the network coding may be implemented by an encoder, where an input of the encoder is Q original data packets, and an output of the encoder is P coded data packets (referred to as coded packets for short), where N and Q are both positive integers, and P is greater than Q. The encoded packets include P-Q check packets (also called redundant packets) and Q systematic packets, or P check packets (i.e. the encoded packets are all check packets and do not include systematic packets). Wherein, the content of the system packet is the same as the content of the original data packet. Since the system packet may not be encoded, for example, the system header may be obtained by directly adding a packet header to the original data packet, the equivalent encoding coefficient of the system packet may be considered as a unit vector. The coding coefficients of the check packet may be non-unity vectors. Through the correlation between the content of the check packet and the content of the original data packet generating the check packet, the receiving end can restore the original data packet which is not successfully received through the decoding of the check packet and the original data packet or the system packet which is successfully received. In another possible implementation, the original data packet may be subjected to network coding and packet header addition after the packet header is added, so as to obtain the check packet. In this application, a data packet obtained by adding a packet header to an original data packet before network coding is also referred to as a system packet.
In this embodiment, the process of performing shift xor processing on k data packets h times to obtain h first check data may also be referred to as performing network coding on the k data packets in a shift xor manner.
The shift processing in this embodiment includes shifting a specified number of data units to the right or shifting a specified number of data units to the left, where the data units include bits, bytes, or symbols, or a number of bits, a number of bytes, or a number of symbols, etc. Wherein 1 symbol may include 1 or more bits. This specified number is referred to as a shift amount in the present embodiment. In this embodiment, the shifting the data packet may be understood as shifting the data packet by t data units, where t is an integer greater than or equal to zero. In this embodiment, the specified data, for example, zero padding, may be added to the position of the data packet where no data is present due to the shift.
In this embodiment, j =1,2 \8230indicatesthat j is sequentially taken from h integers from 1 to h, and j can be understood as an index of a coding coefficient vector for coding the k original data packets, where the coding coefficient vector is used to indicate which data packets are shifted in the jth shift xor processing and how many data units are shifted for each of the data packets. Based on the coding coefficient vector index j, it can be determined which of the k original data packets are shifted and xored in the jth shift xor processing and the shift amount of the shifted original data packet. i.e. i j ＝1,2…k j Is referred to as i j From 1 to k j K of (a) j The integers take values in sequence.
The implementation of the shift exclusive or process in the present embodiment is described below with reference to table 1 and table 4, where k =3 and the three original data packets respectively include L bits.
Table 1 original data packet
| x 1，1 | x 1，2 | x 1，3 | x 1，4 | x 1，5 | … | x 1，L |
| x 2，1 | x 2，2 | x 2，3 | x 2，4 | x 2，5 | … | x 2，L |
| x 3，1 | x 3，2 | x 3，3 | x 3，4 | x 3，5 | … | x 3，L |
In table 1, the element in the ith row and the ith column indicates the ith bit in the ith original data packet, wherein L is 1,2 and 3 in sequence, and w is sequentially valued from L integers from 1 to L.
The shift xor processing procedure is shown in table 2 when the first original packet of the three original packets is shifted to the right by 0 bits, the second original packet is shifted to the right by 0 bits, and the third original packet is shifted to the right by 0 bits.
TABLE 2 data packet obtained by shifting XOR processing of original data packet
| x 1，1 | x 1，2 | x 1，3 | x 1，4 | x 1，5 | … | x 1，L |
| x 2，1 | x 2，2 | x 2，3 | x 2，4 | x 2，5 | … | x 2，L |
| x 3，1 | x 3，2 | x 3，3 | x 3，4 | x 3，5 | … | x 3，L |
| y 1，1 | y 1，2 | y 1，3 | y 1，4 | y 1，5 | … | y 1，L |
The data on each bit in the data packet obtained by shifting the first original data packet by 0 bit to the right is shown as the element in the first row in table 2; the data on each bit in the data packet obtained after shifting the second original data packet by 0 bit to the right is shown as the elements in the second row in table 2; data on each bit in the data packet obtained after shifting the third original data packet by 0 bit to the right is shown as elements in the third row in table 2; the data in the data packets obtained by xoring the data packets obtained by shifting the three original data packets respectively are shown as the elements in the fourth row in table 2. The operation of obtaining the packet of the last row in table 2 based on the three original packets in table 1 may be referred to as a shift exclusive or process.
The shift xor processing procedure is shown in table 3 when the first original packet of the three original packets is shifted to the right by 0 bits, the second original packet is shifted to the right by 1 bit, and the third original packet is shifted to the right by 2 bits.
TABLE 3 data packet obtained by shift XOR processing of original data packet
| x 1，1 | x 1，2 | x 1，3 | x 1，4 | x 1，5 | … | x 1，L | 0 | 0 |
| 0 | x 2，1 | x 2，2 | x 2，3 | x 2，4 | … | x 2，L-1 | x 2，L | 0 |
| 0 | 0 | x 3，1 | x 3，2 | x 3，3 | … | x 3，L-2 | x 3，L-1 | x 3，L |
| y 2，1 | y 2，2 | y 2，3 | y 2，4 | y 2，5 | … | y 2，L | y 2，L+1 | y 2，L+2 |
The data on each bit in the data packet obtained by shifting the first original data packet by 0 bit to the right is shown as the element in the first row in table 3; the data on each bit in the data packet obtained after shifting the second original data packet by 1 bit to the right is shown as the element in the second row in table 3; data on each bit in the data packet obtained after shifting the third original data packet by 2 bits to the right is shown as an element in the third row in table 3; the data in the data packets obtained by xoring the data packets obtained by shifting the three original data packets are shown as the elements in the fourth row in table 3. The operation of obtaining the packet of the last row in table 3 based on the three original packets in table 1 may be referred to as a shift exclusive or process.
The shift xor processing procedure is shown in table 4 when the first original packet of the three original packets is shifted to the right by 0 bits, the second original packet is shifted to the right by 2 bits, and the third original packet is shifted to the right by 4 bits.
TABLE 4 data packet obtained by shifting XOR processing of original data packet
| x 1，1 | x 1，2 | x 1，3 | x 1，4 | x 1，5 | … | x 1，L | 0 | 0 | 0 | 0 |
| 0 | 0 | x 2，1 | x 2，2 | x 2，3 | x 2，4 | … | x 2，L-1 | x 2，L | 0 | 0 |
| 0 | 0 | 0 | 0 | x 3，1 | x 3，2 | x 3，3 | … | x 3，L-2 | x 3，L-1 | x 3，L |
| y 3，1 | y 3，2 | y 3，3 | y 3，4 | y 3，5 | … | y 3，L | y 3，L+1 | y 3，L+2 | y 3，L+3 | y 3，L+4 |
The data on each bit in the data packet obtained by shifting the first original data packet by 0 bit to the right is shown as the element in the first row in table 4; the data on each bit in the data packet obtained after shifting the second original data packet by 2 bits to the right is shown as the element in the second row in table 4; data on each bit in the data packet obtained after shifting the third original data packet by 4 bits to the right is shown as an element in the third row in table 4; the data in the data packets obtained by xoring the data packets obtained by shifting the three original data packets respectively are shown as the elements in the fourth row in table 4. The operation of obtaining the packet of the last row in table 4 based on the three original packets in table 1 may be referred to as a shift exclusive or process.
In this embodiment, one shift xor processing is performed on k original data packets to obtain one check data, and h shift xor processing is performed on the k original data packets h times to obtain h check data. For convenience of description, the embodiment refers to the parity data obtained by performing shift exclusive or processing as the first parity data.
The number of the original data packets participating in the shift exclusive-or processing in each shift exclusive-or processing may be equal to or less than k. Alternatively, it can be said that the number of original packets subjected to shift-and-xor processing in the j-th shift-xor processing of the h-th shift-xor processing is denoted as k j When k is j May be less than k or equal to k.
In this embodiment, in each shift xor processing, the shift directions of different original data packets are the same. The shift direction of each original data packet in different times of shift exclusive-or processing can be the same or different. The shift direction of each original data packet in different times of shift exclusive-or processing is the same, compared with the shift direction being different, because there is no need to distinguish the shift direction of each original data packet, the complexity of the encoding end and the decoding end can be reduced and no additional information is needed to indicate the shift direction of each original data packet.
In this embodiment, the process of performing shift xor processing on the original data packet to obtain the first check data may be referred to as performing shift xor encoding on the original data packet. Since the shift exclusive-or encoding method in this embodiment is performed in a binary finite field, the operation complexity is low, and thus the encoding complexity of data can be reduced.
In this embodiment, the k original data packets and the h first check data obtained by performing the shift xor processing on the k original data packets h times may satisfy the relation (1).
Wherein, y j Represents the jth first parity data, x, of the h first parity data i Representing the ith original packet of the k original packets,
it is indicated that the exclusive or process is performed,
comprising zero and non-zero elements, matrix G 1 The non-zero elements in (1) comprise a matrix
Element of (1), y j Represents the jth first parity data, x, of the h first parity data i Indicating the ith packet of the k packets,
it is indicated that the exclusive or process is performed,
is to represent
Element shift t of multiplication i,j And one data unit, wherein the shifting direction comprises right or left. Wherein i =1,2 \ 8230k, i can be called a packet identifier (packet ID) of the original data packet.
In this example, k j K, or j ＜k。k j K is equal to k and represents that the shift processing is carried out on each data packet in the k data packets in the j shift exclusive-OR processing, k j And k is less than k, namely that only k data packet parts are subjected to shift processing in the j shift exclusive-or processing. Wherein k is j The larger the value of (a) is, the more the number of data packets subjected to shift processing in one shift exclusive-or processing is, and accordingly, the more the check information contained in the check data obtained by the shift exclusive-or processing is, so that the decoding end can decode based on the check data and can decode based on less check dataThe k data packets are obtained by decoding, thereby being beneficial to improving the coding rate of the k data packets.
For k j In some implementations, k is any integer from 1 to h j K, which means that each data packet is shifted every shift exclusive-or process of the h shift exclusive-or processes; in other implementations, k is any integer from 1 to h j Are less than k, which means that only part of the data packets are shifted in each of the h shift exclusive-or processes, and only k is shifted in the j-th shift exclusive-or process j Shifting each data packet; in other implementations, k is a partial integer of 1 to h taken by j j When k is equal to k, j takes other partial integers from 1 to h, k j And if the number of the data packets is less than k, the data packets are shifted in some shift exclusive-or processes, and only part of the data packets are shifted in some shift exclusive-or processes.
k j K, the number of bits required to be processed, as an example,
h column and matrix in
F columns in (1) correspond to matrix G 1 J column of (a) contains k-k j Zero element sum matrix G 2 K in the corresponding column of j F is a positive integer less than or equal to h.
k j < k, matrix G is used as an example 1 Includes a matrix G 2 I.e. F =1, or matrix G 1 H column of (1) corresponds to the matrix G 2 One column of (a). Generally speaking, the matrix G 2 Is not a column whose shift amount is all zero.
Alternatively, the matrix G 1 The non-zero elements in (a) may include: will matrix G 2 All elements in the column are sorted according to the order of the shift amount from small to large, and then sortedThe top element in the sequence of arrival. Or matrix G 1 J column in (1) includes k j Each non-zero element comprising a matrix G 2 V of k elements in the corresponding column of (1) j An element, the v j T of each element i,j Is less than or equal to the value of said k elements divided by said v j T of an element other than the element i,j Value of v j ≤k j
k j < k or k j K, as another example, the matrix G 1 H columns in (1) and matrix G 2 H rows in (1) correspond one to one, matrix G 1 Column j of (1) contains matrix G 2 K in the corresponding column of j Individual elements, i.e. F =1, or matrix G 1 H columns of (C) and matrix G 2 Are in one-to-one correspondence. Alternatively, the matrix G 1 K of j-th column (c) j The non-zero elements may include: will matrix G 2 According to t i,j After the sequence from small to large is sequenced, the first k in the sequence obtained by sequencing j All or part of each element.
In this embodiment, optionally, there is at least one shift xor process, where the shift amount for shifting any two data packets may be different; alternatively, there is at least one packet whose shift amount is different in any two shift exclusive-or processes.
When the shift amount of any two data packets in each shift exclusive-OR processing of h-1 times is different, and the shift amount of each data packet in k-1 data packets in any two shift exclusive-OR processing is different, the h-1 coding coefficient vectors corresponding to the h-1 shift exclusive-OR processing of the k-1 data packets can be linearly independent, so that the coding efficiency is ensured.
In this embodiment, optionally, the matrix G 1 May be a sparse matrix. For example, matrix G 1 The positions of the non-zero elements in the code are the same as the positions of the non-zero elements in a generator matrix of k rows and h columns used when the third code is used for coding, and the third code comprises a fountain code or a random linear network code.
As an example, a generator matrix of k rows and h columns used in encoding using the third code may be obtained first, and typically the generator matrix is composed of elements {0,1 }; then replacing the elements with the value of 1 in each column of the generated matrix with a matrix G 2 To obtain a matrix G 1 . Alternatively, different columns in the generator matrix may correspond to the matrix G 2 With the same column not all having zero intermediate shift, e.g. all columns corresponding to G 2 The same column for which the middle shift amounts are not all zero; alternatively, different columns in the generator matrix may correspond to the matrix G 2 Different columns in the same row.
In this embodiment, optionally, the matrix G 2 The following relationship can be satisfied:
0＜i 1 ＜i 2 ≤k，0＜j 1 ＜j 2 ≤h。
in this example, optionally, matrix G 1 J th column in (1) and matrix G 2 Corresponds to the jth column in (e). Alternatively, matrix G may be formed 2 K in the j-th column of (1) j Each element as a matrix G 1 K in the jth column of (1) j And (4) each element. E.g. k j K, the matrix G may be set 2 Is taken as matrix G 1 The jth column of (1); k is a radical of formula j < k, the matrix G may be 2 K in the jth column of (1) j Each element as a matrix G 1 K in the j-th column of (1) j And (4) each element.
In this embodiment, optionally, the matrix G 2 May contain at least one z in each column 0 Elements, which can avoid unnecessary shift and save transmission overhead.
The matrix G is given below 2 Some examples of (2). In matrix G 2 In the first example of (1), matrix G 2 May be a matrix of vandermonde structures. As an example of the manner in which the device may be used,
the display deviceIn the example, the generator matrix when encoding is performed using the third code is
For example, the element with the value 1 in the generated matrix is replaced by the matrix G 2 After the elements in the second column, the matrix G can be obtained 1 An example of (a) is as follows:
in this example, the generator matrix in encoding using the third code is
For example, the element with the value 1 in the generated matrix is replaced by the matrix G 2 After the elements in the corresponding column, the matrix G can be obtained 1 An example of (c) is as follows:
in matrix G 2 In the second example, the matrix G can be obtained by the following steps 2 Or matrix G 2 The relationship specified in the following steps can be satisfied.
Step one, selecting a set alpha = { alpha = 1 ,α 2 ,…,α K And set β = { β = } 1 ,β 2 ,…,β R Where K can be equal to K or greater than K, R = h-1 or R = h, and K + R ≦ 2 p Element α in the set α c And element beta in the set beta d Belonging to the Galois field GF (q) p ) Q is a prime number, p is ≧ 1, and for the set α, α 1 To alpha K Any two of these K elements are not equal, in the set β, β 1 To beta R Any two of the R elements are not equal. As an example, q =2.
α 1 To alpha K Any two of the K elements are not equal and can be expressed as
1≤c 1 ≤c 2 ≤K，
And
respectively represent indexes c in the set alpha 1 And c 2 Of (2) is used. Beta is a 1 To beta R Any two of the R elements are not equal and can be expressed as 1 ≦ d 1 ＜d 2 ≤R，
And
respectively represent index d in set beta 1 And d 2 The element (c) of (a).
Step two, constructing a KxR dimensional Cauchy matrix based on the set alpha and the set beta
c＝1,2…K，d＝1,2…R。
Step three, G cauchy Each element in (1) is expressed by a primitive element expression method on a finite field to obtain a matrix
Wherein γ is GF (q) p ) The original elements of the raw materials of the Chinese character,
is t of primitive gamma c ' ,d To the power of one.
Step four, the matrix G prim The primitive element in (1) is used as a shift symbol z and an index t 'of the primitive element' c,d As the shift amount (or may be referred to as an offset amount), a matrix is obtained
Step five, according to the matrix G 3 Generating a matrix G 4 。
According to matrix G 3 Generating a matrix G 4 In the first exemplary implementation of (1), the matrix G may be directly applied 3 As G 4 I.e. t c,d ＝t' c,d 。
According to matrix G 3 Generating a matrix G 4 In the second exemplary implementation manner of (1), the matrix G may be determined first 3 And then subtracting the minimum shift amount in each column from each shift amount in each column, thereby a matrix G can be obtained 4 。
In this implementation, if t is given d Is recorded as a matrix G 3 T in the d-th column of 1,d To t K,d Minimum shift among the K values, matrix G 4 Is marked as
When t is c,d ＝t' c,d -t d 。
This implementation may be such that matrix G 4 May contain elements shifted by 0, i.e. may be made based on matrix G 3 The resulting matrix G 4 May contain an element of shift amount 0, and further may be such that matrix G 2 Each column of (1) may include an element with a shift amount of 0, so that the shift amount in each shift xor processing may start from 0, and the shift amount of the data packet may be further reduced, and finally, the data length of the first parity data may be reduced on the premise of not affecting the coding rate, that is, the transmission overhead of the first parity data may be reduced.
For example, matrix G 3 In which one column contains 3 elements each of z 2 、z 4 And z 6 If the three elements are used to perform shift exclusive-or processing on three data packets once, the shift amounts of the three data packets are 2, 4, and 6 data units, respectively, and the first two data units in the first parity data obtained by shifting and exclusive-or processing the three data packets include the data unitsThe information of (2) is complementary zero, and does not carry any check information, but the shortage occupies two data units, thereby increasing the transmission overhead of useless two data units. However, after subtracting the minimum value 2 from 2, 4, and 6 to obtain 0, 2, and 4, respectively, the shift amounts of the three packets are 0, 2, and 4 data units, respectively, and the transmission overhead of two data units can be connected.
Step six, according to the matrix G 4 Generating a matrix G 2 。
If K = K, h = R, according to the matrix G 4 Generating a matrix G 2 In an exemplary implementation of (2), the matrix G may be divided into two or more sub-matrices 4 As a matrix G 2 。
If K > K, h = R, according to the matrix G 4 Generating a matrix G 2 In an exemplary implementation of (1), the matrix G may be 4 K rows and h columns in (1) are taken as a matrix G 2 . For example, matrix G may be divided into 4 The first k rows and h columns in the matrix G 2 。
If K = K, R = h-1, according to the matrix G 4 Generating a matrix G 2 In an exemplary implementation of (2), the matrix G may be divided into two or more sub-matrices 4 H-1 column in (1) is taken as a matrix G 2 Column (h-1).
For example, matrix G 4 H-1 column in (a) is taken as a matrix G 2 H-1 column of (a), k elements "z 0 As a matrix G 2 The remaining one column. Optionally, k elements "z 0 As a matrix G 2 First column of (2), matrix G 4 H-1 column in (1) is taken as a matrix G 2 The latter h-1 column.
How to determine the matrix G in this example is described below with K =3, r = h-1=2, q =2, p =3 as an example 2 Implementation of (1).
First, the finite field GF is determined (2) 3 ) One primitive polynomial f (x) = x in (c) 3 + x +1, finite field GF (2) 3 ) The power of the primitive γ of the 8 elements {0,1,2,3,4,5,6,7} is shown in Table 5.
TABLE 5 finite field GF (2) 3 ) The elements in (1) and their corresponding power of primitive elements
| GF(2 3 ) Element (1) of | Powers of primitive elements |
| 0 | 0 |
| 1 | γ 0 |
| 2 | γ 1 |
| 3 | γ 3 |
| 4 | γ 2 |
| 5 | γ 6 |
| 6 | γ 4 |
| 7 | γ 5 |
Then, a set α = {0,1,2} a set β = {3,4} is selected, and three or two rows of Cauchy matrices are constructed based on the set α and the set β
And will matrix G cauchy The elements in (2) are expressed by power of primitive elements to obtain a matrix
Further, the matrix G prim The primitive γ is modified into a shift symbol z, and the exponent of the primitive γ is used as the shift amount to obtain a matrix
Next, because of the matrix G 4 Is 1, so that 1 is subtracted from each shift amount of the column, resulting in a matrix of shift amounts 4, 0 and 2 of column 2
Finally, if k =3, then the matrix G may be 4 Adding a column of shift elements with shift quantity of all 0 to obtain a matrix
In matrix G 2 In the third example of (a) above,
matrix G 2 Matrix G comprising k x k dimensions 21 H column of (1), the matrix G 21 Is the e-th element in the first row of
e＝1,2…k，G 21 Is the matrix G 21 Is obtained by cyclically shifting k elements in the first row by X-1 elements, X is an integer less than or equal to k, and X is greater than or equal to 2.
G satisfying the above relationship 2 The data overhead of the first check data can be reduced, so that the transmission overhead of the first check packet can be saved.
Matrix G 21 Can be expressed as
As an example, the matrix G 2 Including the matrix G 21 The first h column of (c).
In matrix G 2 In the fourth example of (a) above,
the matrix G 2 Comprises the first h elements of the first line vector, the e-th element of the first line vector is
e =1,2 \ 8230h, said matrix G 2 The first X-1 elements in the X-th row of (a) are the last X-1 elements in the first row vector, the matrix G 2 The last h-X +1 elements in the Xth line are the first h-X +1 elements in the first line vector, X is an integer less than or equal to k, and X is more than or equal to 2.
As an example, matrix G 2 Can be expressed as
After the above describes the relation that h pieces of first parity data obtained by performing shift xor processing on k pieces of original data packets h times and the k pieces of original data packets can satisfy, an exemplary implementation manner of how to perform shift xor processing on the k pieces of original data packets to obtain the h pieces of first parity data is described below.
In an exemplary implementation, the network coding layer of the first communication device may configure a mapping relationship between a coding coefficient vector (i.e., j) corresponding to each shift xor processing and a packet identifier of a data packet participating in the shift xor processing, and configure a mapping relationship between the coding coefficient vector and i participating in the shift xor processing in the time j The mapping relationship between the shift amounts of each of the packets.
In this way, when the network coding layer of the first communication device obtains the k original data packets, and codes the k original data packets to obtain the jth first check data in the h first check data, the network coding layer of the first communication device may obtain the jth first check data based on the j value and the jth dataDetermining which original data packets in the k original data packets need to be shifted and subjected to XOR processing according to the mapping relation between the packet identifications of the original data packets participating in XOR processing in the j times of shift XOR processing, and performing shift and XOR processing on the i data packets participating in shift and XOR processing in the j times of shift XOR processing based on the value of j and the value of j j The mapping relation between the shift amounts of each data packet in each data packet is determined for the i j And shifting the corresponding original data packet based on the shift amount and the specified shifting direction and performing XOR processing on a plurality of shifted data packets so as to obtain jth first check data. Alternatively, the shifting direction may be preconfigured in a network coding layer of the first communication device.
Based on the implementation mode, if j takes value h from 1 in sequence, h pieces of first check data can be obtained, and the h pieces of first check data and the k original data packets satisfy the relationship in the relational expression (1).
S402, the first communication equipment adds a packet header to the h pieces of first check data to obtain h pieces of first check packets, wherein the jth first check packet in the h pieces of first check packets is a data packet obtained by adding the packet header to the jth first check data in the h pieces of first check data.
S403, the first communication device sends the h first check packets. Correspondingly, the second communication equipment receives N data packets to be decoded from the first communication equipment, wherein the N data packets to be decoded comprise H first check packets in the H first check packets, H is less than or equal to H, H is a positive integer, and N is greater than or equal to H.
In this embodiment, the implementation manner of sending the first check packet by the first communication device may refer to an implementation manner in the prior art that the first communication device sends the check packet obtained by using other network coding methods to the second communication device, which is not described herein again.
S404, the second communication device carries out decoding processing based on the N data packets to be decoded to obtain k first data packets. Ideally, the k first packets include k packets in S401. Typically, N is greater than or equal to k.
In this embodiment, the decoding processing performed by the second communication device based on the N data packets to be decoded includes: and the second communication equipment performs exclusive-OR processing on the first check data in the H first check packets.
For example, if the second communication device receives three first check packets, which are respectively the three first check data shown in the last row of tables 2 to 4, the encoded 3 original data packets can be decoded based on the three first check data.
Specifically, the first bit y in the third first parity data 3,1 For the first bit x in the first original data packet 1,1 XOR the two '0's, thereby determining the first bit x in the first original packet 1,1 ＝y 3,1 (ii) a The second bit y of the third first parity data 3,2 For the second bit x in the first original data packet 1,2 The value obtained by XOR-ing two '0's can determine the second bit x in the first original packet 1,2 ＝y 3,2 (ii) a Second bit y of second first parity data 2,2 From the second bit x in the first original data packet 1,2 First bit x in the second original packet 2,1 And "0" are exclusive-ored, thereby making it possible to
Determining a first bit in a second original data packet; first bit y of first parity data 1,1 For the first bit x in the first original data packet 1,1 The first bit x in the second original packet 2,1 And the first bit x in the third original packet 3,1 The value obtained by XOR, from which the first bit in the third original packet can be determined
And so on, the three original data packets coded can be obtained by decoding based on the three first check data.
In some possible implementation manners of this embodiment, optionally, the first communication device may further send, to the second communication device, a system packet obtained by adding the header to all or part of the k original data packets.
In an implementation manner that the first communication device sends the first check packet and the systematic packet to the second communication device, the systematic packet may also be included in the N data packets to be decoded received by the second communication device from the first communication device.
In this implementation manner, a packet header of a jth first check packet in the h first check packets may include first check data type indication information, where the first check data type indication information is used to indicate that the jth first check data is check data obtained through shift and xor processing. Or, it can be said that the first communication device adds a packet header to h pieces of first check data to obtain h pieces of first check packets, where a jth first check packet in the h pieces of first check packets is a data packet obtained by adding the packet header to a jth first check data in the h pieces of first check data; the first check data type indication information is used for indicating that the jth first check packet is a check packet obtained through shift and XOR processing.
In this embodiment, the first communication device may also carry data type indication information in the header of each system packet to indicate that the data packet to which the header belongs is the system packet.
Optionally, the data type indication information in the system packet and the first check data type indication information in the first check packet may occupy the same bit in the same field in the packet header, and if the values of the same bit are different, it indicates that the packet to which the packet header belongs is a different type of packet. For example, when a bit in the packet header is used to indicate the type of the packet, an example of the mapping relationship between the value of the bit and the type of the packet is shown in table 6.
TABLE 6 mapping relationship between packet type and bit value
| Bit value | Packet type |
| 0 | System system |
| 1 | First check packet obtained by shift XOR processing |
In this implementation, correspondingly, the N data packets to be decoded include H first check packets in the H first check packets and all or part of the system packets in the k system packets.
Correspondingly, the second communication device performs xor processing on the H first check packets, including: and the second communication equipment performs exclusive OR processing on the H first check packets and the received system packet.
When the second communication device performs xor processing on the H first check packets and the received system packet, the second communication device may determine, based on packet type indication information in a packet header of the received data packet, whether the data packet is a system packet or a first check packet, and then perform xor processing based on the determination result to obtain the original data packet by decoding.
In this embodiment, when the second communication device performs the xor processing on the H pieces of first check data, generally, the encoding vector coefficient of each piece of first check data needs to be obtained. Because based on the encoded vector coefficients, the second communication device can only determine the packet identities of the original data packets involved in the shift and xor processing and the shift amounts of the original data packets involved in the shift and xor processing, and can only decode the original data packets.
In the same way, generally speaking, the second communication device needs to know the packet identifier of the original data packet in each received system packet, so as to obtain k original data packets better based on the decoding of the received system packets.
As an example, information indicating the coding coefficient vector of the first check data may be carried in the packet header of the first check packet, so that the second communication device may determine the coding coefficient vector of the received check data based on the information; similarly, information indicating the packet identifier of the original data packet may be carried in the packet header of the system packet, so that the second communication device may determine the packet identifier of the received original data packet based on the information.
For a case that a first check packet carries a Serial Number (SN) field, the first communication device may determine, by using an SN, a coding coefficient vector corresponding to the first check packet, determine, based on the coding coefficient vector, a packet identifier of an original data packet participating in shift processing and a shift amount of the original data packet, and then encode the original data packet. After receiving the first check packet, the second communication device may determine and decode the corresponding coding coefficient vector based on the SN field using the same algorithm.
Alternatively, after the first communication device determines the coding coefficient vector and encodes the original data packet based on the coding coefficient vector, a field may be newly added in the packet header of the first check packet to carry information indicating the coding coefficient vector. Thus, after the second communication device receives the first check packet, the encoding coefficient vector can be determined and decoded based on the information carried by the new field.
For the system, when a packet header of the system carries a Block identifier (Block ID) field, considering a factor of packet loss, the second communication device may not know a packet identifier of an original data packet in the received system packet in the Block, so that the packet header of the system packet may use information carrying a packet identifier for indicating a corresponding original data packet, and the second communication device may use the indication information to know the packet identifier (i.e., a value of i) of the original data packet in the received system packet, so that the second communication device can correctly decode the packet.
The first communication device may also indicate the number of original packets (i.e., the value of k) to the second communication device if the number of original packets is not pre-set or semi-statically configured and the packet header carries a block identifier instead of a Window indicator (Window indicator). When the packet header carries the Window indicator, the number of the original data packets can be known through a Window header and a Window footer in the Window indicator, or through a Window length and a Window header, or through a Window length and a Window footer, so that when the packet header carries the Window indicator, the packet header does not need to carry information indicating the number of the original data packets.
Several exemplary structures of the header of the system packet and the first check packet are given below. As shown in fig. 5, a "T" field and a "SN" field may be included in the header of the systematic packet, and a "T" field, a "SN" field, and a "window indicator" field may be included in the header of the first check packet. Optionally, the header of the first check packet may further include one or more of an "encoding coefficient vector index" field, a "number of original packets" field, and a "seed" field. In this embodiment, "T" is an abbreviation of "Type", and the field is used to indicate a Type of the data packet in which the packet header belongs, or carry data Type indication information. The "seed" field is used as an input to a pseudorandom number generator to cause the pseudorandom number generator to output a random number that is used to determine a vector of encoded coefficients.
As shown in fig. 6, a "T" field and an "SN" field may be included in the header of the systematic packet, and a "T" field, a "window indicator" field, and a "coding coefficient vector index" field may be included in the header of the first check packet. Optionally, the header of the first check packet may further include one or more of a "number of original data packets" field, a "SN" field, and a "seed" field.
As shown in fig. 7, the header of the systematic packet may include a "T" field, a "block id" field, and a "packet id" field, and the header of the first check packet may include a "T" field, a "SN" field, and a "block id" field. Optionally, the header of the system packet may further include an "SN" field, and the header of the first check packet may further include one or more of an "encoding coefficient vector index" field, a "number of original data packets," and a "seed" field.
As shown in fig. 8, the header of the systematic packet may include a "T" field, a "block id" field, and a "packet id" field, and the header of the first check packet may include a "T" field, a "coding coefficient vector index" field, and a "block id" field. Optionally, the header of the systematic packet may further include an "SN" field, and the header of the first check packet may further include one or more of the "SN" field, the "number of original data packets, and the" seed "field.
Fig. 9 is an exemplary flowchart of a data transmission method according to a second embodiment of the present application. As shown in fig. 9, the method may include S901, S902, S903, S904, S905, and S906.
The first communication device may be a device for sending data or a chip system or a processor applied to the device in any one of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and optionally, the device is a radio access network device, such as a base station, or a terminal, such as a UE, and correspondingly, the second communication device may be a device for receiving the data or a chip system or a processor applied to the device in any one of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and optionally, the device is a radio access network device, such as a base station, or a terminal, such as a UE.
S901, a first communication device performs h times of shift XOR processing on k data packets to obtain h first check data, wherein the jth first check data in the h first check data is a data packet obtained by the jth shift XOR processing performed by the first communication device on the k data packets in the h times of shift XOR processing, and the jth shift XOR processing comprises performing j times of shift XOR processing on k data packets in the k data packets j Shifting the data packet and k j K obtained by shifting data packet j XOR processing is performed on the shifted data packets, k j Ith of shift data packet j A shift data packet as said k for said first communication device j Ith in each data packet j The data packet is obtained by shifting the data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j 。
This step may refer to S401, and is not described herein again.
And S902, the first communication device encodes the k data packets and the h first check data by using a first code to obtain S second check data, wherein S is a positive integer, and the first code comprises a fountain code or a random linear network code.
In this step, reference may be made to an implementation manner of using the first code to perform encoding in the prior art, which is not described herein again.
And S903, the first communication device adds a packet header to the h pieces of first verification data to obtain h pieces of first verification packets, wherein a jth first verification packet in the h pieces of first verification packets is a data packet obtained by adding the packet header to a jth first verification data in the h pieces of first verification data.
This step can refer to S402, which is not described herein again.
S904, the first communication device adds a packet header to the S second check data to obtain S second check packets, wherein the u-th second check packet in the S second check packets is a data packet obtained by adding the packet header to the u-th second check data in the S second check data, and u =1,2 \8230s.
It is understood that the present embodiment does not limit the execution order of S903 and S904.
S905, the first communication device sends the h first check packets and the S second check packets. Correspondingly, the second communication equipment receives N data packets to be decoded, wherein the N data packets to be decoded comprise H first check packets in the H first check packets and S second check packets in the S second check packets, H is less than or equal to H, S is less than or equal to S, H and S are positive integers, and S + H is less than or equal to N. Generally, N is greater than or equal to k.
S906, the second communication equipment decodes based on the N data packets to be decoded to obtain k first data packets. Ideally, the k first packets include k packets in S901.
For example, after receiving N data packets, the second communication device determines whether each of the data packets is a first check packet or a second check packet, and decodes the first check packet by using a shift xor method if the data packet is the first check packet, and decodes the second check packet by using a decoding method corresponding to the first code if the data packet is the second check packet.
In the h + s check data generated by the method of the embodiment, only h check data are the first check data obtained by shift xor processing, and the other s check data are obtained by encoding in the existing network encoding mode, so only the h first check data occupy additional transmission overhead due to shift, and the s second check data do not occupy additional transmission overhead. Compared with the method that the first communication equipment encodes the k data packets by using a shift exclusive-or processing mode to obtain the h + s first check data, the method can reduce the transmission overhead additionally occupied by the s check data, thereby achieving the aim of saving the transmission overhead.
In some possible implementation manners of this embodiment, optionally, the N data packets to be decoded may further include a system packet obtained by adding the header to all or part of the k original data packets. In this implementation manner, the second communication device receives the first check packet, the second check packet, and the system packet sent by the first communication device, and decodes the first check packet, the second check packet, and the system packet based on the received first check packet, the received second check packet, and the received system packet to obtain the k original data packets. Generally speaking, the second communication device can only successfully decode if the total number of the first check packets, the second check packets and the system packets received by the second communication device is greater than or equal to k.
In this embodiment, a process in which the first communication device obtains h first check packets and s second check packets based on k original data packets may be referred to as concatenated coding. In the concatenated coding method of this embodiment, the outer code includes k original data packets and h first check data, and the inner code includes k original data packets, h first check data, and s second check data. Fig. 10 is another exemplary flowchart of the encoding flow of the present embodiment.
As shown in fig. 10, shift xor encoding is performed on k original data packets to obtain h first check data, where the inner code includes k original data packets and h first check data; then, coding k original data packets and h first check data by using a first code mode to obtain s second check data, wherein the internal code comprises k original data packets, h first check data and s second check data; and finally, adding a packet header to each data packet in the k original data packets, the h first check data and the s second check data to obtain k + h + s coded packets, wherein the k + h + s coded packets comprise k systematic packets and h + s check packets.
In some implementation manners of this embodiment, the first check packet, the second check packet, and the packet header in the system may respectively carry type indication information, where the type indication information is used to indicate which type of data packet in the first check packet, the second check packet, and the system the data packet belongs to. In this way, after receiving the N data packets, the second communication device may determine, according to the type indication information in the packet header of the data packet, whether each data packet is a first check packet, a second check packet, or a system packet, and perform decoding using corresponding processing.
Optionally, the same bits in the same field may be used in the header of the first check packet, the second check packet, and the system packet to carry the type indication information, and if the values of the same bits are different, it indicates that the packet to which the header belongs is a different type of packet. For example, when two bits in the packet header are used to indicate the type of the packet, an example of the mapping relationship between the values of the two bits and the type of the packet is shown in table 7.
Table 7 another mapping relationship between packet types and bit values
| Bit value | Packet type |
| 00 | System system |
| 01 | First check packet obtained by shift XOR processing |
| 10 | Second check-up packet obtained using first code |
| 11 | Retention |
In this embodiment, optionally, the first check packet and the header of the system packet may also carry other information. The information that can be carried in the first check packet and the packet header of the system packet and the manner of carrying the information may refer to the related contents in the embodiment shown in fig. 4, which are not described herein again.
In this embodiment, the packet header of the second check packet may also carry indication information used for indicating a coding coefficient vector and other information, and the specific implementation manner may refer to an implementation manner of the packet header of the check packet obtained by using the first code manner for coding in the prior art, which is not described herein again.
Next, several exemplary structures of the header of the system packet, the first check packet, and the second check packet in the present embodiment are given in conjunction with fig. 11 to 14. The structures of the headers of the system packet and the first check packet in fig. 11 to 14 may refer to the structures of the headers of the system packet and the first check packet in fig. 5 to 8, which are not described herein again, and the following description focuses on the structure of the header of the second check packet.
As shown in fig. 11, a "T" field, a "SN" field, and a "window indicator" field may be included in the header of the second parity packet. Optionally, the header of the second parity packet may further include a "seed" field and/or a "number of original data packets" field.
As shown in fig. 12, a "T" field, a "window indicator" field, and a "seed" field may be included in the header of the second parity packet. Optionally, the header of the second parity packet may further include a "number of original packets" field and/or an "SN" field.
As shown in fig. 13, a "T" field, a "SN" field, and a "block identification" field may be included in the header of the second parity packet. Optionally, the header of the second parity packet may further include a "seed" field and/or a "number of original data packets".
As shown in fig. 14, a "T" field, a "seed" field, and a "block identification" field may be included in the header of the second parity packet. Optionally, the header of the second check packet may further include an "SN" field and/or a "number of original data packets".
Fig. 15 is an exemplary flowchart of a data transmission method according to a third embodiment of the present application. As shown in fig. 15, the method may include S1501, S1502, S1503, and S1504.
The first communication device may be a device or a chip system or a processor applied to the device for sending data in any one of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and optionally, the device is a radio access network device, such as a base station, or a terminal, such as a UE; accordingly, the second communication device may be a device or a chip system or a processor applied to the device for receiving the data in any one of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and optionally, the device is a radio access network device, such as a base station, or a terminal, such as a UE.
And S1501, the first communication equipment uses a second code to encode g data packets to obtain k data packets, wherein the second code comprises an LDPC code or an MDS code, and g is a positive integer.
Alternatively, the g packets may be g original packets. The meaning of the original data packet may refer to the meaning of the original data packet in the embodiment shown in fig. 4, and is not described herein again.
The implementation manner of the first communication device using the second code to encode g data packets may refer to the prior art, and is not described herein again.
In this embodiment, the value of k is determined by the number g of original packets. For example, the ratio of g to k is predetermined or semi-staticA certain ratio of, or, k = a + B, where a is satisfied
C is the minimum integer satisfying C (C-1) ≥ 2g, and B is the minimum integer satisfying C (C-1) ≥ 2g
Is the smallest integer of (a).
S1502, a first communication device performs h shift xor processing on the k data packets to obtain h first check data, where a jth first check data in the h first check data is a data packet obtained by the first communication device performing a jth shift xor processing in the h shift xor processing on the k data packets, and the jth shift xor processing includes performing a jth shift xor processing on k data packets in the k data packets j Shifting the data packet and processing the k j K obtained by shifting data packet j XOR processing is carried out on the shift data packets, k is j Ith of shift data packet j A shift data packet as said k for said first communication device j Ith in each data packet j The data packet is obtained by shifting the data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j 。
This step may refer to S401, and is not described herein.
And S1503, adding a packet header to the h pieces of first check data by the first communication equipment to obtain h pieces of first check packets, wherein the jth first check packet in the h pieces of first check packets is a data packet obtained by adding the packet header to the jth piece of first check data in the h pieces of first check data. Correspondingly, the second communication equipment receives H first check packets in the H first check packets, wherein H is not more than H and is a positive integer.
S1504, the first communication device sends the h first check packets and the g data packets. Correspondingly, the second communication equipment receives N data packets to be decoded, wherein the N data packets to be decoded comprise H first check packets in the H first check packets and G data packets in the G data packets, H is not more than H, H is an integer, G is not more than G, G is an integer, and H + G is not more than k + G.
S1505, the second communication device performs decoding processing based on the N data packets to be decoded to obtain the g data packets.
For example, the second communication device decodes based on N data packets to be decoded to obtain the k data packets, and decodes the G data packets and the k data packets using the second code to obtain the G data packets.
S404 may be referred to as an implementation manner in which the second communication device performs decoding based on the N data packets to be decoded to obtain the k data packets, which is not described herein again; the second communication device decodes the G data packets and the k data packets by using the second code, so as to obtain the implementation manner of the G data packets, which refers to the prior art and is not described herein again.
The data transmission method of the present embodiment may be referred to as a concatenated code construction method. Another exemplary flow chart of the present embodiment is shown in fig. 16. Coding g original data packets to obtain k intermediate data packets, and then performing shift exclusive-or processing on the k intermediate data packets to obtain h first check data; after a packet header is added to each of g original data packets and h first check data packets, g system packets and h first check packets can be obtained.
In the method of this embodiment, when the g original data packets are encoded by using the second code to obtain the k intermediate data packets, the additional transmission overhead of each intermediate data packet with respect to each original data packet is not increased, and the additional overhead is only increased when the h first check data are generated. This can save transmission overhead compared to directly encoding g original data packets using the shift xor processing method to obtain the first check data with the same error correction capability.
In another aspect, the method of this embodiment can ensure the error correction capability of the check packet, and can implement any number of check packets to adapt to the channel quality with limited overhead.
In this embodiment, optionally, the header of the system packet and the first check packet may carry type indication information, where the type indication information is used to indicate whether the type of the data packet is the system packet or the first check packet. The specific implementation manner of the type indication information refers to the related content in the embodiment shown in fig. 4, and is not described herein again.
In this embodiment, the structures of the packet headers of the system packet and the first check packet may refer to the structures of the packet headers of the system packet and the first check packet in the embodiment shown in fig. 4, which is not described herein again.
Fig. 17 is an exemplary flowchart of a data transmission method according to a fourth embodiment of the present application. As shown in fig. 17, the method may include S1701, S1702, S1703, S1704, S1705, S1706, and S1707.
The first communication device may be a device for transmitting data in any of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and correspondingly, the third communication device may be a device for receiving the data in any of the communication systems shown in fig. 1 or the application scenarios shown in fig. 2, and the third communication device may be an intermediate node between the first communication device and the third communication device.
S1701, a first communication device performs h shift xor processing on k data packets to obtain h first check data, where a jth first check data in the h first check data is a data packet obtained by the first communication device performing a jth shift xor processing on the k data packets in the h shift xor processing, and the jth shift xor processing includes performing k shift xor processing on k data packets in the k data packets j Shifting the data packet and k j K obtained by shifting data packet j XOR processing is carried out on the shift data packets, k is j Ith of shift data packet j A plurality of shift data packets as said k for said first communication device j Ith in each data packet j The data packet is obtained by shifting the data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j 。
This step may refer to S401, and is not described herein again.
S1702, the first communication device adds a packet header to the h first check data to obtain h first check packets, where a jth first check packet in the h first check packets is a data packet obtained by adding the packet header to a jth first check data in the h first check data.
S1703, the first communication device sends the k data packets and the h first check packets. Correspondingly, the second communication device receives the k data packets and the h first check packets.
S1704, the second communications device encodes the k data packets and the h first check data using a first code to obtain S second check data, where S is a positive integer, and the first code includes a fountain code or a random linear network code.
S1705, the second communication device adds a packet header to the S second check data to obtain S second check packets, wherein a u-th second check packet in the S second check packets is a data packet obtained by adding the packet header to the u-th second check data in the S second check data, and u =1,2 \8230.
S1706, the second communication device sends the h first check packets and the S second check packets. Correspondingly, the third communication equipment receives N data packets to be decoded, wherein the N data packets to be decoded comprise H first check packets in the H first check packets and S second check packets in the S second check packets, H is less than or equal to H, S is less than or equal to S, and H and S are positive integers.
S1707, the third communication device decodes based on the N data packets to be decoded to obtain the k data packets.
Optionally, the second communication device may further add a packet header to each of the k data packets, and send k systematic packets obtained by adding the packet header to the k data packets to the third communication device. Accordingly, the N data packets to be decoded received by the third communication device may further include D systematic packets of the k systematic packets. In general, H + S + D.gtoreq.k.
Fig. 18 is a schematic structural diagram of a data transmission device according to an embodiment of the present application. As shown in fig. 18, the data transmission apparatus 1800 includes an encoding module 1801 and a transmitting module 1802.
As a first example, the data transmission apparatus 1800 may be used to implement the data transmission method implemented by the first communication device in the embodiment shown in fig. 4. The encoding module 1801 may be configured to perform steps S401 and S402, and the transmitting module 1802 may be configured to perform the step performed by the first communication device in S403.
As a second example, the data transmission apparatus 1800 may be used to implement the data transmission method implemented by the first communication device in the embodiment shown in fig. 9. The encoding module 1801 may be configured to perform S901, S902, S903, and S904, and the transmitting module 1802 may be configured to perform the step performed by the first communication device in S905.
As a third example, the data transmission apparatus 1800 may be used to implement the data transmission method implemented by the first communication device in the embodiment shown in fig. 15. The encoding module 1801 may be configured to perform S1501, S1502, and S1503, and the transmission module 1802 may be configured to perform the step performed by the first communication device in S1504.
As a fourth example, the data transmission apparatus 1800 may be used to implement the data transmission method implemented by the first communication device in the embodiment shown in fig. 17. The encoding module 1801 may be configured to perform steps S1701 and S1702, and the transmitting module 1802 may be configured to perform the step performed by the first communication device in S1703.
As a fifth example, the data transmission apparatus 1800 may be used to implement the data transmission method implemented by the second communication device in the embodiment shown in fig. 17. The encoding module 1801 may be configured to execute S1704 and S1705, and the sending module 1802 may be configured to execute the step performed by the first communication device in S1706.
Optionally, the data transmission apparatus 1800 may further include a receiving module, and the receiving module is configured to receive information sent by other devices. For example, when the data transmission apparatus 1800 may be used to implement the data transmission method implemented by the second communication device in the embodiment shown in fig. 17, the receiving module is configured to execute the step executed by the second communication device in S1703.
Fig. 19 is a schematic structural diagram of a data transmission device according to another embodiment of the present application. As shown in fig. 19, the data transmission apparatus 1900 includes a receiving module 1901 and a decoding module 1902.
As a first example, the data transmission apparatus 1900 may be used to implement the data transmission method implemented by the second communication device in the embodiment shown in fig. 4. Wherein the receiving module 1802 may be configured to perform the step performed by the second communication device in S403, and the decoding module 1901 may be configured to perform S404.
As a second example, the data transmission apparatus 1900 may be used to implement the data transmission method implemented by the second communication device in the embodiment shown in fig. 9. The receiving module 1901 may be configured to perform the steps performed by the second communication device in S905, and the decoding module 1902 may be configured to perform S906.
As a third example, the data transmission apparatus 1900 may be used to implement the data transmission method implemented by the second communication device in the embodiment shown in fig. 15. The receiving module 1901 may be configured to perform the step performed by the second communication device in S1504, and the decoding module 1902 may be configured to perform S1505.
As a fourth example, the data transmission apparatus 1900 may be used to implement the data transmission method implemented by the third communication device in the embodiment shown in fig. 17. The receiving module 1901 may be configured to perform the steps performed by the third communication device in S1706, and the decoding module 1902 may be configured to perform S1707.
Fig. 20 is a schematic structural diagram of a data transmission device according to yet another embodiment of the present application. As shown in fig. 20, the communication apparatus 2000 includes a processor 2001 and an interface circuit 2002. The processor 2001 and the interface circuit 2002 are coupled to one another. It is understood that the interface circuit 2002 may be a transceiver or an input-output interface. Optionally, the communication device 2000 may further include a memory 2003 for storing instructions executed by the processor 2001 or for storing input data required by the processor 2001 to execute the instructions or for storing data generated by the processor 2001 after executing the instructions.
As an example, the processor 2001 is configured to implement the functions of the encoding module 1801, and the interface circuit 2002 is configured to implement the functions of the transmitting module 1802.
As another example, the processor 2001 is configured to implement the functions of the decoding module 1902, and the interface circuit 2002 is configured to implement the functions of the receiving module 1901.
The communication apparatus 2000 may be a communication device, and may also be a chip applied to the communication device.
It is understood that the processor in the embodiments of the present application may be a Central Processing Unit (CPU), other general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. The general purpose processor may be a microprocessor, but may be any conventional processor.
The method steps in the embodiments of the present application may be implemented by hardware, or may be implemented by software instructions executed by a processor. The software instructions may be comprised of corresponding software modules that may be stored in random access memory, flash memory, read only memory, programmable read only memory, erasable programmable read only memory, electrically erasable programmable read only memory, registers, a hard disk, a removable hard disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. Of course, the storage medium may also be integral to the processor. The processor and the storage medium may reside in an ASIC. In addition, the ASIC may reside in a network device or a terminal device. Of course, the processor and the storage medium may reside as discrete components in a network device or a terminal device.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are performed in whole or in part. The computer may be a general purpose computer, special purpose computer, computer network, network appliance, user equipment, or other programmable device. The computer program or instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer program or instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire or wirelessly. The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that integrates one or more available media. The usable medium may be a magnetic medium, such as a floppy disk, a hard disk, a magnetic tape; optical media such as digital video disks; but may also be a semiconductor medium such as a solid state disk.
In the embodiments of the present application, unless otherwise specified or conflicting with respect to logic, the terms and/or descriptions in different embodiments have consistency and may be mutually cited, and technical features in different embodiments may be combined to form a new embodiment according to their inherent logic relationship.
In this application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. In the text description of the present application, the character "/" generally indicates that the preceding and following associated objects are in an "or" relationship; in the formula of the present application, the character "/" indicates that the preceding and following related objects are in a relationship of "division".
It is to be understood that the various numerical references referred to in the embodiments of the present application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of the present application. The sequence numbers of the above processes do not mean the execution sequence, and the execution sequence of the processes should be determined by the functions and the inherent logic.
Claims (29)
1. A method of data transmission, the method comprising:
the method comprises the steps that h times of shift XOR processing is carried out on k data packets by first communication equipment to obtain h first check data, j times of first check data in the h first check data are data packets obtained by j times of shift XOR processing carried out on the k data packets by the first communication equipment in the h times of shift XOR processing, and the j times of shift XOR processing comprises k times of data packets in the k data packets j Shifting the data packet and k j K obtained by shifting data packet j XOR processing is carried out on the shift data packets, k is j Ith of shift data packet j A shift data packet as said k for said first communication device j Ith in each data packet j The data packet is obtained by shifting the data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \8230h, i j ＝1,2…k j ；
The first communication device adds a packet header to the h pieces of first check data to obtain h pieces of first check packets, wherein a jth first check packet in the h pieces of first check packets is a data packet obtained by adding the packet header to a jth first check data in the h pieces of first check data;
the first communication device transmits the h first check packets.
2. The method according to claim 1, wherein a header of the jth first parity data includes first parity data type indication information, and the first parity data type indication information is used to indicate that the jth first parity data is a parity packet obtained by shifting and performing xor processing.
3. The method of claim 1 or 2The method of (1), wherein a packet header of the jth first check data includes first coding coefficient indication information, and the first coding coefficient indication information is used for indicating the k j The amount of shift data for each of the data packets.
4. The method according to any one of claims 1 to 3, further comprising:
the first communication device encodes the k data packets and the h first check data by using a first code to obtain s second check data, wherein s is a positive integer, and the first code comprises a fountain code or a random linear network code;
the first communication device adds a packet header to the s second check data to obtain s second check packets, wherein a u-th second check packet in the s second check packets is a data packet obtained by adding the packet header to the u-th second check data in the s second check data, and u =1,2 \8230s;
the first communication device sends the s second check packets to the second communication device.
5. The method of any of claims 1 to 3, wherein prior to the first communication device shifting XOR-ing k packets h times, the method further comprises:
the first communication device encodes g data packets by using a second code to obtain the k data packets, wherein the second code comprises a Low Density Parity Check (LDPC) code or a maximum distance separable MDS code, and g is a positive integer.
6. A method of data transmission, comprising:
the second communication equipment obtains N data packets to be decoded;
the second communication equipment decodes the N data packets to be decoded to obtain k first data packets;
the N data packets to be decoded include H first check packets, the H first check packets are check packets in H first check packets, a jth first check packet in the H first check packets is a data packet obtained by adding a packet header to a jth first check data in the H first check data, N is greater than or equal to H, and the H first check data and the k first data packets satisfy the following relation:
the h first check data comprise check data obtained by carrying out h times of shift XOR processing on the k first data packets, the jth first check data in the h first check data are data packets obtained by carrying out jth time of shift XOR processing on the k first data packets, and the jth time of shift XOR processing comprises processing k first data packets in the k first data packets j The first data packet is shifted and k is j K obtained by shifting first data packet j XOR processing is carried out on the shift data packets, k is j Ith of shift data packet j A shift number packet as to k j Ith in first data packet j A data packet obtained by shifting the first data packet, k is an integer greater than 1, k is j Is a positive integer less than or equal to k, h is a positive integer, j =1,2 \ 8230h, i j ＝1,2…k j H is less than or equal to H, and H is a positive integer.
7. The method according to claim 6, wherein a packet header of the jth first check data includes first check data type indication information, and the first check data type indication information is used to indicate that the jth first check data is a check packet obtained through shift and xor processing.
8. The method according to claim 6 or 7, wherein a first coding coefficient indication information is included in the packet header of the jth first check data, and the first coding coefficient indication information is used to indicate the k j The amount of shift data for each of the first data packets.
9. The method according to any one of claims 6 to 8, wherein the N data packets to be decoded further include S second parity packets, the S second parity packets are from S second parity packets, a u-th one of the S second parity packets is a data packet obtained by adding a header to a u-th one of the S second parity data, u =1,2 \8230s, and S, and the S second parity data and the k first data packets and the h first parity data satisfy the following relationships:
each of the S second parity data is parity data obtained by encoding the k first data packets and the h first parity data using a first code, S is a positive integer, the first code includes a fountain code or a random linear network code, and S is a positive integer less than or equal to S.
10. The method according to any one of claims 6 to 8, further comprising:
and the second communication equipment decodes the k first data packets by using a second code to obtain g second data packets, wherein the second code comprises a Low Density Parity Check (LDPC) code or a maximum distance separable MDS code, and g is a positive integer not greater than k.
11. The method according to any one of claims 1 to 10, wherein the h first check data and the k data packets satisfy the following relationship:
wherein, the matrix
H column and matrix in
Corresponds to column F in the matrix G 1 J column of (a) contains k-k j A zero element andthe matrix G 2 K in the corresponding column of j F is a positive integer less than or equal to h;
y j represents the jth first parity data, x, of the h first parity data i Represents the ith packet of the k packets,
i＝1,2…k，
it is indicated that the exclusive or process is performed,
is to represent
Multiplied element shift t i,j A data unit.
12. The method of claim 11, wherein k is j ＝k。
13. The method of claim 11, wherein k is k j ＜k。
14. The method of claim 13, wherein the matrix G is a matrix of pixels 1 J column of (1) includes k j A non-zero element comprising said matrix G 2 V of k elements in the corresponding column of (1) j An element, said v j T of individual element i,j Is less than or equal to the value of said k elements divided by said v j T of an element other than the element i,j Value of v j ≤k j 。
15. Method according to claim 13 or 14, characterized in that said matrix G 1 Position of non-zero element and generation of k rows and h columns used in encoding using third codeThe positions of the non-zero elements in the matrix are the same, and the third code comprises a fountain code or a random linear network code.
16. The method according to any one of claims 11 to 15, wherein the matrix G 2 The non-zero elements in each column are different.
17. The method according to any one of claims 11 to 16,
0＜i 1 ＜i 2 ≤k，0＜j 1 ＜j 2 ≤h。
18. the method of claim 17, wherein t is i,j ＝(i-1)(j-1)。
19. The method according to any one of claims 11 to 15, wherein the matrix G 2 M columns in (1) and matrix G 3 M columns in the matrix G, one-to-one correspondence 2 Comprises the matrix G 3 K elements in corresponding columns of (1), the matrix G 3 Is composed of
c＝1,2…K，d＝1,2…R，k≤K，M≤h，h≤R，m＝1,2…M；
Wherein, t c,d ＝t' c,d -t d ，
In (1)
Constructing a Cauchy matrix based on a set alpha and a set beta for using a primitive representation method over a finite field
Element (1) of
Is shown to be obtained, t d Is t 1,d To t K,d The minimum of the K values; element α in the set α c And an element β of said set β d Belonging to the Galois field GF (q) p ) Q is a prime number, p is greater than or equal to 1, any two elements in the set alpha are not equal, and any two elements in the set beta are not equal.
20. The method of claim 19, wherein K = K and M = h = R.
21. The method of claim 19, wherein K = K, M = h-1= r.
22. The method of claim 21, wherein the matrix G is a matrix of n 2 One column other than the M columns includes k first elements, the first element being "z 0 ”。
23. The method of any one of claims 19 to 22, wherein q =2.
24. The method according to any one of claims 11 to 15, wherein the matrix G 2 Matrix G comprising k x k dimensions 21 H in the matrix, k is more than or equal to h, and the matrix G 21 Is the e-th element in the first row of
e＝1,2…k，G 21 K elements in the X-th row of (1) and G 21 K elements in line 1 of (a) satisfy: g 21 Is the matrix G 21 Of the first line of (a) k elements are cyclically shifted to the rightX-1 element, X is an integer less than or equal to k, and X is greater than or equal to 2.
25. The method of claim 24, wherein h is the matrix G 21 The first h column of (c).
26. A data transmission apparatus comprising functional modules for implementing a data transmission method as claimed in any one of claims 1 to 25.
27. A data transmission apparatus, comprising: a memory and a processor;
the memory is to store program instructions;
the processor is configured to execute program instructions in the memory to implement the data transmission method of any one of claims 1 to 25.
28. A computer-readable medium, characterized in that the computer-readable medium stores program code for computer execution, the program code comprising instructions for implementing the data transmission method according to any one of claims 1 to 25.
29. A computer program product, characterized in that it contains instructions for implementing a data transmission method according to any one of claims 1 to 25.
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| CN202110715047.6A CN115529108A (en) | 2021-06-25 | 2021-06-25 | Data transmission method and related device |
| PCT/CN2022/100069 WO2022268064A1 (en) | 2021-06-25 | 2022-06-21 | Data transmission method and related apparatus |
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