CN115512634B - Pixel display driving circuit, driving method and display panel - Google Patents
Pixel display driving circuit, driving method and display panel Download PDFInfo
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- CN115512634B CN115512634B CN202211107322.7A CN202211107322A CN115512634B CN 115512634 B CN115512634 B CN 115512634B CN 202211107322 A CN202211107322 A CN 202211107322A CN 115512634 B CN115512634 B CN 115512634B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/28—Modifications for introducing a time delay before switching
- H03K17/284—Modifications for introducing a time delay before switching in field effect transistor switches
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The application provides a driving circuit and a driving method for pixel display and a display panel. The driving circuit comprises a power supply module and a time sequence control end, wherein the power supply module is connected with the time sequence control end, and the driving circuit further comprises: the delay module is connected with the power supply module and comprises at least one delay sub-circuit, and a control end of the delay sub-circuit responds to a control signal of the time sequence control end to change the power supply duration of a voltage output end of the power supply module. The technical scheme of the application can ensure the stable output of gamma gray scale voltage and reduce the abnormal condition of the whole display picture.
Description
Technical Field
The present disclosure relates to the field of display driving technologies, and in particular, to a driving circuit, a driving method, and a display panel for displaying pixels.
Background
In the display panel, the display screens with different refresh rates show a large difference, and in the process of refreshing each frame, the voltage is switched between a light load and a heavy load at the beginning end and the end of each frame. Due to the existence of the inductor, the voltage loading is delayed, the voltage is continuously increased in light load, and the voltage is continuously reduced in heavy load, so that jump voltage can occur at the beginning end and the ending end of each frame, and the voltage is formed to be up-rushed and down-rushed. The voltage undershoot affects the Gamma (Gamma) gray level voltage level of the display, thereby affecting the gray level voltage output and causing the whole display picture to be abnormal.
Disclosure of Invention
An object of the present invention is to provide a driving circuit, a driving method and a display panel for displaying pixels, which can ensure stable output of gamma gray scale voltage and reduce abnormal situations of the whole display picture.
According to an aspect of the present application, there is provided a driving circuit for a pixel display, the driving circuit including a power supply module and a timing control terminal, the power supply module being connected to the timing control terminal, the driving circuit further including:
the delay module is connected with the power supply module and comprises at least one delay sub-circuit, and a control end of the delay sub-circuit responds to a control signal of the time sequence control end to change the power supply duration of a voltage output end of the power supply module.
In one aspect, the delay module includes a first delay subcircuit and a second delay subcircuit, the control signal including a first control signal and a second control signal, the second delay subcircuit having a response delay greater than the response delay of the first delay subcircuit;
the control end of the first delay sub-circuit is connected with the time sequence control end, and the control end of the first delay sub-circuit responds to the first control signal so that the first delay sub-circuit is communicated with the power supply module;
the control end of the second delay sub-circuit is connected with the time sequence control end, and the control end of the second delay sub-circuit responds to the second control signal so that the second delay sub-circuit is communicated with the power supply module.
In one aspect, the first delay sub-circuit includes a first response switch, a control end of the first response switch is a control end of the first delay sub-circuit, a first end of the first response switch is connected with the power supply module, a second end of the first response switch is grounded, the control end of the first response switch responds to the first control signal, and the first end and the second end of the first response switch are conducted;
the second delay sub-circuit comprises a second response switch, the control end of the second response switch is the control end of the second delay sub-circuit, the first end of the second response switch is connected with the power supply module, the second end of the second response switch is grounded, the control end of the second response switch responds to the second control signal, and the first end and the second end of the second response switch are conducted.
In one aspect, the delay module includes an energy dissipation element, one end of the energy dissipation element is connected to the power supply module, and the other end of the energy dissipation element is connected to the first delay sub-circuit and the second delay sub-circuit respectively.
In one aspect, the energy dissipation element is a pre-resistor, the first delay sub-circuit further comprises a first capacitor, the second delay sub-circuit comprises a second capacitor, the first capacitor is connected in series with the first response switch, and the second capacitor is connected in series with the second response switch, wherein the capacitance value of the first capacitor is larger than that of the second capacitor;
or the energy dissipation element is a pre-capacitor, the first delay sub-circuit further comprises a first resistor, the second delay sub-circuit comprises a second resistor, the first resistor is connected with the first response switch in series, and the second resistor is connected with the second response switch in series, wherein the resistance value of the first resistor is larger than that of the second resistor.
In one aspect, the power supply module further includes a sampling control unit and a compensation feedback end, the sampling control unit is connected with the compensation feedback end, the compensation feedback end is provided with the energy consumption element, and the sampling control unit is used for controlling the power supply duration of the voltage output end of the power supply module according to the electric signal of the compensation feedback end.
In one aspect, the delay module further includes a third delay sub-circuit, the response delay of the third delay sub-circuit is greater than the response delay of the second delay sub-circuit, the control signal further includes a third control signal, and the control terminal of the third delay sub-circuit responds to the third control signal, so that the third delay sub-circuit is communicated with the power supply module;
the timing control end outputs the control signal, and at least one of the first delay sub-circuit, the second delay sub-circuit and the third delay sub-circuit is communicated with the power supply module.
In addition, in order to solve the above problems, the present application further provides a driving method of a pixel display, where the driving method is applied to a driving circuit of the pixel display, the driving circuit of the pixel display includes a power supply module, a timing control end and a delay module, the power supply module is connected to the timing control end, the delay module includes at least one delay sub-circuit, and a control end of the delay sub-circuit is connected to the timing control end;
the driving method includes:
acquiring a refresh rate of pixel display, and generating a control signal according to the refresh rate;
transmitting the control signal to a control end of the delay sub-circuit;
the time delay sub-circuit is in response to the control signal of the time sequence control end, and is communicated with the power supply module to change the power supply duration of the voltage output end of the power supply module.
In one aspect, the delay module comprises a first delay sub-circuit and a second delay sub-circuit, the control signal comprises a first control signal and a second control signal, the response delay of the second delay sub-circuit is larger than that of the first delay sub-circuit, the control end of the first delay sub-circuit is connected with the time sequence control end, and the control end of the second delay sub-circuit is connected with the time sequence control end;
the step of obtaining the refresh rate of the pixel display and generating a control signal according to the refresh rate comprises the following steps:
comparing the refresh rate with a first refresh threshold, generating the first control signal when the refresh rate is less than the first refresh threshold, and generating the second control signal when the refresh rate is greater than or equal to the first refresh threshold;
the step that the said time delay subcircuit responds to control signal of the said time sequence control end, the said time delay subcircuit connects the said power supply module, including:
the control end of the first delay sub-circuit responds to the first control signal so that the first delay sub-circuit is communicated with the power supply module;
and the control end of the second delay sub-circuit responds to the second control signal so that the second delay sub-circuit is communicated with the power supply module.
In addition, in order to solve the above problem, the present application further provides a display panel, where the display panel includes a load circuit and a driving circuit for displaying pixels as described above, and a voltage output terminal of the power supply module is connected to the load circuit.
In the technical scheme of the application, the delay module is arranged in the driving circuit, and can delay the time for the power supply module to supply or terminate the power, so that the power supply duration of the voltage output end of the power supply module is changed. When the power supply module is required to output power faster or stop power faster, the delay of the delay module is reduced, so that the voltage output end of the power supply module can timely output power or stop power in time. When the power supply module is required to delay outputting power or stopping power, the delay of the delay module is increased, so that the voltage output end of the power supply module can slowly output power or slowly stop power.
According to the technical scheme, the delay function of the delay module is added between the display switching of each frame, so that the voltage output end of the power supply module outputs electric power slowly, and when the display time of the next frame arrives, the power supply module still outputs electric power continuously. Therefore, the power of the voltage output end of the power supply module is not cut off, and then the voltage is not switched between light load and heavy load, and the voltage cannot be subjected to the overshoot and undershoot. The stable output of gamma gray scale voltage is ensured, and the abnormal condition of the whole display picture is reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The above and other objects, features and advantages of the present application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
Fig. 1 is a schematic diagram of a driving circuit of a pixel display in a first embodiment in the present application.
Fig. 2 is a flow chart of a driving method of a pixel display according to a second embodiment of the present application.
Fig. 3 is a detailed flowchart of step S10 and step S20 of the driving method of the pixel display in fig. 2 of the present application.
Fig. 4 is a schematic structural diagram of circuit connection of a display panel in a third embodiment of the present application.
The reference numerals are explained as follows:
10. a power supply module; 20. a timing control terminal; 30. a delay module; 40. a load circuit;
110. a voltage output terminal; 120. a control unit; COMP, compensation feedback end; q1, a first response switch; q2, a second responsive switch; q3, a third response switch; r0 and a front resistor; c1, a first capacitor; c2, a second capacitor; c3, a third capacitor; c0, a front-end capacitor; r1, a first resistor; r2, a second resistor; r3, a third resistor; 310. a first delay sub-circuit; 320. a second delay sub-circuit; 330. a third delay sub-circuit; 410. a power conversion unit; 420. a logic driving unit; 430. a feedback compensation unit; 440. a voltage sampling unit; 450. and a load unit.
Detailed Description
While this application is susceptible of embodiment in different forms, there is shown in the drawings and will herein be described in detail, specific embodiments thereof with the understanding that the present disclosure is to be considered as an exemplification of the principles of the application and is not intended to limit the application to that as illustrated herein.
Thus, reference to one feature indicated in this specification will be used to describe one of the features of an embodiment of the application, and not to imply that each embodiment of the application must have the described feature. Furthermore, it should be noted that the present specification describes a number of features. Although certain features may be combined together to illustrate a possible system design, such features may be used in other combinations not explicitly described. Thus, unless otherwise indicated, the illustrated combinations are not intended to be limiting.
In the embodiments shown in the drawings, indications of orientation (such as up, down, left, right, front and rear) are used to explain the structure and movement of the various elements of the present application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the position of these elements changes, the indication of these directions changes accordingly.
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The drawings are merely schematic illustrations of the present application and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus a repetitive description thereof will be omitted.
Preferred embodiments of the present application are further elaborated below in conjunction with the drawings of the present specification.
Example 1
Referring to fig. 1, the present application provides a driving circuit for displaying pixels, the driving circuit includes a power supply module 10 and a timing control terminal Tcon (Timmingcontrol), the power supply module 10 is connected to the timing control terminal 20, the timing control terminal 20 is used for generating a control signal, and transmitting the control signal to the power supply module 10. The power supply module 10 is used to supply power to a load. The driving circuit further includes: the delay module 30, the delay module 30 has a delay function, and the delay module 30 can delay the feedback time of the electric signal, so that the power supply module 10 is basically maintained in the original working state.
Specifically, the delay module 30 is connected to the power supply module 10, and the delay module 30 includes at least one delay sub-circuit, where a control terminal of the delay sub-circuit is responsive to a control signal of the timing control terminal 20 to change a power supply duration of the voltage output terminal 110 of the power supply module 10.
It should be noted that, the power supply module 10 is internally provided with a threshold voltage, and the power supply module 10 starts to supply power or is powered off when the threshold voltage is reached. In the phase of starting power supply, the voltage is raised from zero, and the time for the power supply module 10 to reach the threshold voltage can be delayed by the delay action of the delay sub-circuit.
Similarly, when the power supply module 10 is already powered, the voltage starts to be reduced, and the time for the voltage output terminal 110 of the power supply module 10 to reach the threshold voltage can be delayed by the delay sub-circuit, so that the power supply module 10 is prevented from being powered off, which is equivalent to increasing the power supply duration. The scheme also utilizes the delay function of the delay subcircuit to increase the power supply time length.
The delay sub-circuit may be configured to have a storage function, and store the power of the power supply module 10 in the delay sub-circuit. The delay sub-circuit may have a power consumption function, consume a part of power, or may be a combination of both a storage function and a power consumption function. This will act as a delay for delay module 30.
In the technical solution of this embodiment, the delay module 30 is disposed in the driving circuit, where the delay module 30 can delay the time for the power supply module 10 to supply or terminate the power, so as to change the power supply duration of the voltage output end 110 of the power supply module 10. When the power supply module 10 needs to output power faster or stop power faster, the delay of the delay module 30 is reduced, so that the voltage output terminal 110 of the power supply module 10 can output power timely or stop power timely. When the power supply module 10 is required to delay outputting power or terminating power, the delay of the delay module 30 is increased, so that the voltage output terminal 110 of the power supply module 10 can slowly output power or slowly terminate power.
According to the technical scheme, the delay function of the delay module 30 is increased between each frame of display switching, so that the voltage output end 110 of the power supply module 10 slowly outputs power, and when the display time of the next frame arrives, the power supply module 10 still outputs power continuously. In this way, the power of the voltage output terminal 110 of the power supply module 10 is not terminated, and thus no voltage is switched between light load and heavy load, and no voltage overshoot or undershoot occurs. The stable output of gamma gray scale voltage is ensured, and the abnormal condition of the whole display picture is reduced.
In the process of picture display, the multi-frame display picture is continuously refreshed. Thus, different display panels have different refresh rates. Some refresh rates are higher, so that the Blanking interval (Blanking interval) between each frame of picture is shorter, so that the delay module 30 is required to have a stronger delay function, while the refresh rate is lower, and the delay module 30 is also required to have a response delay function. To this end, the delay module 30 includes a first delay sub-circuit 310 and a second delay sub-circuit 320, the control signal includes a first control signal and a second control signal, and the response delay of the second delay sub-circuit 320 is greater than the response delay of the first delay sub-circuit 310; that is, the delay capability of the second delay sub-circuit 320 is greater than the delay capability of the first delay sub-circuit 310.
The control end of the first delay sub-circuit 310 is connected with the time sequence control end 20, and the control end of the first delay sub-circuit 310 responds to the first control signal so that the first delay sub-circuit 310 is communicated with the power supply module 10; the first delay sub-circuit 310 may be directly responsive to the first control signal or may be indirectly responsive to the first control signal.
For example, the control terminal of the first delay sub-circuit 310 is directly connected to the timing control terminal 20, so that the first control signal can be directly transmitted to the first delay sub-circuit 310. Alternatively, the first delay sub-circuit 310 is connected to the timing control end 20 through the power supply module 10, so that the first control signal is transmitted to the power supply module 10, the power supply module 10 generates a corresponding first start command according to the first control signal, the first start command is transmitted to the first delay sub-circuit 310, and after the control end of the first delay sub-circuit 310 receives the first start command, the first delay sub-circuit 310 is connected to the power supply module 10.
The control terminal of the second delay sub-circuit 320 is connected to the timing control terminal 20, and the control terminal of the second delay sub-circuit 320 is responsive to the second control signal, so that the second delay sub-circuit 320 is connected to the power supply module 10.
Likewise, the second delay sub-circuit 320 may be directly responsive to the second control signal or may be indirectly responsive to the second control signal. For example, the control terminal of the second delay sub-circuit 320 is directly connected to the timing control terminal 20, so that the second control signal can be directly transmitted to the second delay sub-circuit 320. Alternatively, the second delay sub-circuit 320 is connected to the timing control end 20 through the power supply module 10, so that the second control signal is transmitted to the power supply module 10, the power supply module 10 generates a corresponding second start command according to the second control signal, the second start command is transmitted to the second delay sub-circuit 320, and after the control end of the second delay sub-circuit 320 receives the second start command, the second delay sub-circuit 320 is communicated with the power supply module 10.
It should be further noted that, one of the first delay sub-circuit 310 and the second delay sub-circuit 320 may be connected to the power supply module 10, or the first delay sub-circuit 310 and the second delay sub-circuit 320 may be simultaneously connected to the power supply module 10, so that the delay effect of the delay module 30 may be further improved.
In order to make the first delay sub-circuit 310 and the second delay sub-circuit 320 operate more effectively, the first delay sub-circuit 310 includes a first response switch Q1, a control terminal of the first response switch Q1 is a control terminal of the first delay sub-circuit 310, a first terminal of the first response switch Q1 is connected to the power supply module 10, a second terminal is grounded, the control terminal of the first response switch Q1 is responsive to a first control signal, and the first terminal and the second terminal of the first response switch Q1 are turned on; the first delay sub-circuit 310 is controlled to intervene in the delay operation by the conduction of the first response switch Q1.
The second delay sub-circuit 320 includes a second response switch Q2, a control end of the second response switch Q2 is a control end of the second delay sub-circuit 320, a first end of the second response switch Q2 is connected to the power supply module 10, a second end of the second response switch Q2 is grounded, the control end of the second response switch Q2 responds to the second control signal, and the first end and the second end of the second response switch Q2 are turned on. The second delay sub-circuit 320 is controlled to intervene in the delay operation by the conduction of the second response switch Q2. The first terminal of the responsive switch is typically referred to as the source, the second terminal as the drain, and the control terminal as the gate.
In general, the first response switch Q1 and the second response switch Q2 have the same specification and model, for example, the first response switch Q1 is an N-type field effect transistor, and the second response switch Q2 is also an N-type field effect transistor. Alternatively, the first response switch Q1 and the second response switch Q2 are P-type field effect transistors. The field effect transistor (Field Effect Transistor, FET) is simply referred to as a field effect transistor.
In order to more effectively play the role of delay module 30, delay module 30 includes an energy-consuming element, one end of which is connected to power supply module 10, and the other end of which is connected to first delay sub-circuit 310 and second delay sub-circuit 320, respectively. The energy dissipation element can effectively consume the power provided by the power supply module 10, so that the output voltage of the power supply module 10 can be delayed to reach the threshold voltage, and the time delay effect can be further exerted.
Further, the energy dissipation element is a pre-resistor R0, one end of the pre-resistor R0 is connected with the power supply module 10, and the other end of the pre-resistor R0 is respectively connected with the first delay sub-circuit 310 and the second delay sub-circuit 320; the first delay sub-circuit 310 includes a first capacitor C1, the second delay sub-circuit 320 includes a second capacitor C2, the first capacitor C1 is connected in series with the first response switch Q1, and the second capacitor C2 is connected in series with the second response switch Q2, where a capacitance value of the first capacitor C1 is greater than a capacitance value of the second capacitor C2.
Thus, the voltage flowing to the first delay sub-circuit 310 and the voltage flowing to the second delay sub-circuit 320 both pass through the pre-resistor R0.
After the first end and the second end of the first response switch Q1 are turned on, the first capacitor C1 and the pre-resistor R0 in the first delay sub-circuit 310 form a resistor Rong Yanshi circuit, where t=2pi/(RC), R represents the resistance of the pre-resistor R0, and C represents the capacitance of the first capacitor C1 according to the formula. t represents the delay time, and it is seen that the delay time t has an inverse relationship with the product of resistance and capacitance. Because of the longer interval between each frame at the lower refresh rate, the voltage output of the power supply module is required to provide the voltage faster in order to reduce the voltage from being too high or undershot, i.e., the first delay sub-circuit 310 needs to respond faster. The waveform amplitude of the overshoot or undershoot of the voltage waveform is reduced. In this manner, the first delay sub-circuit 310 is able to accommodate the lower refresh rate requirements.
Note that, the first capacitor C1 may be disposed at the first end of the first response switch Q1, or may be disposed at the second end of the first response switch Q1. The second capacitor C2 may be disposed at the first end of the second response switch Q2, or may be disposed at the second end of the second response switch Q2.
In addition, the resistor Rong Yanshi capacitor includes another embodiment. Specifically, the energy dissipation element is a pre-capacitor C0, one end of the pre-capacitor C0 is connected to the power supply module 10, and the other end of the pre-capacitor C0 is connected to the first delay sub-circuit 310 and the second delay sub-circuit 320 respectively.
The first delay sub-circuit 310 includes a first resistor R1, the second delay sub-circuit 320 includes a second resistor R2, the first resistor R1 is connected in series with the first response switch Q1, and the second resistor R2 is connected in series with the second response switch Q2, where the resistance value of the first resistor R1 is greater than the resistance value of the second resistor R2.
It should be noted that, the product of the pre-resistor R0 and the first capacitor C1 is larger than the product of the pre-resistor R0 and the second capacitor C2, or the product of the pre-resistor C0 and the first resistor R1 is larger than the product of the pre-resistor C0 and the second resistor R2, and according to the formula t=2pi/(RC), the larger the product of the denominator RC, the smaller t is, so that the delay capability of the second delay sub-circuit is larger than the delay capability of the first delay sub-circuit.
After the first end and the second end of the second response switch Q2 are turned on, the second capacitor C2 and the pre-resistor R0 in the second delay sub-circuit 320 form a resistor Rong Yanshi circuit, where t=2pi/(RC), R represents the resistance of the pre-resistor R0, and C represents the capacitance of the second capacitor C2. t represents the delay time, and it is seen that the delay time t has an inverse relationship with the product of resistance and capacitance. The second delay sub-circuit 320 has a longer delay time capability to accommodate the higher refresh rate requirements while also efficiently accommodating the high refresh rate while delaying time.
Note that, the first resistor R1 may be disposed at the first end of the first response switch Q1, or may be disposed at the second end of the first response switch Q1. The second resistor R2 may be disposed at the first end of the second response switch Q2, or may be disposed at the second end of the second response switch Q2.
In one aspect, the power supply module 10 includes a sampling control unit 120 and a compensation feedback end COMP, the sampling control unit 120 is connected with the compensation feedback end COMP, the compensation feedback end COMP is provided with an energy consumption element, and the sampling control unit 120 is used for controlling the power supply duration of the voltage output end 110 of the power supply module 10 according to the electric signal of the compensation feedback end COMP; specifically, the sampling control unit 120 collects a voltage signal through the compensation feedback terminal COMP, the sampling control unit 120 stores a threshold voltage, compares the collected voltage signal with the threshold voltage, controls the voltage output terminal 110 to stop supplying power if the voltage signal is less than the threshold voltage, and controls the voltage output terminal 110 to continuously supply power if the voltage signal is equal to or greater than the threshold voltage. When the energy dissipation element is a prepositive resistor R0, one end of the prepositive resistor R0 is connected with a compensation feedback end COMP; when the energy dissipation element is a pre-capacitor C0, one end of the pre-capacitor C0 is connected to the compensation feedback end COMP.
To further extend the delay capability of delay module 30, it is enabled to accommodate more refresh frequencies. The delay module 30 further includes a third delay sub-circuit 330, the response delay of the third delay sub-circuit 330 is greater than the response delay of the second delay sub-circuit 320, the control signal further includes a third control signal, and the control terminal of the third delay sub-circuit 330 responds to the third control signal, so that the third delay sub-circuit 330 is connected to the power supply module 10; the third delay sub-circuit 330 includes a third response switch Q3, the control signal includes a third control signal, the control terminal of the third response switch Q3 is responsive to the third control signal, the first terminal and the second terminal of the third response switch Q3 are turned on, and the third delay sub-circuit 330 is in communication with the power supply module 10. The third delay sub-circuit 330 further includes a third resistor R3 or a third capacitor C3, where a resistance value of the third resistor R3 is smaller than the second resistor R2, and a capacitance value of the third capacitor C3 is smaller than the second capacitor C2. In this way, the third delay sub-circuit 330 is guaranteed to have a longer delay capability than the second delay sub-circuit 320.
Wherein the timing control terminal 20 outputs a control signal, and at least one of the first delay sub-circuit 310, the second delay sub-circuit 320, and the third delay sub-circuit 330 is connected to the power supply module 10. The delay capabilities of the first delay sub-circuit 310, the second delay sub-circuit 320, and the third delay sub-circuit 330 are respectively different.
List one
Referring to table one, the first response switch Q1, the second response switch Q2 and the second response switch Q2 are adapted to different refresh rates, and the first response switch Q1, the second response switch Q2 and the second response switch Q2 can be controlled to be turned on in a two-to-two combination manner by different on instructions, so as to adapt to a higher refresh rate, and even the first response switch Q1, the second response switch Q2 and the second response switch Q2 are turned on, so as to further adapt to the higher refresh rate. Of course, the number of the response switches is not limited to three, and can be more than three, so that different refresh rates can be further divided to adapt to the continuously improved refresh rate of the display panel.
Example two
Referring to fig. 2, the present application further provides a driving method of a pixel display, where the driving method is applied to a driving circuit of the pixel display, the driving circuit of the pixel display includes a power supply module 10, a timing control end 20 and a delay module 30, the power supply module 10 is connected to the timing control end 20, the delay module 30 includes at least one delay sub-circuit, and a control end of the delay sub-circuit is connected to the timing control end 20;
the driving method comprises the following steps:
step S10, obtaining a refresh rate of pixel display, and generating a control signal according to the refresh rate; different control signals are generated for different refresh rates.
Step S20, transmitting a control signal to a control end of the delay sub-circuit; the delay sub-circuit is connected to the power supply module 10 in response to the control signal of the timing control terminal 20, so as to change the power supply duration of the voltage output terminal 110 of the power supply module 10.
According to the technical scheme of the embodiment, the delay function of the delay module 30 is added between each frame display switching, so that the voltage output end 110 of the power supply module 10 outputs electric power slowly, and when the next frame display time comes, the power supply module 10 still outputs electric power continuously. In this way, the power of the voltage output terminal 110 of the power supply module 10 is not terminated, and thus no voltage is switched between light load and heavy load, and no voltage overshoot or undershoot occurs. The stable output of gamma gray scale voltage is ensured, and the abnormal condition of the whole display picture is reduced.
Further, referring to fig. 3 and table one, the delay module 30 includes a first delay sub-circuit 310 and a second delay sub-circuit 320, the control signal includes a first control signal and a second control signal, the response delay of the second delay sub-circuit 320 is greater than the response delay of the first delay sub-circuit 310, the control end of the first delay sub-circuit 310 is connected to the timing control end 20, and the control end of the second delay sub-circuit 320 is connected to the timing control end 20;
the step of obtaining the refresh rate of the pixel display and generating a control signal according to the refresh rate comprises the following steps:
step S110, comparing the refresh rate with a first refresh threshold, generating a first control signal when the refresh rate is smaller than the first refresh threshold, and generating a second control signal when the refresh rate is greater than or equal to the first refresh threshold; the first refresh threshold is 60Hz.
The step of the delay sub-circuit responding to the control signal of the time sequence control terminal 20, the delay sub-circuit being connected with the power supply module 10 comprises the following steps:
step S210, the control terminal of the first delay sub-circuit 310 responds to the first control signal, so that the first delay sub-circuit 310 is connected to the power supply module 10; specifically, the first delay sub-circuit 310 includes a first response switch Q1, the first terminal and the second terminal of the first response switch Q1 are turned on, and the first delay sub-circuit 310 performs a delay function.
In step S220, the control terminal of the second delay sub-circuit 320 is responsive to the second control signal, so that the second delay sub-circuit 320 is connected to the power supply module 10. Thus, the first delay sub-circuit 310 accommodates refresh rates below 60Hz and the second delay sub-circuit 320 accommodates refresh rates greater than or equal to 60Hz.
Further, refresh rates above 60Hz may be further subdivided, and the second delay sub-circuit 320 is adapted to 60 Hz.ltoreq.F < 75Hz, with the corresponding second responsive switch Q2 being turned on. The delay module 30 further includes a third delay sub-circuit 330, the control terminal of the third delay sub-circuit 330 is responsive to the third control signal, and the third delay sub-circuit 330 is in communication with the power supply module 10. The third delay sub-circuit 330 is adapted to 75Hz < F < 90Hz, and the third response switch Q3 of the corresponding third delay sub-circuit 330 is turned on. The first delay subcircuit 310 and the second delay subcircuit 320 are combined to accommodate refresh rates of 90Hz < F < 120 Hz. The first delay subcircuit 310 and the third delay subcircuit 330 are combined to accommodate refresh rates of 120Hz < F < 144 Hz. The second delay subcircuit 320 and the third delay subcircuit 330 combine to accommodate refresh rates of 144Hz < F < 240 Hz. The first delay subcircuit 310, the second delay subcircuit 320, and the third delay subcircuit 330 are jointly adapted to a refresh rate F+.gtoreq.240 Hz.
Example III
Referring to fig. 4, the present application further provides a display panel, where the display panel includes a load circuit 40 and a driving circuit as shown in the above pixels, and the voltage output terminal 110 of the power supply module 10 is connected to the load circuit 40. The load circuit 40 includes a power conversion unit 410, a logic driving unit 420, a feedback compensation unit 430, a voltage sampling unit 440, and a load unit 450, and a voltage input terminal VIN and a voltage output terminal VOUT. The power conversion unit 410 is connected to the voltage input terminal VIN and the voltage output terminal VOUT, the load unit 450 is connected to the voltage output terminal VOUT, and the voltage sampling unit 440 is connected to a line between the load unit 450 and the power conversion unit 410. The voltage sampling unit 440 is connected to the feedback compensation unit 430, and transmits the collected signal to the feedback compensation unit 430, and the feedback compensation unit 430 generates a feedback signal according to the collected signal. The feedback compensation unit 430 is connected to the logic driving unit 420, and the logic driving unit 420 is connected to the power conversion unit 410. The logic driving unit 420 is configured to control the power conversion unit 410 to switch the operation mode between the high power and the low power according to the feedback signal of the feedback compensation unit 430. The voltage output terminal VOUT of the load circuit 40 is connected to the voltage output terminal 110 of the power supply module 10.
The power conversion unit 410 is provided with an inductor, when the load reaches a light load, namely a Blanking interval, the output duty ratio of the inductor current is slowly reduced, when the load enters a heavy load again, the duty ratio still keeps a certain value, at the moment, the load is pumped, the output duty ratio of the inductor current is slowly increased again until the output reaches a preset voltage value, at the moment, because the inductor current continuously has output, when the load is pumped, enough energy is still supplied, and therefore, the undershoot phenomenon cannot occur. I.e. by means of the delay module 30, the inductor current is always guaranteed to have an output.
The driving circuit comprises a power supply module 10 and a time sequence control end 20, wherein the power supply module 10 is connected with the time sequence control end 20, and the time sequence control end 20 is used for generating a control signal and transmitting the control signal to the power supply module 10. The power supply module 10 is used to supply power to a load. The driving circuit further includes: the delay module 30, the delay module 30 has a delay function, and the delay module 30 can delay the feedback time of the electric signal, so that the power supply module 10 is basically maintained in the original working state.
Specifically, the delay module 30 is connected to the power supply module 10, and the delay module 30 includes at least one delay sub-circuit, where a control terminal of the delay sub-circuit is responsive to a control signal of the timing control terminal 20 to change a power supply duration of the voltage output terminal 110 of the power supply module 10.
It should be noted that, the power supply module 10 is internally provided with a threshold voltage, and the power supply module 10 starts to supply power or is powered off when the threshold voltage is reached. In the phase of starting power supply, the voltage is raised from zero, and the time for the power supply module 10 to reach the threshold voltage can be delayed by the delay action of the delay sub-circuit.
Similarly, when the power supply module 10 is already powered, the voltage starts to be reduced, and the time for the voltage output terminal 110 of the power supply module 10 to reach the threshold voltage can be delayed by the delay sub-circuit, so that the power supply module 10 is prevented from being powered off, which is equivalent to increasing the power supply duration. The scheme also utilizes the delay function of the delay subcircuit to increase the power supply time length.
The delay sub-circuit may be configured to have a storage function, and store the power of the power supply module 10 in the delay sub-circuit. The delay sub-circuit may have a power consumption function, consume a part of power, or may be a combination of both a storage function and a power consumption function. This will act as a delay for delay module 30.
In the technical solution of this embodiment, the delay action of the delay module 30 is added between each frame display switching, so that the voltage output end 110 of the power supply module 10 outputs the power slowly, and when the display time of the next frame has come, the power supply module 10 still outputs the power continuously. In this way, the power of the voltage output terminal 110 of the power supply module 10 is not terminated, and thus no voltage is switched between light load and heavy load, and no voltage overshoot or undershoot occurs. The stable output of gamma gray scale voltage is ensured, and the abnormal condition of the whole display picture is reduced.
While the present application has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration rather than of limitation. As the present application may be embodied in several forms without departing from the spirit or essential attributes thereof, it should be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the metes and bounds of the claims, or equivalences of such metes and bounds are therefore intended to be embraced by the appended claims.
Claims (8)
1. A driving circuit for displaying pixels, the driving circuit comprising a power supply module and a timing control terminal, the power supply module being connected to the timing control terminal, the driving circuit further comprising:
the delay module is connected with the power supply module and comprises at least one delay subcircuit, and a control end of the delay subcircuit responds to a control signal of the time sequence control end to change the power supply duration of a voltage output end of the power supply module;
the delay module comprises a first delay sub-circuit and a second delay sub-circuit, the control signals comprise a first control signal and a second control signal, and the response delay of the second delay sub-circuit is larger than that of the first delay sub-circuit;
the control end of the first delay sub-circuit is connected with the time sequence control end, and the control end of the first delay sub-circuit responds to the first control signal so that the first delay sub-circuit is communicated with the power supply module;
the control end of the second delay sub-circuit is connected with the time sequence control end, and the control end of the second delay sub-circuit responds to the second control signal so that the second delay sub-circuit is communicated with the power supply module.
2. The driving circuit for displaying pixels according to claim 1, wherein the first delay sub-circuit comprises a first response switch, a control terminal of the first response switch is a control terminal of the first delay sub-circuit, a first terminal of the first response switch is connected to the power supply module, a second terminal of the first response switch is grounded, the control terminal of the first response switch is responsive to the first control signal, and the first terminal and the second terminal of the first response switch are turned on;
the second delay sub-circuit comprises a second response switch, the control end of the second response switch is the control end of the second delay sub-circuit, the first end of the second response switch is connected with the power supply module, the second end of the second response switch is grounded, the control end of the second response switch responds to the second control signal, and the first end and the second end of the second response switch are conducted.
3. The driving circuit for a pixel display according to claim 2, wherein the delay module comprises an energy dissipation element, one end of the energy dissipation element is connected to the power supply module, and the other end of the energy dissipation element is connected to the first delay sub-circuit and the second delay sub-circuit, respectively.
4. A pixel display driving circuit according to claim 3, wherein the energy consuming element is a pre-resistor, the first delay sub-circuit further comprises a first capacitor, the second delay sub-circuit comprises a second capacitor, the first capacitor is connected in series with the first response switch, the second capacitor is connected in series with the second response switch, and wherein a capacitance value of the first capacitor is greater than a capacitance value of the second capacitor;
or the energy dissipation element is a pre-capacitor, the first delay sub-circuit further comprises a first resistor, the second delay sub-circuit comprises a second resistor, the first resistor is connected with the first response switch in series, and the second resistor is connected with the second response switch in series, wherein the resistance value of the first resistor is larger than that of the second resistor.
5. A pixel display driving circuit according to claim 3, wherein the power supply module further comprises a sampling control unit and a compensation feedback end, the sampling control unit is connected with the compensation feedback end, the compensation feedback end is provided with the energy consumption element, and the sampling control unit is used for controlling the power supply duration of the voltage output end of the power supply module according to the electric signal of the compensation feedback end.
6. The driving circuit for a pixel display according to claim 1, wherein the delay module further comprises a third delay sub-circuit, the response delay of the third delay sub-circuit is greater than the response delay of the second delay sub-circuit, the control signal further comprises a third control signal, and the control terminal of the third delay sub-circuit is responsive to the third control signal, so that the third delay sub-circuit is communicated with the power supply module;
the timing control end outputs the control signal, and at least one of the first delay sub-circuit, the second delay sub-circuit and the third delay sub-circuit is communicated with the power supply module.
7. The driving method for the pixel display is characterized in that the driving method is applied to a driving circuit for the pixel display, the driving circuit for the pixel display comprises a power supply module, a time sequence control end and a time delay module, the power supply module is connected with the time sequence control end, the time delay module comprises at least one time delay sub-circuit, and the control end of the time delay sub-circuit is connected with the time sequence control end; the delay module further comprises a first delay sub-circuit and a second delay sub-circuit, the control signals comprise a first control signal and a second control signal, the response delay of the second delay sub-circuit is larger than that of the first delay sub-circuit, the control end of the first delay sub-circuit is connected with the time sequence control end, and the control end of the second delay sub-circuit is connected with the time sequence control end;
the driving method includes:
obtaining a refresh rate of pixel display, and generating a control signal according to the refresh rate, wherein the method further comprises the steps of comparing the refresh rate with a first refresh threshold, generating the first control signal when the refresh rate is smaller than the first refresh threshold, and generating the second control signal when the refresh rate is larger than or equal to the first refresh threshold;
transmitting the control signal to a control end of the delay sub-circuit;
the delay sub-circuit is connected with the power supply module to change the power supply duration of the voltage output end of the power supply module, and the delay sub-circuit also comprises a control end of the first delay sub-circuit is connected with the power supply module in response to the first control signal, and a control end of the second delay sub-circuit is connected with the power supply module in response to the second control signal.
8. A display panel comprising a load circuit and a drive circuit for a pixel display as claimed in any one of claims 1 to 6, the voltage output of the power supply module being connected to the load circuit.
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| CN109727585B (en) * | 2018-12-24 | 2021-07-06 | 惠科股份有限公司 | Display driving assembly and display device |
| CN110335571A (en) * | 2019-06-27 | 2019-10-15 | 惠科股份有限公司 | A kind of driving device, driving method and display panel |
| CN113707066A (en) * | 2021-08-18 | 2021-11-26 | 深圳市华星光电半导体显示技术有限公司 | Power-on delay circuit and display device |
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