CN116543686B - Driving circuit of display panel and driving method thereof - Google Patents
Driving circuit of display panel and driving method thereof Download PDFInfo
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- CN116543686B CN116543686B CN202310708514.1A CN202310708514A CN116543686B CN 116543686 B CN116543686 B CN 116543686B CN 202310708514 A CN202310708514 A CN 202310708514A CN 116543686 B CN116543686 B CN 116543686B
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- 238000000034 method Methods 0.000 title claims abstract description 16
- 230000033228 biological regulation Effects 0.000 claims abstract description 7
- 230000001105 regulatory effect Effects 0.000 claims description 18
- 238000001514 detection method Methods 0.000 claims description 9
- 230000001276 controlling effect Effects 0.000 claims description 8
- 230000001174 ascending effect Effects 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 229920006395 saturated elastomer Polymers 0.000 claims description 2
- 230000002087 whitening effect Effects 0.000 abstract description 15
- 230000009467 reduction Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 7
- 230000007423 decrease Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- AZFKQCNGMSSWDS-UHFFFAOYSA-N MCPA-thioethyl Chemical compound CCSC(=O)COC1=CC=C(Cl)C=C1C AZFKQCNGMSSWDS-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008713 feedback mechanism Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application discloses a driving circuit of a display panel and a driving method thereof, wherein the driving circuit comprises a source driver, a power supply module, a voltage feedback module, a voltage regulation module and a time sequence controller, and under the condition that the potential of a first node is maintained through the voltage feedback module, the time sequence controller can further improve the potential of the first node through the voltage regulation module under the condition that display whitening occurs immediately, so that the reduction of the power supply voltage of the source driver can be counteracted, the stability of the power supply voltage of the source driver is further ensured, and the problem of display whitening is also improved or avoided.
Description
Technical Field
The application relates to the technical field of display, in particular to a driving circuit of a display panel and a driving method thereof.
Background
As the size of the display panel increases, the driving load thereof increases, resulting in the easy occurrence of various display taste problems. For example, as shown in fig. 1, a problem of display whitening occurs at the top of the display panel, which is caused by the fact that AVDD supplying power to the source driver, which is shown by the oval dotted line box in fig. 2, is excessively pumped with current, resulting in that the voltage amplitude of AVDD is also instantaneously reduced, thereby reducing the voltage of the data signal output from the source driver.
Disclosure of Invention
The application provides a driving circuit of a display panel and a driving method thereof, which are used for relieving the technical problem of display whitening caused by the reduction of the power supply voltage of a source driver.
The application provides a driving circuit of a display panel, which comprises a source driver, a power supply module, a voltage feedback module, a voltage regulation module and a time sequence controller, wherein the voltage input end of the source driver is electrically connected with a first node; the voltage output end of the power supply module is electrically connected with the first node; the voltage feedback module is connected in series between the first node and the grounding end, and the feedback node of the voltage feedback module is electrically connected with the feedback input end of the power supply module; the first end of the voltage regulating module is electrically connected with the feedback node, and the second end of the voltage regulating module is electrically connected with the grounding end; the data output interface of the time schedule controller is electrically connected with the data input interface of the source driver, and the output control end of the time schedule controller is electrically connected with the input control end of the voltage regulating module.
In some embodiments, the voltage regulation module comprises a first transistor and a first resistor, a first pole of the first transistor is electrically connected with the feedback node, and a control pole of the first transistor is electrically connected with the output control end of the timing controller; one end of the first resistor is electrically connected with the second pole of the first transistor, and the other end of the first resistor is electrically connected with the grounding terminal.
In some embodiments, the voltage feedback module comprises a second resistor and a third resistor, one end of the second resistor is electrically connected with the first node, and the other end of the second resistor is electrically connected with the first pole of the first transistor; one end of the third resistor is electrically connected with the first pole of the first transistor, and the other end of the third resistor is electrically connected with the grounding end.
In some embodiments, the source driver includes a comparing module for outputting a corresponding voltage detection signal according to a potential difference of a first node in two consecutive frames; the time sequence controller controls the voltage regulating module according to the voltage detection signal so as to improve or avoid influencing the potential of the first node.
In a second aspect, the present application provides a driving method of a driving circuit of a display panel in at least one embodiment, the driving method including: and the time sequence controller controls the voltage regulating module to increase the potential of the first node under the condition that the time sequence controller detects that the light-load frame picture is switched to the heavy-load frame picture.
In some embodiments, the step of controlling the voltage adjustment module to increase the potential of the first node when the timing controller detects that the light-load frame is switched to the heavy-load frame includes: and under the condition that the potential of the first node in two continuous frames is in a descending trend and the potential difference of the first node in two continuous frames is larger than or equal to a preset value, the time sequence controller controls the voltage regulating module to improve the potential of the first node.
In some embodiments, when the potential of the first node in two consecutive frames decreases and the potential difference of the first node in two consecutive frames is greater than or equal to a preset value, the step of controlling the voltage adjustment module to increase the potential of the first node by the timing controller includes: the voltage regulating module increases the potential of the first node when the first transistor is in an amplified state or a saturated conduction state.
In some embodiments, the timing controller controls the voltage adjustment module to stop operating when detecting that the first node is switched from the heavy-duty frame to the light-duty frame, from the light-duty frame to the light-duty frame, or from the heavy-duty frame to the light-duty frame, so as to avoid affecting the potential of the first node.
In some embodiments, the step of controlling the voltage adjustment module to stop operating when the timing controller detects that the first node is switched from the heavy-duty frame to the light-duty frame, from the light-duty frame to the light-duty frame, or from the heavy-duty frame to the light-duty frame, so as to avoid affecting the potential of the first node includes: under the condition that the potential of the first node in two continuous frames is in an ascending trend or equal, the time sequence controller controls the voltage regulating module to avoid affecting the potential of the first node.
In some embodiments, the step of controlling the voltage adjustment module to avoid affecting the potential of the first node by the timing controller includes: under the condition that the first transistor is in a cut-off state, the voltage regulating module stops working so as to avoid affecting the potential of the first node.
According to the driving circuit and the driving method of the display panel, provided by the application, under the condition that the potential of the first node is maintained through the voltage feedback module, the time sequence controller can further improve the potential of the first node through the voltage regulating module under the condition that display whitening is about to occur, so that the reduction of the power supply voltage of the source driver can be counteracted, the stability of the power supply voltage of the source driver is further ensured, and the problem of display whitening is also improved or avoided.
Drawings
The technical solution and other advantageous effects of the present application will be made apparent by the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic diagram showing whitening of the top of a display panel in the related art.
Fig. 2 is a schematic diagram of simulation of corresponding signals of a display panel in the related art.
Fig. 3 is a schematic structural diagram of a display panel in the related art.
Fig. 4 is a schematic diagram of the structure of the source driver shown in fig. 3.
Fig. 5 is a schematic circuit diagram of a first embodiment of a display panel.
Fig. 6 is a schematic circuit diagram of a second circuit of the display panel according to the embodiment of the application.
Fig. 7 is a waveform comparison diagram of AVDD before and after improvement according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, whereby a feature defining "first," "second," or the like, may explicitly or implicitly include one or more of such features, and in the description of the present application, "a plurality" means two or more, unless otherwise specifically limited.
In view of the above-mentioned specific reason that the AVDD supplying power to the Source Driver is excessively pumped with current, and the voltage amplitude of the AVDD is also instantaneously reduced, referring to fig. 3 and 4, the display panel shown in fig. 3 includes a Source Driver (Source Driver), a power module (DC-DC), a second resistor R1, a third resistor R2, and a Timing Controller (TCON). The Timing Controller (TCON) transmits video data to a Source Driver (Source Driver) through a point-to-point (P2P) network transmission protocol. The power supply module (DC-DC) provides the analog total voltage AVDD to the Source Driver (Source Driver) for the Source Driver (Source Driver) to modulate the voltage amplitude of the data signal. The second resistor R1 and the third resistor R2 feed back the analog total voltage AVDD to the power supply module (DC-DC) through the feedback node FB so as to stabilize the analog total voltage AVDD output by the power supply module (DC-DC).
The Source Driver (Source Driver) includes two kinds of amplifiers shown in fig. 4, a first input terminal of the first amplifier OP1 is connected to a corresponding positive polarity reference voltage, a second input terminal of the first amplifier OP1 is electrically connected to an output terminal OUT1 of the first amplifier OP1 and outputs a corresponding positive polarity gray scale voltage, and the analog total voltage AVDD and the analog divided voltage HAVDD provide working power for the first amplifier OP 1.
The analog divided voltage HAVDD is a divided voltage of the analog total voltage AVDD. The positive polarity gray scale voltage ranges from the analog divided voltage HAVDD to the analog total voltage AVDD.
The first input end of the second amplifier OP2 is connected with the corresponding negative polarity reference voltage, the second input end of the second amplifier OP2 is electrically connected with the output end OUT2 of the second amplifier OP2 and outputs the corresponding negative polarity gray scale voltage, and the analog divided voltage HAVDD and the zero voltage provide working power for the second amplifier OP 2. Wherein, the negative gray scale voltage ranges from 0 to the analog sub-voltage HAVDD.
That is, the voltage of the data signal output from the Source Driver (Source Driver) needs to be provided by the analog total voltage AVDD, and thus, when the display screen is switched from the blank area (Blanking) of the light-load screen to the Active area (Active) of the heavy-load screen, the load current of the analog total voltage AVDD suddenly increases, resulting in a decrease in the voltage amplitude of the analog total voltage AVDD. The feedback mechanism shown in fig. 3 cannot ensure that the voltage of the analog total voltage AVDD in the effective display area meets the requirement, so that the display panel has the problem of top display whitening during forward scanning or bottom display whitening during backward scanning.
Based on this, in view of the above-mentioned problem of display whitening caused by the reduced supply voltage of the Source Driver 100 (Source Driver), the present embodiment provides a driving circuit of a display panel, as shown in fig. 3 to fig. 7, and the driving circuit includes at least one of the Source Driver 100 (Source Driver), the power module 200 (DC-DC), the voltage feedback module 300, the voltage adjustment module 400 and the timing controller 500 (TCON).
The voltage input terminal of the Source Driver 100 (Source Driver) is electrically connected to the first node N1. The voltage output terminal of the power module 200 (DC-DC) is electrically connected to the first node N1. The voltage feedback module 300 is connected in series between the first node N1 and the ground GND, and the feedback node FB of the voltage feedback module 300 is electrically connected to a feedback input terminal of the power module 200 (DC-DC). The first end of the voltage adjustment module 400 is electrically connected to the feedback node FB, and the second end of the voltage adjustment module 400 is electrically connected to the ground GND. The data output interface of the timing controller 500 (TCON) is electrically connected to the data input interface of the Source Driver 100 (Source Driver), and the output control terminal of the timing controller 500 (TCON) is electrically connected to the input control terminal of the voltage adjustment module 400.
It can be appreciated that in the display panel provided in this embodiment, in the case that the voltage feedback module 300 maintains the potential of the first node N1, the timing controller 500 (TCON) may further increase the potential of the first node N1 through the voltage adjustment module 400 in the case that display whitening occurs, so that the decrease of the supply voltage of the Source Driver 100 (Source Driver) may be counteracted, thereby ensuring the stability of the supply voltage of the Source Driver 100 (Source Driver), and improving or avoiding the problem of display whitening.
It should be noted that, the timing controller 500 (TCON) provides the Source Driver 100 (Source Driver) with corresponding video data through the P2P network transmission protocol, and the Source Driver 100 (Source Driver) outputs a corresponding data signal according to the video data. The timing controller 500 (TCON) provides a corresponding Control signal (AVDD Control) to the input Control terminal of the voltage adjustment module 400 through the output Control terminal.
Any one of the timing controller 500 (TCON), the Source Driver 100 (Source Driver), or the power module 200 (DC-DC) may be fabricated as a corresponding chip to reduce its own installation space, thereby reducing the bezel space of the display panel. The power module 200 (DC-DC) may also be a direct current conversion circuit.
In one embodiment, the voltage adjustment module 400 includes a first transistor Q1 and a first resistor R3, a first pole of the first transistor Q1 is electrically connected to the feedback node FB, and a control pole of the first transistor Q1 is electrically connected to an output control terminal of the timing controller 500 (TCON); one end of the first resistor R3 is electrically connected to the second pole of the first transistor Q1, and the other end of the first resistor R3 is electrically connected to the ground GND.
It should be noted that the first resistor R3 is used to divide and limit the current flowing between the first pole of the first transistor Q1 and the second pole of the first transistor Q1, so as to prevent the first transistor Q1 from being damaged. The first transistor Q1 may be a thin film transistor, a field effect transistor, or a triode, and in the case where the first transistor Q1 is a thin film transistor, a field effect transistor, the first electrode may be one of a source electrode and a drain electrode, the second electrode may be the other of the source electrode and the drain electrode, and the control electrode may be a gate electrode. In the case where the first transistor Q1 is a transistor, the first pole may be one of the collector and the emitter, the second pole may be zero one of the collector and the emitter, and the control pole may be the base.
The first transistor Q1 may be an N-channel transistor or a P-channel transistor.
In one embodiment, the voltage feedback module 300 includes a second resistor R1 and a third resistor R2, wherein one end of the second resistor R1 is electrically connected to the first node N1, and the other end of the second resistor R1 is electrically connected to the first pole of the first transistor Q1; one end of the third resistor R2 is electrically connected to the first pole of the first transistor Q1, and the other end of the third resistor R2 is electrically connected to the ground GND.
As shown in fig. 5, 1 output Pin (avdd_control Pin) of the timing controller 500 (TCON) is added to the first transistor Q1 as shown in fig. 3, and then the voltage amplitude of the Control signal (avdd_control) may be modulated by an analog-to-digital converter (ADC) inside the timing controller 500 (TCON), so as to Control the on-resistance Rds (RQ 1) of the first transistor Q1.
Assuming that the reference voltage at the feedback input of the power module 200 (DC-DC) is a fixed value VFB (typically 0.6V or 0.8V), the analog total voltage AVDD can be obtained according to equation 1-1.
AVDD=[(R1+R2)/VFB] *[(1/R2)+1/(RQ1+R3)]（1-1）
From equation 1-1, AVDD is inversely proportional to RQ1 or inversely proportional to RQ1, and RQ1 is inversely proportional to the voltage applied to the Control electrode of the first transistor Q1, i.e., AVDD is directly proportional to the voltage magnitude of avdd_control or is positively variable.
Wherein VFB is the potential of feedback node FB.
It follows that the first transistor Q1 may be used to increase or avoid affecting the potential of the first node N1 by the resistance value between the first and second poles.
Specifically, when the first transistor Q1 is in the off state, RQ1 is at a maximum, and the voltage regulation module 400 stops operating to avoid affecting the potential of the first node N1. Alternatively, when the first transistor Q1 is in the amplified state or the saturated-on state, RQ1 becomes smaller, and the voltage adjustment module 400 increases the potential of the first node N1.
In the display panel shown in fig. 5, the timing controller 500 (TCON) needs to have a picture detection function, which can identify a light-load picture and a heavy-load picture. Referring to fig. 7, when the timing controller 500 (TCON) detects that the next frame is a heavy-duty frame, the Blanking area of the previous frame can increase avdd_control by increasing the voltage amplitude of avdd_control.
Alternatively, the timing controller 500 (TCON) controls the voltage adjustment module 400 to increase the potential of the first node N1 when it detects that the light-load frame is switched to the heavy-load frame. The timing controller 500 (TCON) controls the voltage adjustment module 400 to stop operating when detecting that the heavy load frame is switched to the light load frame, the light load frame is switched to the light load frame, or the heavy load frame is switched to the light load frame, so as to avoid affecting the potential of the first node N1.
The light-load frame picture is a light-load picture of one frame. The heavy-duty frame picture is a heavy-duty picture of one frame.
It can be understood that the control method can ensure that the AVDD can reach the target voltage value in the display time of the starting multiple lines (1 st to nth lines) of the Active region of the heavy-duty picture.
The improvement effect is shown in fig. 7, and the problem that the display is whitened due to more decline in the display time of the front AVDD in the first multiple lines (1 st to n th lines) of the Active region of the heavy-duty screen is improved. The improved AVDD is improved by the voltage adjusting module 400 in the display time of the starting multiple lines (1 st to nth lines) of the Active region of the heavy-duty picture, and can be relatively stably kept unchanged after being offset from the pull-down of the load, thereby improving or avoiding the problem of display blushing.
In one embodiment, as shown in fig. 6, the Source Driver 100 (Source Driver) includes a comparing module 110, and the comparing module 110 is configured to output a corresponding voltage detection signal VDS (Voltage Detect Signal) according to the potential difference of the first node N1 in two consecutive frames; the timing controller 500 (TCON) controls the voltage adjustment module 400 according to the voltage detection signal to increase or avoid affecting the potential of the first node N1.
It should be noted that, in this embodiment, the comparison module 110 is added to the Source Driver 100 (Source Driver) to implement the change detection of AVDD, so the timing controller 500 (TCON) may not need to have a picture detection function to improve or avoid the problem of display whitening.
Specifically, when the Source Driver 100 (Source Driver) detects that the AVDD has a larger voltage difference between the blocking area and the Active area, the voltage difference is transmitted to the timing controller 500 (TCON) through VDS (Voltage Detect Signal) Pin, and the timing controller 500 (TCON) controls the working state of the first transistor Q1 through avdd_control.
In one embodiment, when the potential of the first node N1 in two consecutive frames is in a decreasing trend and the potential difference of the first node N1 in two consecutive frames is greater than or equal to the preset value, the timing controller 500 (TCON) controls the voltage adjustment module 400 to increase the potential of the first node N1.
The present embodiment is limited to a case of increasing the potential of the first node N1, and can more accurately solve the problem of display whitening.
In one embodiment, the timing controller 500 (TCON) controls the voltage adjustment module 400 to avoid affecting the potential of the first node N1 when the potential of the first node N1 is rising or equal in two consecutive frames.
It should be noted that, the case defined in this embodiment illustrates that the possibility of display whitening of the current display screen is very low, and thus, the voltage adjustment module 400 may be controlled to save power consumption.
The display panel may be a liquid crystal display panel or a self-luminous display panel, for example, an organic light emitting diode display panel, a micro light emitting diode display panel, a mini light emitting diode display panel, or a quantum dot light emitting diode display panel.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
The display panel provided by the embodiment of the present application has been described in detail, and specific examples are applied to illustrate the principles and embodiments of the present application, and the description of the above embodiments is only for helping to understand the technical solution and core ideas of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
Claims (7)
1. A driving circuit of a display panel, the driving circuit comprising:
a source driver, a voltage input end of which is electrically connected with the first node;
the voltage output end of the power supply module is electrically connected with the first node;
the voltage feedback module is connected in series between the first node and the grounding end, and a feedback node of the voltage feedback module is electrically connected with a feedback input end of the power supply module;
the first end of the voltage regulating module is electrically connected with the feedback node, and the second end of the voltage regulating module is electrically connected with the grounding end; and
the data output interface of the time sequence controller is electrically connected with the data input interface of the source driver, and the output control end of the time sequence controller is electrically connected with the input control end of the voltage regulation module;
wherein, the voltage regulation module includes:
a first transistor, a first electrode of which is electrically connected with the feedback node, and a control electrode of which is electrically connected with an output control end of the time sequence controller; and
one end of the first resistor is electrically connected with the second pole of the first transistor, and the other end of the first resistor is electrically connected with the grounding end;
wherein, the voltage feedback module includes:
a second resistor, one end of which is electrically connected with the first node, and the other end of which is electrically connected with the first pole of the first transistor; and
one end of the third resistor is electrically connected with the first pole of the first transistor, and the other end of the third resistor is electrically connected with the grounding end;
the source driver comprises a comparison module, wherein the comparison module is used for outputting a corresponding voltage detection signal according to the potential difference of the first node in two continuous frames, and the potential difference of the first node in the two continuous frames is the difference between the potential of the first node in a blank area of a previous frame and the potential of the first node in an effective display area of a subsequent frame;
the time schedule controller controls the voltage regulating module according to the voltage detection signal so as to improve or avoid influencing the potential of the first node.
2. The driving method of the driving circuit of the display panel according to claim 1, wherein the driving method includes:
and the time sequence controller controls the voltage regulating module to increase the potential of the first node under the condition that the time sequence controller detects that the light-load frame picture is switched to the heavy-load frame picture.
3. The driving method according to claim 2, wherein the step of controlling the voltage adjustment module to increase the potential of the first node in the case where the timing controller detects switching from the light-load frame to the heavy-load frame includes:
and under the condition that the potential of the first node in two continuous frames is in a descending trend and the potential difference of the first node in two continuous frames is larger than or equal to a preset value, the time sequence controller controls the voltage regulating module to improve the potential of the first node.
4. The driving method according to claim 3, wherein the step of controlling the voltage adjustment module to increase the potential of the first node by the timing controller in a case where the potential of the first node in the two consecutive frames is in a decreasing trend and the potential difference of the first node in the two consecutive frames is greater than or equal to a preset value, comprises:
the voltage regulating module increases the potential of the first node when the first transistor is in an amplified state or a saturated on state.
5. The driving method according to claim 2, wherein the timing controller controls the voltage adjustment module to stop operating to avoid affecting the potential of the first node when detecting a switch from a heavy-duty frame to a light-duty frame or vice versa.
6. The driving method according to claim 5, wherein the step of controlling the voltage adjustment module to stop operating to avoid affecting the potential of the first node when the timing controller detects a switch from a heavy-duty frame to a light-duty frame or vice versa, comprises:
and under the condition that the potential of the first node in two continuous frames is in an ascending trend or equal, the time sequence controller controls the voltage regulating module to avoid influencing the potential of the first node.
7. The driving method according to claim 6, wherein the step of controlling the voltage adjustment module to avoid affecting the potential of the first node in the case where the potential of the first node in the two consecutive frames is in an upward trend or equal, comprises:
and under the condition that the first transistor is in an off state, the voltage regulating module stops working so as to avoid influencing the potential of the first node.
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| CN202310708514.1A CN116543686B (en) | 2023-06-15 | 2023-06-15 | Driving circuit of display panel and driving method thereof |
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| CN202310708514.1A CN116543686B (en) | 2023-06-15 | 2023-06-15 | Driving circuit of display panel and driving method thereof |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060118702A (en) * | 2005-05-17 | 2006-11-24 | 엘지.필립스 엘시디 주식회사 | Liquid crystal display device |
| CN106409260A (en) * | 2016-11-17 | 2017-02-15 | 京东方科技集团股份有限公司 | Voltage compensation circuit and voltage compensation method thereof, display panel, and display apparatus |
| CN111223461A (en) * | 2020-01-16 | 2020-06-02 | 昆山龙腾光电股份有限公司 | Voltage regulating circuit and display device |
| CN112735348A (en) * | 2020-12-31 | 2021-04-30 | Tcl华星光电技术有限公司 | Driving circuit, driving method and display device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060118702A (en) * | 2005-05-17 | 2006-11-24 | 엘지.필립스 엘시디 주식회사 | Liquid crystal display device |
| CN106409260A (en) * | 2016-11-17 | 2017-02-15 | 京东方科技集团股份有限公司 | Voltage compensation circuit and voltage compensation method thereof, display panel, and display apparatus |
| CN111223461A (en) * | 2020-01-16 | 2020-06-02 | 昆山龙腾光电股份有限公司 | Voltage regulating circuit and display device |
| CN112735348A (en) * | 2020-12-31 | 2021-04-30 | Tcl华星光电技术有限公司 | Driving circuit, driving method and display device |
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