CN115497429A

CN115497429A - Pixel driving circuit, module, backlight source, panel, device and driving method

Info

Publication number: CN115497429A
Application number: CN202211213395.4A
Authority: CN
Inventors: 东强; 孙晓平
Original assignee: Shanghai Tianma Microelectronics Co Ltd
Current assignee: Shanghai Tianma Microelectronics Co Ltd
Priority date: 2022-09-29
Filing date: 2022-09-29
Publication date: 2022-12-20
Anticipated expiration: 2042-09-29
Also published as: CN115497429B

Abstract

The invention provides a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method, wherein the pixel driving circuit comprises at least two transistors and at least one voltage drop unit; the grid electrode of the transistor is electrically connected with the gray scale data end, the first electrode of the transistor is electrically connected with the first end of the light-emitting unit, and the second electrode of the transistor is connected with a fixed potential; the voltage drop unit is connected between the grids of the two transistors, the first end of the voltage drop unit is electrically connected with the gray scale data end, and the voltage of the second end of the voltage drop unit is smaller than that of the first end of the voltage drop unit. The invention provides a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method, which aim to solve the problem of difficulty in gray scale control and improve the luminous efficiency of a luminous unit.

Description

Pixel driving circuit, module, backlight source, panel, device and driving method

Technical Field

The invention relates to the technical field of display, in particular to a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method.

Background

The Light Emitting Diode (LED) backlight market shows a rapid trend. The backlight module can be divided into a side-in type backlight module and a direct type backlight module, and compared with the side-in type backlight module, the direct type backlight module does not need to be provided with a light guide plate, and is very popular with consumers due to the advantages of high quality and low price. The mini light emitting diode (mini LED) belongs to the size from micron to millimeter, the backlight of the mini LED is usually in a direct type mode, and the mini LED can realize finer partition control, so that the very high contrast is realized.

At present, a Printed Circuit Board (PCB) is adopted in the mini LED backlight module, and a transistor of an independent device is manufactured on the PCB in a mode of punching the PCB.

Disclosure of Invention

The invention provides a pixel driving circuit, a module, a backlight source, a panel, a device and a driving method, which aim to solve the problem of difficulty in gray scale control and improve the luminous efficiency of a luminous unit.

In a first aspect, an embodiment of the present invention provides a pixel driving circuit, including at least two transistors and at least one voltage drop unit;

the grid electrode of the transistor is electrically connected with the gray scale data end, the first electrode of the transistor is electrically connected with the first end of the light-emitting unit, and the second electrode of the transistor is connected with a fixed potential;

the voltage drop unit is connected between the grids of the two transistors, the first end of the voltage drop unit is electrically connected with the gray scale data end, and the voltage of the second end of the voltage drop unit is smaller than that of the first end of the voltage drop unit.

In a second aspect, an embodiment of the present invention provides a light emitting module, including:

a substrate;

a plurality of light emitting cells located at one side of the substrate;

a plurality of pixel driving circuits according to the first aspect, wherein the pixel driving circuits are electrically connected to first ends of the light emitting units, and second ends of the light emitting units are electrically connected to power signal ends.

In a third aspect, an embodiment of the present invention provides a backlight, including the light emitting module described in the second aspect.

In a fourth aspect, an embodiment of the invention provides a display panel, which includes the light emitting module of the second aspect.

In a fifth aspect, an embodiment of the present invention provides a display device, including the backlight according to the third aspect, or the display panel according to the fourth aspect.

In a sixth aspect, an embodiment of the present invention provides a driving method for a pixel driving circuit based on the first aspect, including:

in the light-emitting stage, corresponding gray scale data are determined according to the image, then gray scale voltage signals are provided for the gray scale data ends, at least one transistor in the pixel driving circuit is controlled to be conducted, and the light-emitting unit is driven to emit light;

wherein, the voltage of the grid electrode of at least one transistor is the difference between the voltage of the gray scale voltage signal and the voltage drop of the voltage drop unit.

In the pixel driving circuit according to an embodiment of the present invention, the voltage drop unit is connected between the gates of the two transistors. The voltage of the transistor gate directly electrically connected to the first end of the voltage drop unit is greater than the voltage of the transistor gate directly electrically connected to the second end of the voltage drop unit. Therefore, the voltage drop unit divides the gray scale voltage signal of the gray scale data end into at least two grades so as to drive the light-emitting unit to realize at least two different light-emitting brightness. In the embodiment of the invention, the conduction number of the transistors is controlled, the conduction internal resistance of the transistors is controlled, and the driving current of the light-emitting unit is controlled, so that the light-emitting brightness of the light-emitting unit is controlled, the transistors work in a constant current area and are not in a variable resistance area, the working current of the transistor 10 is stable when the transistor is conducted, the transistor does not change along with the tiny adjustment and tiny fluctuation of a gray scale voltage signal, and the problem of difficulty in gray scale control is solved. On the other hand, because the transistor works in the constant current region and is not in the variable resistance region, the power consumption of the transistor is reduced, more energy is utilized to the light-emitting unit which can emit light, and the light-emitting efficiency of the light-emitting unit is improved.

Drawings

Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the invention;

FIG. 2 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention;

fig. 9 is a schematic top view illustrating a light emitting module according to an embodiment of the present invention;

fig. 10 is a schematic cross-sectional view of a light emitting module according to an embodiment of the present invention;

fig. 11 is a schematic diagram of a display device according to an embodiment of the invention;

fig. 12 is a driving timing diagram of a pixel driving circuit according to an embodiment of the invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

In the prior art, the gate of the driving transistor is electrically connected to the gray-scale data terminal, receives the gray-scale voltage signal output by the gray-scale data terminal, and adjusts the driving current according to the voltage value of the gray-scale voltage signal. The driving transistor works in the variable resistance area, and the drain current of the driving transistor is correspondingly changed according to the gate-source voltage difference of the driving transistor, so that different driving currents are realized. However, small adjustments and small fluctuations in the gray-scale voltage signals result in large variations in the driving current. This makes gray scale control difficult.

The working area of the transistor comprises a variable resistance area, a constant current area and a pinch-off area. The variable resistance region is also referred to as a non-saturation region. In the variable resistance region, the resistance of the drain-source equivalent resistor can be changed by changing the voltage difference between the gate and the source, so the variable resistance region is called. The constant current region is also referred to as a saturation region. When the gate-source voltage difference increases, the drain current slightly increases. In the pinch-off region, the conduction channel is pinched off and the drain current is equal to a small value.

Fig. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the present invention, and referring to fig. 1, the pixel driving circuit includes at least two transistors 10 and at least one voltage drop unit 20. The gate of the transistor 10 is electrically connected to the gray-scale data terminal 30, the first electrode of the transistor 10 is electrically connected to the first terminal of the light emitting unit 40, and the second electrode of the transistor 10 is connected to a fixed potential. The voltage drop unit 20 is connected between the gates of the two transistors 10. The first terminal of the voltage drop unit 20 is electrically connected to the gray-scale data terminal 30. The voltage of the second terminal of the voltage drop unit 20 is less than the voltage of the first terminal of the voltage drop unit 20 for generating a voltage drop, thereby generating a voltage difference between the gates of the two transistors 10 connected to both terminals of the voltage drop unit 20.

Exemplarily, referring to fig. 1, the plurality of transistors 10 includes a first transistor T1 and a second transistor T2. The pressure drop unit 20 includes a first pressure drop unit D1. The gate of the first transistor T1 is electrically connected to the gray-scale data terminal 30, the first pole of the first transistor T1 is electrically connected to the first terminal of the light emitting unit 40, and the second pole of the first transistor T1 is connected to the fixed potential. The fixed potential may have a fixed potential, i.e., a fixed voltage value. The fixed potential may comprise, for example, ground potential, or a negative supply voltage (PVEE). The gate of the second transistor T2 is electrically connected to the gray-scale data terminal 30, the first pole of the second transistor T2 is electrically connected to the first terminal of the light emitting unit 40, and the second pole of the second transistor T2 is connected to the fixed potential. The first voltage dropping unit D1 is connected between the gate of the first transistor T1 and the gate of the second transistor T2. A first end of the first voltage dropping unit D1 is directly electrically connected to the gate of the first transistor T1, and a second end of the first voltage dropping unit D1 is directly electrically connected to the gate of the second transistor T2. Wherein there are no other electrical elements, e.g. no capacitors, switches, etc., between the two that are "directly electrically connected".

When the gray scale voltage signal provided from the gray scale data terminal 30 is determined, the voltage of the gate of the first transistor T1 is greater than the voltage of the gate of the second transistor T2. There are the following situations: in the first case, the first transistor T1 is turned on, the second transistor T2 is turned off, and the first transistor T1 operates in the constant current region. The light emitting unit 40 and the first transistor T1 form a current loop, the light emitting unit 40 emits light, and the light emitting brightness of the light emitting unit 40 is related to the on-state internal resistance of the first transistor T1. In the second case, the first transistor T1 is turned on, the second transistor T2 is turned on, and the first transistor T1 and the second transistor T2 operate in the constant current region. The light emitting unit 40 and the first transistor T1 form a current loop, the light emitting unit 40 and the second transistor T2 form a current loop, and the light emitting unit 40 emits light. The light emitting brightness of the light emitting unit 40 is related to the on-internal resistance of the first transistor T1 and the on-internal resistance of the second transistor T2. Since the first transistor T1 and the second transistor T2 are connected in parallel, and the parallel resistance of the first transistor T1 and the second transistor T2 is smaller than the on-resistance of the first transistor T1, the light emitting luminance of the light emitting unit 40 is larger than that when the first transistor T1 turns on the second transistor T2 and turns off.

In the pixel driving circuit according to the embodiment of the present invention, the voltage drop unit 20 is connected between the gates of the two transistors 10. The voltage of the gate of the transistor 10 directly electrically connected to the first terminal of the voltage drop unit 20 is greater than the voltage of the gate of the transistor 10 directly electrically connected to the second terminal of the voltage drop unit 20. The voltage drop unit 20 divides the gray scale voltage signal of the gray scale data terminal 30 into at least two levels to drive the light emitting unit 40 to realize at least two different luminances. In the embodiment of the present invention, the conduction number of the transistors 10 is controlled, the conduction internal resistance of the transistors 10 is controlled, and the driving current of the light emitting unit 40 is controlled, so as to control the light emitting brightness of the light emitting unit 40, the transistors 10 work in a constant current region, but not in a variable resistance region, the working current of the transistors 10 is stable when conducting, and does not change with the tiny adjustment and tiny fluctuation of the gray scale voltage signal, thereby solving the problem of difficulty in gray scale control. On the other hand, since the transistor 10 operates in the constant current region, not the variable resistance region, power consumption of the transistor 10 is reduced, more energy is utilized to the light emitting unit 40 that can emit light, and light emitting efficiency of the light emitting unit 40 is improved.

Alternatively, referring to fig. 1, there are at least two transistors 10 having the same channel width to length ratio. Two transistors 10 having the same channel width to length ratio may have the same channel width and the same channel length, thereby facilitating simplification of the manufacturing process. On the other hand, the two transistors 10 having the same channel width-length ratio have the same on-resistance, so that the parallel resistance of the two transistors 10 connected in parallel becomes half of the original resistance, thereby being advantageous to control the driving current of the light-emitting unit 40 by an integer multiple and to control the light-emitting luminance of the light-emitting unit 40 by an integer multiple when the internal resistance of the light-emitting unit 40 is ignored.

Exemplarily, referring to fig. 1, the channel width-to-length ratios of the first transistor T1 and the second transistor T2 are the same. In other embodiments, the pixel driving circuit comprises at least three transistors 10, wherein at least two of the transistors 10 have the same channel width to length ratio.

Alternatively, referring to fig. 1, there are at least two transistors 10 that have different channel width to length ratios. The smaller the resistance of the gate of the transistor 10 to the gray-scale data terminal 30, the smaller the channel width-to-length ratio of the transistor 10. The larger the resistance connecting the gate of the transistor 10 to the gray-scale data terminal 30, the larger the channel width-to-length ratio of the transistor 10. The smaller the connection resistance between the gate of the transistor 10 and the gray-scale data terminal 30 is, the smaller the number of the voltage drop units 20 connected in series between the gate of the transistor 10 and the gray-scale data terminal 30 is. The transistor 10 having a larger channel width to length ratio has a smaller internal resistance, and the transistor 10 having a smaller channel width to length ratio has a larger internal resistance. Therefore, the smaller the number of the voltage drop units 20 connected in series between the gate of the transistor 10 and the gray-scale data terminal 30 is, the larger the internal resistance of the transistor 10 is; the larger the number of the voltage drop units 20 connected in series between the gate of the transistor 10 and the gray-scale data terminal 30, the smaller the internal resistance of the transistor 10. It can be understood that when the plurality of transistors 10 are turned on, the resistance of the current loop in which the light emitting unit 40 is located is not only reduced by increasing the number of transistors 10 connected in parallel, but also the resistance of the current loop in which the light emitting unit 40 is located is further reduced by increasing the channel width-to-length ratio of the transistors 10, so as to increase the light emitting brightness of the light emitting unit 40.

Exemplarily, referring to fig. 1, the channel width-to-length ratios of the first transistor T1 and the second transistor T2 are different. The channel width-to-length ratio of the first transistor T1 is smaller than that of the second transistor T2. In other embodiments, the pixel driving circuit comprises at least three transistors 10, wherein at least two of the transistors 10 have different channel width to length ratios.

Alternatively, referring to fig. 1, the channel width-to-length ratio of the second transistor T2 is twice the channel width-to-length ratio of the first transistor T1. When the first transistor T1 and the second transistor T2 are both turned on, the parallel resistance of the first transistor T1 and the second transistor T2 after being connected in parallel is one third of the internal resistance of the first transistor T1, and when the internal resistance of the light emitting unit 40 is neglected, the driving current of the light emitting unit 40 is three times that when the first transistor T1 is turned on and the second transistor T2 is turned off, so that the light emitting brightness of the light emitting unit 40 is improved.

Fig. 2 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 2, the plurality of transistors 10 includes a first transistor T1, a second transistor T2, a third transistor T3, and a fourth transistor T4. The pressure drop unit 20 includes a first pressure drop unit D1, a second pressure drop unit D2, and a third pressure drop unit D3. The first voltage drop unit D1 is connected between the gate of the first transistor T1 and the gate of the second transistor T2, and the first voltage drop unit D1 is connected between the gray-scale data terminal 30 and the gate of the second transistor T2. A first end of the first voltage drop unit D1 is directly electrically connected to the gate of the first transistor T1, and a second end of the first voltage drop unit D1 is directly electrically connected to the gate of the second transistor T2. The voltage of the second end of the first voltage dropping unit D1 is less than the voltage of the first end of the first voltage dropping unit D1. The second voltage drop unit D2 is connected between the gate of the second transistor T2 and the gate of the third transistor T3, and the second voltage drop unit D2 is connected between the gray-scale data terminal 30 and the gate of the third transistor T3. A first end of the second voltage drop unit D2 is directly electrically connected to the gate electrode of the second transistor T2, and a second end of the second voltage drop unit D2 is directly electrically connected to the gate electrode of the third transistor T3. The voltage of the second end of the second voltage dropping unit D2 is less than the voltage of the first end of the second voltage dropping unit D2. The third voltage dropping unit D3 is connected between the gate of the third transistor T3 and the gate of the fourth transistor T4, and the third voltage dropping unit D3 is connected between the gray-scale data terminal 30 and the gate of the fourth transistor T4. A first end of the third voltage drop unit D3 is directly electrically connected to the gate of the third transistor T3, and a second end of the third voltage drop unit D3 is directly electrically connected to the gate of the fourth transistor T4. The voltage of the second terminal of the third voltage dropping unit D3 is less than the voltage of the first terminal of the third voltage dropping unit D3.

The number of the voltage drop units 20 connected in series between the gate of the first transistor T1 and the gray-scale data terminal 30 is less than the number of the voltage drop units 20 connected in series between the gate of the second transistor T2 and the gray-scale data terminal 30, the number of the voltage drop units 20 connected in series between the gate of the second transistor T2 and the gray-scale data terminal 30 is less than the number of the voltage drop units 20 connected in series between the gate of the third transistor T3 and the gray-scale data terminal 30, and the number of the voltage drop units 20 connected in series between the gate of the third transistor T3 and the gray-scale data terminal 30 is less than the number of the voltage drop units 20 connected in series between the gate of the fourth transistor T4 and the gray-scale data terminal 30. Accordingly, the on voltage of the first transistor T1 is lower than the on voltage of the second transistor T2, the on voltage of the second transistor T2 is lower than the on voltage of the third transistor T3, and the on voltage of the third transistor T3 is lower than the on voltage of the fourth transistor T4. It is understood that the voltage dropping unit 20 (including the first voltage dropping unit D1, the second voltage dropping unit D2, and the third voltage dropping unit D3) forms a threshold value screening circuit network for the gray scale voltage signals, and divides the gray scale voltage signals into several levels. The on voltage of the transistor 10 is a voltage value of a gray scale voltage signal corresponding to the transistor 10 from off to on.

Exemplarily, referring to fig. 2, the channel width-to-length ratio of the second transistor T2 is greater than the channel width-to-length ratio of the first transistor T1, the channel width-to-length ratio of the third transistor T3 is greater than the channel width-to-length ratio of the second transistor T2, and the channel width-to-length ratio of the fourth transistor T4 is greater than the channel width-to-length ratio of the third transistor T3. The parallel resistance of the first transistor T1 and the second transistor T2 is less than one-half of the internal resistance of the first transistor T1, the parallel resistance of the first transistor T1, the second transistor T2 and the third transistor T3 is less than one-third of the internal resistance of the first transistor T1, and the parallel resistance of the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 is less than one-fourth of the internal resistance of the first transistor T1, so that the resistance of a current loop where the light-emitting unit 40 is located is reduced, and the light-emitting brightness of the light-emitting unit 40 is increased.

Exemplarily, referring to fig. 2, the channel width-to-length ratio of the second transistor T2 is twice the channel width-to-length ratio of the first transistor T1, the channel width-to-length ratio of the third transistor T3 is twice the channel width-to-length ratio of the second transistor T2, and the channel width-to-length ratio of the fourth transistor T4 is twice the channel width-to-length ratio of the third transistor T3. The channel width-to-length ratios of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are: 1:2:4:8. when the first transistor T1 is turned on and the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned off, the driving current of the light emitting unit 40 is denoted as I1; when the first transistor T1 and the second transistor T2 are turned on and the third transistor T3 and the fourth transistor T4 are turned off, the driving current of the light emitting unit 40 is marked as I2; when the first transistor T1, the second transistor T2, and the third transistor T3 are turned on and the fourth transistor T4 is turned off, the driving current of the light emitting unit 40 is denoted as I3; when the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned on, the driving current of the light emitting unit 40 is denoted as I4. Ratio of currents in various on-states of the driving current of the light emitting cell 40 neglecting the internal resistance of the light emitting cell 40, I1: i2: i3: i4=1:3:7:15.

fig. 3 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 3, gates of at least two transistors 10 are directly electrically connected. The gates of the two transistors 10 are directly electrically connected, the gates of the two transistors 10 have the same voltage, and the two transistors 10 are simultaneously turned on or simultaneously turned off when the threshold voltages of the two transistors 10 are the same.

Exemplarily, referring to fig. 3, the gate of the first transistor T1 is directly electrically connected with the gate of the second transistor T2. The gate of the first transistor T1 and the gate of the second transistor T2 are both connected to the first end of the first voltage dropping unit D1. The gate of the third transistor T3 is directly electrically connected to the gate of the fourth transistor T4. The gate of the third transistor T3 and the gate of the fourth transistor T4 are both connected to the second end of the first voltage drop unit D1. There are the following situations: in a first case, the first transistor T1 and the second transistor T2 are turned on, the third transistor T3 and the fourth transistor T4 are turned off, the light emitting unit 40, the first transistor T1 and the second transistor T2 form a current loop, the light emitting unit 40 emits light, and the light emitting brightness of the light emitting unit 40 is related to the parallel resistance after the first transistor T1 and the second transistor T2 are connected in parallel. In the second case, the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned on, the light emitting unit 40, the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 form a current loop, the light emitting unit 40 emits light, and the light emitting brightness of the light emitting unit 40 is related to the parallel resistance of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 after being connected in parallel.

Alternatively, referring to fig. 3, in the transistors 10 whose gates are directly electrically connected, there are at least two transistors 10 whose channel width-to-length ratios are different. Thus, in the process of turning on the control transistor 10, the transistor 10 having a large channel width/length ratio is preferentially turned on and is in the constant current region, and the transistor 10 having a small channel width/length ratio is in the variable resistance region. The combination of the transistors 10 having different channel width/length ratios and the gates electrically connected directly lights the light emitting cell 40, so that the light emitting cell 40 has a wider light emitting range.

Exemplarily, referring to fig. 3, the gate of the first transistor T1 is directly electrically connected with the gate of the second transistor T2. The channel width-to-length ratio of the first transistor T1 is different from the channel width-to-length ratio of the second transistor T2. Take the case where the channel width-to-length ratio of the first transistor T1 is smaller than the channel width-to-length ratio of the second transistor T2. The first transistor T1 and the second transistor T2 are turned on, the first transistor T1 is in a variable resistance region, and the second transistor T2 is in a constant current region. Therefore, on the basis of adjusting the loop resistance of the light emitting unit 40 by connecting the first transistor T1 and the second transistor T2 in parallel, the magnitude of the driving current can be adjusted by adjusting the voltage of the gate of the first transistor T1, so that the light emitting unit 40 has a wider light emitting range. It should be noted that, in the prior art, only one driving transistor is usually provided, and the driving transistor is operated in the variable resistance region to perform gray scale control. In the embodiment of the present invention, the adjustment of the driving current by the first transistor T1 is "fine tuning", which is based on the "coarse tuning" of the loop resistance of the light emitting unit 40.

Exemplarily, referring to fig. 3, the gate electrode of the third transistor T3 is directly electrically connected to the gate electrode of the fourth transistor T4. The channel width-to-length ratio of the third transistor T3 is different from the channel width-to-length ratio of the fourth transistor T4.

Alternatively, referring to fig. 1-3, transistor 10 comprises an insulated gate field effect transistor. The grid electrode of the insulated gate type field effect transistor is isolated from the source electrode and the drain electrode by adopting an insulating layer.

Illustratively, the transistor 10 includes an insulated gate field effect transistor, and the insulated gate field effect transistor includes a thin film transistor, which is an insulated gate field effect transistor formed by using a thin film deposition, etching, or the like. By adopting the processes of thin film deposition, etching and the like, on one hand, a glass substrate with high flatness and good heat conductivity can be used as a substrate, so that the manufacturing yield and the heat dissipation performance of the transistor 10 can be improved conveniently; on the other hand, the method can be applied to an integrated circuit, and the integration of the pixel driving circuit is improved; on the other hand, the impedance of the thin film transistor is in the kilo-ohm level, and even if the thin film transistor is broken down, the internal resistance of the thin film transistor is kept unchanged, namely, a large resistor is connected in series in the circuit, so that no additional resistor is required to be arranged.

Fig. 4 is a schematic diagram of another pixel driving circuit according to an embodiment of the invention, and referring to fig. 4, the transistor 10 includes a junction field effect transistor. The pixel driving circuit further comprises a resistor R, wherein the first end of the resistor R is electrically connected with the second pole of the junction field effect transistor, and the second end of the resistor R is connected with a fixed potential. The second pole of the transistor 10 is connected to a fixed potential via a resistor R. The resistance of the jfet is milli-ohm, the current is hundreds of milli-amperes, the current is high, and a resistor R for limiting current is added to limit the current passing through the transistor 10.

Illustratively, referring to fig. 4, the resistor R includes a first resistor R1 and a second resistor R2. A first end of the first resistor R1 is electrically connected to a second pole of the first transistor T1, and a second end of the first resistor R1 is connected to a fixed potential. A first terminal of the second resistor R2 is electrically connected to the second pole of the second transistor T2, and a second terminal of the second resistor R2 is connected to a fixed potential.

In other embodiments, the transistor 10 may also comprise a transistor. Unlike a field effect transistor, a transistor is a bipolar transistor, in which two carriers with different polarity charges participate in conduction.

Exemplarily, referring to fig. 1 to 4, the voltage drop unit 20 includes a diode. The diode has unidirectional conductivity. Ideally, the forward voltage drop when the diode is conducting is constant.

Fig. 5 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 5, the voltage drop unit 20 includes a voltage regulator tube. When the voltage-stabilizing tube is in reverse breakdown, the terminal voltage is almost unchanged in a certain current range, and the stability is shown.

Fig. 6 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 6, the voltage drop unit 20 includes an additional transistor. Wherein the gate of the additional transistor is electrically connected to the first pole of the additional transistor or the second pole of the additional transistor. The I-V characteristic of the additional transistor is similar to the I-V characteristic of a diode after the gate of the additional transistor is electrically connected to the first pole of the additional transistor or the second pole of the additional transistor. The additional transistor is designed as an active resistor.

Exemplarily, referring to fig. 6, the transistor 10 and the additional transistor are both thin film transistors. This has the advantage that the additional transistor can be formed in the same process as the transistor 10, without requiring a new process to specially form the additional transistor, thereby saving process steps.

Fig. 7 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 7, the pixel driving circuit further includes a storage capacitor Cst and a reset transistor T5. The first plate of the storage capacitor Cst is directly electrically connected to the gray-scale data terminal 30, and the second plate of the storage capacitor Cst is connected to a fixed potential. The storage capacitor Cst stores the gray scale voltage signal of the gray scale data terminal 30. The gate of the reset transistor T5 is directly electrically connected to the reset signal terminal 50, the first electrode of the reset transistor T5 is directly electrically connected to the first plate of the storage capacitor Cst, and the second electrode of the reset transistor T5 is connected to the fixed potential. When the reset transistor T5 is turned on, the first plate of the storage capacitor Cst is connected to the fixed potential, and since the second plate of the storage capacitor Cst is connected to the fixed potential, the electric charge stored in the storage capacitor Cst is released, thereby completing the reset of the storage capacitor Cst. In the embodiment of the present invention, by setting the storage capacitor Cst and the reset transistor T5, after the scanning of the pixel driving circuit of the current row is completed, the pixel driving circuit of the current row can be driven by the gray scale voltage signal stored in the storage capacitor Cst, so as to maintain the light emitting unit 40 to continuously emit light in a plurality of scanning periods.

Fig. 8 is a schematic diagram of another pixel driving circuit according to an embodiment of the present invention, and referring to fig. 8, the pixel driving circuit further includes an auxiliary voltage drop unit 60. The auxiliary voltage dropping unit 60 is connected between the gray-scale data terminal 30 and the gates of all the transistors 10. That is, the auxiliary voltage drop unit 60 is disposed before the gates of all the transistors 10.

Exemplarily, referring to fig. 8, a first terminal of the auxiliary voltage drop unit 60 is directly electrically connected to the gray-scale data terminal 30, and a second terminal of the auxiliary voltage drop unit 60 is directly electrically connected to the gate of the first transistor T1. The voltage of the first terminal of the auxiliary voltage dropping unit 60 is greater than the voltage of the second terminal of the auxiliary voltage dropping unit 60. In the initial start-up phase, the gray scale voltage signal output by the gray scale data terminal 30 is weak and has poor stability. The auxiliary voltage drop unit 60 is arranged, the first transistor T1 can be turned on only by the voltage exceeding the voltage at the two ends of the auxiliary voltage drop unit 60 by a certain value, and the first transistor T1 cannot be turned on by the voltage not exceeding the voltage at the two ends of the auxiliary voltage drop unit 60 by a certain value, so that an unstable voltage signal at an initial starting stage is shielded, and the light emitting stability of the light emitting unit 40 is improved.

Exemplarily, referring to fig. 8, the auxiliary voltage drop unit 60 includes a fourth voltage drop unit D4, the fourth voltage drop unit D4 is of the same type as the voltage drop unit 20, and the fourth voltage drop unit D4 includes a diode, a zener or an additional transistor.

Exemplarily, referring to fig. 1 to 8, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the reset transistor T5 are all N-type transistors. In other embodiments, at least one of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the reset transistor T5 is a P-type transistor.

Fig. 9 is a schematic top view of a light emitting module according to an embodiment of the present invention, and referring to fig. 1 to 9, the light emitting module includes a substrate 110, a plurality of light emitting units 40 (not shown in fig. 9), and a plurality of pixel driving circuits 120. Wherein the plurality of light emitting cells 40 are located at one side of the substrate 110. The pixel driving circuit 120 is located on the same side of the substrate 110 as the light emitting unit 40. The pixel driving circuit 120 is electrically connected to a first terminal of the light emitting unit 40, and a second terminal of the light emitting unit 40 is electrically connected to the power signal terminal PVDD. The pixel driving circuit 120 drives the light emitting unit 40 to emit light. The light emitting module in the embodiment of the invention includes the pixel driving circuit 120 in the above embodiment, so that the pixel driving circuit 120 has the advantages of solving the problem of difficulty in gray scale control and improving the light emitting efficiency of the light emitting unit 40.

Fig. 10 is a schematic cross-sectional structural view of a light emitting module according to an embodiment of the invention, and referring to fig. 1 to 10, a plurality of pixel driving circuits 120 are arranged in an array along a first direction and a second direction, and the first direction and the second direction intersect. The plurality of gray scale signal lines 130 extend along a first direction and are arranged along a second direction, the gray scale signal lines 130 are directly electrically connected with the gray scale data terminal 30, and the gray scale signal lines 130 provide gray scale voltage signals for the gray scale data terminal 30. The plurality of reset signal lines 140 extend in the second direction and are arranged in the first direction, the reset signal lines 140 are directly electrically connected to the reset signal terminal 50, and the reset signal lines 140 provide a reset voltage signal to the reset signal terminal 50. The vertical projection of the pixel drive circuit 120 on the substrate 110 is located within the vertical projection of the power supply signal layer 150 on the substrate 110. The power signal layer 150 is directly electrically connected to the power signal terminal PVDD, and the power signal layer 150 provides a power voltage signal to the power signal terminal PVDD. In the embodiment of the present invention, the power signal layer 150 is a whole layer of film, and the plurality of pixel driving circuits 120 are commonly connected to the same power signal layer 150, so that the difficulty of connecting the pixel driving circuits 120 and the power signal layer 150 is reduced.

Exemplarily, referring to fig. 10, the power signal layer 150 is located between the substrate 110 and the pixel driving circuit 120. In other embodiments, the power signal layer 150 may also be the side of the pixel driving circuit 120 away from the substrate 110, or the power signal layer 150 may also be located between two film layers of the pixel driving circuit 120.

Exemplarily, referring to fig. 10, the pixel driving circuit 120 includes a transistor 10, and the transistor 10 includes a gate electrode 103, a semiconductor layer 102, a source electrode 101, and a drain electrode 104. The drain electrode 104 is electrically connected to a first end of the light emitting cell 40. The drain 104 is a first pole of the transistor 10 and the source 101 is a second pole of the transistor 10. In other embodiments, the source 101 may be electrically connected to the first end of the light emitting unit 40. The source 101 is a first pole of the transistor 10 and the drain 104 is a second pole of the transistor 10.

The embodiment of the invention provides a backlight source, which comprises the light-emitting module in the embodiment. Therefore, the backlight source can realize brightness adjustment and local dimming. Local dimming means that the brightness of each area of the backlight is individually adjustable.

Illustratively, an embodiment of the present invention provides a display panel, where the display panel is a liquid crystal display panel, and the liquid crystal display panel includes a backlight source and a liquid crystal cell, and the backlight source provides backlight for the liquid crystal cell, so as to implement image display.

An embodiment of the present invention provides a display panel, which includes the light emitting module in the above embodiment. The display panel in the embodiment of the invention is a light-emitting diode display panel, the light-emitting pixels in the light-emitting diode display panel are light-emitting diodes, and the image display is realized by controlling the light-emitting brightness of the light-emitting diodes.

The embodiment of the invention also provides a display device. Fig. 11 is a schematic view of a display device according to an embodiment of the present invention, and referring to fig. 11, the display device includes any one of the backlight sources or any one of the display panels according to the embodiment of the present invention. The display device can be a mobile phone, a tablet computer, a notebook computer, a vehicle-mounted display module, a display, an intelligent wearable device and the like.

An embodiment of the present invention further provides a driving method of a pixel driving circuit, and fig. 12 is a driving timing diagram of the pixel driving circuit according to the embodiment of the present invention, and referring to fig. 7 and 12, the driving method of the pixel driving circuit includes: in the light emitting stage, corresponding gray scale data is determined according to an image, and then a gray scale voltage signal is provided to the gray scale data terminal 30 to control at least one transistor 10 in the pixel driving circuit to be turned on, so as to drive the light emitting unit 40 to emit light. Wherein, the voltage of the gate of at least one transistor 10 is the difference between the voltage of the gray scale voltage signal and the voltage drop of the voltage drop unit 20. In the embodiment of the present invention, in the light emitting stage, the on-state number of the transistors 10 is controlled by controlling the gray scale voltage signals provided by the gray scale data terminal 30, so as to control the on-state internal resistance of the transistors 10 (the on-state internal resistance of a single transistor 10, or the parallel resistance of a plurality of transistors 10), control the driving current of the light emitting unit 40, and thus control the light emitting brightness of the light emitting unit 40, thereby implementing gray scale control. Conversely, according to the required gray scale, the voltage value of the gray scale voltage signal corresponding to the gray scale can be determined.

Alternatively, referring to fig. 7 and 12, the driving method of the pixel driving circuit further includes: in the reset phase, a reset voltage signal is provided to the reset signal terminal 50 to control the reset transistor T5 to be turned on, and the storage capacitor Cst is reset.

Exemplarily, referring to fig. 7 and 12, in the reset phase, the reset transistor T5 is turned on, the gate of the first transistor T1 is connected to a fixed potential, and the first transistor T1 is turned off. The first pressure drop unit D1, the second pressure drop unit D2 and the third pressure drop unit D3 are all turned off. The second transistor T2, the third transistor T3, and the fourth transistor T4 are all turned off. The light emitting unit 40 does not emit light. In the light emitting period, the reset transistor T5 is turned off, the first transistor T1 is turned on, and the light emitting unit 40 emits light.

From the perspective of providing different gray-scale voltage signals, as the voltage value of the gray-scale voltage signal provided by the gray-scale data terminal 30 becomes larger, the second transistor T2 is also turned on, the parallel resistance of the first transistor T1 and the second transistor T2 is smaller than the internal resistance of the first transistor T1, and the light-emitting brightness of the light-emitting unit 40 increases. As the voltage value of the grayscale voltage signal provided by the grayscale data terminal 30 continues to increase, the third transistor T3 is also turned on, the parallel resistance of the first transistor T1, the second transistor T2 and the third transistor T3 is smaller than the parallel resistance of the first transistor T1 and the second transistor T2, and the light emitting brightness of the light emitting unit 40 increases. As the voltage value of the grayscale voltage signal provided by the grayscale data terminal 30 continues to increase, the fourth transistor T4 is also turned on, the parallel resistance of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 is smaller than the parallel resistance of the first transistor T1, the second transistor T2, and the third transistor T3, and the light emitting luminance of the light emitting unit 40 increases.

Exemplarily, referring to fig. 12, the reset phase is located before the light emitting phase, and thus, before writing the gray scale voltage signal, the storage capacitor Cst is reset to eliminate the influence of the gray scale voltage signal written in the previous frame.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A pixel driving circuit is characterized by comprising at least two transistors and at least one voltage drop unit;

2. The pixel driving circuit according to claim 1, wherein there are at least two of the transistors having the same channel width to length ratio.

3. The pixel driving circuit according to claim 1, wherein there are at least two of the transistors having different channel width-to-length ratios;

the smaller the connection resistance between the grid of the transistor and the gray scale data end is, the smaller the channel width-length ratio of the transistor is.

4. The pixel driving circuit according to claim 3, wherein the plurality of transistors includes a first transistor and a second transistor, and the voltage dropping unit includes a first voltage dropping unit connected between a gate of the first transistor and a gate of the second transistor and between the grayscale data terminal and a gate of the second transistor;

the channel width-to-length ratio of the second transistor is twice the channel width-to-length ratio of the first transistor.

5. The pixel driving circuit according to claim 1, wherein the plurality of transistors includes a first transistor, a second transistor, a third transistor, and a fourth transistor; the pressure drop unit comprises a first pressure drop unit, a second pressure drop unit and a third pressure drop unit;

the first voltage drop unit is connected between the grid electrode of the first transistor and the grid electrode of the second transistor and between the gray scale data end and the grid electrode of the second transistor;

the second voltage drop unit is connected between the grid electrode of the second transistor and the grid electrode of the third transistor and between the gray scale data end and the grid electrode of the third transistor;

the third voltage drop unit is connected between the grid electrode of the third transistor and the grid electrode of the fourth transistor and between the gray scale data end and the grid electrode of the fourth transistor.

6. The pixel driving circuit according to claim 1, wherein the gates of at least two of the transistors are directly electrically connected.

7. The pixel driving circuit according to claim 6, wherein of the transistors whose gates are directly electrically connected, there are at least two of the transistors whose channel width-to-length ratios are different.

8. The pixel driving circuit according to claim 1, wherein the transistor comprises an insulated gate field effect transistor; alternatively, the first and second liquid crystal display panels may be,

the transistor comprises a junction field effect transistor, the pixel driving circuit further comprises a resistor, a first end of the resistor is electrically connected with a second pole of the junction field effect transistor, and a second end of the resistor is connected with a fixed potential.

9. The pixel driving circuit according to claim 1, wherein the voltage drop unit comprises a diode, a voltage regulator tube or an additional transistor;

wherein a gate of the additional transistor is electrically connected to either a first pole of the additional transistor or a second pole of the additional transistor.

10. The pixel driving circuit according to claim 1, further comprising a storage capacitor and a reset transistor;

the first polar plate of the storage capacitor is directly and electrically connected with the gray scale data end, and the second polar plate of the storage capacitor is connected with a fixed potential;

the grid electrode of the reset transistor is directly and electrically connected with the reset signal end, the first pole of the reset transistor is directly and electrically connected with the first pole plate of the storage capacitor, and the second pole of the reset transistor is connected with a fixed potential.

11. The pixel driving circuit according to claim 1, further comprising an auxiliary voltage drop unit; the auxiliary voltage drop unit is connected between the gray scale data end and the grid electrodes of all the transistors.

12. A light emitting module, comprising:

a substrate;

a plurality of light emitting cells located at one side of the substrate;

a plurality of pixel driving circuits according to any of claims 1-11, the pixel driving circuits being electrically connected to a first terminal of the light emitting cells, and a second terminal of the light emitting cells being electrically connected to a power signal terminal.

13. The light emitting module of claim 12, wherein the plurality of pixel driving circuits are arrayed along a first direction and a second direction, the first direction crossing the second direction;

a plurality of gray scale signal lines extending along the first direction and arranged along the second direction, and directly and electrically connected with the gray scale data terminals;

a plurality of reset signal lines extending along the second direction and arranged along the first direction, and directly electrically connected to the reset signal terminals;

the vertical projection of the pixel driving circuit on the substrate is positioned in the vertical projection of the power supply signal layer on the substrate, and the power supply signal layer is directly and electrically connected with a power supply signal end.

14. A backlight comprising the light-emitting module according to claim 12 or 13.

15. A display panel comprising the light-emitting module according to claim 12 or 13.

16. A display device comprising the backlight of claim 14 or the display panel of claim 15.

17. A driving method of the pixel driving circuit according to claim 1, comprising:

18. The driving method according to claim 17, wherein the pixel driving circuit further comprises a storage capacitor and a reset transistor; the first polar plate of the storage capacitor is directly and electrically connected with the gray scale data end, and the second polar plate of the storage capacitor is connected with a fixed potential; the grid electrode of the reset transistor is directly and electrically connected with a reset signal end, the first pole of the reset transistor is directly and electrically connected with the first pole plate of the storage capacitor, and the second pole of the reset transistor is connected with a fixed potential;

the driving method further includes:

and in the resetting stage, a resetting voltage signal is provided for a resetting signal end, the resetting transistor is controlled to be conducted, and the storage capacitor is reset.