CN115496026A - Method, device, equipment and storage medium for controlling isochronism of differential pair - Google Patents
Method, device, equipment and storage medium for controlling isochronism of differential pair Download PDFInfo
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Abstract
The application relates to the technical field of electronic circuits, and provides a differential pair isochronous control method, device, equipment and storage medium. Obtaining the initial time delay difference of the surface layer differential pair; and according to the initial time delay difference, at least one of the following adjustment operations is executed to obtain a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair: adjusting the width of the first routing from the initial width to a first width, wherein the first width is greater than the initial width; adjusting the width of the second routing wire from the initial width to a second width, wherein the second width is smaller than the initial width; and adjusting the height between the second routing line and the reference layer from the initial height to a target height. The width of the surface layer differential pair wiring and the distance between the single line and the reference layer in the differential pair are adjusted, so that the differential pair with the time delay difference meeting the isochronous control requirement of the differential pair is obtained, the integrity of the signal is ensured on the basis of meeting the isochronous control requirement of the time delay difference, and the signal quality of the differential pair is improved.
Description
Technical Field
The present application relates to the field of electronic circuit technologies, and in particular, to a method, an apparatus, a device, and a storage medium for controlling isochronous data of a differential pair.
Background
At present, when a large-scale high-density Printed Circuit Board (PCB) design is performed by using a differential pair (Diff Pairs), isochronous control of the differential pair has strict requirements.
In the related art, a layered snake-shaped winding mode is usually adopted for a differential pair single wire positioned in an inner layer of a PCB to change the absolute length of the differential pair single wire, so as to change the signal transmission time delay of the corresponding single wire and realize the isochronous control of the differential pair. However, the delay difference of the differential pair obtained by the method still may have a large delay, and cannot meet the standard of the isochronous control requirement of the differential pair in the PCB design, resulting in a great reduction in the signal quality of the differential pair.
Disclosure of Invention
The application provides an isochronous control method, an isochronous control device, isochronous control equipment and a storage medium for realizing a standard of a differential peer-to-peer control requirement in PCB design and improving signal quality of a differential pair.
In a first aspect, the present application provides an isochronous control method for differential pairs, where the differential pairs include a surface differential pair on a surface layer of a printed circuit board, the surface differential pair includes a first trace and a second trace, and a length of the first trace is smaller than a length of the second trace, and the isochronous control method includes:
acquiring initial time delay difference of the differential pair;
and according to the initial time delay difference, performing at least one of the following adjustment operations to obtain a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair:
adjusting the width of the first routing from the initial width to a first width, wherein the first width is greater than the initial width;
adjusting the width of the second routing wire from the initial width to a second width, wherein the second width is smaller than the initial width;
and adjusting the height between the second routing line and the reference layer from the initial height to a target height.
In one possible implementation, adjusting the height between the second trace and the reference layer from an initial height to a target height includes:
and adjusting the height between the second routing and the reference layer to a target height from the initial height by hollowing the reference layer.
In a possible implementation manner, obtaining an initial delay difference of a differential pair includes:
acquiring an initial width and an initial height, wherein the initial widths of the first routing and the second routing are the same;
and determining the initial time delay difference of the differential pair according to the initial width and the initial height.
In a possible implementation manner, determining an initial delay difference of a differential pair according to an initial width and an initial height includes:
acquiring the copper foil thickness of a first wire and a second wire, wherein the copper foil thickness of the first wire is the same as that of the second wire;
carrying out comprehensive equivalent dielectric constant estimation processing on the initial width, the initial height and the copper foil thickness by adopting an estimation model to obtain a comprehensive equivalent dielectric constant, wherein the estimation model is used for reflecting the relation between the initial width and the initial height and the comprehensive equivalent dielectric constant;
determining the signal propagation rates of the first wire and the second wire according to the comprehensive equivalent dielectric constant;
and determining the initial time delay difference of the differential pair according to the signal propagation rate.
In one possible implementation, obtaining a differential pair with a delay difference satisfying an isochronous control requirement of the differential pair includes:
determining a target time delay difference according to the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer;
if the target time delay difference meets the control requirement of differential peer-to-peer time, obtaining a differential pair of which the time delay difference meets the control requirement of differential peer-to-peer time;
and if the target time delay difference does not meet the control requirement of the differential peer-to-peer, repeatedly executing the adjustment operation.
In one possible implementation manner, determining the target delay inequality according to the adjusted width of the first trace, the adjusted width of the second trace, and the adjusted height between the second trace and the reference layer includes:
and performing time delay difference simulation processing on the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer by adopting a simulation model to obtain the target time delay difference.
In one possible implementation, the method for controlling the isochronous data of the differential pair further includes:
if the time delay difference obtained by executing the adjustment operation does not meet the control requirement of differential peer-to-peer, determining the target length of the first routing according to the obtained time delay difference;
and adjusting the length of the first wire to be the target length.
In a second aspect, the present application provides an isochronous control apparatus for a differential pair, where the differential pair includes a surface differential pair located on a surface layer of a printed circuit board, the surface differential pair includes a first trace and a second trace, a length of the first trace is smaller than a length of the second trace, and the isochronous control apparatus includes:
the acquisition module is used for acquiring the initial time delay difference of the differential pair;
and the adjusting module is used for executing at least one of the following adjusting operations according to the initial time delay difference so as to obtain a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair:
adjusting the width of the first routing from the initial width to a first width, wherein the first width is greater than the initial width;
adjusting the width of the second routing wire from the initial width to a second width, wherein the second width is smaller than the initial width;
and adjusting the height between the second routing line and the reference layer from the initial height to a target height.
In a possible implementation manner, the adjusting module is specifically configured to:
and adjusting the height between the second routing and the reference layer to a target height from the initial height by hollowing the reference layer.
In a possible implementation manner, the obtaining module is specifically configured to:
acquiring an initial width and an initial height, wherein the initial widths of the first routing wire and the second routing wire are the same;
and determining the initial time delay difference of the differential pair according to the initial width and the initial height.
In a possible implementation manner, the obtaining module may be further configured to:
acquiring the copper foil thickness of a first wire and a second wire, wherein the copper foil thickness of the first wire is the same as that of the second wire;
carrying out comprehensive equivalent dielectric constant estimation processing on the initial width, the initial height and the copper foil thickness by adopting an estimation model to obtain a comprehensive equivalent dielectric constant, wherein the estimation model is used for reflecting the relation between the initial width and the initial height and the comprehensive equivalent dielectric constant;
determining the signal propagation rates of the first wire and the second wire according to the comprehensive equivalent dielectric constant;
and determining the initial time delay difference of the differential pair according to the signal propagation rate.
In one possible implementation manner, the adjusting module may be further configured to:
determining a target time delay difference according to the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer;
if the target time delay difference meets the control requirement of differential peer-to-peer time, obtaining a differential pair with the time delay difference meeting the control requirement of differential peer-to-peer time;
and if the target time delay difference does not meet the control requirement of the differential peer-to-peer, repeatedly executing the adjustment operation.
In one possible implementation manner, the adjusting module may be further configured to:
and performing time delay difference simulation processing on the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer by adopting a simulation model to obtain the target time delay difference.
In one possible implementation, the differential pair isochronous control apparatus further includes a determining module, where the determining module is configured to:
if the time delay difference obtained by executing the adjustment operation does not meet the control requirement of differential peer-to-peer, determining the target length of the first routing according to the obtained time delay difference;
and adjusting the length of the first wire to be the target length.
In a third aspect, the present application provides an electronic device, comprising:
at least one processor;
and a memory coupled to the at least one processor;
wherein the memory is used for storing computer-executable instructions, which are executed by the at least one processor to enable the at least one processor to perform the method provided by the first aspect.
In a fourth aspect, the present application provides a computer-readable storage medium having stored thereon computer-executable instructions for implementing the method provided in the first aspect when executed.
In a fifth aspect, the present application provides a program product comprising computer executable instructions. When executed by a computer, the instructions implement the method provided by the first aspect.
According to the differential pair isochronous control method, the differential pair isochronous control device, the differential pair isochronous control equipment and the differential pair isochronous control storage medium, the initial time delay difference of the differential pair on the surface layer of the PCB is obtained, the width of at least one of the first wire and the second wire in the differential pair and/or the height between the second wire and the reference layer are/is further adjusted according to the initial time delay difference, the differential pair with the time delay difference meeting the differential pair isochronous control requirements is obtained, and then the signal quality of the differential pair is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.
FIG. 1 is a schematic diagram of a prior art differential pair isochronous control architecture;
fig. 2 is a schematic diagram of an application scenario provided in an embodiment of the present application;
FIG. 3 is a flowchart illustrating an isochronous control method for differential pairs according to an embodiment of the present disclosure;
FIG. 4 is a flowchart illustrating an isochronous control method for differential pairs according to another embodiment of the present application;
fig. 5 is a flowchart of an isochronous control method for differential pairs according to another embodiment of the present application;
fig. 6a is a schematic structural diagram of an initial routing of a differential pair according to an embodiment of the present application;
fig. 6b is a schematic structural diagram of the differential pair routing after adjustment according to the embodiment of the present application;
fig. 6c is a schematic structural diagram of an initial delay inequality simulation result of a differential pair according to an embodiment of the present application;
fig. 6d is a schematic structural diagram of a delay inequality simulation result after differential pair routing adjustment according to the embodiment of the present application;
fig. 7 is a schematic structural diagram of a differential peer-to-peer control device according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Specific embodiments of the present application have been shown by way of example in the drawings and will be described in more detail below. These drawings and written description are not intended to limit the scope of the inventive concepts in any manner, but rather to illustrate the inventive concepts to those skilled in the art by reference to specific embodiments.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
When large-scale high-density PCB design is carried out, the isochronous control requirement of a high-speed differential pair is strict, the time delay difference is required to be controlled to be about 0.8ps-1ps by general design standards, and the smaller the differential pair single-wire time delay difference is, the better the differential pair single-wire time delay difference is. In an actual PCB design, a differential pair may have a time delay difference exceeding the standard of the isochronous control requirement during the routing process, and therefore, an engineer is required to solve the problem by optimizing the routing of the differential pair. In the related technology, the absolute length of the differential pair single wire is changed by adopting a mode of carrying out layered snake-shaped winding on the differential pair single wire positioned in an inner layer of a PCB, so that the signal transmission time delay of the corresponding single wire is changed, and the isochronous control of the differential pair is realized. However, the method can only restrict the length of the differential pair, and due to the influence of the transmission medium, the propagation rates of the signals in the inner layer and the surface layer of the differential pair are different, so that the matching of the absolute lengths of the differential pair routing cannot guarantee the isochronous control of the signal delay. In addition, as shown in fig. 1, the black dashed frame 11 is internally provided with an inner-layer wiring manner, and it can be seen from the drawing that the inner-layer differential pair is wired in a snake-shaped winding manner, which changes the width of the wiring in the differential pair, and further causes severe impedance mismatch of the differential pair, and simultaneously causes crosstalk to be poor, affects the integrity of signals, and greatly reduces the quality of signals. In addition, also can see from fig. 1, what the way of winding the serpentine can be very big takes up PCB wiring space, with around via hole and walk line and produce the interference, the space is generally less on high-density complicated PCB, wind the serpentine can cause the waste of valuable wiring space, also can increase the wiring degree of difficulty of Layout engineer simultaneously for research and development cost rises.
Based on the above problem, in the embodiment of the present application, the propagation rate of the signal is changed by changing the width of the single line in the surface layer differential pair and changing the distance between the single line and the reference layer, so as to control the time delay of signal propagation, and to implement the isochronous compensation of the differential pair. The isochronous control method provided by the embodiment of the application does not need to perform snake-shaped winding processing on the inner layer differential pair, so that the signal integrity of the inner layer differential pair is greatly improved while the differential pair is ensured to meet the isochronous control requirement, and the signal quality of the inner layer differential pair is ensured.
For ease of understanding, the application scenario of the present application will be described first.
Fig. 2 is a schematic diagram of an application scenario provided in an embodiment of the present application. As shown in fig. 2, the differential pair trace in the PCB includes a differential pair surface layer trace 21 and a differential pair inner layer trace 22, wherein both the inner layer trace and the surface layer trace are composed of two single lines. It will be appreciated that the inner traces are located in the middle layer of the PCB and the surface traces are located on the surface layer of the PCB.
As can be seen from the figure, there are corners in the inner layer trace, which may cause a delay difference between the single lines in the differential pair. The delay inequality mentioned in the embodiment of the present application is the delay inequality between the single lines in the differential pair, where the length of the single line includes both the length of the inner layer trace and the length of the surface layer trace.
Fig. 3 is a flowchart of an isochronous control method for a differential pair according to an embodiment of the present disclosure. As shown in fig. 3, the method for isochronous control of a differential pair includes the steps of:
s301, acquiring the initial time delay difference of the differential pair.
Optionally, the differential pair comprises a surface differential pair located on a surface of the printed circuit board. Specifically, the surface layer differential pair includes a first trace and a second trace, wherein the length of the first trace is smaller than the length of the second trace.
The first trace and the second trace of the differential pair may be referred to as a differential line, and may also be referred to as a differential pair wiring. Differential pair routing is a technique that requires the creation of a transmission system on a PCB that facilitates the balancing of differential signals (equal and inverted signals). The differential lines are typically connected to an external differential signaling system, which uses twisted pair wires for signal transmission. One signal line of the twisted pair is used for transmitting an original signal, and the other signal line of the twisted pair is used for transmitting a signal which is opposite in phase to the original signal. Differential signaling is a method used to solve the problem that there is no good reference ground connection between the signal source and the load, and it has an inherent suppression effect on the interference of the electronic product. The differential signal is also called differential signal, and two identical signals with opposite polarities are used for describing one path of data. In order to ensure that the two signals are completely consistent, the differential lines are kept parallel during wiring, and the line width and the line spacing are kept unchanged. The parallel mode can be the same wiring layer or two adjacent layers above and below, and the line spacing is determined by the differential impedance.
The initial delay difference of the differential pair is the difference between the delay of the first wire and the delay of the second wire in the differential pair.
And S302, according to the initial time delay difference, at least one of the following adjustment operations is executed to obtain a differential pair with a time delay difference meeting the isochronous control requirement of the differential pair:
adjusting the width of the first routing from the initial width to a first width, wherein the first width is greater than the initial width; adjusting the width of the second routing line from the initial width to a second width, wherein the second width is smaller than the initial width; and adjusting the height between the second routing line and the reference layer from the initial height to a target height.
The PCB is a multilayer printed circuit board, and when the PCB is designed, once the laminated structure of the printed circuit board is determined, the minimum distance between the differential pair layer line and the reference plane is also fixed, namely cannot be changed any more, so that the height between the second line and the reference layer can be adjusted only by changing the distance between the second line of the differential pair and the adjacent layer. Illustratively, the reference layer may be a wire ground. In some embodiments, the height between the second trace and the reference layer is adjusted from an initial height to a target height by hollowing the reference layer. It is understood that the reference layer may be a copper foil layer, i.e. the height between the second trace and the reference layer is changed by hollowing out the copper foil layer.
According to the initial time delay difference, performing adjustment operation to obtain a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair, wherein in one possible implementation manner, only one item is adjusted, namely the width of the second routing and the height between the second routing and the reference layer are kept unchanged, and the width of the first routing is adjusted to the first width from the initial width; or keeping the width of the first wire and the height between the second wire and the reference layer unchanged, and adjusting the width of the second wire from the initial width to a second width; or keeping the width of the first wire and the width of the second wire unchanged, and adjusting the height between the second wire and the reference layer from the initial height to the target height to obtain a differential pair with the time delay difference meeting the requirement of differential pair isochronous control.
In another possible implementation manner, any two of the above may be adjusted simultaneously, that is, the width of the second trace is kept unchanged, the height between the second trace and the reference layer is respectively adjusted from the initial height to the target height, and the width of the first trace is adjusted from the initial width to the first width; or keeping the width of the first wire unchanged, respectively adjusting the height between the second wire and the reference layer from the initial height to the target height, and adjusting the width of the second wire from the initial width to the second width; or keeping the height between the second wire and the reference layer unchanged, respectively adjusting the width of the first wire from the initial width to the first width, and adjusting the width of the second wire from the initial width to the second width, so as to obtain a differential pair with the time delay difference meeting the requirement of differential pair isochronous control.
In another possible implementation manner, the three items may be adjusted simultaneously, that is, the height between the second trace and the reference layer is adjusted from the initial height to the target height, the width of the first trace is adjusted from the initial width to the first width, and the width of the second trace is adjusted from the initial width to the second width, so as to obtain a differential pair with a delay difference meeting the isochronous control requirement of the differential pair.
Specifically, when the width of the first wire is adjusted, the width of the first wire needs to be increased on the basis of the initial width, and when the width of the second wire is adjusted, the width of the second wire needs to be decreased on the basis of the initial width.
In the embodiment, the initial time delay difference of the differential pair on the surface layer of the PCB is obtained; and according to the initial time delay difference, adjusting the width of the first wire from the initial width to the first width, and/or adjusting the width of the second wire from the initial width to the second width, and/or adjusting the height between the second wire and the reference layer from the initial height to the target height, and adjusting at least one of the operations to obtain a differential pair with the time delay difference meeting the requirement of the differential pair isochronous control. According to the method, the shape, namely the width, of the differential pair routing on the surface layer of the PCB and the distance from a single line to the reference layer are adjusted, so that the isochronous control requirement of the differential pair is met, meanwhile, the integrity of signals on the inner layer of the PCB is ensured, and the signal quality of the differential pair is improved.
Fig. 4 is a flowchart of an isochronous control method for a differential pair according to another embodiment of the present application. This embodiment is a detailed description of step S301 in the previous embodiment. As shown in fig. 4, the obtaining of the initial delay difference of the differential pair may specifically include the following steps:
s401, acquiring an initial width and an initial height.
Optionally, the initial widths of the first trace and the second trace are the same. The initial height is an initial distance between the second trace and the reference layer.
And S402, determining the initial time delay difference of the differential pair according to the initial width and the initial height.
In some embodiments, determining the initial delay difference of the differential pair according to the initial width and the initial height may include the following steps:
s4021, acquiring the thickness of the copper foil of the first wire and the second wire.
Optionally, the thickness of the copper foil of the first trace is the same as that of the second trace.
S4022, estimating the initial width, the initial height and the thickness of the copper foil by using an estimation model to obtain the comprehensive equivalent dielectric constant.
Optionally, an estimation model is used to reflect the relationship of the initial width and initial height with respect to the integrated equivalent dielectric constant. For example, the estimation model may be represented by the following formula:
wherein epsilon is the comprehensive equivalent dielectric constant, epsilon r is the relative dielectric constant of the PCB material (the air relative dielectric constant is 1.006), W represents the initial width, H represents the initial height, and M represents the copper foil thickness of the first routing line and the second routing line. F is a variable related to the initial width and the initial height, and specifically, the relationship between F and the initial width and the initial height can be expressed by the following formula:
it can be seen from the above formula that when the ratio of the initial width to the initial height is different, the value of F is also different.
The integrated equivalent dielectric constant is used to indicate the integrated equivalent dielectric constant between the PCB and the air and green oil medium.
S4023, determining the signal propagation rate of the first wire and the second wire according to the comprehensive equivalent dielectric constant.
It can be understood that, signal transmission to the PCB surface differential pair trace is performed in a medium corresponding to the integrated equivalent dielectric constant, and therefore, the size of the integrated equivalent dielectric constant may affect the signal propagation rate of the PCB surface differential pair trace. Optionally, the relationship between the integrated equivalent dielectric constant and the signal propagation rate of the differential pair traces on the surface of the PCB may be expressed by the following formula:
where V represents the signal propagation rate. As can be seen from the above equation, the magnitude of the signal propagation rate is inversely related to the overall equivalent dielectric constant.
S4024, determining the initial time delay difference of the differential pair according to the signal propagation rate.
It will be appreciated that the length of a single wire in a differential pair is determined by the distance between the two chips that need to be connected, as well as the actual routing requirements in the PCB.
Optionally, the length of the differential pair trace is obtained, and a ratio of the length of the trace to the signal propagation rate is used as the time delay of the differential pair trace. Illustratively, the length of the first trace in the differential pair is less than the length of the second trace. The delay can be expressed by the following equation:
T＝L/V
wherein T represents time delay and L represents the length of the trace.
Specifically, the time delays of the first wire and the second wire are respectively calculated, and the difference value between the time delay of the first wire and the time delay of the second wire is used as the initial time delay difference.
In this embodiment, the initial width and the initial height are obtained, and the initial delay difference of the differential pair is determined according to the initial width and the initial height, and in the method, the initial delay difference is obtained, and the delay difference between the first wire and the second wire of the differential pair is further adjusted according to the initial delay difference, so as to obtain the differential pair in which the delay difference meets the isochronous control requirement of the differential pair.
Fig. 5 is a flowchart of an isochronous control method for a differential pair according to another embodiment of the present application. This embodiment is the same as the above embodiment: and obtaining a detailed description of the differential pair with the time delay difference meeting the isochronous control requirement of the differential pair. The obtaining of the differential pair with the delay difference meeting the isochronous control requirement of the differential pair may specifically include the following steps:
s501, determining the target time delay difference according to the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer.
It can be understood that, according to different adjustment manners, the adjusted width of the first trace, the adjusted width of the second trace, and the adjusted height between the second trace and the reference layer may be different from the initial width and the initial height, or may be the same as the initial width and the initial height.
In some embodiments, the simulation model may be used to perform simulation processing on the adjusted width of the first trace, the adjusted width of the second trace, and the adjusted height between the second trace and the reference layer to obtain the target delay inequality. Illustratively, the simulation model may be an HFSS 3D simulation model.
It should be noted that the delay skew accuracy obtained by the estimation model is lower than that obtained by the simulation model. Optionally, the initial delay difference may also be obtained by performing simulation processing on a simulation model.
And S502, judging whether the target time delay difference meets the requirement of differential pair isochronous control.
Judging whether the target time delay difference meets the requirement of the differential pair isochronous control, if so, executing a step S503; if not, go to step S504.
Alternatively, the differential pair isochronous control requirement may be that the delay difference is less than a preset threshold. When the target time delay difference is smaller than a preset threshold value, the target time delay difference meets the control requirement of differential peer-to-peer; and when the target time delay difference is greater than or equal to a preset threshold value, the target time delay difference does not meet the control requirement of differential peer-to-peer. Illustratively, the preset threshold may be 1ps.
And S503, obtaining a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair.
And S504, repeatedly executing the adjusting operation.
Optionally, the adjusting operation is repeatedly executed until a differential pair with a delay difference meeting the isochronous control requirement of the differential pair is obtained. Specifically, the adjustment operation is similar to that described in the above embodiment, and is not described again here.
It can be understood that, there is a limit to the adjustment range for the widths of the first trace and the second trace of the differential pair and the height between the second trace and the reference layer, and when the above adjustment operations are performed and all adjustment parameters are adjusted to the limit, but a differential pair whose delay difference does not meet the requirement of the differential pair isochronous control still cannot be obtained, other adjustment manners need to be adopted. In a possible implementation manner, if the delay inequality obtained by executing the adjustment operation does not meet the differential peer-to-peer control requirement, determining a target length of the first routing according to the obtained delay inequality; and adjusting the length of the first wire to be the target length. Optionally, the length of the first trace may be adjusted by increasing the length of the first trace. Specifically, the increase of the trace length is determined by the delay difference obtained by performing the adjustment operation. Illustratively, if the delay difference of the isochronous control requirement is less than 1ps, and the delay difference obtained according to the above-mentioned adjustment operation is 1.3ps, the length compensation delay T =0.3ps of the first trace needs to be appropriately increased, so that the delay difference within the differential pair meets the isochronous control requirement, and then the differential pair with the delay difference meeting the isochronous control requirement of the differential pair is obtained.
In this embodiment, the target delay inequality is determined according to the adjusted width of the first wire, the adjusted width of the second wire, and the adjusted height between the second wire and the reference layer; and further determining the differential pair with the time delay difference meeting the isochronous control requirement of the differential pair by judging whether the target time delay difference meets the isochronous control requirement of the differential pair. According to the method, the wiring width of the surface layer differential pair and the height between the single line and the reference layer in the differential pair are adjusted, so that the obtained differential pair meets the requirement of isochronous control of the differential pair, the signal quality of the differential pair is improved, and the integrity of the inner layer differential pair signal is ensured.
In summary, the following describes in detail the technical effects of the differential pair isochronous control method provided in the embodiments of the present application with reference to the drawings.
Fig. 6a is a schematic structural diagram of initial differential pair routing provided in the embodiment of the present application, fig. 6b is a schematic structural diagram of adjusted differential pair routing provided in the embodiment of the present application, fig. 6c is a schematic structural diagram of an initial differential pair delay inequality simulation result provided in the embodiment of the present application, and fig. 6d is a schematic structural diagram of an adjusted differential pair routing delay inequality simulation result provided in the embodiment of the present application. As can be seen from fig. 6a, the initial widths of the first trace 61 and the second trace 62 in the initial trace of the differential pair are the same, and as can be seen from fig. 6b, the widths of the first trace 61 and the second trace 62 after the adjustment of the trace of the differential pair are no longer the same, and as can be seen from comparing fig. 6a and fig. 6b, the width of the first trace 61 after the adjustment of the width is increased compared with the width of the first trace in the initial surface trace 21, and the width of the second trace 62 after the adjustment of the width is decreased compared with the width of the second trace in the initial surface trace 21. In fig. 6b, the height between the second trace 62 and the reference layer of the surface differential pair is also adjusted (not shown), so that the height between the second trace 62 and the reference layer is increased, and no adjustment is made to the inner differential pair. It can be seen from fig. 6c that the initial delay difference is 3.325ps, which is far from meeting the differential pair isochronous control requirement compared to 1ps of the differential peer isochronous control requirement. After the differential pair isochronous control method provided by the embodiment of the present application is adopted for adjustment, as can be seen from fig. 6d, the adjusted time delay difference is 0.865ps, and the isochronous control requirement of the differential pair is satisfied.
Fig. 7 is a schematic structural diagram of an isochronous control apparatus for differential pairs according to an embodiment of the present application. The isochronous control apparatus 70 for a differential pair according to the present embodiment includes: an acquisition module 710 and an adjustment module 720.
The obtaining module 710 is configured to obtain an initial delay difference of the differential pair; an adjusting module 720, configured to perform at least one of the following adjusting operations according to the initial delay difference to obtain a differential pair with a delay difference satisfying the isochronous control requirement of the differential pair: adjusting the width of the first routing from the initial width to a first width, wherein the first width is greater than the initial width; adjusting the width of the second routing line from the initial width to a second width, wherein the second width is smaller than the initial width; and adjusting the height between the second routing and the reference layer from the initial height to a target height.
In a possible implementation manner, the adjusting module 720 is specifically configured to: and adjusting the height between the second routing and the reference layer to a target height from the initial height by hollowing the reference layer.
In a possible implementation manner, the obtaining module 710 is specifically configured to: acquiring an initial width and an initial height, wherein the initial widths of the first routing and the second routing are the same; and determining the initial time delay difference of the differential pair according to the initial width and the initial height.
In a possible implementation manner, the obtaining module 710 may further be configured to: acquiring the copper foil thickness of a first wire and a second wire, wherein the copper foil thickness of the first wire is the same as that of the second wire; carrying out comprehensive equivalent dielectric constant estimation processing on the initial width, the initial height and the copper foil thickness by adopting an estimation model to obtain a comprehensive equivalent dielectric constant, wherein the estimation model is used for reflecting the relation between the initial width and the initial height and the comprehensive equivalent dielectric constant; determining the signal propagation rates of the first wire and the second wire according to the comprehensive equivalent dielectric constant; and determining the initial time delay difference of the differential pair according to the signal propagation rate.
In one possible implementation, the adjusting module 720 may further be configured to: determining a target time delay difference according to the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer; if the target time delay difference meets the control requirement of differential peer-to-peer time, obtaining a differential pair with the time delay difference meeting the control requirement of differential peer-to-peer time; and if the target time delay difference does not meet the control requirement of the differential peer-to-peer, repeatedly executing the adjustment operation.
In one possible implementation, the adjusting module 720 may further be configured to: and performing time delay difference simulation processing on the adjusted width of the first routing wire, the adjusted width of the second routing wire and the adjusted height between the second routing wire and the reference layer by using a simulation model to obtain a target time delay difference.
In one possible implementation, the differential pair isochronous control apparatus further includes a determining module (not shown) configured to: if the time delay difference obtained by executing the adjustment operation does not meet the control requirement of differential peer-to-peer, determining the target length of the first routing according to the obtained time delay difference; the length of the first routing is adjusted to be the target length.
The apparatus provided in this embodiment may be used to perform the method steps of the foregoing method embodiments, and the specific implementation manner and the technical effect are similar, which are not described herein again.
Fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 8, the electronic device 80 includes:
at least one processor 801; and
a memory 802 communicatively coupled to the at least one processor 801; wherein the content of the first and second substances,
the memory 802 stores instructions executable by the at least one processor 801 to enable the at least one processor 801 to perform the method steps as described above.
For a specific implementation process of the processor 801, reference may be made to the above method embodiment, and a specific implementation manner and a technical effect are similar, which are not described herein again.
The embodiment of the present application provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and the computer-executable instructions are executed by a processor to implement the method steps in the foregoing method embodiments, and specific implementation manners and technical effects are similar, and are not described herein again.
The embodiment of the application also provides a program product, and the program product comprises computer execution instructions. When the computer executes the instructions, the method steps in the above method embodiments are implemented in a similar manner and with similar technical effects, which are not described herein again.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It will be understood that the present application is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (10)
1. An isochronous control method for a differential pair, wherein the differential pair includes a surface differential pair on a surface layer of a printed circuit board, the surface differential pair includes a first trace and a second trace, a length of the first trace is smaller than a length of the second trace, and the isochronous control method includes:
acquiring the initial time delay difference of the differential pair;
and according to the initial time delay difference, performing at least one of the following adjustment operations to obtain a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair:
adjusting the width of the first routing line from an initial width to a first width, wherein the first width is greater than the initial width;
adjusting the width of the second trace from an initial width to a second width, wherein the second width is smaller than the initial width;
and adjusting the height between the second routing line and the reference layer from an initial height to a target height.
2. The method according to claim 1, wherein the adjusting the height between the second trace and the reference layer from an initial height to a target height comprises:
and adjusting the height between the second routing line and the reference layer to a target height from an initial height by hollowing the reference layer.
3. The method of claim 1, wherein the obtaining the initial delay difference of the differential pair comprises:
acquiring the initial width and the initial height, wherein the initial widths of the first routing and the second routing are the same;
and determining the initial time delay difference of the differential pair according to the initial width and the initial height.
4. The method of claim 3, wherein determining the initial delay difference of the differential pair according to the initial width and the initial height comprises:
acquiring the copper foil thickness of the first wire and the second wire, wherein the copper foil thickness of the first wire is the same as that of the second wire;
carrying out comprehensive equivalent dielectric constant estimation processing on the initial width, the initial height and the copper foil thickness by adopting an estimation model to obtain a comprehensive equivalent dielectric constant, wherein the estimation model is used for reflecting the relation between the initial width and the initial height relative to the comprehensive equivalent dielectric constant;
determining the signal propagation rates of the first wire and the second wire according to the comprehensive equivalent dielectric constant;
and determining the initial time delay difference of the differential pair according to the signal propagation rate.
5. The method of any one of claims 1 to 4, wherein obtaining the differential pair with the delay difference satisfying the isochronous control requirement of the differential pair comprises:
determining a target time delay difference according to the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer;
if the target time delay difference meets the control requirement of differential peer-to-peer time, obtaining a differential pair of which the time delay difference meets the control requirement of differential peer-to-peer time;
and if the target time delay difference does not meet the control requirement of differential peer-to-peer, repeatedly executing the adjustment operation.
6. The method according to claim 5, wherein the determining a target delay difference according to the adjusted width of the first trace, the adjusted width of the second trace, and the adjusted height between the second trace and the reference layer comprises:
and performing time delay difference simulation processing on the adjusted width of the first wire, the adjusted width of the second wire and the adjusted height between the second wire and the reference layer by adopting a simulation model to obtain the target time delay difference.
7. The method of any of claims 1 to 4, further comprising:
if the delay inequality obtained by executing the adjustment operation does not meet the control requirement of differential peer-to-peer, determining the target length of the first routing according to the obtained delay inequality;
and adjusting the length of the first routing as a target length.
8. An isochronous control apparatus for differential pairs, wherein the differential pairs comprise surface differential pairs on a surface of a printed circuit board, the surface differential pairs include a first trace and a second trace, a length of the first trace is smaller than a length of the second trace, and the isochronous control apparatus includes:
an obtaining module, configured to obtain an initial delay difference of the differential pair;
and the adjusting module is used for executing at least one of the following adjusting operations according to the initial time delay difference so as to obtain a differential pair with the time delay difference meeting the isochronous control requirement of the differential pair:
adjusting the width of the first trace from an initial width to a first width, wherein the first width is greater than the initial width;
adjusting the width of the second routing line from an initial width to a second width, wherein the second width is smaller than the initial width;
and adjusting the height between the second routing line and the reference layer from an initial height to a target height.
9. An electronic device, comprising:
at least one processor;
and a memory communicatively coupled to the at least one processor;
wherein the memory is to store instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 7.
10. A computer-readable storage medium having computer-executable instructions stored therein, which when executed by a processor, are configured to implement the method of any one of claims 1 to 7.
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| CN202211144630.7A CN115496026A (en) | 2022-09-20 | 2022-09-20 | Method, device, equipment and storage medium for controlling isochronism of differential pair |
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| CN202211144630.7A CN115496026A (en) | 2022-09-20 | 2022-09-20 | Method, device, equipment and storage medium for controlling isochronism of differential pair |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115695104A (en) * | 2023-01-03 | 2023-02-03 | 成都登临科技有限公司 | Method, device, electronic equipment and medium for compensating differential line |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115695104A (en) * | 2023-01-03 | 2023-02-03 | 成都登临科技有限公司 | Method, device, electronic equipment and medium for compensating differential line |
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