CN115484733A - Printed circuit board, preparation method thereof and network communication device - Google Patents

Printed circuit board, preparation method thereof and network communication device Download PDF

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Publication number
CN115484733A
CN115484733A CN202110602890.3A CN202110602890A CN115484733A CN 115484733 A CN115484733 A CN 115484733A CN 202110602890 A CN202110602890 A CN 202110602890A CN 115484733 A CN115484733 A CN 115484733A
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CN
China
Prior art keywords
metal layer
layer
core
printed circuit
circuit board
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Pending
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CN202110602890.3A
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Chinese (zh)
Inventor
吴海娜
谢二堂
高峰
樊建新
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN202110602890.3A priority Critical patent/CN115484733A/en
Publication of CN115484733A publication Critical patent/CN115484733A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A printed circuit board, a manufacturing method thereof and a network communication device are provided. The printed circuit board comprises a bottom layer structure, a core board structure and a surface layer structure; the core board structure comprises a first core layer, a first metal layer and a second metal layer; the core board structure is provided with a first through hole, and the first metal layer is connected with the second metal layer through the first through hole; the skin structure comprises at least a first skin pp layer and a first skin metal layer; the surface layer structure is provided with a second through hole, the first surface layer metal layer is connected with a second metal layer in the core board structure through the second through hole, and the vertical projection of one end, close to the bottom layer structure, of the second through hole on the bottom layer structure is partially overlapped with the vertical projection of one end, far away from the bottom layer structure, of the first through hole on the bottom layer structure. The stacked hole structure formed by the first via hole and the second via hole in the printed circuit board can reduce the size of the connecting structure, so that the layout area of other devices can be enlarged.

Description

Printed circuit board, preparation method thereof and network communication device
Technical Field
The present application relates to the field of communications technologies, and in particular, to a printed circuit board, a manufacturing method thereof, and a network communication device.
Background
As signal rates of single boards in communication systems are increasing, solder joint densities are increasing, and sizes of Ball Grid Arrays (BGAs) are increasing, printed Circuit Board (PCB) layout and routing densities are increasing. Of course, it is desirable to suppress signal crosstalk and increase via impedance while providing layout and routing density to the printed circuit board to ensure signal integrity. Therefore, the demand for high-density outgoing lines and the ability of co-current between layers of the PCB is becoming stronger.
In the prior art, a deep micropore structure is designed on a PCB, and a power supply layer is arranged on a metal layer close to a surface layer through the deep micropore structure for processing, so that the number of power supply holes in an inner layer of the PCB is reduced, and the problem of conflict between a power supply module and a high-speed wire wiring channel in a high-density single board is solved. However, when the deep micro holes are used to connect multiple layers in the prior art, the diameter of the deep micro holes on the printed circuit board is large, which results in a large area occupied by the deep micro holes on the printed circuit board, thereby affecting the layout of other devices.
Therefore, it is an urgent problem to provide a printed circuit board with a small-sized connection structure to achieve stable connection of deep metal layers.
Disclosure of Invention
The application provides a printed circuit board, a manufacturing method thereof and a network communication device, which are used for realizing stable connection of deep metal layers of the printed circuit board through a small-size connection structure.
In a first aspect, the present application provides a printed circuit board including a substructure, a skin structure, and a core structure of a cured sheet disposed between the skin structure and the substructure. Specifically, the core board structure comprises a first core layer, and a first metal layer and a second metal layer are respectively arranged on two sides of the first core layer. Illustratively, the skin structure includes a first skin prepreg pp layer and a first skin metal layer. Of course, the skin structure may also comprise other structural layers. Generally speaking, along surface layer structure to substructure direction, the sequence of each structural layer is in proper order: the metal layer comprises a first surface metal layer, a first surface pp layer, a second metal layer, a first core layer, a first metal layer and a bottom layer structure. It is noted that the core structure has a first via formed thereon, and the first metal layer is connected to the second metal layer through the first via. It should be understood that the aperture size of the first via near the end of the underlying structure is larger than the aperture size of the first via far from the end of the underlying structure, which limits the preparation direction of the first via to the direction of the first metal layer pointing to the second metal layer. The surface layer structure is provided with a second through hole, and the first surface metal layer in the surface layer structure is connected with the second metal layer in the core board structure through the second through hole. Of course, in order to achieve the electrical connection between the surface structure and the core board structure, the vertical projection of the end of the second via close to the underlying structure on the underlying structure partially overlaps the vertical projection of the end of the first via far from the underlying structure on the underlying structure.
The application provides a printed circuit board adopts first via hole and second via hole cooperation to form and folds the hole structure to connect the first metal level in first top layer metal level and the core board structure through this and fold the hole structure, can realize printed circuit board's deep metal layer stable connection. Meanwhile, compared with the structure setting that only one deep micropore structure is adopted to connect the metal layers with the same number of layers, the size of the connection structure can be reduced by the hole overlapping structure in the printed circuit board, and therefore the layout area of other devices can be enlarged.
When specifically setting up the printed circuit board that this application provided, can set up: the vertical projection of one end of the second via hole close to the underlying structure on the underlying structure covers the vertical projection of one end of the first via hole far away from the underlying structure on the underlying structure. So as to increase the connection area of the first surface metal layer and the first metal layer and ensure the stable connection of the first surface metal layer and the first metal layer.
When the skin structure is provided, there are many possibilities for providing the structure layer of the skin structure, and specifically, there are the following possibilities.
In a possible implementation, the skin structure comprises only the first skin pp layer and the first skin metal layer. The first via hole is matched with the second via hole, so that the connection of the three metal layers, namely the first surface metal layer, the second metal layer and the first metal layer, can be realized.
In another possible implementation, the skin structure comprises, in addition to the first skin pp layer and the first skin metal layer, a core and a second skin pp layer, the core and the second skin pp layer are both located between the first skin pp layer and the core structure, and the core is located between the first skin pp layer and the second skin pp layer. Specifically, the core board comprises a second core layer, a second surface metal layer is formed on one side of the second core layer facing the first surface pp layer, and a third surface metal layer is formed on one side of the second core layer facing the second surface pp layer. The second via hole penetrates through the first surface layer pp layer, the second core layer and the second surface layer pp layer. It is noted that the first surface metal layer, the second surface metal layer and the third surface metal layer are sequentially arranged along the surface structure pointing to the core board structure.
When the second via hole is used to connect the first surface metal layer and the first metal layer in the core board structure, the second via hole may be used to connect the first surface metal layer and the first metal layer, and a connection relationship may exist between the second surface metal layer and the third surface metal layer and the hole wall of the second via hole, specifically, at least the following possible specific implementation manners exist.
In a possible specific implementation manner, the first via hole is used to connect the first surface layer metal and the first metal layer, and the second surface layer metal layer is provided with a first notch at a position corresponding to the second via hole, so as to avoid the first surface layer metal layer filled in the second via hole. Meanwhile, a second notch is formed in the third surface metal layer at the position corresponding to the second through hole so as to avoid the first surface metal layer filled in the second through hole.
In another possible specific implementation manner, the first via hole is used to connect the first surface layer metal and the first metal layer, the second via hole is used to connect the second surface layer metal layer and the first metal layer, and the third surface layer metal layer is provided with a notch at a position corresponding to the second via hole to avoid the first surface layer metal layer filled in the second via hole.
In another possible specific implementation manner, the first via hole is used to connect the first surface layer metal and the first metal layer, the second via hole is used to connect the third surface layer metal layer and the first metal layer, and the second surface layer metal layer is provided with a notch at a position corresponding to the second via hole to avoid the first surface layer metal layer filled in the second via hole.
In another possible specific implementation manner, the first surface metal and the first metal layer are connected by using the first via hole, and the second surface metal layer, the third surface metal layer and the first metal layer are connected by using the second via hole.
In a second aspect, the present application further provides a method for manufacturing a printed circuit board, the method specifically including:
forming a bottom layer structure, a solidified sheet core board structure and a surface layer structure, wherein the core board structure comprises a first core layer, a first metal layer and a second metal layer, the first metal layer and the second metal layer are formed on two sides of the first core layer, the core board structure is provided with a first through hole, and the first metal layer is connected with the second metal layer through the first through hole; the surface layer structure at least comprises a first surface layer prepreg pp layer and a first surface layer metal layer;
pressing the bottom layer structure, the core board structure and the surface layer structure, so that the bottom layer structure and the surface layer structure are positioned on two sides of the core board structure, the requirement that the aperture size of one end, close to the bottom layer structure, of the first through hole is larger than the aperture size of one end, far away from the bottom layer structure, of the first through hole is met, the bottom layer structure is directly contacted with the first metal layer, and the first surface layer pp layer in the surface layer structure is directly contacted with the second metal layer;
and forming a second through hole in the surface layer structure by a composition process, so that the first surface layer metal layer is connected with a second metal layer in the core board structure through the second through hole, and the vertical projection of one end of the second through hole close to the underlying structure in the underlying structure is partially overlapped with the vertical projection of one end of the first through hole far away from the underlying structure in the underlying structure.
According to the preparation method provided by the application, the whole preparation process only adopts a one-time pressing process, the connection of multiple layers and deep metal layers can be realized, the flow can be simplified, and the cost can be reduced. In addition, as the whole preparation process is only subjected to one-time pressing, the plate is heated only once, the selectivity of the plate can be enlarged, and the process window can be widened. Meanwhile, the printed circuit board prepared by the preparation method of the printed circuit board provided by the application adopts the first via hole and the second via hole to form a stacked hole structure, and the first surface metal layer and the first metal layer in the core board structure are connected through the stacked hole structure, so that the stable connection of the deep metal layer of the printed circuit board can be realized. Compared with the structure arrangement that only one deep micro-hole structure is adopted to connect the metal layers with the same number, the stacked hole structure in the printed circuit board can reduce the size of the connection structure, so that the layout area of other devices can be enlarged.
In particular implementations of the method for fabricating a printed circuit board provided herein, the method for forming a core board structure may include:
the method comprises the following steps: forming a first metal layer and a second metal layer on two sides of the first core layer;
step two: forming a first via hole in the core board structure by a composition process along the direction of the first metal layer pointing to the second metal layer, wherein the first via hole penetrates through the first core layer and the first metal layer;
step three: carrying out glue removal operation by adopting a plasma laser technology, and cleaning carbon slag attached to the bottom and the wall of the first via hole;
step four: and forming an extension part of the first metal layer in the first via hole through an electroplating process, wherein the first metal layer is connected with the second metal layer through the extension part.
It should be understood that the fabrication direction of the second via is opposite to the fabrication direction of the first via.
In a third aspect, the present application provides a network communication device, which includes the printed circuit board in any of the technical solutions provided in the first aspect.
In a fourth aspect, the present application provides a network communication device comprising a printed circuit board prepared by the preparation method in any of the technical solutions provided by the second aspect.
Drawings
FIG. 1 is a schematic diagram of a printed circuit board according to the prior art;
FIG. 2 is a hole pattern introduction on a prior art PCB;
fig. 3 is a structural diagram of a first printed circuit board according to an embodiment of the present disclosure;
fig. 4 is a structural diagram of a second printed circuit board according to an embodiment of the present application;
fig. 5 is a structural diagram of a third printed circuit board provided in an embodiment of the present application;
fig. 6 is a structural diagram of a fourth printed circuit board according to an embodiment of the present disclosure;
fig. 7 is a structural diagram of a fifth printed circuit board according to an embodiment of the present application;
fig. 8 is a flowchart of a method for manufacturing a printed circuit board according to an embodiment of the present disclosure;
FIGS. 9a to 9h are schematic diagrams illustrating a variation of a manufacturing structure of a printed circuit board according to an embodiment of the present disclosure;
FIGS. 10 a-10 h are schematic diagrams illustrating a manufacturing structure of another printed circuit board according to an embodiment of the present disclosure;
FIGS. 11 a-11 g illustrate a prior art method of fabricating a printed circuit board;
FIGS. 12 a-12 g illustrate another prior art method of fabricating a printed circuit board;
FIGS. 13a to 13l illustrate another prior art method for manufacturing a printed circuit board;
FIGS. 14a to 14d illustrate another prior art method for manufacturing a printed circuit board;
fig. 15 is a schematic structural diagram of a network communication device according to an embodiment of the present application;
fig. 16 is a schematic structural diagram of a network communication device according to an embodiment of the present application;
fig. 17 is a schematic structural diagram of a network communication device according to an embodiment of the present application;
fig. 18 is a schematic structural diagram of a network communication device according to an embodiment of the present application;
fig. 19 is a schematic structural diagram of a network communication device according to another embodiment of the present application.
Detailed Description
To facilitate understanding of the Printed Circuit Board (PCB) provided in the embodiments of the present application, an application scenario of the printed circuit board provided in the embodiments of the present application is first described. The printed circuit board provided by the embodiment of the application can be applied to a high-density high-complexity single board of a network communication product. Specifically, the network router line card, the network board, the daughter card, the switch exchange board and the like can all use the printed circuit board provided by the embodiment of the application to realize the characteristics of high density and high complexity.
Fig. 1 is a schematic structural diagram of a printed circuit board 001 in the prior art. As in the structure shown in fig. 1, the printed circuit board 001 includes six metal layers, specifically, a metal layer L1', a metal layer L2', a metal layer L3', a metal layer L4', a metal layer L5', and a metal layer L6' as shown in fig. 1. As shown in fig. 1, when the metal layer L1' and the metal layer L5' are connected by the via D ', the dimension of the via D ' in the metal layer L1' is denoted by a ', the dimension of the via D ' in the metal layer L5' is denoted by B ', and the depth of the via D ' is H '.
It is noted that when multiple metal layers are connected using the via D ', the dimension a' of the via D 'in the metal layer L1' is further increased. Due to the large space occupied by the via D', the layout space of other devices on the printed circuit board 001 may be compressed. Meanwhile, since the via D ' connects multiple metal layers, the corner (exemplarily, the dashed circle portion in fig. 1) of the via D ' near the metal layer L5' is large, which causes insufficient copper thickness and a fracture phenomenon at the corner when the via D ' is copper-deposited to connect the metal layer L5', and thus has a reliability problem.
In view of the above, embodiments of the present disclosure provide a printed circuit board, which is used to realize stable connection of deep metal layers of the printed circuit board through a small-sized connection structure.
The terminology used in the following examples is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification of this application and the appended claims, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, such as "one or more", unless the context clearly indicates otherwise.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather mean "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
Fig. 2 shows the type of hole pattern on the existing printed circuit board 001. As shown in fig. 2, the printed circuit board 001 illustratively includes 18 metal layers, specifically L1', L2', L3', L4', L5', L6', L7', L8' to L18' as shown in fig. 2. Of course, the number of metal layers of the printed circuit board 001 is not limited thereto, and is only schematically illustrated here. With continued reference to fig. 2, the hole pattern E1' is used to communicate the metal layer L1' with the metal layer L4'; the hole pattern E2' is used for realizing the communication between the metal layer L1' and the metal layer L2 '; the hole pattern E3' is used for realizing the communication between the metal layer L1' and the metal layer L3'; the hole pattern E4' penetrates through the printed circuit board 001 and is used for realizing communication between the metal layer L1' and the metal layer L18', and whether the metal layer between the metal layer L1' and the metal layer L18' is also communicated or not needs to be set as required, which is not described herein again; the hole pattern E5' is used to connect the metal layer L1' to the metal layer L8', and similarly, whether the metal layer between the metal layer L1' and the metal layer L8' is also connected or not needs to be set as required, which is not described herein again.
Wherein, the hole type E1 'and the hole type E3' are called deep micropores; pass E2' is called micropore; the hole pattern E4' is called a via hole; the hole pattern E5' is called a blind hole. Specifically, the deep micro via is a via type corresponding to a blind via, a buried via, and a via hole, and may connect the metal layers L1 'to L3'/the metal layers L1 'to L4' or deeper.
Fig. 3 illustrates a structure of a printed circuit board 100 according to an embodiment of the present invention, as shown in fig. 3, the printed circuit board 100 includes a bottom layer structure 10, a core structure 20 of a cured piece, and a surface layer structure 30, wherein the core structure 20 is disposed between the surface layer structure 30 and the bottom layer structure 10. It is noted that the skin structure 30, core structure 20, and substructure 10 all include multiple structural layers. For example, with continued reference to the structure shown in fig. 3, along the direction of the surface structure 30 toward the underlying structure 10 (as indicated by the arrow in fig. 3), the surface structure 30 includes a first surface metal layer L1, a second surface metal layer L2, and a third surface metal layer L3 disposed in sequence; the core board structure 20 includes a second metal layer L4 and a first metal layer L5; the underlying structure 10 illustratively shows only the first underlying metal layer L6. It should be understood that the ith metal layer is identified as Li, with i being a positive integer, in the direction of the 3 arrow in the figure.
With continued reference to the structure shown in fig. 3, a first core layer C1 is further disposed between the second metal layer L4 and the first metal layer L5 in the core board structure 20, and the core board structure 20 can be used as a whole in the manufacturing process.
Referring to the structure shown in fig. 3, a first surface semi-cured pp layer P1 is further disposed between the first surface metal layer L1 and the second surface metal layer L2, a second core layer C2 is further disposed between the second surface metal layer L2 and the third surface metal layer L3, and a second surface pp layer P2 is disposed between the third surface metal layer L3 and the second metal layer L4. It should be understood that the second surface metal layer L2, the third surface metal layer L3 and the second core layer C2 form a core structure that is used as a whole during fabrication.
Of course, in order to separate the first bottom metal layer L6 in the bottom structure 10 from the first metal layer L5 in the core board structure 20, a first bottom pp layer P3 is further disposed between the first bottom metal layer L6 and the first metal layer L5. It should be understood that other structural layers may be disposed within the bottom layer structure 10, and the first bottom metal layer L6 and the first bottom pp layer P3 are only shown by way of example.
In summary, in the direction of arrows in fig. 3, the structure layer between the metal layers in the printed circuit board 100 provided in the embodiment of the present application is formed by pp layers and core layers alternately as insulating layers.
With reference to the structure shown in fig. 3, the core board structure 20 is formed with a first via F1, the first metal layer L5 is connected to the second metal layer L4 through the first via F1, and an aperture size of an end of the first via F1 close to the underlying structure 10 is larger than an aperture size of an end of the first via F1 far from the underlying structure 10. It should be understood that here the first via F1 has been filled to form a blind via structure. The surface layer structure 30 is provided with a second via hole F2, the second via hole F2 penetrates through the first surface layer pp layer P1, the second core layer C2 and the second surface layer pp layer P2, the second surface layer metal layer L2 is provided with a first gap G1 at a position corresponding to the second via hole F2, meanwhile, the third surface layer metal layer L3 is provided with a second gap G2 at a position corresponding to the second via hole F2, the first surface layer metal layer L1 is connected with the second metal layer L4 through the second via hole F2, and the second via hole F2 is a deep micro hole. It is noted that, in order to ensure that the first surface metal layer L1 can be connected to the first metal layer L5, a vertical projection of an end of the first via F1 far away from the underlying structure 10 on the underlying structure 10 overlaps a part of a vertical projection of an end of the second via F2 near the underlying structure 10 on the underlying structure 10.
The printed circuit board 100 provided in the embodiment of the present application adopts the first via hole F1 and the second via hole F2 to form a stacked hole structure, and the first surface metal layer L1 and the first metal layer L5 in the core board structure 20 are connected by the stacked hole structure, so that the stable connection of the deep metal layers of the printed circuit board 100 can be realized. Specifically, the second metal layer L4 is connected to the first surface metal layer L1, and the second metal layer L4 is connected to the first metal layer L5, so that the first surface metal layer L1 and the first metal layer L5 can be conducted through the transmission function of the second metal layer L4.
Compared with the structure arrangement that only one deep micro-hole structure is adopted to connect the metal layers with the same number of layers, the stacked hole structure in the printed circuit board 100 provided by the embodiment of the application can reduce the size of the connection structure, so that the layout area of other devices can be enlarged. For example, referring to the structure shown in fig. 3, the top size of the second via F2 in the stacked via structure formed by the first via F1 and the second via F2 is a. When the first surface metal layer L1 and the first metal layer L5 are also connected, the second via hole F2 in the stacked-hole structure provided in the embodiment of the present application only connects the first surface metal layer L1 to the second metal layer L4, and as compared with the size a' in the prior art shown in fig. 1, it is obvious that the size of the second via hole F2 in the first surface metal layer L1 can be reduced by using the stacked-hole structure provided in the embodiment of the present application. Illustratively, the thickness-to-diameter ratio (H/a) of the second via hole F2 in the stacked-hole structure provided by the embodiment of the present application may be 1.2.
When specifically setting up the printed circuit board 100 provided in the embodiment of the present application, it is possible to set up: the vertical projection of the end of the second via F2 close to the underlying structure 10 on the underlying structure 10 covers the vertical projection of the end of the first via F1 far from the underlying structure 10 on the underlying structure 10. The connecting area of the first surface metal layer L1 and the first metal layer L5 is increased, so that the first surface metal layer L1 and the first metal layer L5 are stably connected, and the reliability is enhanced. Illustratively, in the direction of the arrows in fig. 3, the bottom aperture size of the second via F2 is larger than the top aperture size of the first via F1.
Of course, the stacked-hole structure formed by the first via hole F1 and the second via hole F2 may be connected to other metal layers besides the first surface metal layer L1 and the first metal layer L5, and specifically includes at least the following implementation manners.
In a possible specific implementation manner, when the first surface layer metal L1 and the second surface layer metal L4 are connected by using a deep micro-hole (i.e., the second via hole F2), meanwhile, the second via hole F2 may be connected to the second surface layer metal L2, and only the third surface layer metal L3 is provided with the notch G2 at a position corresponding to the second via hole F2, so as to avoid the first surface layer metal L1 filled in the second via hole F2, as specifically shown in fig. 4. It is worth noting that the form of the first surface metal L1 connected to the second surface metal layer L2 and the second metal layer L4 is widely applied in the ground hole scene.
In another possible specific implementation manner, when the first surface metal layer L1 and the second metal layer L4 are connected by using a deep micro via (i.e., the second via F2), the second via F2 may be connected to the third surface metal layer L3, and only the second surface metal layer L2 is provided with the gap G1 at the position corresponding to the second via F2, so as to avoid the first surface metal layer L1 filled in the second via F2, as specifically shown in fig. 5. It is worth noting that the power supply hole in the form of connecting the first surface layer metal L1 with the third surface layer metal layer L3 and the second surface layer metal L4 is widely applicable.
In another possible specific implementation manner, when a deep micro via (i.e., the second via hole F2) is used to connect the first surface metal layer L1 and the second metal layer L4, at the same time, the second via hole F2 may be used to connect the second surface metal layer L2 and the third surface metal layer L3, as specifically shown in fig. 6. It is worth noting that the form of the first surface metal L1 connecting the second surface metal layer L2, the third surface metal layer L3 and the second metal layer L4 is used in a 14.4T development scenario.
Fig. 7 is a schematic structural diagram of a printed circuit board 100 according to an embodiment of the present disclosure. As in the structure shown in fig. 7, the skin structure 30 may also comprise only the first skin metal layer L1 and the first skin pp layer P1. It is noted that since the skin structure 30 shown in fig. 7 is modified from the structure in the skin structure 30 shown in fig. 3, the second metal layer in the core board structure 20 in fig. 7 is identified as L2 and the first metal layer is identified as L3, and similarly, the first bottom metal layer in the bottom structure 30 is identified as L4 and the first bottom PP layer is identified as P2.
It is noted that the printed circuit board 100 provided in the embodiment of the present application shown in fig. 7 employs the first via F1 and the second via F2 to form a stacked via structure, and the first surface metal layer L1 and the first metal layer L5 in the core board structure 20 are connected by the stacked via structure. It should be understood that the printed circuit board 100 provided in the embodiment of the present application is not limited, and in principle, all certified boards may use the stacked-hole structure formed by the first via hole F1 and the second via hole F2 after laser drilling, mechanical drilling and curing of the glue removal parameters, so as to achieve high-density layout.
Compared with a structure arrangement in which only one deep micro-hole structure is used to connect the same number of metal layers, the stacked-hole structure in the printed circuit board 100 provided by the embodiment of the present application can reduce the size of the connection structure and enhance the connection reliability, so that the layout area of other devices can be enlarged.
Referring to the structure shown in fig. 7, the top dimension of the second via F2 in the stacked via structure formed by the first via F1 and the second via F2 is a. When the first surface metal layer L1 and the first metal layer L3 are also connected, the second via hole F2 in the hole stack structure provided in the embodiment of the present application is actually only connected to the first surface metal layer L1 to the second metal layer L2, and obviously, the size of the second via hole F2 in the first surface metal layer L1 can be reduced by using the hole stack structure provided in the embodiment of the present application. Illustratively, the top dimension a of the second via F2 in the stacked via structure formed by the first via F1 and the second via F2 is reduced from 12mil or 14mil to 6mil.
Fig. 8 is a flowchart of a method for manufacturing a printed circuit board according to an embodiment of the present disclosure, where the method is used to manufacture the printed circuit board structure shown in fig. 3 and 4. Please refer to the structure shown in fig. 8 with reference to fig. 3, the specific manufacturing method is as follows:
step S101: forming a bottom layer structure 10, a core board structure 20 and a surface layer structure 30, wherein the core board structure 20 includes a first core layer C1, a first metal layer L5 and a second metal layer L4 formed on two sides of the first core layer, the core board structure 20 is provided with a first via hole F1, and the first metal layer L4 is connected to the second metal layer L4 through the first via hole F1; the skin structure 30 comprises at least a first skin pp layer P1 and a first skin metal layer L1.
It should be noted that the specific steps for forming the core board structure 20 in step S101 are as follows:
s1011: the core board structure 20 is formed, and specifically, a first metal layer L5 and a second metal layer L4 are formed on both sides of the first core layer C1 as shown in fig. 9 a.
S1012: a first via F1 is formed in the core board structure 20 by a patterning process along the first metal layer L5 pointing to the second metal layer L4, as shown in fig. 9 b. Illustratively, the patterning process is laser drilling. It should be noted that the core board structure 20 needs to take into account the energy fluctuation when performing laser drilling to ensure the hole pattern consistency.
S1013: and (3) carrying out glue removal operation by adopting a plasma laser technology, and cleaning carbon slag attached to the bottom and the wall of the first via hole F1, as shown in fig. 9 c. Note that the arrows in fig. 9c indicate laser irradiation.
S1014: by means of an electroplating process, an extension of the first metal layer L5 is formed within the first via hole F1, and the second metal layer L4 is connected by the extension of the first metal layer L5, as shown in fig. 9 d.
It is noted that, during the process of preparing the skin structure 30, the first gap G1 and the second gap G2 as shown in fig. 9e have been formed in the skin structure 30, i.e. windows are opened on the second skin metal layer L2 and the third skin metal layer L3.
Thereafter, the skin structure 30 and the substructure 10 are formed on both sides of the core structure 20, as shown in fig. 9 e.
Step S102: and pressing the bottom layer structure 10, the core board structure 20 and the surface layer structure 30, so that the bottom layer structure 10 and the surface layer structure 30 are located at two sides of the core board structure 20, the requirement that the aperture size of one end, close to the bottom layer structure 10, of the first via hole F1 is larger than the aperture size of one end, far away from the bottom layer structure 10, of the first via hole F1 is met, the bottom layer structure 10 is directly contacted with the first metal layer L5, and the first surface pp layer in the surface layer structure 30 is directly contacted with the second metal layer L4, which is specifically shown in fig. 9F.
Step S103: a second via F2 is formed in the surface layer structure 30 by a patterning process, such that the first surface metal layer L1 is connected to the second metal layer L4 in the core board structure 20 through the second via F2, and a vertical projection of an end of the second via F2 close to the underlying structure 10 on the underlying structure 10 is partially overlapped with a vertical projection of an end of the first via F1 far from the underlying structure 10 on the underlying structure 10.
It should be noted that step S103 specifically includes the following steps:
and step S1031, forming a second via hole F2 in the surface layer structure 30 by using a drilling process, as shown in fig. 9 g. For example, in order to ensure that the first via F1 and the second via F2 are aligned, according to the existing layer deviation, the bottom aperture of the second via F2 is set to be 10 mils larger than the top aperture of the first via F1, and there is no missing problem caused by the alignment deviation.
Step S1032: and electroplating in the second via hole F2 by using a copper deposition electroplating process, so that the first surface metal layer L1 is connected with the second metal layer L4, as shown in fig. 9h. It should be understood that fig. 9h is an illustration of forming the printed circuit board 100 structure as shown in fig. 3.
It should be understood that the multilayer and deep connection can be realized by only one-time pressing process in the preparation process, and the material is heated only once in the whole preparation process, so that the selectivity is wider, the process window can be widened, the flow is simplified, and the cost is reduced. It should be noted that the printed circuit board 100 prepared by the method for preparing a printed circuit board provided by the present application adopts the first via hole F1 and the second via hole F2 to form a deep-micro-hole structure, which avoids the adhesive removal and the blind-hole metallization capability, and at least connects the first surface metal layer L1 and the first metal layer L5 in the core board structure 20. Compared with the structure arrangement that only one through hole is connected with the metal layers with the same number of layers, the diameter of the deep micro hole can be reduced, so that the layout area of other devices can be enlarged, and the high-density single plates for supporting the network are more densely arranged.
Of course, the method for manufacturing the printed circuit board 100 according to the embodiment of the present application may also be used to manufacture the printed circuit board 100 shown in fig. 4, the printed circuit board 100 shown in fig. 5, and the printed circuit board 100 shown in fig. 6. Since the printed circuit board 100 in the above three drawings is different from the printed circuit board 100 as shown in fig. 3 only in whether the second surface metal layer L2 and the third surface metal layer L3 are windowed at the position corresponding to the second via hole F2, the printed circuit board 100 as shown in fig. 4, the printed circuit board 100 as shown in fig. 5, and the printed circuit board 100 as shown in fig. 6 are different from the above-described manufacturing method only in step S31. In the preparation of the printed circuit board 100 shown in fig. 4, the printed circuit board 100 shown in fig. 5, and the printed circuit board 100 shown in fig. 6, the drilling manner in step S31 is selected from mechanical drilling and laser drilling, so as to ensure that the second surface metal layer L2 and/or the third surface metal layer L3 is connected to the hole wall of the second via hole F2.
It should be understood that whether the second surface metal layer L2 and the third surface metal layer L3 are connected to the hole wall of the second via hole F2 or not may be freely combined according to the product interconnection requirement, and will not be described herein again.
The embodiment of the present application further provides a preparation method for preparing the printed circuit board shown in fig. 7, and the specific preparation method is as follows:
step S201: forming a bottom layer structure 10, a core board structure 20 and a surface layer structure 30, wherein the core board structure 20 includes a first core layer C1, a first metal layer L3 and a second metal layer L2 formed on two sides of the first core layer, the first core layer C1 is provided with a first via hole F1, and the first metal layer L3 is connected to the second metal layer L2 through the first via hole F1; the skin structure 30 comprises at least a first skin pp layer P1 and a first skin metal layer L1.
It should be noted that the specific steps for forming the core board structure 20 in step S1 are as follows:
s2011: the core board structure 20 is formed, and specifically, a first metal layer L3 and a second metal layer L2 are formed on both sides of the first core layer C1 as shown in fig. 10 a.
S2012: a first via F1 is formed in the first core layer C1 and the first metal layer L3 by a patterning process along a direction in which the first metal layer L3 points to the second metal layer L2, as shown in fig. 10 b. Illustratively, the patterning process is laser drilling. It should be noted that the core board structure 20 needs to take into account the energy fluctuation when performing laser drilling to ensure the hole pattern consistency.
S2013: and (3) carrying out glue removal operation by adopting a plasma laser technology, and cleaning carbon residues attached to the bottom and the hole wall of the first via hole F1, as shown in fig. 10 c. Note that the arrows in fig. 10c indicate laser irradiation.
S2014: by means of an electroplating process, an extension of the first metal layer L3 is formed within the first via hole F1, and the second metal layer L2 is connected by the extension of the first metal layer L3, as shown in fig. 10 d.
A skin structure 30 and a substructure 10 are formed on both sides of the core board structure 20, as shown in fig. 10 e.
Step S202: the underlying structure 10, the core board structure 20 and the surface layer structure 30 are pressed together, so that the underlying structure 10 and the surface layer structure 30 are located on two sides of the core board structure 20, the aperture size of one end of the first via hole F1 close to the underlying structure 10 is larger than the aperture size of one end of the first via hole F1 away from the underlying structure 10, and the underlying structure 10 is directly contacted with the first metal layer L3, and the first surface pp layer in the surface layer structure 30 is directly contacted with the second metal layer L2, as shown in fig. 10F.
Step S203: a second via F2 is formed in the surface layer structure 30 by a patterning process, such that the first surface metal layer L1 is connected to the second metal layer L2 in the core board structure 20 through the second via F2, and a vertical projection of an end of the first via F1 far from the underlying structure 10 in the underlying structure 10 overlaps a portion of a vertical projection of an end of the second via F2 close to the underlying structure 10 in the underlying structure 10.
It should be noted that step S203 specifically includes the following steps:
step S2031, forming a second via hole F2 on the surface layer structure 30 by adopting a drilling process, as shown in FIG. 10g specifically;
step S2032: electroplating is performed in the second via hole F2 by copper deposition electroplating or via filling electroplating, so that the first surface metal layer L1 is connected to the second metal layer L2, as shown in fig. 10h. It should be understood that fig. 10h is an illustration of forming the printed circuit board 100 structure shown in fig. 7.
According to the preparation method provided by the application, the whole preparation process only adopts a one-time pressing process, so that the connection of multiple and deep metal layers can be realized, the process can be simplified, and the cost can be reduced. In addition, as the whole preparation process is only carried out once pressing, the plate is heated once, so that the selectivity of the plate can be enlarged and the process window can be widened. Meanwhile, the printed circuit board 100 shown in fig. 3 prepared by the method for preparing a printed circuit board according to the embodiment of the present application adopts a first via hole F1 and a second via hole F2 to form a stacked-hole structure, and the first surface metal layer L1 and the first metal layer L5 in the core board structure 20 are connected by the stacked-hole structure, so that the deep metal layer of the printed circuit board 100 can be connected. Compared with the structure arrangement that only one deep micro-hole structure is adopted to connect the metal layers with the same number of layers, the stacked hole structure in the printed circuit board 100 provided by the embodiment of the application can reduce the size of the connection structure, so that the layout area of other devices can be enlarged.
In order to clearly show the beneficial effects of the method for manufacturing a printed circuit board provided by the embodiment of the present application compared with the prior art, several methods for manufacturing a printed circuit board in the prior art are described below.
Fig. 11a to 11g illustrate a method for manufacturing a printed circuit board according to the prior art, in which a metal layer L1 'and a metal layer L4' can be connected to each other, so that the metal layer L1 'and the metal layer L4' are electrically connected to each other. The preparation process comprises the following steps: laminating the layers to form the structure shown in FIG. 11 a; performing a drilling operation as shown in fig. 11 b; removing the glue by plasma as shown in fig. 11 c; performing a laser operation as shown in fig. 11 d; performing a plating operation as shown in FIG. 11 e; the plugging operation is performed as shown in fig. 11 f; the plating operation is performed as shown in fig. 11g, and the printed circuit board 001 is finally formed.
When the metal layer L1', the metal layer L2', the metal layer L3 'and the metal layer L4' are conducted by using the above method, the specific preparation method is shown in fig. 12a to 12g, and the process is as follows: laminating the layers to form the structure shown in FIG. 12 a; performing a drilling operation as shown in fig. 12b, wherein the metal layer L1' is drilled through to the metal layer L3' without drilling through the metal layer L4'; removing glue by plasma as shown in fig. 12 c; performing a laser operation as shown in fig. 12 d; performing a plating operation as shown in fig. 12 e; the plugging operation is performed as shown in fig. 12 f; a plating operation is performed as shown in fig. 12g, and finally a printed circuit board 001 is formed.
It is noted that the ratio of the thickness to the diameter (ratio of H 'to a') of the deep micro via in the printed circuit board 001 shown in fig. 11g and 12g prepared by the above-mentioned prior art preparation method cannot exceed 0.9. In addition, the preparation method in the prior art generally only links the metal layer L1 'to the metal layer L4', and is difficult to link to a deeper metal layer, and the use scene is limited. Compared with the manufacturing method in the prior art, the manufacturing method of the printed circuit board 100 provided by the embodiment of the application can reduce the size of the connection hole when the same number of metal layers are connected. Moreover, the preparation method of the printed circuit board 100 provided by the embodiment of the application can ensure the conduction reliability while realizing the conduction of the metal layer L1 and the metal layer L5, and the application scenarios are wider.
Fig. 13a to 13l illustrate another prior art method for manufacturing a printed circuit board. As shown in fig. 13a to 13l, the printed circuit board 001 is connected to multiple metal layers by using multi-step laser via stacking. Illustratively, as shown in fig. 13a, first, a metal layer L4 'and a metal layer L5' are formed by first press-fitting; then, as shown in fig. 13b, via holes are formed between the metal layer L4 'and the metal layer L5' by a laser drilling process; then, as shown in fig. 13c, the metal layer L4 'and the metal layer L5' are connected by a via-filling electroplating process; then, as shown in fig. 13d, a metal layer L3' is formed by using a secondary press; as shown in fig. 13e, a via hole is formed between the metal layer L3 'and the metal layer L4' by a laser drilling process; thereafter, as shown in fig. 13f, the metal layer L3 'and the metal layer L4' are connected by a via-filling electroplating process. It should be noted that, as shown in fig. 13g to fig. 13l, two times of pressing processes, two times of laser processes, and two times of hole filling processes are performed to finally form the printed circuit board 001 shown in fig. 13 l.
It should be noted that, in the preparation method in the prior art as shown in fig. 13a to 13L, if the metal layers L1 'to L5' are to be connected, the pressing process is required for 4 times, the process is long, the cost is high, and meanwhile, the high-speed board needs to be heated and pressed for many times, the reliability risk is high, and the alignment of the stacked holes is easy to shift. Compared with the preparation method in the prior art, the preparation method of the printed circuit board 100 provided by the embodiment of the application only adopts a one-time pressing process in the whole preparation process, can realize the connection of multiple and deep metal layers, and can simplify the flow and reduce the cost. In addition, as the whole preparation process is only subjected to one-time pressing, the plate is heated only once, the selectivity of the plate can be enlarged, and the process window can be widened.
FIGS. 14 a-14 d illustrate another prior art method of fabricating a printed circuit board by first performing daughter board bonding, drilling, and plating operations as illustrated in FIGS. 14 a-14 b; thereafter, the outer layer wiring is processed as shown in fig. 14 c; finally, as shown in fig. 14d, the two daughter boards are bonded again, so that each daughter board can achieve partial electrical performance.
It should be noted that the manufacturing processes shown in fig. 14a to 14d are collectively referred to as N + N processes according to the number of metal layers in each sub-board. The preparation process has the defects of long flow, low yield, high cost and the like. Compared with the preparation method in the prior art, the preparation method of the printed circuit board 100 provided by the embodiment of the application can not only reduce the preparation difficulty and reduce the process flow, but also reduce the production cost. Therefore, the circuit board prepared by the method for preparing the printed circuit board 100 provided by the embodiment of the application can replace certain N + N scenes, so that the cost is reduced.
Specifically, compared with the three preparation methods in the prior art, the preparation method of the printed circuit board 100 provided by the embodiment of the present application has the following advantages:
1. the hole overlapping structure of the first via hole F1 and the second via hole F2 can be realized through one-time pressing.
2. The connection of the metal layers L1 to L5/LN to L (N-4) or L1 to L3/LN to L (N-4) can be realized by one-time pressing. It should be understood that N refers to the total number of metal layers of the printed circuit board 100, where ln represents the skin metal.
3. The plate material is heated once through one-time pressing, the selectivity of the used material is wider, and the process window can be widened.
4. The process is simplified, and the cost is low.
The embodiment of the application also provides a network communication device. The network communication device comprises the printed circuit board in any of the above technical schemes provided by the embodiments of the present application, or the network communication device is prepared by the preparation method in any of the above technical schemes provided by the embodiments of the present application.
For example, a network communication device provided in the embodiments of the present application may be the following devices:
in a possible implementation manner, the network communication device according to this embodiment of the present application is a chip 200 as shown in fig. 15, and the circuit board 100 provided in this embodiment of the present application is disposed in the chip 200. Specifically, the stacked hole structure in the circuit board 100 provided by the embodiment of the present application is used for high-density outgoing of the peripheral serializer or deserializer of the chip 200, the stacked hole structure only occupies the metal layers L1 to L5 or the metal layers L1 to L3, the remaining N-x layers can be used for outgoing, and the layout space can be saved. It should be understood that N herein refers to the total number of metal layers included and x refers to the deepest metal layer of the connection employed by the stacked via structure. It is noted that, due to the angle relationship, only the second via hole F2 in the stacked hole structure is shown in fig. 15, and the circuit board 100 is provided with a through hole or a micro hole structure in addition to the stacked hole structure.
In another possible implementation manner, the network communication device provided in the embodiment of the present application is a Double Data Rate (DDR) 300 as shown in fig. 16. When the ddr sdram 300 is applied in 1-drive 9-opposite-pasting, positive and negative pasting addresses flyby (fly over) structure-signal can be realized by using the hole stack structure (exemplarily shown as the mark Z in fig. 16) in the circuit board 100 provided by the embodiment of the present application, so as to realize flexible selection of interconnection layout.
In another possible implementation manner, the network communication apparatus provided in this embodiment of the application is used as the power supply chip 400 shown in fig. 17 when the power supply chip is powered through 300A +, and a Voltage Regulator Module (VRM) is attached to one side of the circuit board 100. It should be noted that, when the power supply requirement is met, the circuit board 100 provided in the embodiment of the present application can achieve the purpose of high-density layout. Meanwhile, the layout density can be further improved by combining the front and back facing of the VRM as shown in FIG. 18.
In another possible implementation manner, the network communication apparatus provided in the embodiment of the present application may be the optical module 500 as shown in fig. 19. Specifically, in a paste scene, high-speed line outgoing can be realized by adopting the stacked hole structure in the circuit board 100 provided by the embodiment of the application to replace an N + N structure.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (11)

1. A printed circuit board, comprising:
a substructure;
a core board structure of a cured sheet located on one side of the underlying structure, the core board structure comprising a first core layer, a first metal layer formed on one side of the first core layer facing the underlying structure, and a second metal layer formed on one side of the first core layer facing away from the underlying structure; the core board structure is provided with a first via hole, the first metal layer is connected with the second metal layer through the first via hole, and the aperture size of one end, close to the bottom layer structure, of the first via hole is larger than the aperture size of one end, far away from the bottom layer structure, of the first via hole;
a skin structure formed on a side of the core board structure facing away from the underlying structure, the skin structure including at least a first skin prepreg pp layer and a first skin metal layer, the first skin metal layer being disposed on a side of the first skin pp layer facing away from the core board structure layer; the surface layer structure is provided with a second via hole, the first surface layer metal layer passes through the second via hole is connected with a second metal layer in the core board structure, and the second via hole is close to one end of the underlying structure is in the vertical projection of the underlying structure and the first via hole is far away from one end of the underlying structure is in the vertical projection of the underlying structure is partially overlapped.
2. The printed circuit board of claim 1, wherein a perpendicular projection of an end of the second via proximate to the underlying structure onto the underlying structure overlaps a perpendicular projection of an end of the first via distal to the underlying structure onto the underlying structure.
3. The printed circuit board of claim 1 or 2, wherein the skin structure further comprises a core and a second skin pp layer, both the core and the second skin pp layers being located between the first skin pp layer and the core structure, and the core being located between the first skin pp layer and the second skin pp layer; the core board comprises a second core layer, a second surface metal layer is formed on one side, facing the first surface pp layer, of the second core layer, and a third surface metal layer is formed on one side, facing the second surface pp layer, of the second core layer.
4. The printed circuit board of claim 3, wherein the second surface metal layer has a first gap at a location corresponding to the second via, the third surface metal layer has a second gap at a location corresponding to the second via, and the first surface metal layer is connected to the second metal layer through the second via.
5. The printed circuit board of claim 3, wherein a portion of the first surface metal layer within the second via is connected to the second surface metal layer, and the third surface metal layer has a gap at a location corresponding to the second via to avoid the second via.
6. The printed circuit board of claim 3, wherein a portion of the first surface metal layer within the second via is connected to the third surface metal layer, and the second surface metal layer has a gap at a location corresponding to the second via to avoid the second via.
7. The printed circuit board of claim 3, wherein a portion of the first surface metal layer within the second via is connected to the second surface metal layer, and a portion of the first surface metal layer within the second via is connected to the third surface metal layer.
8. A method of manufacturing a printed circuit board, comprising:
forming a bottom layer structure, a core board structure of a curing piece and a surface layer structure, wherein the core board structure comprises a first core layer, a first metal layer and a second metal layer, the first metal layer and the second metal layer are formed on two sides of the first core layer, the core board structure is provided with a first via hole, and the first metal layer is connected with the second metal layer through the first via hole; the surface layer structure at least comprises a first surface layer prepreg pp layer and a first surface layer metal layer;
pressing the bottom layer structure, the core board structure and the surface layer structure, so that the bottom layer structure and the surface layer structure are positioned on two sides of the core board structure, the aperture size of one end, close to the bottom layer structure, of the first via hole is larger than the aperture size of one end, far away from the bottom layer structure, of the first via hole, the bottom layer structure is in direct contact with the first metal layer, and a first surface layer pp layer in the surface layer structure is in direct contact with the second metal layer;
and forming a second via hole in the surface layer structure by a composition process, so that the first surface layer metal layer is connected with a second metal layer in the core board structure through the second via hole, and the vertical projection of one end, close to the bottom layer structure, of the second via hole on the bottom layer structure is partially overlapped with the vertical projection of one end, far away from the bottom layer structure, of the first via hole on the bottom layer structure.
9. The method of claim 8, wherein forming the core board structure comprises:
forming the first metal layer and the second metal layer on two sides of the first core layer;
forming a first via hole in the core board structure by a composition process along the direction of the first metal layer pointing to the second metal layer, wherein the first via hole penetrates through the first core layer and the first metal layer;
carrying out glue removal operation by adopting a plasma laser technology, and cleaning carbon residues attached to the hole bottom and the hole wall of the first via hole;
and forming an extension part of the first metal layer in the first via hole through an electroplating process, wherein the first metal layer is connected with the second metal layer through the extension part.
10. A network communication device comprising a printed circuit board according to any one of claims 1 to 7.
11. A network communication apparatus comprising a printed circuit board manufactured by the method for manufacturing a printed circuit board according to any one of claims 8 to 9.
CN202110602890.3A 2021-05-31 2021-05-31 Printed circuit board, preparation method thereof and network communication device Pending CN115484733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110602890.3A CN115484733A (en) 2021-05-31 2021-05-31 Printed circuit board, preparation method thereof and network communication device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110602890.3A CN115484733A (en) 2021-05-31 2021-05-31 Printed circuit board, preparation method thereof and network communication device

Publications (1)

Publication Number Publication Date
CN115484733A true CN115484733A (en) 2022-12-16

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
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