CN115483184A - Semiconductor package device and method of manufacturing the same - Google Patents

Semiconductor package device and method of manufacturing the same Download PDF

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Publication number
CN115483184A
CN115483184A CN202110670907.9A CN202110670907A CN115483184A CN 115483184 A CN115483184 A CN 115483184A CN 202110670907 A CN202110670907 A CN 202110670907A CN 115483184 A CN115483184 A CN 115483184A
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China
Prior art keywords
substrate
layer
waveguide
antenna
antenna structure
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CN202110670907.9A
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Chinese (zh)
Inventor
何承谕
谢孟伟
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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Priority to CN202110670907.9A priority Critical patent/CN115483184A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838Geometry or layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/36Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
    • H01Q1/38Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6605High-frequency electrical connections
    • H01L2223/6627Waveguides, e.g. microstrip line, strip line, coplanar line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6661High-frequency adaptations for passive devices
    • H01L2223/6677High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

The present disclosure provides a semiconductor package device and a method of manufacturing the same, by designing the semiconductor package device including: the antenna comprises a substrate, a first substrate and a second substrate, wherein the substrate is provided with a waveguide structure, and an antenna structure layer is arranged on the side surface of the substrate; the radio frequency chip is coupled and connected with the antenna structure layer through the waveguide structure, the antenna structure layer is arranged on the side face of the substrate, the antenna structure layer does not occupy the upper surface area of the substrate, the wiring layout area of the substrate can be increased, the design difficulty of the substrate is reduced, and the transmission loss of radio frequency signals is reduced through the coupling connection between the radio frequency chip and the antenna structure layer through the waveguide structure.

Description

Semiconductor package device and method of manufacturing the same
Technical Field
The present disclosure relates to the field of semiconductor packaging technologies, and in particular, to a semiconductor packaging device and a method for manufacturing the same.
Background
In current Mobile Communication devices, in order to achieve good Communication quality, a fifth Generation Mobile Communication technology (5 g) millimeter wave package antenna is designed to have a vertical radiation (Broadside) antenna and an End-fire (End-fire) antenna, and the current side radiation antenna of the Mobile Communication device needs to occupy the area of the upper surface of the semiconductor package device, and further occupies the layout area of the semiconductor package device, which increases the design difficulty of miniaturizing the overall structure of the semiconductor package device.
Disclosure of Invention
In a first aspect, the present disclosure provides a semiconductor package device, comprising:
the antenna comprises a substrate, a first substrate and a second substrate, wherein the substrate is provided with a waveguide structure, and an antenna structure layer is arranged on the side surface of the substrate;
and the radio frequency chip is coupled and connected with the antenna structure layer through the waveguide structure.
In some optional embodiments, the antenna structure layer includes an antenna driving layer and an antenna guiding layer sequentially disposed along a side surface of the substrate.
In some optional embodiments, the antenna driving layer comprises: a high-gain antenna driving layer, a broadband high-gain antenna driving layer, or a broadband high-gain dipole antenna driving layer.
In some optional embodiments, the antenna guide layer comprises: at least one layer of antenna guide structure.
In some alternative embodiments, the waveguide structure comprises: the circuit board comprises an upper conducting layer, a lower conducting layer and at least two rows of conducting holes for connecting the upper conducting layer and the lower conducting layer.
In some optional embodiments, the radio frequency chip has M radio frequency transceiving ends;
the substrate is provided with N waveguide structures, the N waveguide structures correspond to N radio frequency transceiving ends in the M radio frequency transceiving ends one by one, wherein M and N are positive integers, and M is more than or equal to N and is more than or equal to 2;
n antenna structure layers which correspond to the N waveguide structures one by one are arranged on the side face of the substrate;
and the N radio frequency transceiving ends are respectively coupled and connected with the corresponding antenna structure layer through the corresponding waveguide structures.
In some optional embodiments, a signal transmission direction of the coupling end of the waveguide structure and the antenna structure layer is at least partially perpendicular or approximately perpendicular to the antenna structure layer.
In some alternative embodiments, the average distance between two adjacent waveguide structures near the rf chip end is smaller than the average distance between two adjacent waveguide structures near the antenna structure layer end.
In some alternative embodiments, the signal transmission directions of at least two of the N waveguide structures are at least partially parallel.
In some optional embodiments, the signal transmission directions of at least two of the N waveguide structures are parallel to each other and partially perpendicular or approximately perpendicular to the antenna structure layers corresponding to the at least two of the N waveguide structures.
In some alternative embodiments, the average distance between the N waveguide structures decreases from the end near the antenna structure layer to the end near the rf chip, and the device is provided with an additional routing area.
In some alternative embodiments, a blocking structure is disposed between the at least one waveguide structure and the additional routing region.
In some alternative embodiments, at least two adjacent waveguide structures share the same row of via holes.
In some alternative embodiments, the at least two adjacent waveguide structures are separated by three rows of via holes.
In some optional embodiments, at least two of the N antenna structure layers are located on different sides of the substrate.
In a second aspect, the present disclosure provides a method of manufacturing a semiconductor package device, comprising:
providing a substrate and a radio frequency chip, wherein the substrate is provided with a waveguide structure, one end of the waveguide structure is coupled with the radio frequency chip, and the other end of the waveguide structure is adjacent to the side surface of the substrate;
providing an antenna structure layer;
and arranging the antenna structure layer on the side surface of the substrate so that the radio frequency chip is coupled and connected with the antenna structure layer through the waveguide structure.
In order to solve the problem that the lateral radiation antenna of the existing mobile communication equipment needs to occupy the upper surface area of the semiconductor packaging device, the semiconductor packaging device and the manufacturing method thereof provided by the disclosure can increase the wiring layout area of the substrate, reduce the design difficulty of the substrate and contribute to further reducing the volume of the semiconductor packaging device by arranging the antenna structure layer on the side surface of the substrate, so that the antenna structure layer does not occupy the area of the upper surface of the substrate, the transmission loss of radio frequency signals can be reduced by coupling and connecting the waveguide structure between the radio frequency chip and the antenna structure layer on the side surface of the substrate, the antenna gain is increased, and the performance of the antenna is improved.
Drawings
Other features, objects and advantages of the disclosure will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
fig. 1 is a schematic longitudinal cross-sectional structure of one embodiment of a semiconductor package device according to the present disclosure;
fig. 1A and 1B are schematic views of a partial horizontal cross-sectional structure within a dotted line in the embodiment of the semiconductor package device shown in fig. 1;
FIGS. 1C and 1D are partial schematic structural views of an antenna guide layer in the embodiment of the semiconductor package device shown in FIG. 1;
fig. 1E is a schematic diagram of an alternative structure of an antenna driving layer in the embodiment of the semiconductor package device shown in fig. 1;
FIG. 1F is a schematic partial cross-sectional view of a waveguide structure in the embodiment of the semiconductor package shown in FIG. 1;
fig. 2A to 2E are schematic structural diagrams of different embodiments of a semiconductor package device according to the present disclosure;
fig. 3A to 3C are schematic longitudinal cross-sectional structural views of a semiconductor package device fabricated at various stages according to one embodiment of the present disclosure.
Description of the symbols: 11-a substrate; 111-a first surface; 112-a second surface; 113-a waveguide structure; 1131-via hole; 1132 — a lower conductive layer; 1133 — upper conductive layer; 114-a feeder; 1141-a feeder port; 115-a waveguide structure layer; 1151-additional routing areas; 1152-a shielding structure; 12-a radio frequency chip; 121-radio frequency transceiving end; 13-an antenna structure layer; 131-an antenna driving layer; 132-an antenna guide layer; 1321-an antenna guide dielectric layer; 1322-antenna oriented metal layer.
Detailed Description
The following description of the embodiments of the present disclosure will be made in conjunction with the accompanying drawings and examples, and it is easy for those skilled in the art to understand the technical problems and effects that the present disclosure solves through the contents described in the present specification. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. In addition, for convenience of description, only portions related to the related invention are shown in the drawings.
It should be noted that the structures, proportions, and dimensions shown in the drawings and described in the specification are for the understanding and reading of the present disclosure, and are not intended to limit the conditions under which the present disclosure can be implemented, so they are not technically significant, and any modifications of the structures, changes in the proportions and adjustments of the dimensions should be made without affecting the efficacy and attainment of the same. In the present specification, the terms "upper", "first", "second" and "first" are used for clarity of description only, and are not intended to limit the scope of the present disclosure, and changes or modifications in relative relationships thereof should be construed as being within the scope of the present disclosure without substantial technical changes.
It should also be noted that the longitudinal section corresponding to the embodiment of the present disclosure may be a front view direction section, the transverse section may be a right view direction section, and the horizontal section may be a top view direction section.
In addition, the embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict.
Referring to fig. 1, fig. 1 is a schematic longitudinal cross-sectional structure of a semiconductor package device according to an embodiment of the present disclosure.
As shown in fig. 1, the semiconductor package device 100 may include: a substrate 11 and a radio frequency chip 12. Wherein:
the substrate 11 has a waveguide structure layer 115.
The substrate 11 may be a substrate composed of a conductive material and a Dielectric material (Dielectric). Here, the dielectric material may include organic and/or inorganic substances, wherein the organic substance may be, for example: polyamide fiber (Polyamide, PA), polyimide (PI), epoxy resin (Epoxy), poly-p-Phenylene Benzobisoxazole (PBO) fiber, FR-4 Epoxy glass cloth laminate, PP (PrePreg, prePreg or so called PrePreg resin, prePreg), ABF (Ajinomoto Build-up Film), etc., and inorganic matter may be, for example, silicon (Si), glass (glass), ceramic (ceramic), silicon oxide, silicon nitride, tantalum oxide, etc. The conductive material may include a seed layer and a metal layer. Here, the seed layer may be, for example, titanium (Ti), tungsten (W), nickel (Ni), etc., and the metal layer may be, for example, gold (Au), silver (Ag), aluminum (Al), nickel (Ni), palladium (Pd), copper (Cu), or an alloy thereof.
In the present disclosure, the substrate 11 may include at least one dielectric layer. In some alternative embodiments, the substrate 11 may be a redistribution layer composed of conductive traces and Dielectric material (Dielectric). It should be noted that, the redistribution layer forming technology currently known or developed in the future may be used in the manufacturing process, and the present application is not limited thereto, and for example, the redistribution layer may be formed by using processes including but not limited to photolithography, plating (plating), electroless plating (electroplating), and the like. Here, the dielectric material may include organic and/or inorganic substances, wherein the organic substance may be, for example: polyamide fiber (Polyamide, PA), polyimide (PI), epoxy resin (Epoxy), poly-p-Phenylene Benzobisoxazole (PBO) fiber, FR-4 Epoxy glass cloth laminate, PP (PrePreg, prePreg or PrePreg), ABF (Ajinomoto Build-up Film), etc., and inorganic matter may be, for example, silicon (Si), glass (glass), ceramic (ceramic), silicon oxide, silicon nitride, tantalum oxide, etc. The conductive material may include a seed layer and a metal layer. Here, the seed layer may be, for example, titanium (Ti), tungsten (W), nickel (Ni), etc., and the metal layer may be, for example, gold (Au), silver (Ag), aluminum (Al), nickel (Ni), palladium (Pd), copper (Cu), or an alloy thereof.
The waveguide structure layer 115 is disposed between the first surface 111 and the second surface 112 of the substrate 11. The waveguide structure layer 115 may be composed of a conductive material and a dielectric material, and the waveguide structure layer 115 may include at least one dielectric layer.
The waveguide structure layer 115 is provided with a waveguide structure 113, and the side of the substrate 11 is provided with an antenna structure layer 13.
The rf chip 12 may be coupled to the antenna structure layer 13 through the waveguide structure 113.
In this disclosure, the specific structure of the rf chip 12 is not limited, and the rf chip 12 can transmit and receive rf signals. Optionally, the rf chip 12 can transmit and receive rf signals of at least two frequency bands.
The waveguide structure 113 is a microwave transmission line, and forms a waveguide by using a metal through hole and an upper conductive layer and a lower conductive layer connecting the metal through hole, so that a radio frequency signal realizes a field propagation mode of the waveguide in the waveguide of the dielectric substrate. Fig. 1F is a partial structural diagram of the waveguide structure 113. As shown in fig. 1F, the waveguide structure 113 may include: a lower conductive layer 1132, an upper conductive layer 1133, and two rows of vias 1131 arranged in parallel, each row having at least two vias 1131. Wherein: the lower conductive layer 1132 and the upper conductive layer 1133 are metal materials, the via hole 1131 may be a through hole, a buried hole, or a blind hole, and the through hole, the buried hole, or the blind hole may be filled with a conductive material such as a metal or a metal alloy, where the metal may be, for example, gold (Au), silver (Ag), aluminum (Al), nickel (Ni), palladium (Pd), copper (Cu), or an alloy thereof; the upper conductive layer 1133 and the lower conductive layer 1132 are electrically connected through a via 1131. In some optional implementations, a dielectric material is also disposed between upper conductive layer 1133 and lower conductive layer 1132.
Technical effects that can be achieved by the semiconductor package device 100 of the above-described embodiment provided by the present disclosure include, but are not limited to: by disposing the antenna structure layer 13 on the side surface of the substrate 11, the antenna structure layer 13 does not occupy the area of the first surface 111 of the semiconductor package device 100, so as to increase the routing layout area of the substrate 11 and reduce the difficulty in designing the substrate 11; the waveguide structure 113 is coupled between the rf chip 12 and the antenna structure layer 13 on the side of the substrate 11, so that transmission loss of rf signals can be reduced, antenna gain can be increased, and antenna performance can be improved.
In some alternative embodiments, as shown in fig. 1, the rf chip 12 may be coupled to the feeder line 114, the feeder line port 1141 of the feeder line 114 is coupled to one end of the waveguide structure 113, and the other end of the waveguide structure 113 is coupled to the antenna structure layer 13, so that the rf chip 12 is coupled to the antenna structure layer 13. It is understood that, the rf chip 12 has a plurality of rf transceiving ends 121, which is limited by the size of the rf chip 12, the distance between the plurality of rf transceiving ends 121 is generally smaller, and the size of the port of the waveguide structure 113 is generally larger, and the rf transceiving ends 121 of the rf chip 12 can be coupled with the corresponding waveguide structure 113 by coupling and connecting the rf chip 12 and one end of the waveguide structure 113 through the feeding line 114.
Fig. 1A and 1B are schematic horizontal sectional views of a partial structure of the dotted line portion of the embodiment of fig. 1 in some embodiments. As shown in fig. 1A and 1B, the antenna structure layer 13 may include an antenna driving layer 131 and an antenna guide layer 132 sequentially disposed along a side surface of the substrate 11.
The antenna driving layer 131 can convert current into electromagnetic waves. When the waveguide structure 13 transmits signals to the antenna driving layer 131, the antenna driving layer 131 drives the signals transmitted from the waveguide structure 13 and transmits the signals to the antenna guide layer 132, and the antenna guide layer 132 directionally transmits the driven signals.
The antenna driving layer 131 is made of a metal material, and in practical applications, the antenna driving layer 131 may include a metal such as copper, silver, iron, or aluminum, or an alloy thereof. Referring to fig. 1E, fig. 1E is a dotted line part in the embodiment of fig. 1 of the present disclosure, and in some alternative embodiments, the antenna driving layer 131 may include one of the following:
(a) A Broadband High gain dipole (Broadband/High gain/Dual pole) antenna driving layer;
(b) A Broadband High gain (Broadband/High gain) antenna driving layer;
(c) A High gain (High gain) antenna driving layer.
It can be understood that different performances of the antenna driving layer 131 are determined according to the structure of the antenna driving layer 131, and a skilled person may select the structure of the antenna driving layer 131 according to actual design requirements, and the specific antenna signal driving principle may refer to the prior art, and is not described herein again.
In some optional embodiments, as shown in fig. 1A, the signal transmission direction of the waveguide structure 113 is at least partially perpendicular or approximately perpendicular to the antenna structure layer 13, so that the signal transmitted by the waveguide structure 113 can be aligned to the feed point of the antenna structure layer 13, thereby reducing signal loss, increasing antenna gain, and improving antenna transmission efficiency.
In some alternative embodiments, as shown in fig. 1B, an angle is formed between the signal transmission direction of the waveguide structure 113 and the antenna structure layer 13, and it can be understood that, according to different semiconductor package device design requirements or process limitations, an angle may be formed between the signal transmission direction of the waveguide structure 113 and the antenna structure layer 13, and at this time, the waveguide structure 113 can also be coupled with the antenna structure layer 13 to implement signal transmission.
In some alternative embodiments, the antenna guide layer 132 may include: at least one layer of antenna guide structure.
As shown in fig. 1C and 1D, the antenna guide structure includes an antenna guide dielectric layer 1321 and an even number of antenna guide metal layers 1322 disposed on the antenna guide dielectric layer 1321.
As shown in fig. 1C, when the antenna guide layer 132 includes at least two layers of antenna guide structures, distances between even number of antenna guide metal layers 1322 of each antenna guide structure in the at least two layers of antenna guide structures decrease sequentially from the near substrate 11 end to the far substrate 11 end. Here, the antenna structure layer 13 may perform a function of gathering signals, thereby increasing a signal gain.
In some alternative embodiments, the bandwidth of the antenna structure layer 13 includes a first bandwidth and a second bandwidth. In the present disclosure, specific frequency bands of the first bandwidth and the second bandwidth are not limited, and the frequency bands of the first bandwidth and the second bandwidth may be 28GHz and 39GHz, for example.
The antenna structure layer 13 may include a multi-layer patch antenna.
Referring now to fig. 2A to 2E, fig. 2A to 2E are schematic horizontal sectional structural views of semiconductor package devices 200a, 200b, 200c, 200d, and 200E according to some embodiments of the present disclosure.
As shown in fig. 2A to 2E, in some alternative embodiments, the rf chip 12 has M rf transceiving terminals 121. The waveguide structure layer 115 has N waveguide structures 113, where the N waveguide structures 113 correspond to N rf transceiving ends 121 of the M rf transceiving ends 121 one to one, where M and N are positive integers, and M is greater than or equal to N and greater than or equal to 2.
The side surface of the substrate 11 is provided with N antenna structure layers 13 corresponding to the N waveguide structures 113 one to one.
The N rf transceiving ends 121 are coupled to the corresponding antenna structure layer 13 through the corresponding waveguide structures 113, respectively.
To form an antenna matrix with N antenna structure layers 13, thereby improving antenna gain.
In some optional embodiments, as shown in fig. 2A to 2E, a signal transmission direction of a coupling end of the waveguide structure 113 and the antenna structure layer 13 is at least partially perpendicular or approximately perpendicular to the antenna structure layer 13, so that a signal transmitted by the waveguide structure 113 can be aligned to a feed point of the antenna structure layer 13, thereby reducing signal loss, increasing antenna gain, and improving antenna transmission efficiency.
In some alternative embodiments, as shown in fig. 2E, the average distance between two adjacent waveguide structures 113 at the end near the rf chip 12 is smaller than the average distance between two adjacent waveguide structures 113 at the end near the antenna structure layer 13 in comparison with fig. 2D. The average distance between the waveguide structures 113 is gradually decreased from the near-antenna structure layer 13 end to the near-rf chip 12 end, so that an additional wiring region 1151 is provided between at least one waveguide structure 113 of the N waveguide structures 113 and one side of the waveguide structure layer 115, and the additional wiring region 1151 and the lower conductive layer 1132 are unified conductive layers, except that the additional wiring region 1151 is not electrically connected to the lower conductive layer 1132 and can be separated by a separation structure or a shielding structure 1152, and the shielding structure 1152 can include a dielectric material or a blank region disconnected from the lower conductive layer 1132 of the waveguide structure 113. It is understood that the additional wiring region 1151 is not provided with the waveguide structure 113, and the additional wiring region 1151 may be used for wiring design of the semiconductor package device 200e, thereby reducing the difficulty of wiring design of the semiconductor package device 200 e.
In some alternative embodiments, as shown in fig. 2B and 2C, the signal transmission directions of at least two waveguide structures 113 of the N waveguide structures 113 are at least partially parallel. Thus, the at least two waveguide structures 113 with at least partially parallel signal transmission directions can share the lower conductive layer 1132, which simplifies the manufacturing process of the lower conductive layer and reduces the complexity of the manufacturing process of the waveguide structures 113.
In some optional embodiments, as shown in fig. 2A to 2C, the signal transmission directions of at least two waveguide structures 113 of the N waveguide structures 113 are parallel to each other and partially perpendicular or approximately perpendicular to the antenna structure layer 13 corresponding to the at least two waveguide structures 113 of the N waveguide structures 113, so that the signals transmitted by the waveguide structures 113 can be aligned to the feed point of the antenna structure layer 13, thereby reducing signal loss, increasing the gain of the antenna array, and improving the transmission efficiency of the antenna array.
In some alternative embodiments, as shown in fig. 2B and 2C, the lower conductive layers 1132 of at least two adjacent waveguide structures 113 of the N waveguide structures 113 are electrically connected. Two adjacent waveguide structures 113 can share the same row of conducting holes 1131 for ground connection (that is, only one row of conducting holes 1131 between two adjacent waveguide structures 113 connects the upper conducting layer 1133 and the lower conducting layer 1132), so as to shorten the distance between two adjacent waveguide structures 113, reduce the package area, and also reduce the ground connection complexity of the lower conducting layer 1132.
In some alternative embodiments, as shown in fig. 2C, at least two adjacent waveguide structures 113 are separated by three rows of via holes 1131.
In some alternative embodiments, at least two antenna structure layers 13 of the N antenna structure layers 13 are located on different sides of the substrate 11. The N antenna structure layers 13 may be respectively disposed on any one of the four side surfaces of the substrate 11 to implement different directions of propagation of antenna array signals.
Referring now to fig. 3A to 3C, fig. 3A, 3B and 3C are schematic longitudinal cross-sectional structural views of semiconductor package devices 300a, 300B and 300C manufactured at various stages according to one embodiment of the semiconductor package device of the present disclosure.
Referring to fig. 3A, a substrate 11 and an rf chip 12 are provided.
Here, the substrate 11 has a waveguide structure layer 115, the waveguide structure layer 115 is provided with a waveguide structure 113, one end of the waveguide structure 113 is coupled to the rf chip 12, and the other end is adjacent to a side surface of the substrate 11.
Referring to fig. 3B, an antenna structure layer 13 is provided.
Here, the antenna structure layer 13 may be formed of an antenna driving layer 131 and an antenna guide layer 132 which are sequentially disposed.
Referring to fig. 3C, the antenna structure layer 13 is disposed on the side of the substrate 11, so that the rf chip 12 is coupled to the antenna structure layer 13 through the waveguide structure 113.
Here, the antenna structure layer 13 may be attached to a side surface of the substrate 11.
While the present disclosure has been described and illustrated with reference to particular embodiments thereof, such description and illustration are not intended to limit the present disclosure. It will be clearly understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the true spirit and scope of the present disclosure as defined by the appended claims. The illustrations may not be drawn to scale. There may be a distinction between technical reproduction and actual implementation in the present disclosure due to variables in the manufacturing process, and the like. There may be other embodiments of the disclosure that are not specifically illustrated. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present disclosure. All such modifications are intended to fall within the scope of the claims appended hereto. Although the methods disclosed herein have been described with reference to particular operations performed in a particular order, it should be understood that these operations may be combined, sub-divided, or reordered to form equivalent methods without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations is not a limitation of the present disclosure.

Claims (14)

1. A semiconductor package device, comprising:
the antenna comprises a substrate, a first substrate and a second substrate, wherein the substrate is provided with a waveguide structure, and an antenna structure layer is arranged on the side surface of the substrate;
and the radio frequency chip is coupled and connected with the antenna structure layer through the waveguide structure.
2. The apparatus of claim 1, wherein the antenna structure layer comprises an antenna driving layer and an antenna guiding layer sequentially disposed along a side of the substrate.
3. The apparatus of claim 1, wherein the waveguide structure comprises: the circuit board comprises an upper conducting layer, a lower conducting layer and at least two rows of conducting holes for connecting the upper conducting layer and the lower conducting layer.
4. The apparatus of claim 3, wherein:
the radio frequency chip is provided with M radio frequency transceiving ends;
the substrate is provided with N waveguide structures, the N waveguide structures correspond to N radio frequency transceiving ends in the M radio frequency transceiving ends one by one, M and N are positive integers, and M is more than or equal to N and is more than or equal to 2;
n antenna structure layers which correspond to the N waveguide structures one by one are arranged on the side face of the substrate;
and the N radio frequency transceiving ends are respectively coupled and connected with the corresponding antenna structure layer through the corresponding waveguide structures.
5. A device as claimed in claim 3, wherein the signal transmission direction of the coupling end of the waveguide structure and the antenna structure layer is at least partially perpendicular or approximately perpendicular to the antenna structure layer.
6. The apparatus of claim 4, wherein an average spacing between two adjacent waveguide structures near the RF chip end is smaller than an average spacing between two adjacent waveguide structures near the antenna structure layer end.
7. The apparatus of claim 6, wherein signal transmission directions of at least two of the N waveguide structures are at least partially parallel.
8. The apparatus of claim 7, wherein the signal transmission directions of at least two of the N waveguide structures are partially perpendicular or approximately perpendicular to the antenna structure layers corresponding to the at least two of the N waveguide structures.
9. The apparatus of claim 6, wherein the average distance between the N waveguide structures tapers from near the antenna structure layer end to near the RF chip end, and the apparatus is provided with additional routing areas.
10. The apparatus of claim 9, wherein a blocking structure is disposed between the at least one waveguide structure and the additional routing region.
11. The apparatus of claim 3, wherein at least two adjacent waveguide structures share a same row of waveguide vias.
12. The device of claim 11, wherein at least two adjacent waveguide structures are separated by three rows of via holes.
13. The apparatus of claim 4, wherein at least two of the N antenna structure layers are located on different sides of the substrate.
14. A method of manufacturing a semiconductor package device, comprising:
providing a substrate and a radio frequency chip, wherein the substrate is provided with a waveguide structure, one end of the waveguide structure is coupled with the radio frequency chip, and the other end of the waveguide structure is adjacent to the side surface of the substrate;
providing an antenna structure layer;
and arranging the antenna structure layer on the side surface of the substrate so that the radio frequency chip is coupled and connected with the antenna structure layer through the waveguide structure.
CN202110670907.9A 2021-06-16 2021-06-16 Semiconductor package device and method of manufacturing the same Pending CN115483184A (en)

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CN202110670907.9A CN115483184A (en) 2021-06-16 2021-06-16 Semiconductor package device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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CN115483184A true CN115483184A (en) 2022-12-16

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