CN115473622A - Laser frame ranging method - Google Patents
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- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
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Abstract
The invention discloses a laser frame distance measuring method, wherein a preceding stage photoelectric conversion module converts a laser signal into an electric signal, a clock and parallel data are recovered through a phase-locked loop, a frame synchronization module is used for carrying out frame synchronization on the parallel data according to a synchronization head to generate a frame header synchronization decision pulse and a synchronization delay, a distance measuring frame information processing module extracts distance measuring information from a frame data center, a clock phase calculation module is used for calculating the phase difference between a recovery clock and a local clock, and after the synchronization decision pulse arrives, a high-precision receiving moment is calculated according to the phase difference and the synchronization delay. The laser ranging method does not need to use high-precision ADC and DDS, and is simple to implement and low in cost.
Description
Technical Field
The invention relates to the field of laser, in particular to a laser frame ranging method.
Background
Laser ranging is a method for measuring distance by using laser characteristics (such as pulse, phase, etc.), and is widely used between satellites and ground. With the rapid development of inter-satellite networking and satellite navigation technologies, a single distance measurement method cannot meet the increasing communication and distance measurement requirements. The high-speed communication of the laser solves the communication rate bottleneck among networking satellites, and the high-precision distance measurement performance realized based on the laser communication signals has great significance on a satellite positioning or navigation positioning system.
In the existing research literature, many of the two-way one-way distance measurement principles are adopted to realize the distance measurement between two terminals. Sunsjianfeng in a high-speed laser communication method and a high-precision laser ranging integrated method, 2019-02-01, a ranging code and clock phase difference mode is adopted to realize coarse ranging and fine ranging, but the received ranging code needs to be subjected to correlation operation with a local ranging code, and the complexity is high. Funan Zhu also adopts coarse ranging and fine ranging in "Inter-satellite laser-ranging based on intra-radial coherent detection",2021, 8930-8938, and adopts a high-speed ADC for sampling, and uses a DDS (Direct Digital Synthesis) technique to compare the phase difference between the local clock and the recovered clock to realize fine ranging, which is high in implementation cost.
Disclosure of Invention
In view of the above defects in the prior art, the technical problem to be solved by the present invention is that the existing laser communication and ranging integration technology is high in cost, complex in operation, and not easy to popularize and implement. Therefore, the invention provides a laser ranging method, which utilizes a frame synchronization module, a ranging frame information processing module and a clock phase calculation module to recover communication data through the frame synchronization module, the communication data is transmitted to the ranging frame information processing module to extract ranging information to obtain a coarse ranging value, the clock phase calculation module calculates a local clock and recovers a clock phase difference to obtain an accurate ranging value, a high-precision ADC and a DDS are not needed, and the method is simple to implement and low in cost.
In order to achieve the purpose, the invention provides a laser frame ranging method, a preceding stage photoelectric conversion module converts a laser signal into an electric signal, the electric signal is restored through a phase-locked loop to obtain a clock and parallel data, a frame synchronization module is used for carrying out frame synchronization on the parallel data according to a synchronization head to generate a frame head synchronization judgment pulse and a synchronization delay, a ranging frame information processing module extracts ranging information at a sending time from a frame data center, a clock phase calculation module is used for calculating a phase difference between a recovery clock and a local clock, a high-precision receiving time is calculated according to the phase difference and the synchronization delay after the synchronization judgment pulse arrives, a data interaction module receives the sending time and the receiving time, a ranging value is calculated, and the ranging value is sent to a rear-stage upper computer for further processing.
Further, the frame synchronization module performs shift synchronization according to the frame header, performs frame alignment on the parallel data after identifying the frame header, generates a synchronization decision pulse and a synchronization delay, and sends the synchronization decision pulse and the synchronization delay to the clock phase calculation module, wherein the synchronization decision pulse is used as a trigger signal, and the synchronization delay is used for compensating an error caused by the synchronization module.
Furthermore, the ranging information comprises second counting and ranging frame sending time, the ranging frame processing module extracts the second counting, processing time delay and local ranging value of the opposite terminal from the ranging frame, and the data are used as the opposite terminal sending time to be sent to the data interaction module.
Further, the clock phase calculation module compares the local clock with the recovered clock by a high frequency clock counter aligned with the local clock to perform a phase difference calculation.
Further, the high-frequency clock counter comprises a frame count and a phase count, the frame count is driven by a TX clock of the SERDES module, the phase count comprises a plurality of sub-counters, each sub-counter works under the frequency multiplication of the TX clock m, and working clocks of the sub-counters have equal phase difference.
Further, each sub-counter exists at each sub-clock, and counting is realized by means of a circular shift register.
Furthermore, on each rising edge of the clock to be measured, the frame count value and the sub-clock count value which are subjected to gray coding are beaten to a clock domain of the clock to be measured in a beating mode, then gray code decoding is carried out, then phase count value calculation is carried out in the clock domain to be measured, the average value of the phase count values is obtained, and the frame count value is corrected through the phase count values.
Furthermore, the phase counting value comprises the counting value of a plurality of sub-counters for accumulation sum, and the accumulation sum is eliminated and the return-to-zero error is eliminated through the alternative calling of at least two paths of accumulators.
Further, the frame count value and the phase count value include the following three relationships: the phase count return-to-zero is substantially synchronous with the frame count self-increment, the phase count return-to-zero lags the frame count self-increment, and the phase count return-to-zero leads the frame count self-increment.
Further, the receiving time is obtained by frame counting and phase counting, and the value of the receiving time needs to be corrected according to the three situations.
Technical effects
According to the laser frame ranging method, the communication frame is used for loading ranging information, the overhead is low, the communication frame structure does not need to be changed for ranging, the clock phase calculation is simple to realize, the frequency domain conversion is not needed, the whole process is realized in an electric domain, the optical domain structure does not need to be changed, the ranging result is accurate, and the cost is low.
The conception, the specific structure and the technical effects of the present invention will be further described with reference to the accompanying drawings to fully understand the objects, the features and the effects of the present invention.
Drawings
FIG. 1 is a diagram illustrating a laser frame ranging method according to a preferred embodiment of the present invention;
fig. 2 is a schematic diagram of a simplified ranging process of a laser frame ranging method according to a preferred embodiment of the present invention.
FIG. 3 is a timing diagram of receiving-end simple ranging of a laser frame ranging method according to a preferred embodiment of the present invention.
Fig. 4 is a block diagram of a clock phase calculation module of a laser frame ranging method according to a preferred embodiment of the present invention.
FIG. 5 is a simplified timing diagram of the PLL clock generation for a laser frame ranging method according to a preferred embodiment of the present invention.
FIG. 6 is a simplified timing diagram of the phase clock of a laser frame ranging method according to a preferred embodiment of the present invention.
FIG. 7 is a simplified timing diagram of the phase count leading frame count of a laser frame ranging method according to a preferred embodiment of the present invention.
FIG. 8 is a simplified timing diagram of the phase count delayed frame count of a laser frame ranging method according to a preferred embodiment of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular internal procedures, techniques, etc. in order to provide a thorough understanding of embodiments of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
As shown in figure 1, the invention provides a laser frame ranging method, a preceding stage photoelectric conversion module converts a laser signal into an electric signal, a clock and parallel data are recovered through a phase-locked loop, a frame synchronization module is used for carrying out frame synchronization on the parallel data according to a synchronization head to generate a frame head synchronization judgment pulse and synchronization time delay, a ranging frame information processing module extracts ranging information from a frame data center, a clock phase calculation module is used for calculating the phase difference between a recovered clock and a local clock, and after the synchronization judgment pulse arrives, high-precision receiving time is obtained through calculation according to the phase difference and the synchronization time delay.
In this embodiment, a specific process and principle of the laser frame ranging method provided by the present invention will be described by using a two-way one-way ranging test, in the two-way one-way ranging process, the ranging process of laser terminal a transmission and laser terminal B reception is the same as the ranging process of laser terminal a reception and laser terminal B transmission, here, taking terminal a transmission and terminal B reception as an example, and the ranging process is shown in fig. 2.
The laser frame ranging method of the embodiment includes the following steps:
1) In a laser terminal A, after a waiting PPS _ A _1 arrives, recording the time of the first bit leading edge of the frame head of a first complete laser link frame, and recording the offset relative to the PPS _ A _1 as a local timestamp delta t of a sending end A1 I.e. the transmission time, the unit is 0.1ns. It is filled in the header of the laser link frame and this frame is marked as a ranging valid frame.
2) In a laser terminal B, after a PPS _ B _1 arrives, recording the time of the leading edge of the first bit of the frame head of a first ranging effective frame which arrives later, and recording the offset relative to the PPS _ B _1 as a local time stamp delta t of a receiving end B1 I.e. the reception time, in units of 0.1ns.
3) The laser terminal B obtains the local timestamp delta t of the sending end from the frame head of the received ranging effective frame A1 。
4) The laser terminal B calculates to obtain the local distance measurement value T of the laser terminal B 1 ＝Δt B1 -Δt A1 。
5) The sending end of the laser terminal B fills the second counting T in the same distance measuring period in the frame head of the following 100 frames of laser link B1 And local ranging value T of laser terminal B 1 . At the remaining time, default values of 0xFFFFFF and 0xFFFFFFFF are filled in. The second counting in the ranging week is used for identifying the time of the local ranging value, and the laser terminals A and B respectively have one local ranging value in each second.
6) The receiving end of the laser terminal A receives the effective second counting T in the ranging period after the PPS _ A _1 B1 And local ranging value T of laser terminal B 1 Then according to T B1 And retrieving the corresponding local distance measurement value T of the laser terminal A 2 . Will T 1 、T 2 And packaging and uploading for software to use.
In the above process, the key of the ranging is the sending time Δ t A1 And a reception time Δ t B1 The accuracy of the invention is obtained, the precision of 0.1ns is obtained, and the clock phase calculation module is adopted to realize the sending time delta t in the embodiment of the invention A1 And a reception time Δ t B Accurate acquisition of the data.
Particularly, at the receiving end, the clock phase calculation module is located behind the frame synchronization module, random time delay is introduced into the frame synchronization, the accuracy of measuring the receiving time is interfered, and the receiving time output by the clock phase calculation module needs to be subtracted from the synchronous time delay output by the frame synchronization module for compensation.
The clock phase calculation module compares the local clock with the recovered clock through a high-frequency clock counter aligned with the local clock to calculate the phase difference. Taking a receiving end (laser terminal B) as an example, after a ranging frame arrives, a ranging pulse is generated, and a local timestamp in a local clock domain (Serdes TX clock) is obtained in a beating manner to obtain Δ t B1 As shown in fig. 3.
The local timestamp is obtained by calculating a phase difference between a receiving end recovered clock and a local clock by building a high-frequency clock counter in a local clock domain, as shown in fig. 4.
The high frequency clock counter comprisesThe method comprises two parts of frame counting and phase counting, wherein the frame clock counting is driven by a tx clock of an SERDES module, the frequency is f, and the counting is completed by 1s and returns to zero. The phase clock is composed of n sub-clocks, each sub-clock is m times of the frame clock, i.e. the frequency is mf, the count is f -1 Return to zero seconds, where there is 2 π × n between n sub-clocks -1 Together, form a virtual clock of frequency mnf.
Taking fig. 5 as an example, the frame clock is 156.25MHz and is composed of 8 sub-clocks, the frequency of the sub-clock is 4 times of the frequency of the frame clock, and is 625MHz, a pi/4 phase difference exists between the sub-clocks, and a virtual clock with a frequency of 5GHz is composed, that is, at each rising edge of the 5GHz clock, a rising edge of one path of 625MHz clock exists corresponding to the rising edge.
At each sub-clock there is a sub-counter, which by means of a circular shift register achieves an accumulated count of 0 to 2 m-1. The output of the counter count value is divided into k paths, and the count value difference between every two paths is 2mk -1 And the method is used for avoiding the error generated by the return-to-zero of the sub-counter count value when the phase count value is calculated. The output of the sub-counter adopts Gray coding, and the jitter of the count value generated across clock domains is limited to be not more than +/-1.
Taking fig. 6 as an example, the phase count is composed of 8 sub-counters, each implementing a count of 0-7. The output of the sub-counter is divided into two paths A and B which are called alternately, and the count values of the two paths A and B have a difference of 4.
At each rising edge of the clock to be tested, the frame count value and the sub-clock count value which are subjected to Gray coding are beaten to a clock domain of the clock to be tested in a beating mode, gray code decoding is carried out, then phase count value calculation is carried out in the clock domain to be tested, and the frame count value is corrected through the phase count value.
The count value of the phase count is obtained by summing up the count values of the 8 sub-counters, and the output includes the count value and the synchronization bit. Taking fig. 6 as an example, under a 5GHz virtual clock, the count value ranges from 0 to 62, the unit is 0.1ns, the resolution is 0.2ns, and the sync bit is a single bit, which indicates whether the call in the accumulator is a way, and the sync bit has a corresponding relationship with the lowest bit of the frame count.
The specific process of obtaining the count value is as follows:
1. respectively accumulating the count values of the sub-counters in the A path and the B path to obtain sum _ a and sum _ B;
2. if sum _ a is within the range of 16-47, outputting a count value of (sum _ a-16) × 2, and synchronizing position 1;
3. if sum _ b is less than 16, the output count value is (sum _ b + 16) × 2, and the synchronous position is 1;
4. if sum _ b is greater than 47, outputting a count value of (sum _ b-48) × 2, and synchronizing position 1;
5. in the remaining cases, the output count value is (sum _ b-16) × 2, sync position 0.
Due to the beat across clock domains, under Gray coding, the frame counter has a jitter of + -1 (+ -6.4 ns) and each sub-counter has a jitter of + -1 (+ -0.2 ns). Through the phase counting calculation module, the jitter of the phase counting value caused by the jitter of the sub-counter is +/-16 (+/-1.6 ns) at most.
To further improve the stability of phase counting, it is necessary to perform an averaging operation on the outputs of multiple phase counting values (fast clock counting) to make the error less than 0.1ns, and this step is performed by an averager, as shown in fig. 4.
The work flow of the averager is as follows:
1. latching a first bit input ranging value and a synchronization bit thereof;
2. comparing the input ranging value with the first ranging value, and if a carry bit or a back bit exists, performing cycle continuation;
3. calculating an average value;
4. and correcting the synchronous bit according to the near-receding bit relation between the average value and the first ranging value.
For frame counting, the error of +/-6.4 ns of the frame counting value can be eliminated through the synchronous identification bit of phase counting, and the principle is as follows:
assume the phase count synchronization flag bit is A f The lowest bit of the frame count value is Cs 0 The synchronization flag bit A may be selected from f And Cs 0 After the XOR operation, the result is obtained,
wherein A is f Will turn over when the phase count returns to zero, at this time the frame count value increases by itself, cs 0 And also flip at the same time. Therefore, in the operation of the system, the count value of the clock counting module is sampled from any clock domain, and a should be a fixed value.
The frame count value and the phase count value include the following three relationships: the phase count return-to-zero is substantially synchronous with the frame count self-increment (frame count error free), leads the frame count self-increment (frame count error-6.4 ns, as shown in fig. 7), lags the frame count self-increment (frame count error +6.4ns, as shown in fig. 8), and leads (lags) the inversion of the synchronization flag a. Therefore, the frame counting error can be corrected by judging whether the synchronous flag bit A is overturned.
Whether the synchronous flag bit A needs a reference for turning or not can adopt a Serdes TX clock as a clock to be tested, at the moment, the clock to be tested and a frame counting value are in the same clock domain and accord with clock constraint, the obtained frame counting value has no error, and the frame clock and a sub-clock are locked in phase through a phase-locked loop, so that the phase counting value does not return to zero. The synchronization flag A obtained in this state is stable and can be taken as a reference state and is marked as A s 。
Therefore, when the time stamp is acquired in other clock domains, only the synchronous flag bit A needs to be compared with the reference state A s The frame count error can be corrected. The correction formula is as follows:
wherein, C r Obtaining a local timestamp for the signal to be measured; c s The frame count value under the clock domain of the signal to be detected; c f The phase counting value under the clock domain of the signal to be detected is obtained; a is a synchronous flag bit under a clock domain of a signal to be detected; a. The s For reference synchronization mark under SerdesTX clock domainBit, the flag bit is constant.
As shown in fig. 7, the phase count returns to zero and the previous frame count self-increments. When A is turned, the counting value generates a-64 error, and the counting value is continuous before and after A is turned after being corrected according to a formula; as shown in fig. 8, the phase count returns to zero and the frame count increases, when a is reversed, the count value has +64 error, and the count value is continuous before and after the A is reversed after the correction according to the formula. The verification is established.
In addition, the frame synchronization, ranging frame information processing and clock phase calculation module in the embodiment of the invention realizes codes by verilog language and burns the codes on the FPGA board card, and the FPGA board card is connected with a host. The data transmission method is convenient to realize and popularize.
The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.
Claims (10)
1. A laser frame ranging method is characterized in that a preceding stage photoelectric conversion module converts laser signals into electric signals, a clock and parallel data are recovered through a phase-locked loop, a frame synchronization module is used for carrying out frame synchronization on the parallel data according to a synchronization head to generate frame head synchronization judgment pulses and synchronization time delay, a ranging frame information processing module extracts ranging information of sending time from a frame data center, a clock phase calculation module is used for calculating phase difference between a recovery clock and a local clock, high-precision receiving time is obtained according to the phase difference and the synchronization time delay after the synchronization judgment pulses arrive, a data interaction module receives the sending time and the receiving time, a ranging value is calculated, and the ranging value is sent to a rear-stage upper computer for further processing.
2. The laser frame ranging method of claim 1, wherein the frame synchronization module performs shift synchronization according to a frame header, performs frame alignment on parallel data after the frame header is recognized, generates a synchronization decision pulse and a synchronization delay, and sends the synchronization decision pulse and the synchronization delay to the clock phase calculation module, wherein the synchronization decision pulse is used as a trigger signal, and the synchronization delay is used to compensate an error caused by the synchronization module.
3. The laser frame ranging method according to claim 1, wherein the ranging information includes a second count and a ranging frame transmission time, the ranging frame processing module extracts the second count, the processing delay, and a local ranging value of the peer end from the ranging frame, and transmits these data as the peer end transmission time to the data interaction module.
4. The laser frame ranging method of claim 1, wherein the clock phase calculation module compares the local clock with the recovered clock by a high frequency clock counter aligned with the local clock to perform the phase difference calculation.
5. The laser frame ranging method according to claim 4, wherein the high frequency clock counter comprises a frame count and a phase count, the frame count is driven by a TX clock of a SERDES module, the phase count comprises a plurality of sub-counters, each of the sub-counters operates under a frequency multiplication of a TX clock m, and operating clocks of each of the sub-counters have equal phase difference.
6. The laser frame ranging method of claim 5, wherein each of the sub-counters exists at each sub-clock, and counting is performed by means of a circular shift register.
7. The laser frame ranging method according to claim 5, wherein at each rising edge of the clock to be measured, the frame count value and the sub-clock count value which have been gray-coded are clocked into the clock domain of the clock to be measured by means of a beat, then gray code decoding is performed, then calculation of the phase count value is performed in the clock domain to be measured, the average value of the phase count values is obtained, and the frame count value is corrected by the phase count value.
8. The laser frame ranging method of claim 7, wherein the phase count value comprises a plurality of sub-counter count values for accumulated sum, and the accumulated sum is removed from zero errors by alternately calling at least two accumulators.
9. The laser frame ranging method of claim 8, wherein the frame count value and the phase count value include the following three relationships: the phase count return-to-zero is substantially synchronous with the frame count self-increment, the phase count return-to-zero lags the frame count self-increment, and the phase count return-to-zero leads the frame count self-increment.
10. The laser frame ranging method according to claim 9, wherein the frame count value and the phase count value are calculated under the trigger of the synchronous decision pulse to obtain a receiving time, and the receiving time is required to correct the values according to the three conditions.
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| CN202210875164.3A Pending CN115473622A (en) | 2022-07-25 | 2022-07-25 | Laser frame ranging method |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003084053A (en) * | 2001-09-13 | 2003-03-19 | Mitsubishi Electric Corp | Distance-measuring equipment, and processor for measured distance |
| US20090080891A1 (en) * | 2007-09-21 | 2009-03-26 | Tohru Kazawa | Passive optical network system and ranging method |
| CN101562488A (en) * | 2009-04-30 | 2009-10-21 | 上海大学 | Method for utilizing frame gap to transmit in-phase clock information in gigabit Ethernet |
| CN109541617A (en) * | 2018-12-11 | 2019-03-29 | 湖南迈克森伟电子科技有限公司 | A kind of high speed noncoherent communication range unit and method |
| CN114114298A (en) * | 2021-11-24 | 2022-03-01 | 武汉匾福光电科技有限责任公司 | Distance measurement method and system based on IM-DD |
-
2022
- 2022-07-25 CN CN202210875164.3A patent/CN115473622A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003084053A (en) * | 2001-09-13 | 2003-03-19 | Mitsubishi Electric Corp | Distance-measuring equipment, and processor for measured distance |
| US20090080891A1 (en) * | 2007-09-21 | 2009-03-26 | Tohru Kazawa | Passive optical network system and ranging method |
| CN101562488A (en) * | 2009-04-30 | 2009-10-21 | 上海大学 | Method for utilizing frame gap to transmit in-phase clock information in gigabit Ethernet |
| CN109541617A (en) * | 2018-12-11 | 2019-03-29 | 湖南迈克森伟电子科技有限公司 | A kind of high speed noncoherent communication range unit and method |
| CN114114298A (en) * | 2021-11-24 | 2022-03-01 | 武汉匾福光电科技有限责任公司 | Distance measurement method and system based on IM-DD |
Non-Patent Citations (4)
| Title |
|---|
| JIAN CHEN: "Modal Crosstalk Mitigated IM/DD Mode-Multiplexed Transmission Based on Pilot Assisted Least Square Algorithm", 《IEEE》, 9 August 2018 (2018-08-09) * |
| MING LI: "Design of High-Speed PPM Signal Synchronization Based on FPGA", 《IEEE》, 11 October 2018 (2018-10-11) * |
| 徐建伟: "测距和时间同步系统的设计与FPGA实现", 《中国优秀硕士学位论文全文数据库》, 31 March 2022 (2022-03-31) * |
| 陈健: "以太分组网络时钟同步技术研究及应用", 《中国博士学位论文全文数据库》, 31 January 2009 (2009-01-31) * |
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