CN115473542A

CN115473542A - Vector signal synthesis circuit

Info

Publication number: CN115473542A
Application number: CN202110574489.3A
Authority: CN
Inventors: 梁建纲; 丁元翕; 颜力
Original assignee: Cainiao Smart Logistics Holding Ltd
Current assignee: Cainiao Smart Logistics Holding Ltd
Priority date: 2021-05-25
Filing date: 2021-05-25
Publication date: 2022-12-13

Abstract

The embodiment of the present application provides a vector signal synthesis circuit, including: a reference signal obtaining module, configured to obtain an interference signal transmitted on a signal transmission link, and use the interference signal as a reference signal; the reference signal processing module is used for processing the reference signal to obtain a reference vector signal with a phase difference of 180 degrees and adjusting the amplitude of the reference vector signal with the phase difference of 180 degrees; and the target vector signal synthesis module is used for synthesizing the adjusted reference vector signals to obtain target synthesis vector signals for cancellation, and the target synthesis vector signals and the interference signals have equal amplitude and opposite phase. The reference vector signals with the phase difference of 180 degrees are obtained by processing the reference signals, a wider frequency band can be provided for the synthesis of any vector signal, the design freedom of a circuit structure is improved, and the finally synthesized target synthesized vector signal has an adjustable range of 360 degrees.

Description

Vector signal synthesis circuit

Technical Field

The present application relates to the field of electronic technologies, and in particular, to a vector signal synthesis circuit.

Background

In an RFID (Radio Frequency Identification) reader system, a carrier signal transmitted by a TX (Transmit X) channel leaks to an RX (Receiver X) channel, and the carrier signal leaked to the RX channel not only affects a dynamic range of an RX link but also introduces phase noise, thereby greatly affecting a sensitivity of the RFID reader system. Therefore, an arbitrary vector synthesis circuit is needed to perform cancellation processing on the leaked carrier signal, which is referred to as carrier cancellation for short.

The principle of the cancellation is to extract a part of carrier energy, modulate a cancellation signal with a certain phase and amplitude by a special modulation device, cancel the cancellation signal with a leaked radio frequency carrier signal, and reduce the amplitude of the leaked radio frequency carrier signal to the minimum so as to ensure the sensitivity of the RFID reader-writer system as much as possible. However, in the process of modulating the phase and the amplitude, in the case that the phase and the frequency of the signal are strongly correlated with the common phase shifter, the working bandwidth of the vector signal synthesis circuit is narrow, and the generated signal for cancellation hardly achieves a good carrier cancellation effect.

Disclosure of Invention

In view of the above problems, embodiments of the present application are proposed to provide a vector signal synthesizing circuit and a corresponding vector signal synthesizing method that overcome or at least partially solve the above problems.

In order to solve the above problem, an embodiment of the present application discloses a vector signal synthesizing circuit, including: the device comprises a reference signal acquisition module, a reference signal processing module and a target vector signal synthesis module;

the reference signal acquisition module is configured to acquire an interference signal transmitted on a signal transmission link, and use the interference signal as a reference signal;

the reference signal processing module is used for processing the reference signal to obtain a reference vector signal with a phase difference of 180 degrees and adjusting the amplitude of the reference vector signal with the phase difference of 180 degrees;

the target vector signal synthesis module is used for synthesizing the adjusted reference vector signals to obtain target synthesis vector signals for cancellation; wherein the target synthetic vector signal and the interference signal have equal amplitude and opposite phase.

Optionally, the reference signal processing module includes a power divider, a filter, and an attenuator;

the power divider is used for performing power division on the reference signal to obtain a power division signal with the same amplitude and phase as the reference signal;

the filter is used for shifting the phase of the power division signal to obtain a reference vector signal with a phase difference of 180 degrees; the reference vector signals with the phase difference of 180 degrees comprise n paths of reference vector signals which are in phase or opposite in phase;

the attenuator is used for adjusting the amplitude of the n reference vector signals.

Optionally, the reference signal has a reference phase and a reference amplitude, and the reference signal processing module further includes a switch; the switches comprise a first group of radio frequency switches for conducting the power divider and the filter, and a second group of radio frequency switches for conducting the filter and the attenuator;

the first group of radio frequency switches and the conducting circuit of the filter are used for determining two paths of reference vector signals for synthesizing a target synthesized vector signal from the n paths of reference vector signals according to the reference phase;

and the conducting circuits of the second group of radio frequency switches and the attenuator are used for controlling the transmission of the two paths of vector signals to the attenuator for processing, and the attenuator is used for adjusting the amplitudes of the two paths of vector signals according to the reference amplitude.

Optionally, the target vector signal synthesizing module includes a combiner;

the combiner is used for synthesizing mutually orthogonal reference vector signals to obtain target synthesized vector signals; wherein the combiner employs a 3db bridge circuit, and the target composite vector signal has a target phase that is in anti-phase with a reference phase and a target amplitude that is the same as the reference amplitude.

Optionally, the power division signal includes two power division signals; the first group of radio frequency switches comprise a first radio frequency switch and a second radio frequency switch which respectively correspond to the two paths of power division signals; the filter comprises a high-pass filter and a low-pass filter;

the first radio frequency switch is used for controlling the power divider to be conducted with the high-pass filter or the low-pass filter and transmitting one path of power dividing signal to the conducted high-pass filter or low-pass filter;

the second radio frequency switch is used for controlling the power divider to be conducted with the high-pass filter or the low-pass filter and transmitting the other path of power dividing signal to the conducted high-pass filter or low-pass filter.

Optionally, the high-pass filter is configured to adjust a phase of the power division signal to lead a reference phase of the reference signal; the low-pass filter is used for adjusting the phase of the power division signal to lag behind the reference phase of the reference signal;

the phase difference between the two reference vector signals obtained by the two power division signals processed by the low-pass filter is in-phase, the phase difference between the two reference vector signals obtained by the two power division signals processed by the high-pass filter is in-phase, the phase difference between any reference vector signal processed by the high-pass filter and any reference vector signal processed by the low-pass filter is 180 degrees.

Optionally, the attenuator has an adjustment step of an attenuation value, and the attenuator is configured to adjust the amplitude of the nth reference vector signal according to the adjustment step of the attenuation value.

Optionally, the attenuator comprises a voltage-controlled attenuator VVA and a digital-controlled attenuator DSA; the adjustment step of the attenuation value of the voltage-controlled attenuator VVA is smaller than that of the numerical control attenuator DSA.

Optionally, the high pass filter and the low pass filter network constitute a phase difference of 180 °; the high pass filter comprises an LC-based high pass filter; the low pass filter comprises an LC based low pass filter.

Optionally, the vector signal synthesis circuit is used in a radio frequency circuit arrangement or a circuit arrangement operating in a frequency spectrum.

The embodiment of the application also discloses a vector signal synthesis method, which is applied to a vector signal synthesis circuit, and the method comprises the following steps:

acquiring an interference signal transmitted on a signal transmitting link, and taking the interference signal as a reference signal;

processing the reference signals to obtain reference vector signals with a phase difference of 180 degrees, and adjusting the amplitude of the reference vector signals with the phase difference of 180 degrees;

synthesizing the adjusted reference vector signals to obtain target synthesized vector signals for cancellation; wherein the target vector signal and the interference signal have equal amplitude and opposite phase.

Optionally, the vector signal synthesizing circuit includes a power divider, a filter, and an attenuator;

the processing the reference signal to obtain a reference vector signal with a phase difference of 180 °, and adjusting the phase and amplitude of the reference vector signal with the phase difference of 180 °, includes:

performing power division on the reference signal through the power divider to obtain a power division signal with the same amplitude and phase as the reference signal, and transmitting the power division signal to a filter;

phase shifting is carried out on the power division signal through the filter, and a reference vector signal with a phase difference of 180 degrees is obtained; the reference vector signals with the phase difference of 180 degrees comprise n paths of reference vector signals which are in phase or opposite in phase;

and adjusting the amplitude of the n reference vector signals through the attenuator.

The reference signal processing module further comprises a switch; the switches comprise a first group of radio frequency switches for conducting the power divider and the filter, and a second group of radio frequency switches for conducting the filter and the attenuator;

the transmitting the power division signal to a filter includes:

controlling the first radio frequency switch to be conducted with the high-pass filter or the low-pass filter, and transmitting one path of power division signal to the conducted high-pass filter or low-pass filter;

and controlling the second radio frequency switch to be conducted with the high-pass filter or the low-pass filter, and transmitting the other path of power division signal to the conducted high-pass filter or low-pass filter.

The high-pass filter is used for adjusting the phase of the power division signal to lead the reference phase of the reference signal; the low-pass filter is used for adjusting the phase of the power division signal to lag behind the reference phase of the reference signal;

optionally, the phase-shifting the power division signal by the filter to obtain n paths of mutually in-phase or anti-phase reference vector signals, including:

controlling the high-pass filter to perform advanced processing on one path of power division signal to obtain a first path of vector signal;

controlling the low-pass filter to perform phase lag processing on one path of power division signal to obtain a second path of vector signal;

controlling the high-pass filter to perform phase advance processing on the other power division signal to obtain a third path of vector signal;

controlling the low-pass filter to perform phase lag processing on the other power division signal to obtain a fourth path of vector signal; wherein the first and second paths of vector signals have a phase difference range of 180 degrees, and the third and fourth paths of vector signals have a phase difference range of 180 degrees

Optionally, the n reference vector signals include a first vector signal, a second vector signal, a third vector signal, and a fourth vector signal; the reference signal having a reference phase and a reference amplitude, the method further comprising:

determining two paths of reference vector signals for synthesizing a target synthesized vector signal from the n paths of reference vector signals according to the reference phase of the reference signal;

the adjusting, by the attenuator, the amplitude of the n reference vector signals includes:

and adjusting the amplitudes of the two paths of vector signals through the attenuator according to the reference amplitude.

Optionally, the determining, according to the reference phase of the reference signal, two reference vector signals used for synthesizing a target synthesized vector signal from the n reference vector signals includes:

forming a quadrant signal by the first path of vector signal, the second path of vector signal, the third path of vector signal and the fourth path of vector signal;

acquiring a reference quadrant in which a reference phase of the reference signal is positioned, and determining a target quadrant forming a diagonal relation with the reference quadrant;

and determining two paths of reference vector signals for synthesizing a target synthesized vector signal according to the target quadrant.

Optionally, the forming the first, second, third and fourth paths of vector signals into a quadrant signal includes:

forming a first quadrant signal positioned in a first quadrant by the first path of vector signal and the fourth path of vector signal;

forming a second quadrant signal positioned in a second quadrant by the first path of vector signal and the third path of vector signal;

forming a third quadrant signal positioned in a third quadrant by the third path of vector signals and the second path of vector signals;

and forming a fourth quadrant signal positioned in a fourth quadrant by the second path of vector signals and the fourth path of vector signals.

Optionally, the determining two reference vector signals for synthesizing the target synthesized vector signal according to the target quadrant includes:

if the target quadrant is a first quadrant, taking the first path of vector signal and the fourth path of vector signal as reference vector signals for synthesizing a target synthesized vector signal;

if the target quadrant is a second quadrant, taking the first path of vector signal and the third path of vector signal as reference vector signals for synthesizing a target synthesized vector signal;

if the target quadrant is a third quadrant, taking the third path of vector signals and the second path of vector signals as reference vector signals for synthesizing target synthesized vector signals;

and if the target quadrant is a fourth quadrant, taking the second path of vector signals and the fourth path of vector signals as reference vector signals for synthesizing target synthesized vector signals.

Optionally, the quadrant signal has a corresponding signal channel formed by turning on a high-pass filter or a low-pass filter by a first group of radio frequency switches, and the synthesizing the two paths of vector signals to obtain a target synthesized vector signal includes:

acquiring a quadrant signal formed by the reference vector signal for synthesizing the target synthetic vector signal, and determining a signal channel corresponding to the quadrant signal; the signal channel is connected with an attenuator with a preset attenuation value;

and synthesizing the references used for synthesizing the target synthetic vector signal in a mutually orthogonal manner according to the preset attenuation value to obtain the target synthetic vector signal.

Optionally, the attenuator has an adjustment progress of an attenuation value, and the adjusting, by the attenuator, the amplitudes of the two paths of vector signals according to the reference amplitude includes:

adjusting, by the attenuator, the initial amplitude in steps based on the adjustment of the attenuation value.

Optionally, the obtaining, by the attenuator, a target vector signal based on the amplitude of the adjustment step adjustment of the attenuation value includes:

acquiring a synthesized quadrant signal corresponding to the initial synthesized vector signal in a quadrant and a reference quadrant signal corresponding to the reference signal;

and adjusting the synthesized quadrant signal to obtain a target quadrant signal which forms an included angle with the reference quadrant signal and is a preset angle threshold value through the adjustment step of the attenuator based on the attenuation value, and taking the target quadrant signal as a target vector signal.

The embodiment of the application has the following advantages:

in this embodiment, the vector signal synthesizing circuit may include a reference signal obtaining module, a reference signal processing module, and a target vector signal synthesizing circuit, where the reference signal obtaining module may obtain an interference signal transmitted on the signal transmission link, and use the interference signal as a reference signal of the circuit, then process the reference signal through the reference processing module to obtain a reference vector signal with a phase difference of 180 °, adjust a phase and an amplitude of the in-phase or anti-phase reference vector signal, and finally synthesize the adjusted reference vector signal through the target vector signal synthesizing module to obtain a target synthesized vector signal with the same amplitude and anti-phase as the interference signal, so as to perform cancellation by using the obtained target synthesized vector signal. The reference vector signal with the phase difference of 180 degrees is obtained by processing the reference signal, so that the circuit structure does not need to require the phases of the signals obtained after processing to be 90 degrees and-90 degrees, a wider frequency band can be provided for the synthesis of any vector signal by processing the phase difference of 180 degrees output by adopting the combination of a high-pass filter and/or a low-pass filter, the design freedom degree of the circuit structure is improved, and the finally synthesized target synthesized vector signal has an adjustable range of 360 degrees.

Drawings

FIG. 1 is a block diagram of an embodiment of a vector signal synthesis circuit according to the present application;

fig. 2 is a block diagram of a vector signal synthesizing circuit according to an embodiment of the present application;

FIG. 3 is a circuit diagram of a vector signal synthesizing circuit in an embodiment of the present application;

fig. 4 is a schematic diagram of a frame structure of a radio frequency circuit apparatus in an embodiment of the present application;

FIG. 5 is a flow chart of steps of an embodiment of a vector signal synthesis method of the present application;

FIG. 6 is a diagram of quadrant signals in an embodiment of the present application.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, the present application is described in further detail with reference to the accompanying drawings and the detailed description.

In an RFID (Radio Frequency Identification) reader system, a carrier signal transmitted by a TX channel leaks to an RX channel, and the carrier signal (which may be referred to as a carrier leakage signal or an interference signal) leaking to the RX channel not only affects a dynamic range of an RX link, but also introduces phase noise, thereby greatly affecting a sensitivity of the RFID reader system. At this time, an AVSC (Arbitrary vector synthesis circuit) is required to generate a target synthesis vector signal, the target vector signal and the carrier leakage signal have equal amplitude and opposite phase, and the cancellation with the carrier leakage signal can be realized after the target vector signal and the carrier leakage signal are combined, so that the signal amplitude is reduced, and the phase noise can be reduced. Therefore, for the RFID reader system, the arbitrary vector composition circuit is a significant factor in its design. It should be noted that any vector combination circuit can be applied not only to generating a signal having the same amplitude and opposite phase as the carrier leak signal, but also to realizing a vector signal in any direction in other mobile communications. Any of the vector synthesis circuits described above may be embodied as a carrier cancellation processing circuit.

In the prior art, a reference signal is divided into two paths of equal-amplitude orthogonal signals, then the divided signals are subjected to phase shifting (phase shifting) in sequence, pass through an attenuator, and finally pass through a combiner to form a final vector signal. However, in the prior art, a device for shifting a phase of a signal is a general phase shifter, and on one hand, for the phase shifter, it is necessary to adjust different phase differences of the signal by changing the length of a transmission line, that is, the length of the transmission line is strongly related to the phase and the frequency, once the length of the transmission line is determined, the adjustable phase of the phase shifter at a certain frequency is also determined, and the circuit for shifting the phase by using the general phase shifter has low flexibility in design; on the other hand, the general phase shifters used are those of 90 ° (indicating phase advance by 90 °) and-90 ° (indicating phase retard by 90 °), and this circuit configuration imposes that the phases of the signals subjected to transmission processing via the signal path1 and the signal path2 of the phase shifter are 90 ° and-90 °, and there is a limit to the phase of the processed signal, that is, its phase bandwidth is narrow.

One of the core ideas of the application is to introduce a phase difference concept to expand the working bandwidth, and mainly a reference signal processing module is used for processing a reference signal to obtain mutually in-phase or anti-phase reference vector signals, so that the phase of the signal obtained after the circuit structure does not need to be forced to be 90 degrees and-90 degrees, a wider frequency band can be provided for the synthesis of any vector signal by processing the output phase difference of 180 degrees through the combination of a high-pass filter and a low-pass filter, the design freedom of the circuit structure can be improved, and the finally synthesized target synthesis vector signal has an adjustable range of 360 degrees.

Referring to fig. 1, which shows a block schematic diagram of an embodiment of a vector signal synthesis circuit of the present application, the vector signal synthesis circuit may include a reference signal acquisition module 100, a reference signal processing module 200, and a target vector signal synthesis module 300.

In the embodiment of the present application, carrier leakage signals leaking from the TX channel to the RX link may have different phases and amplitudes due to different isolation degrees of the transceiver antennas (for the case of separation of the transceiver antennas) and different port standing waves of the TX antennas (mainly for the case of the transceiver common antenna), that is, the phases and amplitudes of the carrier leakage signals leaking to the RX link are unknown, and at this time, the reference signal acquisition module 100 may acquire the interference signals transmitted by the RFID reader on the signal transmission link, and use the interference signals as reference signals of the circuit, so that the reference signals can be subsequently processed by the reference signal processing module 200.

In the process of processing the reference signal by the reference signal processing module 200, the reference signal can be processed to obtain a reference vector signal with the same phase or the opposite phase, and specifically, the reference signal can be processed to obtain a vector signal with a phase difference range of 180 degrees, so that the phase difference is introduced to provide a wider frequency band for the signal, and the design freedom of a circuit structure is improved; the reference signal processing module 200 may further process the processed in-phase or anti-phase reference vector signal, and specifically adjust the amplitude of the reference vector signal.

After the reference vector signal is adjusted by the reference signal processing module 200, the target vector signal synthesizing module 300 may perform orthogonal synthesis on the adjusted reference vector signal to form a new phase and amplitude, and obtain a target vector signal for cancellation, where the target vector signal obtained by synthesis and the carrier leakage signal (i.e., the interference signal) have equal amplitude and opposite phase, so that cancellation of the carrier leakage signal can be achieved after combining the two signals, the signal amplitude of the carrier leakage signal is reduced, and phase noise of the carrier leakage signal can also be reduced.

In a specific implementation, as shown in fig. 2, the reference signal processing module 200 may include a power divider 11, a filter 12, and an attenuator 13, and the target vector signal synthesizing module 300 may include a combiner21.

The reference signal obtaining module 100 and the reference signal processing module 200 may be connected through a power divider 11, the reference signal processing module 200 and the target vector synthesizing module 300 may be connected through an attenuator 13, and when the reference signal processing module processes the reference signal to obtain a reference vector signal, the reference vector signal may be transmitted to the combiner21 of the target vector synthesizing module 300 through the attenuator, so that the target vector synthesizing module 300 may synthesize the reference vector signal to obtain a target synthesized vector signal.

As a specific example, referring to fig. 3, which shows a circuit schematic diagram of a vector signal synthesis circuit in this embodiment of the present application, a reference signal may first pass through a power divider 11 to form two paths of identical signals, where a phase difference between the two paths of identical signals is 0 °, that is, a constant-amplitude and in-phase signal is between the two paths of identical signals, then the two paths of identical signals may pass through a radio frequency switch, a high-pass filter, a low-pass filter, a radio frequency switch and a voltage-controlled attenuator VVA, and finally a combiner bridge (phase difference of 90 °) is used to generate a target synthesis vector signal that is finally in constant-amplitude and opposite-phase to a carrier leakage signal, so as to eliminate the carrier leakage signal.

Specifically, the power divider 11 may be configured to perform power division on the reference signal to obtain two paths of power division signals with equal amplitude and in phase; the filter 12 may be configured to phase-shift the power division signal to obtain n reference vector signals that are in-phase or in-phase with each other, that is, the reference vector signals of the two reference signals under the same switch after phase shifting (i.e., after passing through the high-pass filter and the low-pass filter respectively) may have a phase difference of 180 degrees; the attenuator 13 may be configured to adjust the amplitudes of the n reference vector signals, and the combiner21 may employ a 3db bridge to combine the two reference vector signals with adjusted amplitudes to obtain a target composite vector signal.

In an alternative embodiment, the reference signal processing module may further include a SW (switch) 14; the switches 14 include a first set of rf switches for conducting the power divider 11 and the filter 12, and a second set of rf switches for conducting the filter 12 and the attenuator 13.

Specifically, the reference signal may have a reference phase and a reference amplitude, the conducting circuit of the first group of radio frequency switch and filter is configured to determine two reference vector signals for synthesizing the target synthesized vector signal from the n reference vector signals according to the reference phase, and the conducting circuit of the second group of radio frequency switch and attenuator is configured to control the two determined vector signals to be transmitted to the attenuator for processing, so that the attenuator may adjust the amplitudes of the two vector signals according to the reference amplitude, and the combiner combines the two determined vector signals to obtain the final target synthesized vector signal.

In this embodiment, assuming that the formed power division signal is two power division signals, the first group of rf switches for turning on the power divider and the filter may include a first rf switch SW1 and a second rf switch SW2 corresponding to the two power division signals, respectively.

The filter 12 may include an HPF (High pass filter) and an LPF (Low pass filter), and then the first rf switch SW1 may be controlled to connect the power divider and the High pass filter/Low pass filter so as to transmit one path of power dividing signal to the connected High pass filter/Low pass filter, and the second rf switch SW2 may be controlled to connect the power divider and the High pass filter/Low pass filter so as to transmit the other path of power dividing signal to the connected High pass filter/Low pass filter.

The high-pass filter may be configured to adjust a phase of the power division signal to lead a phase of the reference signal, and the low-pass filter may be configured to adjust a phase of the power division signal to lag a phase of the reference signal.

In the embodiment of the present application, the phase difference between the two reference vector signals obtained from the two power division signals processed by the low pass filter is in-phase, the phase difference between the two reference vector signals obtained from the two power division signals processed by the high pass filter is in-phase, the phase difference between any reference vector signal processed by the high pass filter and any reference vector signal processed by the low pass filter is in-phase, and the phase difference between any reference vector signal processed by the high pass filter and any reference vector signal processed by the low pass filter is 180 degrees

Then, one path of power division signal after the phase advance processing of the high-pass filter is a first path of vector signal; one path of power division signal after the phase lag processing of the low-pass filter is a second path of vector signal; the other power division signal subjected to the phase advance processing by the high-pass filter is a third path of vector signal; and the other power division signal after the low-pass filter phase lag processing is a fourth path vector signal. It should be noted that the processed first, second, third and fourth vector signals are reference vector signals that are in phase or in phase opposition to each other. The first path of vector signal is in phase opposition with the third path of vector signal, the second path of vector signal is in phase opposition with the fourth path of vector signal, the first path of vector signal is in phase opposition with the second path of vector signal, and the third path of vector signal is in phase opposition with the fourth path of vector signal.

In practical application, because the two paths of power division signals are processed respectively, the power division signals can be conducted to corresponding filters respectively through the first group of radio frequency switches to be subjected to phase shift processing to obtain vector signals, and then the vector signals also need to be processed respectively when the amplitude of the vector signals is adjusted.

Specifically, the second group of rf switches may control the switches to be turned on, so that the phase-shifted vector signal is transmitted to the attenuator to perform vector signal amplitude adjustment, and the second group of rf switches may include a third rf switch SW3 and a fourth rf switch SW4 for controlling the filters and the attenuator to be turned on.

In the embodiment of the present application, the attenuators used may include DSA (digital Step Attenuator) and VVA (Voltage Variable RF Attenuator).

As an example, assume that a high pass filter for performing phase shift processing on one path of power division signal is HPF1, a low pass filter for performing phase shift processing on one path of power division signal is LPF1, a high pass filter for performing phase shift processing on the other path of power division signal is HPF2, a low pass filter for performing phase shift processing on the other path of power division signal is LPF2, an attenuator for performing amplitude adjustment on one path of power division signal is DSA/VVA1, and an attenuator for performing amplitude adjustment on the other path of power division signal is DSA/VVA2.

In practical application, the reference signal may pass through a power divider to form two paths of power division signals with equal amplitude and same phase, wherein one path of power division signal passes through a radio frequency switch SW1, then passes through an HPF1 to perform phase shift processing to obtain a first vector signal, and the first vector signal passes through a radio frequency switch SW3, and then the signal amplitude is adjusted at an attenuator DSA/VVA1, that is, the phase before entering the combiner is +90 °; one path of signal passes through a radio frequency switch SW1, then passes through an LPF1 to carry out phase shifting processing to obtain a second vector signal, and the second vector signal passes through a radio frequency switch SW3, and then the signal amplitude is adjusted at a DSA/VVA1 position, namely the phase before entering a combiner is minus 90 degrees; the other path of signal passes through a radio frequency switch SW3, then passes through an HPF2 to obtain a third vector signal, and the third vector signal passes through a radio frequency switch SW4, and then the signal amplitude is adjusted at a DSA/VVA2, namely the phase before entering a combiner is +90 degrees; the other path of power division signal passes through a radio frequency switch SW3, then passes through an LPF1 to obtain a fourth vector signal, and the fourth vector signal passes through an SW4, and then the signal amplitude is adjusted at a DSA/VVA2, namely the phase before entering a combiner of the combiner is minus 90 degrees.

In the design, the phase difference between the output of the high-pass filter and the output of the low-pass filter is 180 degrees, which represents a positive half shaft and a negative half shaft of a coordinate axis, and the attenuator can be used for adjusting the amplitude of the corresponding coordinate axis; the combiner can adopt a 3db combiner bridge, which represents orthogonality, that is, the input pins of the combiner bridge are of equal amplitude, the phase difference is 90 °, which indicates that signals of two input pins of the bridge are orthogonal, and the signals are similar to an x axis and a y axis, and are two reference vector signals determined from n reference vector signals for synthesizing a target synthesized vector signal, where n may be a positive integer greater than 4, when n is 4, two reference vector signals for synthesizing the target synthesized vector signal need to be determined, for example, a first vector signal and a fourth vector signal, a first vector signal and a third vector signal, a second vector signal and a third vector signal, and a second vector signal and a fourth vector signal, the amplitude of the vector signals is adjusted based on an adjustment step of an attenuation value of an attenuator, and the adjusted vector signals are synthesized to obtain a synthesized vector signal.

In the process of adjusting the amplitude of the vector signal based on the adjustment step of the attenuation value of the attenuator, for the determination of the attenuator, the adjustment step of the attenuation value of the voltage-controlled attenuator VVA is smaller than that of the numerical-controlled attenuator DSA, for example, 0.025db (while DSA minimum step is 0.25 db), the adjustment precision is higher, and the phase amplitude error of the synthetic vector and the target vector is smaller. If the target vector signal is used for realizing carrier cancellation, the realized carrier cancellation degree is higher.

In the embodiment of the present application, in order to facilitate those skilled in the art to further understand the design aspect of the vector signal synthesis circuit, the following description is made with respect to the selection aspect of the devices included in the circuit:

for the selection of the power splitter11, the characteristics of the ideal power splitter are insertion loss of-3 db and phase difference of 0 degrees, and the main function of the ideal power splitter is to realize the equal power dividing characteristics. The requirements for the power divider in the design are that the amplitude imbalance degree is within +/-0.5 db, and the phase imbalance degree is within 2 degrees. It is preferable to have smaller amplitude imbalance and phase imbalance.

For the selection of the filter 12, the high pass filter HPF has a phase-leading characteristic and the low pass filter LPF has a phase-lagging characteristic. In the ideal case, the phase of the high-pass filter HPF leads by 90 ° (+ 90 °) at the operating frequency point; the low pass filter LPF has a phase lag of 90 ° (-90 °). The corresponding working bandwidth is narrow at this time, and is usually smaller than our working bandwidth (American standard 902-928M, national standard 920-925M). Typically the phase lead value of the HPF at most frequencies is offset from 90 degrees. In our design, it is necessary to optimize the circuit parameters of the HPF and the LPF, and certainly it is necessary to make the phase difference between the HPF and the LPF reach 180 ° (to ensure that Path1 and Path2 have a phase difference of 180 °, and Path3 and Path4 have a phase difference of 180 °); there is no restriction or requirement as to whether the phase lead of the high pass filter HPF and the phase lag of the low pass filter LPF are close to 90 °. If the phase lead of the high pass filter HPF and the phase lag of the low pass filter LPF are not 90 °, the resultant proper coordinate system is rotated compared with the initial reference coordinate system, but they are still orthogonal, so that they do not affect the generation of vector signals, thus the operating bandwidth of the circuit is greatly widened, and the operating bandwidth can be 500M or even 1Ghz, while the operating bandwidth of the conventional circuit system for realizing + -90 ° phase shift based on the radio frequency trace length is only about 10M.

For the selection of the attenuator 13, i.e. for DSA/VVA, the main effect is to adjust the signal amplitude. Compared with the DSA, the VVA has the advantage of higher precision, the DSA in the industry is 7Bit currently, the step is 0.25dB, and the VVA can select a DAC with 12Bit or 14Bit to drive, the precision of the driving voltage output by the DAC is about 1mV, and the attenuation precision of the corresponding VVA is about 0.025 dB. The disadvantage of VVAs is the complex circuit structure, which requires a high-bit DAC to achieve high-precision control voltages. In addition, the attenuator needs to have a stable phase, i.e., a small amount of phase change at different attenuation values. When the attenuator is selected, the attenuator with the minimum phase change in the full attenuation range needs to be selected by combining the cost.

For the selection of the combiner21, the combiner can select a 3db bridge (Hybrid Coupler), and the ideal bridge has the characteristics of insertion loss of-3 db and 90 ° phase difference. The method has the main function of realizing equal power sharing, and the phase difference of two paths at the unbalanced end is 90 degrees for generating orthogonal IQ signals. The requirements for the power divider in the design are that the amplitude imbalance degree is within +/-0.5 db, and the phase imbalance degree is within 2 degrees. It is preferable to make the amplitude imbalance and the phase imbalance smaller.

For the selection of the Switch 14, the RF Switch, i.e., the RF Switch, can be selected from the switches SW1 to SW4, which has the main advantages of miniaturization and high isolation, usually about 40 db. The design selects the switch with the isolation degree larger than 35db, and the isolation degree of the two-stage switch is 70db at the moment. Taking Path1 as an example, at this time, path2 has a smaller influence on Path1, the phase amplitude error between the synthesized vector signal and the target vector signal is smaller, and if the target vector signal is used to implement carrier cancellation, the carrier cancellation degree is higher. If the isolation of the two-stage switch is less than 40db, the phase amplitude error between the resultant vector signal and the target vector signal is large. If the carrier cancellation is implemented by using the target vector signal, the cancellation effect is seriously affected.

In this embodiment, the vector signal synthesizing circuit may include a reference signal obtaining module, a reference signal processing module, and a target vector signal synthesizing circuit, where the reference signal obtaining module may obtain an interference signal transmitted on the signal transmission link, and use the interference signal as a reference signal of the circuit, then process the reference signal through the reference processing module to obtain an in-phase or anti-phase reference vector signal, adjust an amplitude of the in-phase or anti-phase reference vector signal, and finally perform orthogonal synthesis on the adjusted reference vector signal through the target vector signal synthesizing module to obtain a target synthesized vector signal having the same amplitude as the carrier leakage signal and having the opposite phase, so as to cancel the carrier leakage signal by using the obtained target synthesized vector signal. The in-phase or anti-phase reference vector signal is obtained by processing the reference signal, so that the circuit structure does not need to require that the phase of the signal obtained after processing is 90 degrees and-90 degrees, a wider frequency band can be provided for the synthesis of any vector signal by processing the output phase difference of 180 degrees by adopting the combination of a high-pass filter and/or a low-pass filter, the design freedom of the circuit structure is improved, and the finally synthesized target synthesized vector signal has an adjustable range of 360 degrees.

On the basis of the above vector signal synthesis circuit structure embodiment, an embodiment of the present application further provides a reader/writer, as shown in fig. 4, which shows a schematic diagram of a frame structure of a radio frequency circuit device in the embodiment of the present application, and the reader/writer may include the above vector signal synthesis circuit.

In practical application, when the RFID reader receives a radio frequency signal returned by the tag through the RX channel, the RFID reader continuously transmits a carrier signal at the same time, and the transmitted carrier signal may leak from the TX channel to the RX link, causing interference to the radio frequency signal to be received by the reader on the RX link, and then the vector signal synthesis circuit needs to be used to synthesize a target synthesis vector signal for canceling the carrier leakage signal, so as to reduce the signal amplitude of the carrier leakage signal and reduce the phase noise thereof.

As shown in fig. 4, the radio frequency circuit device similar to the reader/writer may include not only the reference signal obtaining module 100, the reference signal processing module 200, and the target vector signal synthesizing module 300, which are included in the vector signal synthesizing circuit, but also the target vector signal output module 400, and when the vector signal synthesizing circuit is applied to the radio frequency circuit device, or operates in a circuit device of another frequency spectrum, the circuit device may further include a radio frequency signal receiving module 500, and a signal canceling module 600.

The target vector signal output module 400 is configured to receive a target synthesized vector signal transmitted by the target vector synthesis module, and the target vector signal output module 400 and the target vector synthesis module 300 may be connected by a combiner, so that the target synthesized vector signal and the carrier leakage signal may be cancelled by the target vector signal output module.

Specifically, the radio frequency signal receiving module 500 is configured to receive a radio frequency signal returned by a tag, where the returned radio frequency signal includes an interference signal transmitted on a signal transmission link, and after the target vector signal output module 400 receives a target synthesized vector signal synthesized by the vector signal synthesizing circuit, the signal cancellation module 600 may perform cancellation processing on an output target synthesized vector signal block and a carrier leakage signal leaked to an RX channel.

Referring to fig. 5, a flowchart of steps of an embodiment of a vector signal synthesis method according to the present application is shown, and is applied to a vector signal synthesis circuit, where the circuit includes a reference signal obtaining module, a reference signal processing module, and a target vector signal synthesis module, and specifically includes the following steps:

step 501, obtaining an interference signal transmitted on a signal transmission link, and using the interference signal as a reference signal;

in practical application, when the RFID reader receives a radio frequency signal returned by the tag through the RX channel, the RFID reader continuously transmits an interference signal. The transmitted interference signal may energize the tag, causing the tag to be in an active state; the tag can also modulate useful information carried by the tag onto a carrier wave through the on-off of the switch so as to return a modulation signal to the reader-writer. A carrier signal sent by the reader may enter a receiving channel by leakage, the amplitude of the carrier leakage signal is large, and if amplitude suppression is not performed, saturation of a Low Noise Amplifier (LNA), a Mixer (Mixer), and an Analog-to-digital converter (ADC) of a radio frequency receiving front-end device is usually caused, so that spectrum regeneration occurs, a receiving signal-to-Noise ratio is seriously deteriorated, a demodulation error rate of the RFID reader is increased, a receiving sensitivity is reduced, and a reading and writing distance of the RFID reader is finally reduced.

Since the bandwidth of the modulation signal is narrow, only in the order of hundreds of khz, it is technically difficult to suppress the carrier signal on the receive channel by an analog filter, and the carrier signal (i.e., the carrier leakage signal or the interference signal) leaked from the TX channel to the RX channel can be suppressed by cancellation. The working principle of cancellation is that when two radio frequency signals with the same frequency are in equal amplitude and opposite phase (namely, equal amplitude and opposite phase), the resultant signals are subjected to vector subtraction, and theoretically, the amplitude of the resultant signal is 0. A target composite vector signal may be synthesized that is in equal amplitude and opposite phase to the leaked (TX leaked to RX) interferer signal, thereby suppressing the leaked carrier signal by cancellation.

In the embodiment of the present application, the carrier leakage signal leaking from the TX channel to the RX link may have different phases and amplitudes of the carrier leakage signal leaking to the RX link due to different distances between the transceiving antennas (for the transceiving antenna separation case) and different port standing waves of the TX antenna (this is mainly for the transceiving common antenna case), that is, the phases and amplitudes of the carrier leakage signal are unknown, and at this time, in order to synthesize the target vector signal for suppressing the carrier leakage signal, a reference signal serving as the carrier leakage signal may be first acquired.

The phase and amplitude of an interference signal transmitted by the RFID reader-writer while receiving a radio frequency signal returned by a tag through an RX channel are unknown, and then the obtained reference signal refers to a TX carrier signal obtained by coupling from a TX link (after being output by a power amplifier) of the reader-writer through a coupler, so that the reference signal coupled back by the TX link passes through a vector signal synthesis circuit, the synthesized vector signal is in equal amplitude and opposite phase with a carrier leakage signal as much as possible, and the carrier leakage signal is cancelled to the minimum.

Step 502, processing the reference signal to obtain a reference vector signal with a phase difference of 180 degrees, and adjusting the amplitude of the reference vector signal with the phase difference of 180 degrees;

in the embodiment of the present application, the process of processing the reference signal may be divided into a process of shifting the phase of the reference signal and a process of adjusting the amplitude of the reference signal, so that the processed signal may be a signal that can be used to synthesize the target synthesis vector signal.

Specifically, the reference signal may have a reference phase and a reference amplitude, and the reference signal processing module may include a power divider, a filter, and an attenuator.

In the phase shifting process of the reference signal, firstly, the reference signal is subjected to power division through a power divider to obtain two paths of power division signals with equal amplitude and same phase, and the power division signals are transmitted to a filter, wherein compared with the reference signal, the phases of the two paths of power division signals are the same as the reference phase, but the amplitude of the two paths of power division signals is half less than the reference amplitude; then, the power division signals can be subjected to phase shifting through a filter, n paths of mutually in-phase or anti-phase reference vector signals after phase shifting are obtained, and two paths of reference vector signals for synthesizing a target synthesis vector signal are determined from the n paths of reference vector signals according to the reference phase of the reference signals.

In the process of adjusting the amplitude of the reference signal, the amplitude of the n paths of reference vector signals can be adjusted through the attenuator, and specifically, the amplitudes of the two paths of determined vector signals can be adjusted according to the reference amplitude of the reference signal.

In one embodiment of the present application, when transmitting the power division signal to the filter, step 502 may include the following sub-steps:

and a substep S11 of controlling the first group of RF switches to be conducted with the high-pass filter/low-pass filter and transmitting the power division signal to the conducted high-pass filter/low-pass filter.

In practical application, the first radio frequency switch and the high-pass filter/low-pass filter can be controlled to be conducted, and one path of power division signal is transmitted to the conducted high-pass filter or low-pass filter; and controlling the second radio frequency switch to be conducted with the high-pass filter/low-pass filter, and transmitting the other path of power division signal to the conducted high-pass filter or low-pass filter.

Specifically, as shown in the circuit schematic diagram of fig. 3, the first rf switch (SW 1) may form a first signal Path (Path 1) when being conducted with the high pass filter (HPF 1), and when being conducted with SW3 and DSA/VVA1, the first rf switch (SW 1) may form a second signal Path (Path 2) when being conducted with the low pass filter (LPF 1), and when being conducted with SW3 and DSA/VVA 1; the second radio frequency switch (SW 2) can form a third signal channel (Path 3) when being conducted with the high-pass filter (HPF 2), the SW4 and the DSA/VVA 2; the second RF switch (SW 2) forms a fourth signal Path (Path 4) when it is connected to the low pass filter (LPH 2), SW4 and DSA/VVA2.

The signal corresponding to the first signal channel may be a first vector signal, the signal corresponding to the second signal channel may be a second vector signal, the signal corresponding to the third signal channel may be a third vector signal, and the signal corresponding to the fourth signal channel may be a fourth vector signal.

Then, regarding the aspect of selecting the signal channel conduction of the radio frequency switch, the signals transmitted on the signal channels may be configured as quadrant signals, and in a specific implementation, referring to fig. 6, a schematic diagram of the quadrant signals in the embodiment of the present application is shown.

When the SW1 and SW3 are switched to the Path1 circuit to be conducted, and when the SW2 and SW4 are switched to the Path4 circuit to be conducted, the combiner outputs and synthesizes the vector signals of the first quadrant, namely the first Path of vector signals and the fourth Path of vector signals can form first quadrant signals positioned in the first quadrant; when the SW1 and the SW3 are switched to the Path1 circuit to be conducted, and when the SW2 and the SW4 are switched to the Path3 circuit to be conducted, the combiner outputs and synthesizes the vector signals of the second quadrant, namely the first Path of vector signals and the third Path of vector signals can form second quadrant signals positioned in the second quadrant; when the SW1 and SW3 are switched to the Path2 circuit for conduction, and when the SW2 and SW4 are switched to the Path3 circuit for conduction, the combiner outputs and synthesizes a vector signal of a third quadrant, that is, the third vector signal and the second vector signal can form a third quadrant signal located in the third quadrant; when the SW1 and SW3 are switched to the Path2 circuit to be conducted, and when the SW2 and SW4 are switched to the Path4 circuit to be conducted, the combiner outputs and synthesizes the vector signals of the fourth quadrant, namely the second Path of vector signals and the fourth Path of vector signals can form fourth quadrant signals positioned in the fourth quadrant.

Vector signals processed by the combination of the high-pass filter and/or the low-pass filter are in phase or in opposite phase, namely the output phase difference is 180 degrees, which represents a positive half shaft and a negative half shaft of a coordinate axis, the formed quadrant signals are mainly distinguished and can be represented as the phase difference, the phase difference of the same signal after passing through Path 1-Path 4 is 90 degrees, 180 degrees, 270 degrees and 0 degrees in sequence, and the orthogonality of a 3db bridge similar to an x axis and a y axis is met. In the case of satisfying the orthogonality, the positive horizontal half axis of Path4 as the vector coordinate axis can be taken to form a reference coordinate system that is convenient for description in theory, and it should be noted that the quadrant in which the signal is located is a relative position.

Then, when considering to control the first rf switch and the second rf switch to be turned on, first, a reference quadrant in which a reference quadrant signal (e.g., carrier signal shown in fig. 6) corresponding to the reference signal is located in a quadrant, and a target quadrant forming a diagonal relationship with the reference quadrant may be determined, so as to control the rf switch according to the determined target quadrant.

As an example, as shown in fig. 6, assuming that the reference quadrant signal Carrier signal is located in the fourth quadrant in the quadrant, the target quadrant signal in the quadrant of the synthesized target vector signal can be adjusted to have an angle of 180 ° with respect to the reference quadrant signal (i.e., inverted), at this time, a second quadrant forming a diagonal relationship with the fourth quadrant can be determined as the target quadrant, the quadrant signal of the second quadrant is composed of the first Path vector signal and the third Path vector signal, and then it can be determined to control the first rf switch SW1, the third rf switch SW3 and the Path1 to be turned on, and it can be determined to control the second rf switch SW2, the fourth rf switch SW4 and the Path3 to be turned on.

In a specific implementation, the rf switch may be turned on by controlling the enable signal, and as an example, if the enable signal of the first rf switch SW1 is 0 (i.e., low level), path1 is turned on, and if the enable signal of SW1 is 1 (i.e., high level), path2 is turned on. The control of other rf switches can also be implemented as described above.

It should be noted that the integrated rf switch should use an rf switch with higher isolation, usually around 40db, so as to reduce the interference of the bypass signal, and make the phase amplitude error between the reference vector and the target vector smaller.

In an embodiment of the present application, when the power division signal is phase-shifted by the filter, step 502 may include the following sub-steps:

and a substep S12, controlling the high-pass filter to perform phase lead processing on the power division signal, and/or controlling the low-pass filter to perform phase lag processing on the power division signal.

In practical application, the high-pass filter and the low-pass filter network can form a 180-degree phase difference, that is, a 180-degree phase difference can be ensured between Path1 and Path2, and a 180-degree phase difference is ensured between Path3 and Path4, so that the circuit structure does not need to forcibly require that the phase of the processed signal is 90 degrees and-90 degrees, only 180-degree phase difference is required, synthesis of any vector signal can be realized in a wider frequency band, the working bandwidth of the circuit structure reaches 500M, even 1Ghz, and the design freedom of the circuit structure is improved.

In order to ensure a phase difference of 180 degrees, in a specific implementation, a phase difference of 90 degrees can be obtained through a combiner, so that orthogonality is ensured; the 180 phase difference is actually the positive and negative half-axes of the guaranteed reference coordinate system. Taking Path3 and Path4 as examples, assuming that Path4 represents the positive half-axis in the horizontal direction, then the Path3 channel 180 ° out of phase with it represents the negative half-axis in the horizontal direction.

The phase of the high-pass filter can be controlled to perform advanced processing on one path of power division signal to obtain a first path of vector signal; controlling a low-pass filter to perform phase lag processing on one path of power division signal to obtain a second path of vector signal; controlling a high-pass filter to perform phase advance processing on the other power division signal to obtain a third path of vector signal; and controlling the low-pass filter to perform phase lag processing on the other power division signal to obtain a fourth path of vector signal. The obtained first path of vector signal, the second path of vector signal, the third path of vector signal and the fourth path of vector signal are in phase or in phase opposition with each other.

In the embodiment of the present application, the first and second paths of vector signals have a phase difference range of 180 °, and the third and fourth paths of vector signals have a phase difference range of 180 °. Under the condition of realizing phase shift by utilizing the phase lead of the high-pass filter and the phase lag of the low-pass filter, the high-pass filter network and the low-pass filter network can realize 180-degree phase difference in a broadband range, and the bandwidth of the high-pass filter network and the low-pass filter network can reach 500M or even 1000M; however, the phase and frequency of a common phase shifter are strongly correlated, the working bandwidth of the common phase shifter is narrow, which is approximately within 100M, and the working bandwidth of a phase shifting unit based on a transmission line is narrower, which is only about 10M; the adopted high-pass filter can be an LC-based high-pass filter, and the adopted low-pass filter can be an LC-based low-pass filter, so that the cost of the LC-based high-pass and low-pass filters is low and is far lower than that of a purchased phase shifter chip.

In a preferred embodiment, the first, second, third and fourth vector signals may form a quadrant signal, and when considering to control the conduction of the first and second radio frequency switches, the determination may be performed according to a reference quadrant in which a phase of a reference quadrant signal corresponding to the reference signal is located in the quadrant, and then considering to control the conduction of the third and fourth radio frequency switches may be the same as the foregoing substep S11, that is, the reference quadrant may be obtained, a target quadrant in a diagonal relationship with the reference quadrant may be determined, and then the mutually orthogonal vector signals may be obtained according to the target quadrant, where the obtained mutually orthogonal vector signals may be vector signals transmitted by signal channels conducted by the third and fourth radio frequency switches.

In the process of forming the quadrant signal, as shown in fig. 6, the first way vector signal and the fourth way vector signal may form a first quadrant signal located in the first quadrant; forming a second quadrant signal positioned in a second quadrant by the first path of vector signal and the third path of vector signal; forming a third quadrant signal positioned in a third quadrant by the third path of vector signals and the second path of vector signals; and forming a fourth quadrant signal positioned in a fourth quadrant by the second path of vector signals and the fourth path of vector signals.

Then, in terms of determining two reference vector signals for synthesizing the target synthesized vector signal from the n reference vector signals, the two reference vector signals may be determined according to the target quadrant. In the process, if the target quadrant is a first quadrant, the first path of vector signal and the fourth path of vector signal are used as reference vector signals for synthesizing a target synthesized vector signal; if the target quadrant is a second quadrant, taking the first path of vector signal and the third path of vector signal as reference vector signals for synthesizing a target synthesized vector signal; if the target quadrant is a third quadrant, taking the third path of vector signals and the second path of vector signals as reference vector signals for synthesizing the target vector signals; and if the target quadrant is a fourth quadrant, taking the second path of vector signals and the fourth path of vector signals as reference vector signals for synthesizing the target synthesized vector signals.

In a preferred embodiment, when considering that the first rf switch and the second rf switch are turned on, the determination may be made according to a reference quadrant in which the phase of the reference quadrant signal corresponding to the reference signal is located, and then considering that the third rf switch and the fourth rf switch are controlled to be turned on, which may be the same as the sub-step S11 described above, and the obtained vector signal may be a vector signal transmitted by a signal channel turned on by the third rf switch and the fourth rf switch.

Step 503, synthesizing the adjusted reference vector signals to obtain target synthesized vector signals for cancellation; wherein the target vector signal and the interference signal have equal amplitude and opposite phase.

In an embodiment of the present application, after two reference vector signals for synthesizing a target synthesized vector signal are determined from n reference vector signals according to a reference phase of a reference signal, amplitudes of the two reference vector signals may be adjusted according to a reference amplitude by an attenuator so as to synthesize the adjusted two reference vector signals.

In the design of the applied vector signal synthesis circuit, the phase difference between the outputs of the high-pass filter and the low-pass filter is 180 degrees, which represents the positive half shaft and the negative half shaft of a coordinate axis, and the attenuator can be used for adjusting the amplitude of the corresponding coordinate axis; the combiner can employ a 3db combiner bridge that represents orthogonality, i.e., the signals at its input pins are of equal amplitude and 90 ° out of phase, indicating that the signals at the two input pins of the bridge are orthogonal, similar to the x-axis and the y-axis.

In practical applications, the above-mentioned adjusting the amplitude of the selected nth reference vector signal by using the attenuator is realized based on the constructed quadrant signal (as shown in fig. 6), and at this time, after the target quadrant is determined, the reference vector signals corresponding to the target quadrant may be theoretically synthesized to obtain an initial synthesized vector signal, that is, the combiner does not perform this operation in practical implementation, but performs synthesis and output of the target synthesized vector signal.

Firstly, synthesizing vector signals according to preset attenuation values of signal channels to obtain initial synthesized vector signals.

In a specific implementation, each path of quadrant signals formed by mutually in-phase or anti-phase reference vector signals can be used, and a signal channel corresponding to the quadrant signals is determined; the signal channel may be connected to an attenuator having a preset attenuation value, and then the vector signals orthogonal to each other may be theoretically synthesized according to the preset attenuation value to obtain an initial synthesized vector signal.

As an example, when the SW1 and SW2 are switched to the Path1 circuit and the SW3 and SW4 are switched to the Path3 circuit, the combiner outputs and combines an arbitrary vector signal in the second quadrant, and the combined vector signal is an initial combined vector signal (such as signal _ a shown in fig. 6), instead of a target combined vector signal, and the initial combined vector signal needs to be adjusted to obtain a vector signal with the same amplitude and opposite phase as the carrier leakage signal (or another reference signal as a reference).

In this example, the synthesized initial synthesized vector signal is synthesized by the first vector signal transmitted by Path1 and the third vector signal transmitted by Path3, and during the synthesis, the attenuator DSA/VVA1 corresponding to Path1 and the attenuator DSA/VVA2 corresponding to Path3 both have initial default settings, that is, both have default attenuation values set in advance, and at this time, the initial synthesized vector signal may be obtained by combining the default attenuation values, for example, the signal amplitude corresponding to Path1 is y1, and at this time, the attenuation value ya1 of DSA/VVA 1; the signal amplitude corresponding to Path3 is x1, and the attenuation value xa1 of DSA/VVA1 is now.

Secondly, when the initial synthesis vector signal is adjusted to obtain the target synthesis vector signal, the amplitude of the synthesis vector signal can be adjusted step by step through the attenuator based on the adjustment of the attenuation value, and the target synthesis vector signal is obtained.

In the embodiment of the present application, in the same quadrant, different vector signals are mainly determined by the attenuator after switching, so after obtaining the initial synthesized vector signal, in order to obtain a vector signal with the same amplitude and opposite phase as the carrier leakage signal, the initial synthesized vector signal may be adjusted by the attenuator at this time, and the target synthesized vector signal may be obtained in the same quadrant as the initial vector signal.

In the process of adjusting the initial synthesized vector signal through the attenuator, a synthesized quadrant signal corresponding to the synthesized vector signal in the quadrant and a reference quadrant signal corresponding to the reference signal can be acquired, the synthesized quadrant signal is adjusted through the attenuator based on the adjustment step of the attenuation value to obtain a target quadrant signal of which the included angle with the reference quadrant signal is a preset angle threshold, and the target quadrant signal is used as the target synthesized vector signal.

The included angle refers to a vector included angle between the carrier leakage signal and the synthesized vector signal, and the preset angle threshold may be 180 ° in order to achieve phase reversal between the target synthesized vector signal and the carrier leakage signal.

In the specific implementation, the attenuation values of the attenuators DSA/VVA1 and DSA/VVA2 affect the included angle of the vector signal, and the corresponding amplitude is adjusted along with the adjustment of the attenuation values, so that the target synthetic vector signal with the same amplitude and opposite phase as the carrier leakage signal can be obtained by adjusting the attenuation values of the attenuators.

As an example, if the target synthetic vector signal _ B needs to be synthesized in equal amplitude and opposite phase to the carrier leakage signal, the attenuation value of the attenuator can be adjusted, that is, the attenuation value of the Path1 corresponding attenuator DSA/VVA1 is decreased, and the strength of the Path1 signal becomes large; when the attenuation value of the attenuator DSA/VVA2 corresponding to Path3 is increased, the strength of the Path1 signal is reduced, and then the signal vectors of Path1 and Path3 are superposed to form signal _ B.

In this example, the adjusted Path1 corresponds to a signal amplitude of y2, at which time the attenuation value of DSA/VVA1 may be adjusted to ya2; the signal amplitude corresponding to Path3 is x2, and the attenuation value of DSA/VVA2 can be adjusted to xa2.

In a preferred embodiment, it is required to ensure that the phase of the DSA/VVA should not change with changes in the attenuation values, and a compensation algorithm strategy based on the phase change of the attenuator at different attenuation values can also be proposed. Specifically, if the phase difference of the attenuator under different attenuation values is large, algorithm compensation correction needs to be performed, the main logic is to fit a phase change curve of the attenuator under different attenuation values, then the phase is corrected by adjusting the attenuation values, and finally a target vector is synthesized.

In practical application, when the attenuator is selected by hardware, an attenuator with a smaller phase wave pair under different attenuation values can be selected, wherein a voltage-controlled attenuator VVA can be specifically adopted, and the attenuation step can reach 0.025dB, so that the phase amplitude error of an initial synthetic vector and a target synthetic vector is smaller, and the carrier cancellation degree is higher when the synthetic vector signal is adopted to realize carrier cancellation; when the phase difference of the selected attenuator is increased by a larger amplitude as the attenuation value is increased, the attenuation value VS phase relationship (which is generally linear) can be obtained by testing and then fitted to a compensation table or function (hypothesis). In the carrier cancellation iterative algorithm, the phase and the amplitude of the reference vector signal are changed by adjusting the attenuation value of the attenuator. When setting the attenuator attenuation value, the actual influence of the phase relation of the attenuation value VS on the reference vector signal is considered, and a corrected attenuation value is calculated and then arranged in the attenuator. And judging whether the carrier cancellation algorithm converges or not by observing the size of the carrier cancellation residual signal.

In a preferred embodiment of the present application, for a narrow-band communication system such as RFID, the carrier signal (i.e., local oscillator LO) and the frequency point carrying information are very close, usually 80khz to 500khz. In the receiving time slot of the reader-writer, the reader-writer sends carrier signals of about 30dbm, and the signals are single tone signals, so the power spectrum density of the carrier signals is large. While phase noise of the carrier signal within 500khz may have an effect on the reception sensitivity of the RFID reader. The better the phase noise of the carrier signal within 500khz, the better the receiving sensitivity of the reader/writer will be. But the phase noise optimization at the near end of the carrier signal (within 500 khz) is difficult to achieve and the hardware cost is high. Since the carrier cancellation system is a relatively broadband system, while the carrier cancellation system cancels the carrier, the phase noise at the near end of the carrier cancellation system also cancels correspondingly, i.e. the cancellation capability of the carrier is equivalent to that of the phase noise within 500khz. Namely, the cancellation of near-end phase noise is realized while carrier cancellation is carried out, so that the receiving sensitivity of the reader-writer can be further improved.

In the embodiment of the application, the in-phase or anti-phase reference vector signal is obtained by processing the reference signal, so that the circuit structure does not need to enforce the phase of the signal obtained after processing to be 90 degrees and-90 degrees, and the finally synthesized target synthesized vector signal has an adjustable range of 360 degrees, and a wider frequency band can be provided for synthesis of any vector signal by processing the phase difference of 180 degrees output by adopting a high-pass filter and/or a low-pass filter, so that the design freedom of the circuit structure is improved.

It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the embodiments are not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the embodiments. Further, those of skill in the art will recognize that the embodiments described in this specification are presently preferred embodiments and that no particular act is required to implement the embodiments of the disclosure.

The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

As will be appreciated by one of skill in the art, embodiments of the present application may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While preferred embodiments of the present application have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the true scope of the embodiments of the application.

Finally, it should also be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or terminal apparatus that comprises the element.

The vector signal synthesis circuit and the vector signal synthesis method provided by the present application are introduced in detail above, and specific examples are applied herein to illustrate the principles and embodiments of the present application, and the descriptions of the above embodiments are only used to help understand the method and the core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims

1. A vector signal synthesizing circuit, characterized in that the circuit comprises: the device comprises a reference signal acquisition module, a reference signal processing module and a target vector signal synthesis module;

the target vector signal synthesis module is used for synthesizing the adjusted reference vector signals to obtain target synthesis vector signals for cancellation; wherein the target composite vector signal and the interference signal are in equal amplitude and opposite phase.

2. The vector signal synthesizing circuit according to claim 1, wherein the reference signal processing block comprises a power divider, a filter and an attenuator;

the filter is used for shifting the phase of the power division signal to obtain a reference vector signal with a phase difference of 180 degrees; the reference vector signals with the phase difference of 180 degrees comprise n paths of reference vector signals which are in phase or opposite in phase with each other;

3. The vector signal synthesizing circuit according to claim 2 wherein the reference signal has a reference phase and a reference amplitude, the reference signal processing module further comprising a switch; the switches comprise a first group of radio frequency switches for conducting the power divider and the filter, and a second group of radio frequency switches for conducting the filter and the attenuator;

4. The vector signal synthesizing circuit according to claim 3, wherein the target vector signal synthesizing module includes a combiner;

5. The vector signal synthesizing circuit according to claim 3, wherein the power dividing signal comprises two power dividing signals; the first group of radio frequency switches comprise a first radio frequency switch and a second radio frequency switch which respectively correspond to the two paths of power division signals; the filter comprises a high-pass filter and a low-pass filter;

6. The vector signal synthesizing circuit according to claim 5, wherein the high pass filter is configured to adjust a phase of the power division signal to lead a reference phase of the reference signal; the low-pass filter is used for adjusting the phase of the power division signal to lag behind the reference phase of the reference signal;

the phase difference between the two reference vector signals obtained by the two power division signals processed by the low-pass filter is in-phase, the phase difference between the two reference vector signals obtained by the two power division signals processed by the high-pass filter is in-phase, and the phase difference between any reference vector signal processed by the high-pass filter and any reference vector signal processed by the low-pass filter is 180 degrees.

7. The vector signal synthesizing circuit according to claim 2 or 3, wherein the attenuator has an adjustment step of an attenuation value, and the attenuator is configured to adjust the amplitude of the nth reference vector signal according to the adjustment step of the attenuation value.

8. The vector signal synthesis circuit of claim 7, wherein the attenuator comprises a voltage controlled attenuator VVA and a digital controlled attenuator DSA; the adjustment step of the attenuation value of the voltage-controlled attenuator VVA is smaller than that of the numerical control attenuator DSA.

9. The vector signal synthesis circuit according to claim 5, wherein the high pass filter is 180 ° out of phase with the low pass filter network; the high pass filter comprises an LC-based high pass filter; the low pass filter comprises an LC based low pass filter.

10. The vector signal synthesis circuit according to claim 1, wherein the vector signal synthesis circuit is used in a radio frequency circuit device or a circuit device operating in a frequency spectrum.