CN115458891A - Planar microstrip sum-difference network - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
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- H01P5/12—Coupling devices having more than two ports
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
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Abstract
The invention relates to the technical field of communication electronics, and discloses a planar microstrip sum-difference network, which comprises a first 90-degree electric bridge, a second 90-degree electric bridge, a fourth 90-degree electric bridge, a third 90-degree electric bridge and four-90-degree phase shifters, wherein the first 90-degree electric bridge, the second 90-degree electric bridge, the fourth 90-degree electric bridge and the third 90-degree electric bridge are sequentially connected in the anticlockwise direction to form an annular network; the input ends of the first 90-degree electric bridge and the fourth 90-degree electric bridge are respectively connected with a-90-degree phase shifter; the other two-90 phase shifters cannot be connected to both inputs of the second 90 bridge and cannot be connected to both inputs of the third 90 bridge. The invention solves the problems of complex structure, difficult planarization, difficult integration and the like in the prior art.
Description
Technical Field
The invention relates to the technical field of communication electronics, in particular to a planar microstrip sum-difference network.
Background
The sum-difference network is a microwave component used for the precise tracking radar direction test based on the monopulse technology and the broadband electronic countermeasure system pitch/azimuth test based on the phased array system. The method is used as a key component in a single-pulse radar direction finding system, and the performance of a sum and difference network can directly influence important indexes such as the tracking precision, the tracking distance and the like of a radar.
The traditional sum-difference network is composed of four sum-difference devices (also called 180-degree electric bridges), in order to meet the phase relationship, the sum-difference network is necessarily crossed by radio frequency transmission lines, therefore, signal transmission needs to be carried out on a three-dimensional structure, for example, an air bridge is adopted, or a layered structure is adopted to transfer signals, and the design difficulty of the sum-difference network is increased.
The structure of the traditional sum-difference network determines that the traditional sum-difference network is not beneficial to integration, especially a GaAs-based chip adopting IPD process is subject to the processing process of a circuit and the planarization of the circuit, and the traditional sum-difference network cannot be realized.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a planar microstrip sum-difference network, which solves the problems of complex structure, difficult planarization, difficult integration and the like in the prior art.
The technical scheme adopted by the invention for solving the problems is as follows:
a planar microstrip sum-difference network comprises a first 90-degree electric bridge, a second 90-degree electric bridge, a fourth 90-degree electric bridge and a third 90-degree electric bridge which are sequentially connected in the anticlockwise direction to form an annular network, and further comprises four-90-degree phase shifters; the input ends of the first 90-degree electric bridge and the fourth 90-degree electric bridge are respectively connected with a-90-degree phase shifter; the other two-90 phase shifters cannot be connected to both input terminals of the second 90 ° bridge and cannot be connected to both input terminals of the third 90 ° bridge at the same time.
As a preferred technical solution, the first 90 ° bridge and the fourth 90 ° bridge are used for receiving signals outside the sum and difference network, and the second 90 ° bridge and the third 90 ° bridge are used for outputting signals outside the sum and difference network.
As a preferred solution, the phase of the signal from the output port to all input ports receiving signals outside the sum and difference network is equal.
As a preferred technical solution, the two input ports of the second 90 ° bridge from the pitch difference port to the first 90 ° bridge are equal in phase, and the two input ports of the second 90 ° bridge from the pitch difference port to the fourth 90 ° bridge are equal in phase.
As a preferred technical solution, the phase from the pitch difference port of the second 90 ° bridge to the two input ports of the first 90 ° bridge differs by 180 ° from the phase from the pitch difference port of the second 90 ° bridge to the two input ports of the fourth 90 ° bridge.
As a preferable technical solution, an input port of the-90 ° phase shifter connected to the azimuth difference port of the first 90 ° bridge and an input port of the-90 ° phase shifter connected to the azimuth difference port of the fourth 90 ° bridge are in phase with each other.
As a preferred solution, the input port of the azimuth difference port that directly receives signals outside the sum and difference network to the first 90 ° bridge is in phase with the input port of the azimuth difference port that directly receives signals outside the sum and difference network to the fourth 90 ° bridge.
As a preferred solution, the connection of the azimuth difference port to the first 90 ° bridge-the input port of the 90 ° phase shifter is 180 ° out of phase with the input port of the azimuth difference port to the first 90 ° bridge which directly receives the signal outside the sum and difference network.
As a preferred solution, the connection of the azimuth difference port to the fourth 90 ° bridge-the input port of the 90 ° phase shifter is 180 ° out of phase with the input port of the azimuth difference port to the fourth 90 ° bridge that directly receives the signal outside the sum and difference network.
As a preferred technical solution, the phase shifter further comprises a first signal receiving end, a second signal receiving end, a third signal receiving end, a fourth signal receiving end, a sum signal output end, a first difference signal output end, a second difference signal output end, and a third difference signal output end, wherein each of the first 90 ° bridge, the second 90 ° bridge, the fourth 90 ° bridge, and the third 90 ° bridge comprises a first input end, a second input end, a first output end, and a second output end, each of the four-90 ° phase shifters comprises an input end and an output end, and the four-90 ° phase shifters are respectively denoted as a first-90 ° phase shifter, a second-90 ° phase shifter, a third-90 ° phase shifter, and a fourth-90 ° phase shifter; the second output end of the first 90-degree bridge is connected with the second input end of the second 90-degree bridge, the first input end of the second 90-degree bridge is connected with the output end of the second-90-degree phase shifter, the input end of the second-90-degree phase shifter is connected with the first output end of the fourth 90-degree bridge, the second output end of the fourth 90-degree bridge is connected with the second input end of the third 90-degree bridge, the first input end of the third 90-degree bridge is connected with the output end of the third-90-degree phase shifter, and the input end of the third-90-degree phase shifter is connected with the first output end of the first 90-degree bridge; the output end of the first-90-degree phase shifter is connected with the second input end of the first 90-degree bridge, the input end of the first-90-degree phase shifter is connected with the second signal receiving end, and the first input end of the first 90-degree bridge is connected with the first signal receiving end; the second output end of the second 90-degree bridge is connected with the first difference signal output end, and the first output end of the second 90-degree bridge is connected with the signal output end); the first input end of the fourth 90-degree electric bridge is connected with the output end of the fourth-90-degree phase shifter, the input end of the fourth-90-degree phase shifter is connected with the third signal receiving end, and the second input end of the fourth 90-degree electric bridge is connected with the fourth signal receiving end; and the first output end of the third 90-degree bridge is connected with the second difference signal output end, and the second output end of the third 90-degree bridge is connected with the third difference signal output end.
Compared with the prior art, the invention has the following beneficial effects:
(1) The invention avoids the crossing of internal signal transmission lines and realizes the planarization of the sum-difference network by the sum-difference network formed by the combination of the 90-degree electric bridge and the four-90-degree phase shifters, thereby realizing the processing of a single-layer circuit board and being beneficial to the integrated design of components.
(2) The invention realizes the planarization of the sum-difference network and further can realize the chip design of GaAs base.
Drawings
FIG. 1 is a schematic diagram of a planar microstrip sum and difference network of the prior art;
FIG. 2 is a schematic diagram of a planar microstrip sum and difference network according to the present invention;
FIG. 3 is a schematic diagram of a planar microstrip sum-difference network according to a second embodiment of the present invention;
FIG. 4 is a third schematic diagram of a planar microstrip sum and difference network according to the present invention;
FIG. 5 is a fourth schematic diagram of the planar microstrip sum-difference network according to the present invention;
FIG. 6 is a fifth schematic diagram of a planar microstrip sum and difference network according to the present invention;
FIG. 7 is a sixth schematic diagram of a planar microstrip sum and difference network according to the present invention;
FIG. 8 is a seventh schematic diagram of a planar microstrip sum and difference network according to the present invention;
FIG. 9 is an eighth schematic diagram of a planar microstrip sum and difference network according to the present invention;
FIG. 10 is a schematic structural diagram of a planar microstrip sum and difference network corresponding to FIG. 1 according to the present invention;
FIG. 11 is one of the enlarged partial views of FIG. 10;
fig. 12 is a second enlarged view of the portion of fig. 10.
Reference numbers and corresponding part names in the drawings: 1. a first 90 ° bridge, 2, a second 90 ° bridge, 3, a third 90 ° bridge, 4, a fourth 90 ° bridge, 5, a first-90 ° phase shifter, 6, a second-90 ° phase shifter, 7, a third-90 ° phase shifter, 8, a fourth-90 ° phase shifter, 10, a first bridge input, 11, a first bridge output, 12, a second bridge input, 13, a second bridge output, 20, a first bridge input, 21, a first bridge output, 22, a second bridge input, 23, a second bridge output, 30, a first bridge input, 31, a first C output, 32, a second C input, 33, a second C output, 40, a first D bridge input, 41, a D-bridge first output, 42, a D-bridge second input, 43, a D-bridge second output, 50, a first phase shifter input, 51, a first phase shifter output, 60, a second phase shifter input, 61, a second phase shifter output, 70, a third phase shifter input, 71, a third phase shifter output, 80, a fourth phase shifter input, 81, a fourth phase shifter output, 90, a first signal receiving terminal, 91, a second signal receiving terminal, 92, a third signal receiving terminal, 93, a fourth signal receiving terminal, 94, a sum signal output, 95, a first difference signal output, 96, a second difference signal output, 97, a third difference signal output.
Detailed Description
The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited to these examples.
Example 1
As shown in fig. 1 to 12, the present invention aims to overcome the disadvantages of the prior art and provide a planar microstrip sum and difference network which is compact, planar and easy to integrate.
A plane microstrip sum-difference network belongs to a microstrip structure and comprises a dielectric substrate, an upper layer circuit board and a lower layer grounding plate, wherein the upper layer circuit board is positioned on the upper surface of the dielectric substrate, the lower layer grounding plate is positioned on the lower surface of the dielectric substrate, and the upper layer circuit board comprises four input ports, four-90-degree phase shifters, four 90-degree electric bridges, a signal transmission line and four output ports.
Preferably, it consists of four 90 ° bridges and four-90 ° phase shifters.
Preferably, four 90-degree electric bridges are formed by connecting a signal transmission line, -90-degree phase shifter + signal transmission line, a signal transmission line, -90-degree phase shifter + signal transmission line in series in the sum-difference network to form a ring network, and the four sections of signal transmission lines have equal phase. Wherein two-90 phase shifter + signal transmission lines cannot be connected simultaneously to two inputs of the second 90 bridge and cannot be connected simultaneously to two inputs of the third 90 bridge.
Preferably, only the left two input ports of the sum and difference network are connected in series to a-90 ° phase shifter or only the right two input ports of the sum and difference network are connected in series to a-90 ° phase shifter, and the signal transmission lines of all the output ports are in equal phase.
Preferably, a network formed by connecting a 90-degree bridge, a 90-degree phase shifter and a signal transmission line in series is in a surrounding type layout, the signal transmission line in the sum-difference network is not crossed, and the external input and output ports are distributed around the sum-difference network in a transmitting mode.
Preferably, the phase of the signal is equal to that of the signal from the output port to the four input ports;
the phase from the pitching difference port to the upper two input ports is equal, the phase from the pitching difference port to the lower two input ports is equal, and the phase from the pitching difference port to the upper two input ports and the phase from the pitching difference port to the lower two input ports are different by 180 degrees;
the phase from the azimuth difference port to the left two input ports is equal, the phase from the azimuth difference port to the right two input ports is equal, and the phase from the azimuth difference port to the left two input ports is 180 degrees different from the phase from the azimuth difference port to the right two input ports.
Wherein the port 7 of fig. 2 (i.e., the first difference signal output 95 in fig. 9) represents the 1/2 and 3/4 antiphase, i.e., the pitch difference; this port 5 of fig. 2 (i.e., the second difference signal output 96 in fig. 10) represents a 1/4 and 2/3 opposite phase, i.e., azimuthal difference. It should be noted that: the pitching difference and the azimuth difference are not specifically and invariably positioned at a certain position, and how the components are placed is required to be determined; in the invention, four input ends are distributed in a rectangular shape, a certain port outputs signals, the upper side and the lower side of the port output signals in opposite phase (namely, the phase difference is 180 degrees), and the port is the pitching difference; the left side is opposite to the right side, and the port has a different bearing difference. The two ports may be interchangeable depending on the orientation of the presentation.
Preferably, the sum and difference network can realize single-layer circuit board processing.
The invention has at least eight forms of network structures of fig. 2 to 9.
Fig. 10 shows the network structure corresponding to fig. 1 in more detail, in fig. 10, a first signal receiving terminal 90, a second signal receiving terminal 91, a third signal receiving terminal 92, a fourth signal receiving terminal 93, and a signal output terminal 94, a first difference signal output terminal 95, a second difference signal output terminal 96, and a third difference signal output terminal 97 are further included, each of the first 90 ° bridge 1, the second 90 ° bridge 2, the fourth 90 ° bridge 4, and the third 90 ° bridge 3 includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal, each of the four-90 ° phase shifters includes an input terminal and an output terminal, and the four-90 ° phase shifters are respectively denoted as a first-90 ° phase shifter 5, a second-90 ° phase shifter 6, a third-90 ° phase shifter 7, and a fourth-90 ° phase shifter 8; the second output end of the first 90-degree bridge 1 is connected with the second input end of the second 90-degree bridge 2, the first input end of the second 90-degree bridge 2 is connected with the output end of the second-90-degree phase shifter 6, the input end of the second-90-degree phase shifter 6 is connected with the first output end of the fourth 90-degree bridge 4, the second output end of the fourth 90-degree bridge 4 is connected with the second input end of the third 90-degree bridge 3, the first input end of the third 90-degree bridge 3 is connected with the output end of the third-90-degree phase shifter 7, and the input end of the third-90-degree phase shifter 7 is connected with the first output end of the first 90-degree bridge 1; the output end of the first-90-degree phase shifter 5 is connected with the second input end of the first 90-degree bridge 1, the input end of the first-90-degree phase shifter 5 is connected with the second signal receiving end 91, and the first input end of the first 90-degree bridge 1 is connected with the first signal receiving end 90; the second output end of the second 90 ° bridge 2 is connected to the first difference signal output end 95, and the first output end of the second 90 ° bridge 2 is connected to the sum signal output end 94; the first input end of the fourth 90-degree electric bridge 4 is connected with the output end of the fourth-90-degree phase shifter 8, the input end of the fourth-90-degree phase shifter 8 is connected with the third signal receiving end 92, and the second input end of the fourth 90-degree electric bridge 4 is connected with the fourth signal receiving end 93; the first output of the third 90 ° bridge 3 is connected to the second difference signal output 96, and the second output of the third 90 ° bridge 3 is connected to the third difference signal output 97.
In fig. 10, the first 90 ° bridge 1 comprises an a-bridge first input 10, an a-bridge first output 11, an a-bridge second input 12, an a-bridge second output 13, the second 90 ° bridge 2 comprises a B-bridge first input 20, a B-bridge first output 21, a B-bridge second input 22, a B-bridge second output 23, the third 90 ° bridge 3 comprises a C-bridge first input 30, a C-bridge first output 31, a C-bridge second input 32, a C-bridge second output 33, the fourth 90 ° bridge 4 comprises a D-bridge first input 40, a D-bridge first output 41, a D-bridge second input 42, a D-bridge second output 43, the first-90 ° phase shifter 5 comprises a first phase shifter input 50, a first phase shifter output 51, the second-90 ° phase shifter 6 comprises a second phase shifter input 60, a second phase shifter output 61, the third-90 ° phase shifter 7 comprises a third phase shifter input 70, a third phase shifter output 71, and the fourth-90 ° phase shifter 8 comprises a fourth phase shifter input 80, a fourth phase shifter output 81.
The invention combines the 90-degree electric bridge and four-90-degree phase shifters to form a sum-difference network, and the circuit is realized by a branch line electric bridge structure and a schiffman phase shifter structure, thereby avoiding the crossing of internal signal transmission lines (the crossing exists in the prior art shown in figure 1), realizing the planarization of the sum-difference network, further realizing the processing of a single-layer circuit board and being beneficial to the integrated design of components.
The invention realizes the planarization of the sum and difference network, and in order to meet the requirements of miniaturization, integration and high-performance devices, the size of the passive device is greatly reduced by the Integrated Passive Device (IPD) process, the packaging complexity of the passive device is reduced, and the invention gradually becomes an important solution for the miniaturization of communication equipment. Compared with the LTCC integration process, the thin film IPD integration level is higher, the process error is smaller, and the types of integratable passive devices are wider, such as power splitters, couplers, equalizers, baluns, filters, impedance matching circuits, and the like, and are widely applied to radio frequency passive devices. GaAs is a commonly used substrate material of an IPD process, belongs to a wide bandgap semiconductor, and has higher electron mobility and better high-frequency characteristic compared with the traditional semiconductor materials such as germanium, silicon and the like, so that the GaAs substrate IPD process has smaller parasitic capacitance and inductance and is more suitable for high-frequency application. Therefore, the GaAs-based chip design of the sum and difference network can be further realized.
As described above, the present invention can be preferably implemented.
All features disclosed in all embodiments in this specification, or all methods or process steps implicitly disclosed, may be combined and/or expanded, or substituted, in any way, except for mutually exclusive features and/or steps.
The foregoing is only a preferred embodiment of the present invention, and the present invention is not limited thereto in any way, and any simple modification, equivalent replacement and improvement made to the above embodiment within the spirit and principle of the present invention still fall within the protection scope of the present invention.
Claims (10)
1. A planar microstrip sum-difference network is characterized by comprising a first 90-degree electric bridge (1), a second 90-degree electric bridge (2), a fourth 90-degree electric bridge (4) and a third 90-degree electric bridge (3) which are sequentially connected in the anticlockwise direction to form a ring network, and four-90-degree phase shifters; the input ends of the first 90-degree electric bridge (1) and the fourth 90-degree electric bridge (4) are respectively connected with a-90-degree phase shifter; the other two-90 ° phase shifters cannot be connected to both inputs of the second 90 ° bridge (2) and to both inputs of the third 90 ° bridge (3) simultaneously.
2. A planar microstrip sum and difference network according to claim 1, characterised in that a first 90 ° bridge (1), a fourth 90 ° bridge (4) are arranged to receive signals outside the sum and difference network, and a second 90 ° bridge (2), a third 90 ° bridge (3) are arranged to output signals outside the sum and difference network.
3. A planar microstrip sum and difference network according to claim 2 characterised by equal phase with the signals from the output ports to all input ports receiving signals outside the sum and difference network.
4. A planar microstrip sum and difference network according to claim 3, wherein the two input ports of the second 90 ° bridge (2) to the first 90 ° bridge (1) are in phase and the two input ports of the second 90 ° bridge (2) to the fourth 90 ° bridge (4) are in phase.
5. A planar microstrip sum and difference network according to claim 4 wherein the phase of the difference in pitch port of the second 90 ° bridge (2) to the two input ports of the first 90 ° bridge (1) differs by 180 ° from the phase of the difference in pitch port of the second 90 ° bridge (2) to the two input ports of the fourth 90 ° bridge (4).
6. A planar microstrip sum and difference network according to claim 5, characterised in that the input port of the-90 ° phase shifter connected to the azimuth difference port of the first 90 ° bridge (1) is in phase with the input port of the-90 ° phase shifter connected to the azimuth difference port of the fourth 90 ° bridge (4).
7. A planar microstrip sum and difference network according to claim 6, characterised in that the input port of the azimuth difference port to the first 90 ° bridge (1) directly receiving signals outside the sum and difference network is in phase with the input port of the azimuth difference port to the fourth 90 ° bridge (4) directly receiving signals outside the sum and difference network.
8. A planar microstrip sum and difference network according to claim 7, characterised in that the input port of the azimuth difference port to the connection-90 ° phase shifter of the first 90 ° bridge (1) is 180 ° out of phase with the input port of the azimuth difference port to the input port of the first 90 ° bridge (1) which directly receives signals outside the sum and difference network.
9. A planar microstrip sum and difference network according to claim 8, characterised in that the input port of the-90 ° phase shifter connected to the azimuth difference port to the fourth 90 ° bridge (4) is 180 ° out of phase with the input port of the azimuth difference port to the fourth 90 ° bridge (4) directly receiving the signal outside the sum and difference network.
10. A planar microstrip sum and difference network according to any of claims 1 to 9, further comprising a first signal receiving terminal (90), a second signal receiving terminal (91), a third signal receiving terminal (92), a fourth signal receiving terminal (93), and a signal output terminal (94), a first difference signal output terminal (95), a second difference signal output terminal (96), and a third difference signal output terminal (97), wherein the first 90 ° bridge (1), the second 90 ° bridge (2), the fourth 90 ° bridge (4), and the third 90 ° bridge (3) each comprise a first input terminal, a second input terminal, a first output terminal, and a second output terminal, and wherein the four-90 ° phase shifters each comprise an input terminal and an output terminal, and wherein the four-90 ° phase shifters are respectively designated as a first-90 ° phase shifter (5), a second-90 ° phase shifter (6), a third-90 ° phase shifter (7), and a fourth-90 ° phase shifter (8); the second output end of the first 90-degree electric bridge (1) is connected with the second input end of the second 90-degree electric bridge (2), the first input end of the second 90-degree electric bridge (2) is connected with the output end of the second-90-degree phase shifter (6), the input end of the second-90-degree phase shifter (6) is connected with the first output end of the fourth 90-degree electric bridge (4), the second output end of the fourth 90-degree electric bridge (4) is connected with the second input end of the third 90-degree electric bridge (3), the first input end of the third 90-degree electric bridge (3) is connected with the output end of the third-90-degree phase shifter (7), and the input end of the third-90-degree phase shifter (7) is connected with the first output end of the first 90-degree electric bridge (1); the output end of the first-90-degree phase shifter (5) is connected with the second input end of the first 90-degree electric bridge (1), the input end of the first-90-degree phase shifter (5) is connected with the second signal receiving end (91), and the first input end of the first 90-degree electric bridge (1) is connected with the first signal receiving end (90); the second output end of the second 90-degree electric bridge (2) is connected with the first difference signal output end (95), and the first output end of the second 90-degree electric bridge (2) is connected with the sum signal output end (94);
a first input end of the fourth 90-degree bridge (4) is connected with an output end of the fourth-90-degree phase shifter (8), an input end of the fourth-90-degree phase shifter (8) is connected with a third signal receiving end (92), and a second input end of the fourth 90-degree bridge (4) is connected with a fourth signal receiving end (93); the first output end of the third 90-degree electric bridge (3) is connected with the second difference signal output end (96), and the second output end of the third 90-degree electric bridge (3) is connected with the third difference signal output end (97).
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