CN115458564B - 像素 - Google Patents

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Publication number
CN115458564B
CN115458564B CN202211015023.0A CN202211015023A CN115458564B CN 115458564 B CN115458564 B CN 115458564B CN 202211015023 A CN202211015023 A CN 202211015023A CN 115458564 B CN115458564 B CN 115458564B
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transistor
node
voltage
gate
pixel
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CN115458564A (zh
Inventor
黄荣仁
金成虎
金应泽
梁容豪
王盛民
崔贞美
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Samsung Display Co Ltd
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Samsung Display Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种像素包括：有机发光二极管；第一晶体管，包括连接到第一节点的栅极、连接到第二节点的源极以及连接到第三节点的漏极；第二晶体管，包括连接到对应的扫描线的栅极，第二晶体管连接在数据线和第二节点之间；存储电容器，连接在第一节点和第一电压之间；第三晶体管，包括连接到对应的扫描线的栅极，第三晶体管连接在第一节点和第三节点之间；第四晶体管，包括栅极、直接连接到第一晶体管的源极或第一晶体管的漏极的源极以及连接到第二电压的漏极；第五晶体管，包括连接到发射控制线的栅极，第五晶体管连接在第一电压和第二节点之间；以及第六晶体管，包括连接到发射控制线的栅极，第六晶体管连接在第三节点和有机发光二极管的阳极之间。

Description

像素
本申请是申请日为2019年3月7日、申请号为201910172178.7、发明名称为“像素和包括所述像素的显示装置”的发明专利申请的分案申请。
相关申请的交叉引用
本申请要求于2018年3月7日在韩国知识产权局提交的第10-2018-0027043号韩国专利申请的优先权和权益，该韩国专利申请的公开的通过引用全部包含于此。
技术领域
本公开涉及一种像素和使用所述像素的显示装置，并且具体地，本公开涉及用于改善串扰的像素和使用所述像素的显示装置。
背景技术
在各种平板显示器之中，有机发光二极管显示器将有机发光二极管(OLED)用作用于显示图像的通过电子和空穴的复合产生光的发光元件。OLED显示器具有快速响应速度、低功耗以及优异的发光效率、亮度和视角。
近来，多个像素集成在要求晶体管非常小的高分辨率显示装置的窄的区域中。晶体管的尺寸的减小意味着沟道区的长度的减小，并且随着沟道区的长度减小，导致电流通过截止的晶体管泄漏的问题。
具体来说，当显示装置在高温下工作时，晶体管的阈值电压偏移，因此相对大的电流通过截止的晶体管的沟道区泄漏。
在本背景技术部分中公开的以上信息仅用于增强对背景的理解，因此，该信息可包含可不构成对于本领域普通技术人员已知的现有技术的信息。
发明内容
为了去除由在高温下工作产生的漏电流而做出本公开。
为了防止显示装置的串扰现象而做出本公开。
本公开的示例性实施例提供一种像素，所述像素包括：有机发光二极管；第一晶体管，所述第一晶体管包括连接到第一节点的栅极，其中，所述第一晶体管连接在第二节点和第三节点之间；第二晶体管，所述第二晶体管包括连接到对应的扫描线的栅极，其中，所述第二晶体管连接在数据线和所述第二节点之间；存储电容器，所述存储电容器连接在所述第一节点和第一电压之间；第三晶体管，所述第三晶体管包括连接到所述对应的扫描线的栅极，其中，所述第三晶体管连接在所述第一节点和所述第三节点之间；以及第四晶体管，所述第四晶体管连接在所述第一晶体管的第一端和第二电压之间。
所述第四晶体管可连接在所述第二节点和所述第二电压之间，并且从所述第二晶体管施加的漏电流可流过所述第四晶体管。
所述第四晶体管可包括连接到所述第二节点的栅极和源极以及连接到所述第二电压的漏极。
所述第四晶体管可包括连接到所述第二节点的源极、连接到所述第二电压的漏极以及连接到直流电压源的栅极，所述直流电压源具有所述第四晶体管的栅极截止电平的电压值。
所述第四晶体管可连接在所述第三节点和所述第二电压之间，并且从所述第二晶体管施加的漏电流可流过在截止状态下的所述第四晶体管。
所述第四晶体管可包括连接到所述第三节点的栅极和源极以及连接到所述第二电压的漏极。
所述第四晶体管可包括连接到所述第三节点的源极、连接到所述第二电压的漏极以及连接到直流电压源的栅极，所述直流电压源具有所述第四晶体管的栅极截止电平的电压值。
所述像素还可包括：第五晶体管，所述第五晶体管包括连接到发射控制线的栅极，其中，所述第五晶体管连接在所述第一电压和所述第二节点之间；第六晶体管，所述第六晶体管包括连接到所述发射控制线的栅极，其中，所述第六晶体管连接在所述第三节点和所述有机发光二极管的阳极之间；第七晶体管，所述第七晶体管包括连接到所述对应的扫描线的上一扫描线的栅极，其中，所述第七晶体管连接在所述第一节点和第二电压之间；以及第八晶体管，所述第八晶体管包括连接到所述上一扫描线的栅极，其中，所述第八晶体管连接在所述有机发光二极管的所述阳极和所述第二电压之间。
其中所述第二晶体管截止的时段可对应于在所述第二晶体管截止之后直到所述有机发光二极管发光为止的时段。
本公开的另一实施例提供一种显示装置，所述显示装置包括：扫描驱动器，所述扫描驱动器用于将多个扫描信号传输到多个扫描线；数据驱动器，所述数据驱动器用于将多个数据信号传输到多个数据线；显示单元，所述显示单元包括多个像素，所述多个像素分别连接到所述多个扫描线之中的对应的扫描线和所述多个数据线之中的对应的数据线，所述像素分别根据对应的数据信号发光并且显示图像；以及控制器，所述控制器用于控制所述扫描驱动器和所述数据驱动器、生成所述数据信号并且将所述数据信号供应到所述数据驱动器，其中，所述多个像素中的像素包括：有机发光二极管；第一晶体管，所述第一晶体管包括连接到第一节点的栅极，其中，所述第一晶体管连接在第二节点和第三节点之间；第二晶体管，所述第二晶体管包括连接到对应的扫描线的栅极，其中，所述第二晶体管连接在数据线和所述第二节点之间；存储电容器，所述存储电容器连接在所述第一节点和第一电压之间；第三晶体管，所述第三晶体管包括连接到所述对应的扫描线的栅极，其中，所述第三晶体管连接在所述第一节点和所述第三节点之间；以及第四晶体管，所述第四晶体管连接在所述第一晶体管的第一端和第二电压之间。
所述第四晶体管可连接在所述第二节点和所述第二电压之间，并且从所述第二晶体管施加的漏电流可流过所述第四晶体管。
所述第四晶体管可包括连接到所述第二节点的栅极和源极以及连接到所述第二电压的漏极。
所述第四晶体管可包括连接到所述第二节点的源极、连接到所述第二电压的漏极以及连接到直流电压源的栅极，所述直流电压源具有所述第四晶体管的栅极截止电平的电压值。
所述第四晶体管连接在所述第三节点和所述第二电压之间，并且从所述第二晶体管施加的漏电流流过在截止状态下的所述第四晶体管。
所述第四晶体管可包括连接到所述第三节点的栅极和源极以及连接到所述第二电压的漏极。
所述第四晶体管可包括连接到所述第三节点的源极、连接到所述第二电压的漏极以及连接到直流电压源的栅极，所述直流电压源具有所述第四晶体管的栅极截止电平的电压值。
所述显示装置还可包括用于将多个发射控制信号传输到多个发射控制线的发射控制驱动器，其中，所述控制器生成用于控制所述发射控制驱动器的控制信号，并且所述像素还包括：第五晶体管，所述第五晶体管包括连接到所述多个发射控制线之中的对应的发射控制线的栅极，其中，所述第五晶体管连接在所述第一电压和所述第二节点之间；第六晶体管，所述第六晶体管包括连接到所述对应的发射控制线的栅极，其中，所述第六晶体管连接在所述第三节点和所述有机发光二极管的阳极之间；第七晶体管，所述第七晶体管包括连接到所述对应的扫描线的上一扫描线的栅极，其中，所述第七晶体管连接在所述第一节点和第二电压之间；以及第八晶体管，所述第八晶体管包括连接到所述上一扫描线的栅极，其中，所述第八晶体管连接在所述有机发光二极管的阳极和所述第二电压之间。
其中所述第二晶体管截止的时段可对应于在所述第二晶体管截止之后直到所述有机发光二极管发光为止的时段。
本公开的又一实施例提供一种像素，所述像素包括：存储电容器，当从对应的扫描线传输的扫描信号具有使能电平时，所述存储电容器用于存储与从对应的数据线传输的数据信号对应的数据电压；第一晶体管，所述第一晶体管用于生成与所述数据电压对应的驱动电流；以及第二晶体管，所述第二晶体管连接在所述第一晶体管的第一端和初始化电压之间。
在其中所述第二晶体管截止的时段期间，漏电流流过所述第二晶体管，其中，当所述扫描信号具有去使能电平时，所述漏电流由施加到所述对应的数据线的另一数据信号引起。
根据示例性实施例，当所述显示装置在高温下工作时，可去除由黑色电压引起的所述漏电流。
根据示例性实施例，可防止所述显示装置的串扰现象。
根据示例性实施例，可提供高质量的有机发光装置。
附图说明
图1示出根据示例性实施例的显示装置的框图。
图2示出根据第一示例性实施例的图1中所示的显示装置的像素的电路图。
图3示出用于驱动图1中所示的像素的信号的时序图。
图4示出由图3中所示的信号驱动的像素的一部分。
图5A示出呈现串扰现象的比较显示装置的显示单元。
图5B示出根据示例性实施例的显示装置的显示单元。
图6示出根据第二示例性实施例的图1中所示的显示装置的像素的电路图。
图7示出根据第三示例性实施例的图1中所示的显示装置的像素的电路图。
图8示出根据第四示例性实施例的图1中所示的显示装置的像素的电路图。
具体实施方式
下文中，将参照其中示出示例性实施例的附图更充分地描述本公开。如本领域技术人员将认识到的，在全部不脱离本公开的精神或范围的情况下，可以以各种不同的方式修改所描述的实施例。
附图和描述将被认为在实质上是说明性的而非限制性的，并且在整个说明书中，同样的附图标记指示同样的元件。
除非明确地描述为相反，否则将词语“包括”理解为隐含包括所陈述的元件，但是不排除任何其他元件。
图1示出根据示例性实施例的显示装置的框图。如所示的，显示装置包括：包括多个像素PX1至PXn的显示单元10、扫描驱动器20、数据驱动器30、发射控制驱动器40、电源50以及控制器60。
像素PX1至PXn中的每个连接到多个扫描线S1至Sn之中的两个对应的扫描线、多个发射控制线EM1至EMn之中的一个对应的发射控制线以及多个数据线D1至Dm之中的一个对应的数据线。此外，虽然在图1的显示单元10中未直接示出，但是多个像素PX1至PXn连接到多个电源线以从电源50接收第一电源电压ELVDD、第二电源电压ELVSS和初始化电压Vint。
包括在显示单元10中的多个像素PX1至PXn基本上以矩阵形式布置。虽然未具体限制，但是多个扫描线S1至Sn和多个发射控制线EM1至EMn基本上在像素的行方向上延伸，并且多个数据线D1至Dm基本上在像素的列方向上延伸，并且扫描线基本上彼此平行地设置、发射控制线基本上彼此平行地设置并且数据线基本上彼此平行地设置。
多个像素PX1至PXn中的每个像素连接到两个对应的扫描线。即，像素PX1至PXn中的每个像素连接到与其中包括对应的像素的像素行对应的第一扫描线和与上一像素行对应的第二扫描线。包括在第一像素行中的一组像素可连接到第一扫描线S1和虚设扫描线S0。包括在第n像素行(n大于1)中的一组像素分别连接到与作为对应的像素行的第n像素行对应的第n扫描线Sn和与作为上一像素行的第n-1像素行对应的第n-1扫描线Sn-1。
多个像素PX1至PXn中的每个通过根据通过多个数据线D1至Dm传输的对应的数据信号供应到有机发光二极管的驱动电流发射具有预定亮度的光。
扫描驱动器20通过多个扫描线S1至Sn生成与每个像素对应的扫描信号，并且传输所述扫描信号。即，扫描驱动器20通过与包括在各个像素行中的各自的多个像素对应的扫描线传输扫描信号。
扫描驱动器20从控制器60接收扫描驱动控制信号SCS以生成扫描信号，并且将扫描信号依次供应到多个扫描线S1至Sn，所述多个扫描线S1至Sn分别连接到包括在各个像素行中的一组像素。
数据驱动器30将数据信号通过多个数据线D1至Dm传输到各个像素。
数据驱动器30从控制器60接收数据驱动控制信号DCS，并且供应与多个数据线D1至Dm对应的数据信号，所述多个数据线D1至Dm分别连接到包括在各个像素列中的一组像素。
发射控制驱动器40连接到与多个像素PX1至PXn连接的多个发射控制线EM1至EMn。即，多个发射控制线EM1至EMn在行方向上基本上彼此平行地延伸，并且将多个像素和发射控制驱动器40连接。
发射控制驱动器40生成通过多个发射控制线EM1至EMn与每个像素对应的发射控制信号。每个像素被控制为响应于由发射控制信号的控制来发射与数据信号对应的光。即，响应于通过对应的发射控制线传输的发射控制信号来控制包括在像素中的发射控制晶体管的工作，因此连接到发射控制晶体管的有机发光二极管可发射或者可不发射具有基于与数据信号对应的驱动电流的亮度的光。
电源50将第一电源电压ELVDD、第二电源电压ELVSS和初始化电压Vint供应到显示单元10的各个像素。第一电源电压ELVDD可以是预定的高电平电压，并且第二电源电压ELVSS可小于第一电源电压ELVDD或者可以是接地电压。初始化电压Vint可设置为等于或小于第二电源电压ELVSS的电压值。
第一电源电压ELVDD的电压值、第二电源电压ELVSS的电压值和初始化电压Vint的电压值不限于特定电压值，但是电压值可根据由控制器60传输的电源控制信号PCS的控制来设置或控制。
控制器60将多个图像信号变换为多个图像数据信号DATA并且将所述多个图像数据信号DATA传输到数据驱动器30。控制器60接收垂直同步信号、水平同步信号和时钟信号(未示出)，生成用于控制扫描驱动器20、发射控制驱动器40和数据驱动器30的控制信号，并且将所述控制信号传输到扫描驱动器20、发射控制驱动器40和数据驱动器30。即，控制器60生成用于控制扫描驱动器20的扫描驱动控制信号SCS、用于控制发射控制驱动器40的发射驱动控制信号ECS和用于控制数据驱动器30的数据驱动控制信号DCS，并且传输用于控制扫描驱动器20的扫描驱动控制信号SCS、用于控制发射控制驱动器40的发射驱动控制信号ECS和用于控制数据驱动器30的数据驱动控制信号DCS。
此外，控制器60生成用于控制电源50的电源控制信号PCS并且将用于控制电源50的电源控制信号PCS传输到电源50。
图2和图6至图8示出根据本公开的示例性实施例的像素的电路图。具体来说，图2和图6至图8示出根据不同的示例性实施例的关于设置在由图2中所示的显示单元10的多个像素PX1至PXn之中的第n像素行和第m像素列限定的区域中的像素(PXn)100的电路图。在这些示例性实施例中，为便于描述，将各个晶体管示例为p沟道金属氧化物半导体场效应晶体管(MOSFET)(PMOS晶体管)。
图3示出用于驱动图2和图6至图8的像素的信号的时序图，并且将描述根据图2和图6至图8的示例性实施例的驱动像素的过程。
图2中所示的像素100-1包括有机发光二极管OLED、存储电容器Cst以及第一晶体管T1至第八晶体管T8。
第一晶体管T1包括连接到第一节点N1的栅极、连接到第二节点N2的源极以及连接到第三节点N3的漏极，所述第二节点N2还连接到第五晶体管T5的漏极。驱动电流根据对应的数据信号D[i]流过第一晶体管T1。晶体管的栅极、源极和漏极在文中也可称作栅电极、源电极和漏电极。
驱动电流代表与第一晶体管T1的源极和栅极之间的电压差对应的电流，并且驱动电流可以是与数据信号D[i]的数据电压对应的可变电流。
第二晶体管T2包括连接到第j扫描线Sj的栅极、连接到第i数据线Di的源极以及连接到第二节点N2的漏极，第一晶体管T1的源极和第五晶体管T5的漏极共同连接到所述第二节点N2。第二晶体管T2响应于通过第j扫描线Sj传输的对应的扫描信号S[j]将与数据信号D[i]对应的数据电压通过第i数据线Di传输到第二节点N2。
第三晶体管T3包括连接到第j扫描线Sj的栅极以及分别连接到第一晶体管T1的栅极和漏极的漏极和源极。第三晶体管T3响应于通过第j扫描线Sj传输的对应的扫描信号S[j]工作。当导通时，第三晶体管T3将第一晶体管T1的栅极与漏极连接以便以二极管方式连接第一晶体管T1。
当以二极管方式连接第一晶体管T1时，来自施加到第一晶体管T1的源极的数据电压的由第一晶体管T1的阈值电压补偿的电压被施加到第一晶体管T1的栅极。第一晶体管T1的栅极连接到存储电容器Cst的第一电极，因此由存储电容器Cst保持电压。由第一晶体管T1的阈值电压补偿的数据电压被施加到所述栅极，并且由存储电容器Cst保持，因此流过第一晶体管T1的驱动电流可不被第一晶体管T1的阈值电压影响。
第四晶体管T4包括连接到第j-1扫描线Sj-1的栅极、连接到初始化电压供应线的源极以及连接到第一节点N1的漏极。第四晶体管T4响应于通过第j-1扫描线Sj-1传输的第j-1扫描信号S[j-1]将通过初始化电压供应线施加的初始化电压Vint传输到第一节点N1。第四晶体管T4可响应于通过与先前第j-1像素行对应的第j-1扫描线Sj-1传输的第j-1扫描信号S[j-1]在施加数据信号D[i]之前将初始化电压Vint传输到第一节点N1。在将通过第j扫描线Sj传输的扫描信号S[j]传输到包括对应的像素100-1的第j像素行之前，将通过第j-1扫描线Sj-1传输的第j-1扫描信号S[j-1]传输到第j-1像素行。
在此情况下，不限制初始化电压Vint的电压值，但是可将所述初始化电压Vint的电压值设置到可减小第一晶体管T1的栅极电压以初始化的低电平电压值。即，在其中将第j-1扫描信号S[j-1]以栅极导通电压电平传输到第四晶体管T4的栅极的时段期间，第一晶体管T1的栅极被初始化以具有初始化电压Vint。
第五晶体管T5包括连接到第j发射控制线EMj的栅极、连接到第一电源电压ELVDD供应线的源极以及连接到第二节点N2的漏极。
第六晶体管T6包括连接到第j发射控制线EMj的栅极、连接到第三节点N3的源极以及连接到有机发光二极管OLED的阳极的漏极。
第五晶体管T5和第六晶体管T6响应于通过第j发射控制线EMj传输的第j发射控制信号EM[j]工作。当第五晶体管T5和第六晶体管T6响应于第j发射控制信号EM[j]而导通时，在从第一电源电压ELVDD朝向有机发光二极管OLED的方向上形成电流路径。流过有机发光二极管OLED的驱动电流导致有机发光二极管OLED根据驱动电流而发光，从而经由像素100-1显示与数据信号对应的图像。
存储电容器Cst的第一电极连接到第一节点N1，并且存储电容器Cst的第二电极连接到第一电源电压ELVDD供应线。如上所述，存储电容器Cst连接在第一晶体管T1的栅极和第一电源电压ELVDD供应线之间，从而保持施加到第一晶体管T1的栅极的电压。
第七晶体管T7包括连接到第j-1扫描线Sj-1的栅极、连接到有机发光二极管OLED的阳极的源极以及连接到初始化电压Vint的漏极。
第七晶体管T7可响应于通过与先前第j-1像素行对应的第j-1扫描线Sj-1传输的第j-1扫描信号S[j-1]将初始化电压Vint传输到有机发光二极管OLED的阳极。根据所传输的初始化电压Vint将有机发光二极管OLED的阳极复位为充分低的电压。
第八晶体管T8包括连接到第二节点N2的源极和栅极以及连接到初始化电压Vint的漏极。第八晶体管T8的栅极和源极共同连接到第二节点N2，因此在第二节点N2处以二极管方式连接第八晶体管T8。
相对于图1中所示的显示装置的框图和图2中所示的像素100-1的电路图来描述根据图3的时序图的详细驱动操作。
图3示出用于驱动图1中所示的像素100的信号的时序图。将参照图3描述一些像素显示黑色图像，所述一些像素例如是连接到第n-1扫描线Sn-1和第i数据线Di的像素以及连接到第n扫描线Sn和相同的第i数据线Di的像素。
连接到相同的第i数据线Di的其他像素可受到与应用到显示黑色图像的像素的黑色灰度对应的数据信号Black影响。在将数据信号传输到一些像素之后直到施加具有低电平电压L的发射控制信号为止，可由施加到第i数据线Di的数据信号Black生成漏电流Ib。在此情况下，可通过漏电流Ib减小存储在第一节点N1中的电压。借由减小的电压，每个像素可显示比根据对应的数据信号的图像暗的图像，从而产生串扰现象。
因此，可由与显示黑色图像的像素连接到相同的数据线Di的像素产生串扰现象。
参照图2和图3，在t11和t12之间的时段期间，第四晶体管T4和第七晶体管T7由通过第j-1扫描线Sj-1传输的第j-1扫描信号S[j-1]的低电平电压L导通。用于初始化在第一晶体管T1的栅电极处的电压的初始化电压Vint通过第四晶体管T4被传输到第一节点N1。
在t12和t13之间的时段期间，第二晶体管T2和第三晶体管T3由通过第j扫描线Sj传输的第j扫描信号S[j]的低电平电压L导通。将在数据线Di上的对应的数据信号GR2通过导通的第二晶体管T2传输到第二节点N2，并且第一晶体管T1通过导通的第三晶体管T3以二极管方式连接。
在t14和t15之间的时段期间，将与黑色灰度对应的数据信号Black施加到第i数据线Di。现在将参照图4描述t14和t15之间的时段。
图4示出由图3中所示的信号驱动的连接到第j扫描线Sj和第i数据线Di的像素的一部分。如图4中所示，第二晶体管T2、第三晶体管T3、第五晶体管T5和第六晶体管T6截止。
然而，当包括在像素100-1中的晶体管T1至T8在高温下工作时，根据晶体管的阈值电压的正向偏移，当栅极和源极之间的电压差小或者为零时，漏电流可流过晶体管。
当与黑色灰度的数据信号Black对应的黑色电压Vblack施加到第i数据线Di时，漏电流Ib1可通过黑色电压Vblack和第二节点N2之间的电压差流过截止的第二晶体管T2。
第八晶体管T8反相地以二极管方式连接到第二节点N2，并且初始化电压供应线连接到第八晶体管T8的漏极。借由阈值电压的正向偏移以及初始化电压Vint和第二节点N2之间的电压差，漏电流Ib1通过第八晶体管T8下降到初始化电压Vint。因此，在像素100-1发光之前将黑色电压Vblack施加到第i数据线Di不影响像素100-1中的第一节点N1处保持的电压Vdata-Vth。
在t18至t20之间的时段期间，第五晶体管T5和第六晶体管T6由具有低电平电压L的发射控制信号EM[j]导通。由存储在存储电容器Cst中的电压引起的驱动电流被传输到有机发光二极管OLED，并且有机发光二极管OLED发光。
在不具有第八晶体管T8的传统像素配置中，漏电流Ib0通过第一晶体管T1和截止的第三晶体管T3被传输到第一节点N1以降低电压。因此，像素显示比根据施加到数据线Di的数据电压的灰度小的灰度，从而产生串扰现象。
图5A示出呈现串扰现象的比较显示装置的显示单元，并且图5B示出根据示例性实施例的显示装置的显示单元。关于图5A和图5B，将假设显示单元10的第一区域150显示黑色图像，并且相邻区域151和152显示白色图像。
如图5A中所示，当显示单元10中的第一区域150显示黑色图像时，包括与第一区域150中的像素连接到相同的数据线的像素的相邻区域151和152显示比白色图像暗的图像，从而呈现串扰现象。
然而，在根据示例性实施例的包括像素100-1的显示装置的情况下，如图5B中所示，当第一区域150显示黑色图像时，包括与第一区域150中的像素连接到相同的数据线的像素的相邻区域151和152在不呈现串扰现象的情况下显示白色图像。
即，根据示例性实施例，即使当显示装置在高温下工作时，使用第八晶体管T8能够去除由黑色电压导致的漏电流，从而防止显示装置的串扰现象。
现在将参照图6至图8描述根据其他示例性实施例的像素。
图6示出可被包括在图1的显示装置中的像素100-2。
除了替代图2中所示的像素100-1的第八晶体管T8的第八晶体管T18之外，图6中所示的像素100-2与图2的像素100-1相同。
第八晶体管T18包括连接到第三节点N3的源极和栅极以及连接到初始化电压Vint的漏极。第八晶体管T18的栅极和源极共同连接到第三节点N3，因此第八晶体管T18以二极管方式连接到第三节点N3。
关于参照图3的像素100-2的工作过程，在t11和t12之间的时段期间，第四晶体管T4和第七晶体管T7由通过第j-1扫描线Sj-1传输的第j-1扫描信号S[j-1]的低电平电压L导通。将用于初始化第一晶体管T1的栅电极的电压的初始化电压Vint通过第四晶体管T4传输到第一节点N1。
在t12和t13之间的时段期间，第二晶体管T2和第三晶体管T3由通过第j扫描线Sj传输的第j扫描信号S[j]的低电平电压L导通。在数据线Di上的对应的数据信号GR2通过导通的第二晶体管T2被传输到第二节点N2，并且第一晶体管T1通过导通的第三晶体管T3以二极管方式连接。
在t14和t15之间的时段期间，将与黑色灰度对应的数据信号Black施加到第i数据线Di。
由于黑色电压Vblack和第二节点N2之间的电压差，漏电流Ib可通过截止的第二晶体管T2流到第二节点N2并且进一步通过第一晶体管T1流到第三节点N3。
第八晶体管T18反相地以二极管方式连接到第三节点N3，并且初始化电压Vint连接到第八晶体管T18的漏极。借由阈值电压的正向偏移以及初始化电压Vint和第三节点N3之间的电压差，漏电流Ib通过第八晶体管T18下降到初始化电压Vint。因此，在像素100-2发光之前将黑色电压Vblack施加到第i数据线Di不影响像素100-2的第一节点N1处保持的电压。
在t18和t20之间的时段期间，第五晶体管T5和第六晶体管T6由具有低电平电压L的发射控制信号EM[j]导通。通过在存储电容器Cst中充电的电压，驱动电流传输到有机发光二极管OLED，并且有机发光二极管OLED发光。
即，根据示例性实施例，当显示装置在高温下工作时，通过使用第八晶体管T18去除可由黑色电压引起的漏电流，可防止显示装置的串扰现象。
图7示出根据示例性实施例的像素100-3。除了替代第八晶体管T8的第八晶体管T28的栅极连接到直流电压源之外，图7中所示的像素100-3与图2中所示的像素100-1相同。
即，图7中所示的第八晶体管T28包括连接到第二节点N2的源极，连接到初始化电压Vint的漏极以及连接到直流电压源的栅极。因此，第八晶体管T28从直流电压源接收预定的直流电压，而与像素100-3的元件根据图3的驱动时序图的工作无关。在此情况下，直流电压是用于截止第八晶体管T28的预定的电压，并且在图7的示例性实施例中，像素100-3被配置为PMOS晶体管，因此直流电压可以是预定的高电平电压。
因此，具有晶体管截止电平的直流电压被传输到栅极，因此第八晶体管T28截止，并且由施加到第i数据线Di的黑色电压Vblack引起的漏电流Ib下降到初始化电压Vint。
图8示出根据示例性实施例的像素100-4。除了替代第八晶体管T18的第八晶体管T38连接到直流电压源之外，图8中所示的像素100-4与图6中所示的像素100-2相同。
即，图8中所示的第八晶体管T38包括连接到第三节点N3的源极、连接到初始化电压Vint的漏极以及连接到直流电压源的栅极。因此，第八晶体管T38从直流电压源接收预定的直流电压，而与像素100-4的元件根据图3的驱动时序图的工作无关。
通过将晶体管截止电平的直流电压施加到栅极，第八晶体管T38截止，因此由施加到第i数据线Di的黑色电压Vblack引起的漏电流Ib下降到初始化电压Vint。
在包括根据图2和图6至图8的示例性实施例的像素100-1、100-2、100-3和100-4的显示装置中，当显示装置在高温下工作时，去除可由黑色电压引起的漏电流以抑制串扰现象，从而改善图像质量特性。
关于像素100-1、100-2、100-3和100-4，描述了第八晶体管T8、T18、T28和T38分别连接到第二节点N2或第三节点N3，然而，第八晶体管T8可连接到一个像素的第二节点N2，并且第八晶体管T18可连接到所述像素的第三节点N3。
尽管已经结合目前被认为是实用示例性实施例的示例性实施例描述了本公开，但是将理解的是，本公开不限于所公开的实施例，而相反地，本公开旨在覆盖包括在本公开的精神和范围内的各种修改和等同布置。

Claims (10)

1.一种像素，其中，所述像素包括：
有机发光二极管；
第一晶体管，包括连接到第一节点的栅极、连接到第二节点的源极以及连接到第三节点的漏极；
第二晶体管，包括连接到对应的扫描线的栅极，其中，所述第二晶体管连接在数据线和所述第二节点之间；
存储电容器，连接在所述第一节点和第一电压之间；
第三晶体管，包括连接到所述对应的扫描线的栅极，其中，所述第三晶体管连接在所述第一节点和所述第三节点之间；
第四晶体管，包括栅极、直接连接到所述第一晶体管的所述源极或所述第一晶体管的所述漏极的源极以及连接到第二电压的漏极；
第五晶体管，包括连接到发射控制线的栅极，其中，所述第五晶体管连接在所述第一电压和所述第二节点之间；以及
第六晶体管，包括连接到所述发射控制线的栅极，其中，所述第六晶体管连接在所述第三节点和所述有机发光二极管的阳极之间。
2.根据权利要求1所述的像素，其中，
所述第四晶体管连接在所述第二节点和所述第二电压之间，并且从所述第二晶体管施加的漏电流流过所述第四晶体管。
3.根据权利要求2所述的像素，其中，
所述第四晶体管包括连接到所述第二节点的栅极和源极以及连接到所述第二电压的漏极。
4.根据权利要求1所述的像素，其中，
所述第四晶体管包括连接到所述第二节点的源极、连接到所述第二电压的漏极以及连接到具有所述第四晶体管的栅极截止电平的电压值的直流电压源的栅极。
5.根据权利要求1所述的像素，其中，
所述第四晶体管连接在所述第三节点和所述第二电压之间，并且从所述第二晶体管施加的漏电流流过在截止状态下的所述第四晶体管。
6.根据权利要求5所述的像素，其中，
所述第四晶体管包括连接到所述第三节点的栅极和源极以及连接到所述第二电压的漏极。
7.根据权利要求5所述的像素，其中，
所述第四晶体管包括连接到所述第三节点的源极、连接到所述第二电压的漏极以及连接到具有所述第四晶体管的栅极截止电平的电压值的直流电压源的栅极。
8.根据权利要求1所述的像素，其中，所述像素还包括：
第七晶体管，包括连接到所述对应的扫描线的前一扫描线的栅极，其中，所述第七晶体管连接在所述第一节点和所述第二电压之间；以及
第八晶体管，包括连接到所述前一扫描线的栅极，其中，所述第八晶体管连接在所述有机发光二极管的所述阳极和所述第二电压之间，
其中，所述第二晶体管截止的时段对应于在所述第二晶体管截止之后直到所述有机发光二极管发光为止的时段。
9.根据权利要求1所述的像素，其中，
所述第二晶体管截止的时段对应于在所述第二晶体管截止之后直到所述有机发光二极管发光为止的时段。
10.一种像素，其中，所述像素包括：
有机发光二极管；
第一晶体管，包括连接到第一节点的栅极、连接到第二节点的源极以及连接到第三节点的漏极；
第二晶体管，包括连接到对应的扫描线的栅极，其中，所述第二晶体管连接在数据线和所述第二节点之间；
存储电容器，连接在所述第一节点和第一电压之间；
第三晶体管，包括连接到所述对应的扫描线的栅极，其中，所述第三晶体管连接在所述第一节点和所述第三节点之间；以及
第四晶体管，包括连接到具有所述第四晶体管的栅极截止电平的电压值的直流电压源、直接连接到所述第一晶体管的所述源极或所述第一晶体管的所述漏极的源极以及连接到第二电压的漏极，
其中，所述第二晶体管截止的时段对应于在所述第二晶体管截止之后直到所述有机发光二极管发光为止的时段。
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