CN115454590A - Activity graph-oriented simulation scheduling method and system - Google Patents
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Abstract
The invention provides a simulation scheduling method and system facing to an activity diagram, and belongs to the technical field of simulation scheduling. The method comprises the steps of analyzing a plurality of executable objects from the activity diagram, determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process, and scheduling each task in the simulation process by using a scheduler.
Description
Technical Field
The invention belongs to the technical field of simulation scheduling, and particularly relates to a simulation scheduling method and system for an activity graph.
Background
With the increasing popularity of systematic modeling, or MBSE (model-based system engineering is a formal approach to support the requirements, design, analysis, and validation associated with the development of complex systems), the need to simulate system modeling has grown. But lacks deep research and application in the technical field related to simulation.
The operation flow of a commonly-used open-source simulation engine implemented according to the standard specification such as fUML comprises the following steps: simulation initialization and simulation execution. The simulation initialization generates simulation data and simulation execution objects according to the input UML and SysML models, and then inputs the contents into the simulation execution part to start the simulation execution. The logic of simulation execution is that after the simulation engine runs the current node, the subsequent execution nodes are searched according to the actual structure of the UML and SysML models, and after the nodes are found, token data is transmitted, and the running function of the execution nodes is directly called, so that the simulation is continuously run.
Unified Modeling Language (UML), also called Unified Modeling Language or standard Modeling Language, is an OMG standard beginning in 1997, which is a graphical Language supporting Modeling and software system development, and provides Modeling and visualization support for all stages of software development. SysML is a general graphical modeling language with a semantic basis for modeling system requirements, behaviors, structures, and parameters, representing a subset of UML.
The method completely conforms to the standard specification and conforms to the semantic specification defined by the model, but because the node execution directly calls the run function of the execution node, when the simulated model object has dead loops or the simulation time is too long, the simulation method can cause the program to crash because the call stack of the program is too deep.
Secondly, the method does not have good support capability for the simulation of multi-thread operation, the method does not fully consider various requirements of multi-thread program execution, and various problems exist when the real multi-thread simulation is executed, such as thread exception or data conflict.
In addition, for some special UML and SysML model execution requirements, the method cannot well complete the extension of the operation logic. Finally, the method can not realize the addition of functions such as simulation operation breakpoint debugging and the like under the condition of not carrying out comprehensive modification. Therefore, although the method can complete certain simulation functions of the UML and SysML models and meets the standard specification, the method has many problems in practical application and needs to be improved.
Disclosure of Invention
In order to solve the above technical problem, the present patent proposes an activity graph-oriented simulation scheduling method and system.
The invention discloses a simulation scheduling method facing to an activity diagram in a first aspect. The activity map is a UML activity map or a SysML activity map, and the method comprises the following steps: analyzing a plurality of executable objects from the activity diagram, determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process, and scheduling each task in the simulation process by using a scheduler; wherein: the scheduler comprises a plurality of executable object schedulers, each executable object scheduler corresponds to one executable object and is used for scheduling the process of the executable object, and each process comprises a plurality of threads; each executable object scheduler comprises a plurality of task schedulers, each task scheduler corresponds to one thread and is used for scheduling the process, and each process comprises a plurality of tasks.
According to the method of the first aspect of the present invention, the activity graph comprises a plurality of execution nodes and a plurality of edges connecting the execution nodes, wherein the edges in the activity graph represent execution logic between the execution nodes; in the simulation process, after each execution node finishes executing, a Token is sent to each edge which is output subsequently, and before each execution node starts executing, each edge which is input in the preamble of each execution node comprises the Token.
According to the method of the first aspect of the present invention, the scheduling each task in the simulation process by the scheduler specifically includes: the virtual machine controls the execution scheduling of the schedulers, polls the schedulers in sequence according to a linear sequence, and finishes the execution scheduling when all the schedulers finish the execution scheduling; the scheduler schedules the next executed process according to the linear sequence or the random sequence, allocates a time slice to each process, and finishes the execution scheduling when all the processes finish the respective execution scheduling; each process has an independent data space, in the time slice of each process, each thread in the plurality of threads included in the process is allocated with a sub-segment for executing each task in the thread, and the scheduling of the plurality of threads included in the process is executed according to the linear order or the random order.
According to the method of the first aspect of the present invention, executing each task in the thread specifically includes: in the task execution scheduling in the thread, a ready queue, an execution queue and a waiting queue are maintained for each task, and each task has a ready state, an execution state, a waiting state and a completion state; when scheduling is executed, whether an executable task exists in the execution queue is detected, and if yes, the task is directly executed; if not, detecting whether a ready task exists in the ready queue, and if so, putting the ready task into the execution queue; and when the ready queue, the execution queue and the waiting queue are all empty, the task scheduling of the thread is completed.
According to the method of the first aspect of the present invention, in task execution scheduling in the thread, a newly created task is in the thread state, when the newly created task meets an execution condition through scheduling, the newly created task is converted into the execution state, when an executable task in the execution queue overflows, the newly created task is put into the waiting queue and is converted into the waiting state, after the newly created task is executed, the state of the newly created task is changed into the completion state, and the virtual machine executes a deletion operation on the task in the completion state.
According to the method of the first aspect of the present invention, in the task execution scheduling in the thread, a preparation queue is further maintained for each task, and when the virtual machine is initialized, a plurality of start nodes are placed in the preparation queue in a reverse order, so that the execution logic of the plurality of start nodes meets the definition specification of the UML activity diagram or the SysML activity diagram.
According to the method of the first aspect of the present invention, when the subsequent output node of any node is a plurality of nodes, it is determined whether there is a sequence between the plurality of subsequent output nodes, and if so, the node tasks are executed according to the sequence; and if not, establishing a thread for each subsequent output node, and executing the newly established thread updating node task in parallel.
The invention discloses a simulation scheduling system facing to an activity diagram in a second aspect. The activity map is a UML activity map or a SysML activity map, and the system comprises: a simulation unit configured to: analyzing a plurality of executable objects from the activity diagram, and determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process; a scheduler configured to: scheduling each task in the simulation process by using a scheduler; wherein: the scheduler comprises a plurality of executable object schedulers, each executable object scheduler corresponds to one executable object and is used for scheduling the process of the executable object, and each process comprises a plurality of threads; each executable object scheduler comprises a plurality of task schedulers, each task scheduler corresponds to one thread and is used for scheduling one process, and each process comprises a plurality of tasks.
According to the system of the second aspect of the invention, the activity graph comprises a plurality of execution nodes and a plurality of edges connecting each execution node, wherein the edges in the activity graph represent execution logic between the execution nodes; in the simulation process, after each execution node finishes executing, a Token is sent to each edge which is output subsequently, and before each execution node starts executing, each edge which is input in the preamble of each execution node comprises the Token.
According to the system of the second aspect of the present invention, the scheduling each task in the simulation process by the scheduler specifically includes: the virtual machine controls the execution scheduling of the schedulers, polls the schedulers in sequence according to a linear sequence, and finishes the execution scheduling when all the schedulers finish the execution scheduling;
the scheduler schedules the next executed process according to the linear sequence or the random sequence, allocates a time slice to each process, and finishes the execution scheduling when all the processes finish the respective execution scheduling; each process has an independent data space, in the time slice of each process, each thread in the plurality of threads included in the process is allocated with a sub-segment for executing each task in the thread, and the scheduling of the plurality of threads included in the process is executed according to the linear order or the random order.
According to the system of the second aspect of the present invention, executing each task in the thread specifically includes: in the task execution scheduling in the thread, a ready queue, an execution queue and a waiting queue are maintained for each task, and each task has a ready state, an execution state, a waiting state and a completion state; when scheduling is executed, whether an executable task exists in the execution queue is detected, and if yes, the task is directly executed; if not, detecting whether a ready task exists in the ready queue, and if so, putting the ready task into the execution queue; and when the ready queue, the execution queue and the waiting queue are all empty, the task scheduling of the thread is completed.
According to the system of the second aspect of the present invention, in task execution scheduling in the thread, a newly created task is in the thread state, when the newly created task meets an execution condition through scheduling, the newly created task is converted into the execution state, when an executable task in the execution queue overflows, the newly created task is put into the waiting queue and is converted into the waiting state, after the newly created task is executed, the state of the newly created task is changed into the completion state, and the virtual machine executes a deletion operation on the task in the completion state.
According to the system of the second aspect of the present invention, in the task execution scheduling in the thread, a preparation queue is further maintained for each task, and when the virtual machine is initialized, a plurality of start nodes are placed in the preparation queue in a reverse order, so that the execution logic of the plurality of start nodes meets the definition specification of the UML activity diagram or the SysML activity diagram.
According to the system of the second aspect of the present invention, when the subsequent output node of any node is a plurality of nodes, it is determined whether there is a sequence between the plurality of subsequent output nodes, and if there is a sequence, the node task is executed according to the sequence; and if not, establishing a thread for each subsequent output node, and executing the newly established thread updating node task in parallel.
A third aspect of the invention discloses an electronic device. The electronic device includes a memory and a processor, where the memory stores a computer program, and the processor implements the steps in the activity diagram-oriented simulation scheduling method according to any one of the first aspect of the present disclosure when executing the computer program.
A fourth aspect of the invention discloses a computer-readable storage medium. The computer readable storage medium has stored thereon a computer program which, when being executed by a processor, implements the steps of a method for activity graph-oriented simulation scheduling according to any one of the first aspect of the present disclosure.
In summary, the technical scheme provided by the invention provides a simulation scheduling scheme facing to the activity diagram from the perspective of actual requirements and application, solves the problems of recursive call, multithreading support, simulation breakpoint debugging and the like in the prior art, has good expansibility, and can be used for complex UML and SysML activity diagram simulation.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description in the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of a simulation schedule according to an embodiment of the present invention;
FIGS. 2a-2c are exemplary activity diagrams for characterizing Token passing directions according to embodiments of the present invention;
FIG. 3 is a schematic diagram of a virtual machine according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating task execution on various time slices, according to an embodiment of the present invention;
fig. 5 is a block diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention discloses a simulation scheduling method facing to an activity diagram in a first aspect. The activity map is a UML activity map or a SysML activity map, and the method comprises the following steps: analyzing a plurality of executable objects from the active graph, determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process, and scheduling each task in the simulation process by using a scheduler; wherein: the scheduler comprises a plurality of executable object schedulers, each executable object scheduler corresponds to one executable object and is used for scheduling the process of the executable object, and each process comprises a plurality of threads; each executable object scheduler comprises a plurality of task schedulers, each task scheduler corresponds to one thread and is used for scheduling the process, and each process comprises a plurality of tasks.
The operation flow of the UML and SysML simulation engines is divided into three key steps, wherein the first step is that a user provides a UML or SysML model to the simulation engine, and the simulation engine carries out primary analysis on the model to generate an executable object list which represents various node elements in the simulation graph model. Secondly, the executable object is analyzed according to the simulation execution condition to generate the next executable task and simulation data needed in the simulation. After the steps are completed, the tasks in the simulation are finally scheduled by a simulation scheduling algorithm, and the operation logics of various simulation models are realized. There are related technologies for simulation model analysis, and the solution is not limited to the following simulation engine to implement the analysis process, and any method in the prior art may be used to implement the analysis of the simulation model.
FIG. 1 is a schematic diagram of a simulation schedule according to an embodiment of the present invention; as shown in FIG. 1, a simulation engine receives an input model (live graph), internally generates executable objects through parsing, and generates a scheduler from the executable objects for simulation. The key structure of the simulation execution is the scheduler. The scheduler is internally composed of a plurality of executable object schedulers, and each executable object scheduler is used for scheduling and managing the executable objects analyzed by the simulation engine. Each scheduler may also have a child scheduler for satisfying the execution of the simulation model calls to each other. In order to strengthen the scheduling management capability of the executable objects, a plurality of task schedulers are arranged in each executable object scheduler to simulate the running effect of executing tasks on a plurality of threads. And when the scheduler finishes executing all tasks, representing that the simulation of the model corresponding to the scheduler is finished, and representing that all the simulations are finished after all the schedulers finish executing. Important structures associated with the scheduler runtime are task generators and data generators. The task generator generates a next task to be executed according to the execution condition of the current simulation, and the data generator analyzes the executable object to obtain corresponding data information when the data is needed by the simulation so as to support the simulation operation.
In some embodiments, the activity graph includes a number of execution nodes and a number of edges connecting each execution node, the edges in the activity graph characterizing execution logic between the execution nodes; in the simulation process, after each execution node finishes executing, a Token is sent to each edge which is output subsequently, and before each execution node starts executing, each edge which is input in the preamble of each execution node comprises the Token.
In the activity graph simulation, a key concept is Token (Token), a running node sends tokens to all subsequent output edges, and for a node to be executed, the node can execute only after all input edges have tokens. For the activity graph shown in fig. 2a, after the node1 executes, the number of tokens on the edge of the node3 is not enough, so that after the node2 executes and issues the tokens, all the edges of the node3 satisfy the token requirements before the operation can be performed. For the activity graph shown in fig. 2b, after the node1 completes execution, tokens are sequentially issued to the subsequent two edges, so that the branch of the node2 can be continuously executed after the execution of the branch of the node2 is completed, and the execution of the node is sequential and not parallel. For the activity diagram shown in fig. 2c, branch (Fork) nodes are used, thus resulting in parallel execution of the activity diagram, the execution of nodes 2 and 3 no longer being in order, and will be executed simultaneously.
In some embodiments, the scheduling, by the scheduler, each task in the simulation process specifically includes: controlling the execution scheduling of a plurality of schedulers by a virtual machine, sequentially polling each scheduler by the virtual machine according to a linear sequence, and finishing the execution scheduling of the virtual machine when all the schedulers finish the execution scheduling of the schedulers; the scheduler schedules the next executed process according to the linear sequence or the random sequence, allocates a time slice to each process, and finishes the execution scheduling when all the processes finish the respective execution scheduling; each process has an independent data space, in the time slice of each process, each thread in the plurality of threads included in the process is allocated with a sub-segment for executing each task in the thread, and the scheduling of the plurality of threads included in the process is executed according to the linear order or the random order.
In order to more intuitively understand the concept of the simulation scheduling algorithm, the structure of the simulation scheduler and the structure of the operating system are mapped, so that the understanding and the development are facilitated. The concept corresponding to the scheduler is a virtual machine, the concept corresponding to the executable object scheduler is a virtual process, and the concept corresponding to the task scheduler is a virtual thread. All simulation scheduling is performed inside the virtual machine. The virtual machine provides an independent execution environment, utilizes the concepts of virtualization and layering to respectively simulate the execution environments of various UML and SysML models, and enables simulation of various models with different logics. Various processes are arranged in the virtual machine to simulate the parallel execution of a plurality of simulation executable objects, and the virtual processes are used for scheduling and managing the executable objects. Virtual threads are arranged in the virtual processes and represent multithreading concepts in executable objects, such as multithreading models corresponding to Fork nodes. The virtual machine, the virtual process and the virtual thread jointly form a simulation scheduler.
Specifically, the emulation run is performed by an emulation virtual machine (as shown in FIG. 3), which is the top-most structure of the emulation run. The simulation virtual machine simulates the structure of a computer system and schedules virtual processes, virtual threads and tasks running inside so as to enable the virtual processes, the virtual threads and the tasks to run according to expected logic. The emulated virtual machine provides the emulation functionality of various executable objects externally. The inside of the simulation virtual machine is composed of a plurality of schedulers, and the schedulers are responsible for managing the execution process of the virtual process. Each scheduler is responsible for different scheduling logics, so that different virtual process running logics can be divided, and the scheduling logics can be conveniently expanded and the internal virtual processes can be conveniently managed. The simulation structure corresponding to each actual simulation graph, such as an activity graph, state graph, etc., is a virtual process. Each virtual process represents the execution of a graph. Processes may have parent-child relationships between them, representing the running logic of the graph call graph. Each process has a plurality of virtual threads for executing tasks. The parent process must wait for the child process to finish, but the parent process can directly end the running of the child process through a termination method to forcibly terminate the simulation.
In some embodiments, executing each task in the thread specifically includes:
in the task execution scheduling in the thread, a ready queue, an execution queue and a waiting queue are maintained for each task, and each task has a ready state, an execution state, a waiting state and a completion state; when scheduling is executed, whether an executable task exists in the execution queue is detected, and if yes, the task is directly executed; if not, detecting whether a ready task exists in the ready queue, and if so, putting the ready task into the execution queue; and when the ready queue, the execution queue and the waiting queue are all empty, the task scheduling of the thread is completed.
In some embodiments, in task execution scheduling in the thread, a newly created task is in the ready state, the newly created task is converted into the execution state when the newly created task meets an execution condition through scheduling, when an executable task in the execution queue overflows, the newly created task is placed in the wait queue and is converted into the wait state, after the newly created task is executed, the state of the newly created task is changed into the completion state, and the virtual machine executes a deletion operation on the task in the completion state.
The virtual thread has the responsibility of task execution and management, and is the lowest abstract concept of the simulation virtual machine. The core concept of virtual threading is to simulate multithreading using a single thread. The virtual thread is internally provided with a plurality of task queues which respectively represent tasks in different states, wherein the tasks comprise a Ready queue, a Changed queue, a Prepared queue, a Running queue and a Waiting queue, and the tasks are subjected to state conversion management according to specified logic. And after all tasks of the thread are executed, destroying the tasks by the upper virtual process. The actual simulation object that executes is a Task (Task). The task of simulating the virtual machine is to execute and manage the task and output a required result. The structure of the task corresponding to the simulation model is the execution node in each graph. Each task has 5 states, namely Ready, running and Waiting, and after corresponding conditions are met, the tasks in different states are managed by the virtual threads. The virtual machine execution adopts the concept of fragmentation execution, and a plurality of schedulers in the virtual machine have the execution time of one fragment at a time. In the scheduler (tick indicates a time slice as shown in fig. 4), each virtual process also has a corresponding execution slice. In a virtual process, there is one execution fragment per thread. In the virtual thread, each task in Running state also has an execution segment.
The operation process of the simulation virtual machine mainly manages the simulation schedulers, the virtual machine polls each scheduler in sequence according to a linear sequence, and if all the schedulers finish execution, the virtual machine finishes execution. Since different virtual processes require different scheduling logic, different schedulers are abstracted from the virtual machines to implement different scheduling algorithms.
The main responsibility of the scheduler is the management of the virtual processes. The strategies for selecting the next executed virtual process by different schedulers are different, and the scheduling can be performed according to a linear order or a random order. Each virtual process has a segment for task execution. When all the virtual processes are completed, the execution of the scheduler is finished.
The virtual process is responsible for managing virtual threads, a plurality of threads can be arranged in one process, and each process has an independent data space, so that data interference is avoided. The virtual process assigns a segment to each thread at each time slice to execute the tasks in the thread. The management of threads can be performed in a linear or random order as required to meet the logic simulation requirements of different UML and SysML models. When all threads finish executing, the execution of the process is finished.
Virtual threads are responsible for managing tasks, including Ready queues, running queues, and Waiting queues. There are 5 states for a task, namely Ready state, running state, waiting state and Finished state. And each time the virtual thread is executed in the current segment, traversing the queue according to the logic of the lower graph, and executing the corresponding task. After the virtual machine is started to run, firstly detecting a Running queue to see whether an executable task exists, if the executable task exists, executing the task, and if the task state is changed after the execution, changing the state of the task to a target state after the execution is finished. And if the Running queue is empty, starting to detect the Ready queue, and if the Ready queue is not empty, taking out a task and putting the task into the Running queue. If the thread is still in the executing state, the thread returns to the beginning to be recycled. When the Running queue, the Ready queue and the Waiting queue are all empty, the virtual thread completes execution.
Each Task is divided into a Ready state, a Running state, a Waiting state, and a Finished state. The task just created is in Ready state and after the condition is met, it is converted by the scheduler into Running state. The execution of the task can convert the task into a Waiting state or a Finished state, and the state conversion of other parts is completed by the virtual machine depending on the execution logic in the task. When the task is in the Waiting state, the task can be converted into the Running state from the Waiting state only after the corresponding event is received by the scheduler. When the task is in Finished state, the virtual machine will delete the task. Complete task running logic is formed by the state conversion.
In some embodiments, in the task execution scheduling in the thread, a preparation queue is further maintained for each task, and when the virtual machine is initialized, a plurality of start nodes are placed in the preparation queue in a reverse order, so that execution logic of the plurality of start nodes meets a definition specification of the UML activity diagram or the SysML activity diagram.
In some embodiments, when the subsequent output node of any node is a plurality of nodes, judging whether the plurality of subsequent output nodes have a sequence, and if so, executing the node task according to the sequence; and if not, establishing a thread for each subsequent output node, and executing the newly established thread updating node task in parallel.
When the initialized virtual machine runs, a plurality of initial node tasks can be placed into the prepended queue according to the reverse order, then the simulated virtual machine runs according to the normal logic, a plurality of initial node execution logics can be obtained, and the specifications defined by the UML and SysML models are met. For the situation shown in the following figure, when Node1 finishes operation, logic is executed according to the sequence of the branch creation model when a plurality of nodes are subsequently operated. In order to meet the requirement that Node2 is put into a Running queue, node3 and other subsequent nodes are put into a Prepared queue to continue simulation execution, and the simulation requirements of multiple subsequent nodes can be met. If the Fork node encounters a plurality of subsequent parallel branches, the Virtual Process is informed to create a plurality of Virtual threads as required to simulate the multithreading operation condition, so as to meet the requirement of parallel execution.
In summary, the method of the first aspect of the present invention considers the support of the simulation scheduling to the multithreading, and can provide higher efficiency; meanwhile, all inherent problems related to simulation in the open source method are solved, and a foundation is provided for simulation; furthermore, the method can easily expand the functions of breakpoint debugging and single step debugging, and can improve the efficiency of system simulation verification by designers; in addition, the method has high logic expansibility, and each component can be customized according to actual requirements so as to meet the requirements of simulating and executing logic under different conditions. For example, by changing the execution logic of the task scheduler, the active graph simulation scheduling can be switched to the state graph simulation scheduling, or the scheduler can be modified, so that the sequential execution can be switched to the asynchronous execution, and the multithreading support is completed.
The invention discloses a simulation scheduling system facing to an activity diagram in a second aspect. The activity map is a UML activity map or a SysML activity map, and the system comprises: a simulation unit configured to: analyzing a plurality of executable objects from the activity diagram, and determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process; a scheduler configured to: scheduling each task in the simulation process by using a scheduler; wherein: the scheduler comprises a plurality of executable object schedulers, each executable object scheduler corresponds to one executable object and is used for scheduling the process of the executable object, and each process comprises a plurality of threads; each executable object scheduler comprises a plurality of task schedulers, each task scheduler corresponds to one thread and is used for scheduling one process, and each process comprises a plurality of tasks.
According to the system of the second aspect of the present invention, the activity graph comprises a plurality of execution nodes and a plurality of edges connecting the execution nodes, wherein the edges in the activity graph represent execution logic between the execution nodes; in the simulation process, after each execution node finishes executing, a Token is sent to each edge which is output subsequently, and before each execution node starts executing, each edge which is input in the preamble of each execution node comprises the Token.
According to the system of the second aspect of the present invention, the scheduling each task in the simulation process by using the scheduler specifically includes: controlling the execution scheduling of a plurality of schedulers by a virtual machine, sequentially polling each scheduler by the virtual machine according to a linear sequence, and finishing the execution scheduling of the virtual machine when all the schedulers finish the execution scheduling of the schedulers;
the scheduler schedules the next executed process according to the linear sequence or the random sequence, allocates a time slice to each process, and finishes the execution scheduling when all the processes finish the respective execution scheduling; each process has an independent data space, in the time slice of each process, each thread in the plurality of threads included in the process is allocated with a sub-segment for executing each task in the thread, and the scheduling of the plurality of threads included in the process is executed according to the linear order or the random order.
According to the system of the second aspect of the present invention, executing each task in the thread specifically includes: in the task execution scheduling in the thread, a ready queue, an execution queue and a waiting queue are maintained for each task, and each task has a ready state, an execution state, a waiting state and a completion state; when scheduling is executed, whether an executable task exists in the execution queue is detected, and if yes, the task is directly executed; if not, detecting whether a ready task exists in the ready queue, and if so, putting the ready task into the execution queue; and when the ready queue, the execution queue and the waiting queue are all empty, the task scheduling of the thread is completed.
According to the system of the second aspect of the present invention, in task execution scheduling in the thread, a newly created task is in the thread state, when the newly created task meets an execution condition through scheduling, the newly created task is converted into the execution state, when an executable task in the execution queue overflows, the newly created task is put into the waiting queue and is converted into the waiting state, after the newly created task is executed, the state of the newly created task is changed into the completion state, and the virtual machine executes a deletion operation on the task in the completion state.
According to the system of the second aspect of the present invention, in the task execution scheduling in the thread, a preparation queue is further maintained for each task, and when the virtual machine is initialized, a plurality of start nodes are placed in the preparation queue in a reverse order, so that the execution logic of the plurality of start nodes meets the definition specification of the UML activity diagram or the SysML activity diagram.
According to the system of the second aspect of the present invention, when the subsequent output node of any node is a plurality of nodes, it is determined whether there is a sequence between the plurality of subsequent output nodes, and if there is a sequence, the node task is executed according to the sequence; if not, a thread is newly established for each subsequent output node, and the newly established thread updating node task is executed in parallel.
A third aspect of the invention discloses an electronic device. The electronic device comprises a memory and a processor, the memory stores a computer program, and the processor implements the steps of the activity diagram-oriented simulation scheduling method according to any one of the first aspect of the present disclosure when executing the computer program.
Fig. 5 is a block diagram of an electronic device according to an embodiment of the present invention, and as shown in fig. 5, the electronic device includes a processor, a memory, a communication interface, a display screen, and an input device, which are connected by a system bus. Wherein the processor of the electronic device is configured to provide computing and control capabilities. The memory of the electronic equipment comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The communication interface of the electronic device is used for carrying out wired or wireless communication with an external terminal, and the wireless communication can be realized through WIFI, an operator network, near Field Communication (NFC) or other technologies. The display screen of the electronic equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the electronic equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on the shell of the electronic equipment, an external keyboard, a touch pad or a mouse and the like.
It will be understood by those skilled in the art that the structure shown in fig. 5 is only a partial block diagram related to the technical solution of the present disclosure, and does not constitute a limitation of the electronic device to which the solution of the present application is applied, and a specific electronic device may include more or less components than those shown in the drawings, or combine some components, or have a different arrangement of components.
A fourth aspect of the invention discloses a computer-readable storage medium. The computer readable storage medium has stored thereon a computer program which, when being executed by a processor, implements the steps of a method for activity graph-oriented simulation scheduling according to any one of the first aspect of the present disclosure.
In summary, the technical scheme provided by the invention provides an activity diagram-oriented simulation scheduling scheme from the perspective of actual requirements and applications, solves the problems of recursive invocation, multithreading support, simulation breakpoint debugging and the like in the prior art, has good expansibility, and can be used for complex UML and SysML activity diagram simulation.
It should be noted that the technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, the scope of the present description should be considered. The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent application shall be subject to the appended claims.
Claims (10)
1. An activity graph-oriented simulation scheduling method, wherein the activity graph is a UML activity graph or a SysML activity graph, and the method comprises the following steps:
analyzing a plurality of executable objects from the activity diagram, determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process, and scheduling each task in the simulation process by using a scheduler; wherein:
the scheduler comprises a plurality of executable object schedulers, each executable object scheduler corresponds to one executable object and is used for scheduling the process of the executable object, and each process comprises a plurality of threads; each executable object scheduler comprises a plurality of task schedulers, each task scheduler corresponds to one thread and is used for scheduling one process, and each process comprises a plurality of tasks.
2. The method according to claim 1, wherein the active graph comprises a plurality of execution nodes and a plurality of edges connecting the execution nodes, and the edges in the active graph represent execution logic between the execution nodes; in the simulation process, after each execution node finishes executing, a Token is sent to each edge which is output subsequently, and before each execution node starts executing, each edge which is input in the preamble of each execution node comprises the Token.
3. The activity graph-oriented simulation scheduling method according to claim 2, wherein the scheduling of each task in the simulation process by the scheduler specifically comprises:
controlling the execution scheduling of a plurality of schedulers by a virtual machine, sequentially polling each scheduler by the virtual machine according to a linear sequence, and finishing the execution scheduling of the virtual machine when all the schedulers finish the execution scheduling of the schedulers;
the scheduler schedules the next executed process according to the linear sequence or the random sequence, allocates a time slice to each process, and finishes the execution scheduling when all the processes finish the respective execution scheduling;
in the time slice of each process, each thread in the plurality of threads included in the process is allocated with a sub-segment for executing each task in the thread, and the scheduling of the plurality of threads included in the process is executed according to the linear order or the random order.
4. The activity graph-oriented simulation scheduling method according to claim 3, wherein executing each task in the thread specifically comprises:
in the task execution scheduling in the thread, a ready queue, an execution queue and a waiting queue are maintained for each task, and each task has a ready state, an execution state, a waiting state and a completion state;
when scheduling is executed, whether an executable task exists in the execution queue is detected, and if yes, the task is directly executed; if not, detecting whether a ready task exists in the ready queue, and if so, putting the ready task into the execution queue; and when the ready queue, the execution queue and the waiting queue are all empty, the task scheduling of the thread is completed.
5. The activity graph-oriented simulation scheduling method according to claim 4, wherein in task execution scheduling in the thread, a newly created task is in the ready state, the newly created task is converted into the execution state when the new created task meets an execution condition through scheduling, when an executable task in the execution queue overflows, the newly created task is put into the waiting queue and is converted into the waiting state, after the newly created task is executed, the state of the newly created task is changed into the completion state, and the virtual machine executes a delete operation on the task in the completion state.
6. The method as claimed in claim 5, wherein in the task execution scheduling in the thread, a ready queue is further maintained for each task, and when the virtual machine is initialized, a plurality of start nodes are placed in the ready queue in a reverse order, so that the execution logic of the plurality of start nodes meets the definition specification of the UML activity diagram or the SysML activity diagram.
7. The activity graph-oriented simulation scheduling method according to claim 6, wherein when the subsequent output nodes of any node are a plurality of nodes, whether the plurality of subsequent output nodes have a sequence is judged, and if yes, the node tasks are executed according to the sequence; and if not, establishing a thread for each subsequent output node, and executing the newly established thread updating node task in parallel.
8. An activity graph-oriented simulation scheduling system, wherein the activity graph is a UML activity graph or a SysML activity graph, the system comprising:
a simulation unit configured to: analyzing a plurality of executable objects from the activity diagram, and determining a next executable task and required simulation data based on the executable objects so as to execute a simulation process;
a scheduler configured to: scheduling each task in the simulation process by using a scheduler; wherein: the scheduler comprises a plurality of executable object schedulers, each executable object scheduler corresponds to one executable object and is used for scheduling the process of the executable object, and each process comprises a plurality of threads; each executable object scheduler comprises a plurality of task schedulers, each task scheduler corresponds to one thread and is used for scheduling one process, and each process comprises a plurality of tasks.
9. An electronic device, characterized in that the electronic device comprises a memory and a processor, the memory stores a computer program, and the processor implements the steps of an activity graph-oriented simulation scheduling method according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of a method for activity graph-oriented simulation scheduling according to any one of claims 1 to 7.
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Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1643498A (en) * | 2002-03-22 | 2005-07-20 | 丰田自动车株式会社 | Task management device and method, operation judgment device and method, and program to be judged |
| GB201205617D0 (en) * | 2012-03-29 | 2012-05-16 | Cognovo Ltd | Control of programs in parallel processing systems |
| CN102760176A (en) * | 2011-04-29 | 2012-10-31 | 无锡江南计算技术研究所 | Hardware transaction level simulation method, engine and system |
| CN103019849A (en) * | 2012-12-31 | 2013-04-03 | 无锡城市云计算中心有限公司 | Method for managing virtual machine in cloud computing environment |
| CN104978170A (en) * | 2014-04-03 | 2015-10-14 | 中国科学院软件研究所 | Multi-agent system generating method based on graphical expression |
| CN105446795A (en) * | 2014-09-22 | 2016-03-30 | 波音公司 | Parallelization in virtual machine operation |
| CN110502211A (en) * | 2019-08-02 | 2019-11-26 | 中国航空无线电电子研究所 | A kind of AADL model construction method based on SysML module map |
| CN112559153A (en) * | 2020-12-21 | 2021-03-26 | 北京仿真中心 | Multithreading and multiprocessing integrated simulation model component scheduling method and system |
| CN112988124A (en) * | 2021-05-10 | 2021-06-18 | 湖南高至科技有限公司 | Multi-view platform-independent model system |
| CN113391903A (en) * | 2021-06-22 | 2021-09-14 | 中国工商银行股份有限公司 | Method and device for establishing schedulability model, electronic equipment and storage medium |
| CN113836754A (en) * | 2021-11-26 | 2021-12-24 | 湖南高至科技有限公司 | Multi-agent simulation modeling oriented simulation method, device, equipment and medium |
| CN114091251A (en) * | 2021-11-19 | 2022-02-25 | 中国人民解放军国防科技大学 | Simulation system and method for multi-agent group behaviors |
| CN114090185A (en) * | 2021-11-26 | 2022-02-25 | 杭州杉石科技有限公司 | Method and system for visually displaying simulation execution |
| CN114416048A (en) * | 2021-12-17 | 2022-04-29 | 北京机电工程研究所 | Method and device for determining operation logic of UML model |
-
2022
- 2022-08-09 CN CN202210948239.6A patent/CN115454590A/en active Pending
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1643498A (en) * | 2002-03-22 | 2005-07-20 | 丰田自动车株式会社 | Task management device and method, operation judgment device and method, and program to be judged |
| CN102760176A (en) * | 2011-04-29 | 2012-10-31 | 无锡江南计算技术研究所 | Hardware transaction level simulation method, engine and system |
| GB201205617D0 (en) * | 2012-03-29 | 2012-05-16 | Cognovo Ltd | Control of programs in parallel processing systems |
| CN103019849A (en) * | 2012-12-31 | 2013-04-03 | 无锡城市云计算中心有限公司 | Method for managing virtual machine in cloud computing environment |
| CN104978170A (en) * | 2014-04-03 | 2015-10-14 | 中国科学院软件研究所 | Multi-agent system generating method based on graphical expression |
| CN105446795A (en) * | 2014-09-22 | 2016-03-30 | 波音公司 | Parallelization in virtual machine operation |
| CN110502211A (en) * | 2019-08-02 | 2019-11-26 | 中国航空无线电电子研究所 | A kind of AADL model construction method based on SysML module map |
| CN112559153A (en) * | 2020-12-21 | 2021-03-26 | 北京仿真中心 | Multithreading and multiprocessing integrated simulation model component scheduling method and system |
| CN112988124A (en) * | 2021-05-10 | 2021-06-18 | 湖南高至科技有限公司 | Multi-view platform-independent model system |
| CN113391903A (en) * | 2021-06-22 | 2021-09-14 | 中国工商银行股份有限公司 | Method and device for establishing schedulability model, electronic equipment and storage medium |
| CN114091251A (en) * | 2021-11-19 | 2022-02-25 | 中国人民解放军国防科技大学 | Simulation system and method for multi-agent group behaviors |
| CN113836754A (en) * | 2021-11-26 | 2021-12-24 | 湖南高至科技有限公司 | Multi-agent simulation modeling oriented simulation method, device, equipment and medium |
| CN114090185A (en) * | 2021-11-26 | 2022-02-25 | 杭州杉石科技有限公司 | Method and system for visually displaying simulation execution |
| CN114416048A (en) * | 2021-12-17 | 2022-04-29 | 北京机电工程研究所 | Method and device for determining operation logic of UML model |
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