CN115454192A - Two-bus circuit - Google Patents

Two-bus circuit Download PDF

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Publication number
CN115454192A
CN115454192A CN202211235313.6A CN202211235313A CN115454192A CN 115454192 A CN115454192 A CN 115454192A CN 202211235313 A CN202211235313 A CN 202211235313A CN 115454192 A CN115454192 A CN 115454192A
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China
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transistor
triode
resistor
collector
module
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CN202211235313.6A
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CN115454192B (en
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不公告发明人
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Yingzhi Technology Changzhou Co ltd
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Yingzhi Technology Changzhou Co ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention discloses a two-bus circuit which comprises an output module, a discharge module, a code returning detection module, a short-circuit protection module and an overcurrent protection module, wherein the input end of the output module is connected with a power supply, the output end of the output module is provided with two buses, the two buses comprise a first bus and a second bus, the output module is connected with the discharge module, the code returning detection module is connected with the two buses in parallel, the short-circuit protection module is connected with the output module, and the overcurrent protection module is connected with the output module. The two-bus circuit of the invention uses the N-type MOSFET, and can meet the requirements of various bus voltages and power levels; the N-type MOSFET is designed to be the negative end of the two buses, so that the driving is convenient.

Description

Two-bus circuit
Technical Field
The present invention relates to the field of bus technologies, and more particularly, to a two-bus circuit.
Background
The two-bus technology combines the power line and the signal line into one, can meet the power supply requirement and the communication requirement, saves the construction and cable cost, brings great convenience to site construction and later maintenance, and has wide application in the fields of fire fighting, instruments, sensors, industrial control and the like. P-type MOSFETs are commonly used in the two-bus technology, however, P-type MOSFETs are available in the market in a few models, are expensive, have incomplete parameters, and cause difficulties in the application of the two-bus technology.
Disclosure of Invention
To solve the above problems, the present invention provides a two-bus circuit using N-type MOSFETs to meet the requirements of various bus voltages and power levels.
In order to achieve the purpose, the technical scheme of the invention is as follows:
the utility model provides a two bus circuit, includes output module, discharge module, returns the sign indicating number detection module, output module's input connection power, output module's output is two buses, two buses include first bus and second bus, output module connects discharge module, return the sign indicating number detection module with two buses are parallelly connected.
The output module comprises a plurality of switching tubes, a plurality of triodes, a first voltage stabilizing diode and a first resistor, wherein a first bus is connected with a first power supply, a first input end is connected with a grid electrode of the first switching tube, a source electrode of the first switching tube is grounded, a drain electrode of the first switching tube is connected with a base electrode of the first triode, a base electrode of the first triode is connected with the first bus, an emitting electrode of the first triode is grounded, a collecting electrode of the first triode is connected with the first bus, a base electrode of the second triode and a base electrode of the third triode are connected with a collecting electrode of the first triode, a collecting electrode of the second triode is grounded, an emitting electrode of the second triode is connected with a grid electrode of the second switching tube, a collecting electrode of the third triode is connected with the first bus, a base electrode of the third triode is connected with a base electrode of the fourth triode, a collecting electrode of the fourth triode is connected with a collecting electrode of the third triode, an emitting electrode of the fourth triode is connected with a grid electrode of the second switching tube, a source electrode of the second switching tube is grounded through the first resistor, a drain electrode of the second switching tube is connected with the second switching tube, a collecting electrode of the second switching tube is connected with the second switching tube, a cathode of the first voltage stabilizing diode is connected with a cathode of the first voltage stabilizing diode, and the first diode is grounded.
The output module further comprises a fifth triode, a first capacitor, a third switching tube and a plurality of diodes, wherein the anode of the first diode is connected with the cathode of the first voltage-stabilizing diode, the cathode of the first diode is connected with the first end of the first capacitor, the second end of the first capacitor is connected with the drain electrode of the second switching tube, the source electrode of the third switching tube is connected with the second bus, the cathode of the second diode is connected with the gate electrode of the third switching tube, the anode of the second diode is connected with the source electrode of the third switching tube, the drain electrode of the third switching tube is connected with the cathode of the third diode, the anode of the third diode is connected with the first output end, the first input end is connected with the base electrode of the fifth triode, the emitter electrode of the fifth triode is grounded, and the collector electrode of the fifth triode is connected with the gate electrode of the third switching tube and the first end of the first capacitor.
The above discharging module comprises a plurality of triodes, the second input end is connected with the base of the sixth triode, the emitting electrode of the sixth triode is grounded, the collecting electrode of the sixth triode is connected with the collecting electrode of the seventh triode, the emitting electrode of the seventh triode is connected with the first power supply, the emitting electrode of the eighth triode is connected with the base electrode of the seventh triode, the base electrode of the eighth triode is connected with the emitting electrode of the ninth triode, the base electrode of the ninth triode is connected with the collecting electrode of the seventh triode, the collecting electrode of the eighth triode is connected with the collecting electrode of the ninth triode, the first output end is connected with the base electrode of the seventh triode.
In a specific embodiment, the above two-bus circuit further includes a code returning determination module, the code returning determination module includes a thirteenth diode, a second resistor, a third resistor, a fourth switch tube and a fourth diode, a third input end is connected to a base of the thirteenth diode, an emitter of the thirteenth diode is grounded, a collector of the thirteenth diode is connected to a gate of the fourth switch tube through the second resistor, a gate of the fourth switch tube is connected to the first bus through the third resistor, the second bus is connected to an anode of the fourth diode, a cathode of the fourth diode is connected to a source of the fourth switch tube, and a drain of the fourth switch tube is connected to the first intermediate end.
The code returning detection module comprises a plurality of triodes, a plurality of resistors and a second voltage stabilizing diode, wherein the first middle end is connected with an emitting electrode of an eleventh triode, a base electrode of the eleventh triode is connected with an emitting electrode of a twelfth triode, a collecting electrode of the twelfth triode is connected with a collecting electrode of the eleventh triode, a base electrode of the twelfth triode is connected with an anode of the second voltage stabilizing diode, a cathode of the second voltage stabilizing diode is connected with the first power supply, a first end of a fourth resistor is connected with the base electrode of the twelfth triode, a second end of the fourth resistor is grounded, a collecting electrode of the twelfth triode is connected with a first end of a fifth resistor, a second end of the fifth resistor is grounded, and a first end of the fifth resistor is connected with the second output end.
The two-bus circuit further comprises a short-circuit protection module, and the short-circuit protection module is connected with the output module.
The short-circuit protection module comprises a plurality of triodes and a plurality of resistors, wherein a collector electrode of a thirteenth triode and a base electrode of a fourteenth triode are connected to a third output end, a second power supply is connected to a collector electrode of the thirteenth triode, an emitter electrode of the thirteenth triode is grounded, a base electrode of the thirteenth triode is connected to a collector electrode of the fourteenth triode, an emitter electrode of the fourteenth triode is connected to a grid electrode of a first switch tube, a collector electrode of the fourteenth triode is grounded, a first end of a sixth resistor is connected to a collector electrode of the fourteenth triode, a second end of the sixth resistor is grounded, a first end of a sixth resistor is connected to a first end of a seventh resistor, and a second end of the seventh resistor is connected to a source electrode of a second switch tube.
In a specific embodiment, the short-circuit protection module further includes a fifth diode, an anode of the fifth diode is connected to the third output terminal, and a cathode of the fifth diode is connected to a collector of the thirteenth triode.
The two-bus circuit further comprises an overcurrent protection module, and the overcurrent protection module is connected with the output module.
The overcurrent protection module comprises a first operational amplifier, the source electrode of the second switching tube is connected with the positive input end of the first operational amplifier, the negative input end of the first operational amplifier is grounded, and the output end of the first operational amplifier is connected with the fourth output end.
In a specific embodiment, the code-returning detection module includes a plurality of triodes, a plurality of resistors, and a third zener diode, the base of a fifteenth triode is connected to the fourth input terminal, the emitter of the fifteenth triode is grounded, the collector of the fifteenth triode is connected to the base of the sixteenth triode, the emitter of the sixteenth triode is connected to the first power source and the cathode of the third zener diode, the collector of the sixteenth triode is connected to the anode of the third zener diode, the first output terminal is connected to the emitter of the seventeenth triode, the base of the seventeenth triode is connected to the emitter of the eighteenth triode, the base of the eighteenth triode is connected to the anode of the third zener diode, the collector of the eighteenth triode is connected to the collector of the seventeenth triode, the first end of an eighth resistor is connected to the base of the eighteenth triode, the second end of the eighth resistor is grounded, the collector of the seventeenth triode is connected to the first end of a ninth resistor, the second end of the ninth resistor is grounded, and the first end of the ninth resistor is connected to the fifth output terminal.
In a specific embodiment, the discharging module includes a nineteenth triode, a twentieth triode, a fourth zener diode, and a fifth switching tube, wherein a fifth input terminal is connected to a base of the nineteenth triode, an emitter of the nineteenth triode is grounded, a collector of the nineteenth triode is connected to a collector of the twentieth triode, an emitter of the twentieth triode is connected to the first power supply, a base of the twentieth triode is connected to a source of the fifth switching tube, a gate of the fifth switching tube is connected to a collector of the twentieth triode, a drain of the fifth switching tube is connected to the first output terminal, a cathode of the fourth zener diode is connected to the source of the fifth switching tube, and an anode of the fourth zener diode is connected to a gate of the fifth switching tube.
In a specific embodiment, the above discharging module includes a twenty-first triode and a sixth switching tube, a sixth input terminal is connected to the base of the twenty-first triode, the emitter of the twenty-first triode is grounded, the collector of the twenty-first triode is connected to the gate of the sixth switching tube, the source of the sixth switching tube is connected to the first power supply, and the drain of the sixth switching tube is connected to the first output terminal.
The first switch tube and the second switch tube are N-type MOSFET.
The third switch tube is an N-type MOSFET.
The fourth switch tube is a P-type MOSFET.
The invention also provides a two-bus circuit, which comprises a plurality of the two-bus circuits.
The two-bus circuit has the beneficial effects that the N-type MOSFET is used, so that the two-bus circuit can meet the requirements of various bus voltages and power levels; the N-type MOSFET is designed to the negative end of the two buses, so that the driving is convenient; meanwhile, the short-circuit protection module and the overcurrent protection module are arranged in the circuit, so that the safety and the reliability of the circuit are improved.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a block diagram of a first embodiment of a two-bus circuit according to the present invention.
Fig. 2 is a circuit diagram of a two-bus circuit shown in fig. 1.
Fig. 3 is a circuit diagram of the output module 11 in fig. 2.
Fig. 4 is a circuit diagram of a first embodiment of the discharge module 21 in fig. 1.
Fig. 5 is a circuit diagram of a second embodiment of the discharge module 21 in fig. 1.
Fig. 6 is a circuit diagram of a third embodiment of the discharge module 21 in fig. 1.
Fig. 7 is a circuit diagram of the echo code detecting module 31 in fig. 2.
Fig. 8 is a circuit diagram of the output module 11 and the short-circuit protection module 41 in fig. 2.
Fig. 9 is a circuit schematic diagram of the output module 11 and the overcurrent protection module 51 in fig. 2.
FIG. 10 is a block diagram of a second embodiment of a two-bus circuit according to the present invention.
Fig. 11 is a circuit diagram of the output module 12 in fig. 10.
Fig. 12 is a circuit diagram of the code return determination module 62 in fig. 10.
Fig. 13 is a circuit diagram of the echo code detecting module 32 in fig. 10.
Fig. 14 is a circuit schematic diagram of the output module 12 and the short-circuit protection module 42 of fig. 10.
Detailed Description
In order to make the purpose and technical solution of the embodiments of the present invention clearer, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It should be apparent that the described embodiments are only some of the embodiments of the present invention, and not all of them. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
Fig. 1 is a block diagram of a first embodiment of a two-bus circuit according to the present invention, in which only one pair of two buses, including a bus Ln11 and a bus Ln12, is used. As shown in fig. 1, the two-bus circuit includes an output module 11, a discharging module 21, a code-returning detection module 31, a short-circuit protection module 41, and an overcurrent protection module 51. The input end of the output module 11 is connected with a power supply Vcc1, the output ends of the output module 11 are a bus Ln11 and a bus Ln12, and the output module 11 controls the voltage output on the two buses; the output module 11 is connected to the discharging module 21, and the discharging module 21 is used for rapidly pulling up the voltage on the bus Ln12 to the voltage Vcc1 and discharging the energy in the load; the two buses Ln11 and Ln12 are connected to the code returning detection module 31, and the code returning detection module 31 determines whether the devices are communicating normally by detecting code returning currents of the devices connected in parallel between the two buses; the output module 11 is connected with the short-circuit protection module 41 and the over-current protection module 51, the short-circuit protection module 41 has a function of ensuring that a switching tube is turned off to perform short-circuit protection on a circuit when a large current flows, and the over-current protection module 51 detects an output current to perform over-current protection on the circuit. Optionally, the short-circuit protection module 41 and the over-current protection module 51 are connected to the same end of the output module 11.
FIG. 2 is a circuit diagram of a first embodiment of a two bus circuit of the present invention shown in FIG. 1. As shown IN fig. 2, the input terminal of the output module 11 is a port IN1, the port IN1 is an I/O port of the single chip microcomputer, the port IN1 is connected to a first terminal of a resistor R1, a second terminal of the resistor R1 is connected to a gate of a MOSFET Q1, a drain of the MOSFET Q1 is connected to a bus Ln11 through a resistor R2, a drain of the MOSFET Q1 is connected to a base of a transistor Q2, a collector of the transistor Q2 is connected to the bus Ln11 through a resistor R3, a collector of the transistor Q2 is connected to a base of a transistor Q3 and a base of a transistor Q4, an emitter of the transistor Q4 is connected to a base of a transistor Q5, an emitter of the transistor Q5 is connected to an emitter of the transistor Q3, a collector of the transistor Q5 is connected to a collector of the transistor Q4, a collector of the transistor Q4 is connected to a collector of the resistor R4, a second terminal of the resistor R5 is connected to the bus Ln11, an emitter of the transistor Q3 is connected to a gate of the MOSFET Q6 through a resistor R6, a first terminal of the resistor R7 is connected to a gate of the MOSFET Q6, a source of the MOSFET Q7, a source of the resistor R7 is connected to a source of the MOSFET Q6, and a source of the resistor R8, the ground, the resistor R2, the emitter of the resistor Q3, the ground, the drain of the MOSFET Q2, and the emitter of the MOSFET Q3, the ground. The anode of a capacitor C1 is connected to the midpoint of the series connection of the resistor R4 and the resistor R5, the cathode of the capacitor C1 is grounded, the cathode of a zener diode ZD1 is connected to the anode of the capacitor C1, the anode of the zener diode ZD1 is grounded, the drain of the MOSFET Q6 is connected to the bus Ln12, the bus Ln12 is connected to the output end OUT1 of the output module 11, and the bus Ln11 is connected to a power supply Vcc1. The triode Q2, the triode Q4 and the triode Q5 are respectively an NPN type triode, and the triode Q3 is a PNP type triode; the capacitor C1 is an electrolytic capacitor. The triode Q2, the triode Q3, the triode Q4 and the triode Q5 form a push-pull circuit, and a signal output by an I/O port IN1 of a single chip microcomputer is amplified to drive the MOSFET Q6. The MOSFETs Q1 and Q6 are N-type MOSFETs. The triode Q4 and the triode Q5 can be replaced by an NPN-type triode.
The discharge module 211 IN fig. 2 is a specific embodiment of the discharge module 21 IN fig. 1, an input end of the discharge module 211 is a port IN2, the port IN2 is an I/O port of the single chip microcomputer, the port IN2 is connected to a base of a transistor Q9 through a resistor R12, an emitter of the transistor Q9 is grounded, a collector of the transistor Q9 is connected to a collector of a transistor Q10 through a resistor R13, an emitter of the transistor Q10 is connected to the power Vcc1, a base of the transistor Q10 is connected to an emitter of a transistor Q11 through a resistor R14, a base of the transistor Q11 is connected to an emitter of a transistor Q12, a base of the transistor Q12 is connected to a collector of the transistor Q10, a resistor R15 is connected IN parallel between the emitter and the collector of the transistor Q10, a resistor R16 is connected IN parallel between the emitter of the transistor Q10 and the emitter of the transistor Q11, and a resistor R17 is connected IN parallel between the base of the transistor Q10 and the collector of the transistor Q12. The collector of the triode Q11 and the collector of the triode Q12 are connected together and then connected to the output terminal OUT1 of the output module 11. The triode Q9 is an NPN-type triode, and the triode Q10, the triode Q11, and the triode Q12 are PNP-type triodes.
The discharging module 212 IN fig. 5 is another embodiment of the discharging module 21 IN fig. 1, the input terminal of the discharging module 212 is a port IN2, the port IN2 is an I/O port of the single chip microcomputer, the port IN2 is connected to the base of a transistor Q23 through a resistor R41, the emitter of the transistor Q23 is grounded, the collector of the transistor Q23 is connected to the collector of the transistor Q24 through a resistor R42, the emitter of the transistor Q24 is connected to the power Vcc1, the base of the transistor Q24 is connected to the source of a MOSFET Q25 through a resistor R43, the gate of the MOSFET Q25 is connected to the collector of the transistor Q24, a resistor R44 is connected IN parallel between the emitter and the collector of the transistor Q24, a resistor R45 is connected IN parallel between the emitter of the transistor Q24 and the source of the MOSFET Q25, a resistor R46 is connected IN parallel between the base of the transistor Q24 and the drain of the MOSFET Q25, the cathode of a zener diode ZD4 is connected to the source of the MOSFET Q25, the anode of the zener diode ZD4 is connected to the gate of the MOSFET Q25, and the drain of the output terminal OUT1 of the output module Q11. The triode Q23 is an NPN-type triode, the triode Q24 is a PNP-type triode, and the MOSFET Q25 is a P-type MOSFET.
The discharging module 213 IN fig. 6 is another embodiment of the discharging module 21 IN fig. 1, the input terminal of the discharging module 213 is a port IN2, the port IN2 is connected to the base of the transistor Q26 through a resistor R47, the emitter of the transistor Q26 is grounded, the collector of the transistor Q26 is connected to the gate of the MOSFET Q27 through a resistor R48, the source of the MOSFET Q27 is connected to the power Vcc1, a first terminal of a resistor R49 is connected to the gate of the MOSFET Q27, a second terminal of the resistor R49 is connected to the power Vcc1, and the drain of the MOSFET Q27 is connected to the output terminal OUT1 of the output module 11 through a resistor R50. The triode Q26 is an NPN-type triode, and the MOSFET Q27 is a P-type MOSFET.
The input end of the code returning detection module 31 is a port IN3, the port IN3 is an I/O port of a single chip microcomputer, the port IN3 is connected with a base of a triode Q19 through a resistor R34, an emitter of the triode Q19 is grounded, a collector of the triode Q19 is connected with a base of a triode Q20 through a resistor R35, an emitter of the triode Q20 is connected with the power supply Vcc1, a collector of the triode Q20 is connected with an anode of a zener diode ZD3, the power supply Vcc1 is connected with a cathode of the zener diode ZD3, the output end OUT1 is connected with an emitter of a triode Q21, a base of the triode Q21 is connected with an emitter of a triode Q22, a collector of the triode Q22 is connected with a collector of the triode Q21, an anode of the zener diode ZD3 is connected with the base of the triode Q22, a resistor R36 is connected IN parallel between the base of the triode Q22 and a ground GND, a collector of the triode Q22 is connected with a first end of a resistor R38 through a resistor R37, a second end of the resistor R38 is grounded, a resistor R39 is connected IN series between a first end of the resistor R40, and a first end of the output end of the code returning detection module OUT 31 is an output end of the single chip microcomputer OUT5, the output end of the detection module OUT 5. The triode Q19 is an NPN type triode, and the triode Q21, the triode Q22 and the triode Q20 are PNP type triodes.
The port OUT3 of the short-circuit protection module 41 is an I/O port of the single chip microcomputer, the collector of the triode Q17 is connected to the port OUT3, the emitter of the triode Q17 is grounded, the collector of the triode Q17 is connected to the power Vcc2, the base of the triode Q18 is connected to the collector of the triode Q17, the base of the triode Q17 is connected to the collector of the triode Q18, the emitter of the triode Q18 is connected to the gate of the MOSFET Q1, the collector of the triode Q18 is grounded, the first end of the resistor R27 is connected to the collector of the triode Q18, the second end of the resistor R27 is grounded, the first end of the resistor R28 is connected to the collector of the triode Q18, and the second end of the resistor R28 is connected to the source of the MOSFET Q6. The triode Q17 is an NPN type triode, and the triode Q18 is a PNP type triode.
The input end of the overcurrent protection module 51 is connected with the source electrode of the MOSFET Q6, the input end of the overcurrent protection module 51 is connected with the first end of the resistor R29, the second end of the resistor R29 is connected with the first end of the resistor R30, the second end of the resistor R30 is connected with the power supply Vcc2, the input positive end of the operational amplifier A1 is connected with the series midpoint of the resistor R29 and the resistor R30, the input negative end of the operational amplifier A1 is grounded through the resistor R31, the capacitor C5 is connected in parallel between the input negative end and the output end of the operational amplifier A1, the resistor R32 is connected in parallel at both ends of the capacitor C5, the output end of the operational amplifier A1 is connected with the first end of the capacitor C6 through the resistor R33, the second end of the capacitor C6 is grounded, the diode D7 and the diode D8 are connected in series between the input positive end of the operational amplifier A1 and the ground after being connected in reverse in parallel, the first end of the capacitor C6 is the output end OUT4 of the overcurrent protection module 51, and the OUT4 is an I/O port of the single chip microcomputer.
The operation of a two-bus circuit according to the invention will now be described with reference to fig. 3 to 9. Fig. 3 is a schematic circuit diagram of the output module 11 in fig. 2, and the operation principle of the output module 11 will be described with reference to fig. 3. The output module 11 controls the voltage on the two buses by controlling the on-off of the MOSFET Q6, and the MOSFET Q6 is connected to the negative end of the two buses, namely Ln12, so that the driving is convenient. When the port IN1 is at a high level, the two buses are IN a power supply mode, and more specifically, when the MOSFET Q1 is turned on, the MOSFET Q6 is turned on under the action of the transistor Q2, the transistor Q3, the transistor Q4 and the transistor Q5, and a voltage Vcc1 is output between the two buses Ln11 and Ln12 under the action of the power supply Vcc1.
When the port IN1 has a high-low level change, the two buses are IN a communication mode, more specifically, the MOSFET Q1 is turned off at this time, the MOSFET Q6 is turned off under the action of the transistor Q2, the transistor Q3, the transistor Q4 and the transistor Q5, the bus Ln12 is connected to the port OUT1, and at this time, the discharging module 211 operates to rapidly raise the voltage on the bus Ln12 to the voltage Vcc1 and discharge the residual amount between the two buses Ln11 and Ln12.
Fig. 4 is a circuit diagram of the discharge module 211 shown in fig. 2, and the operation of the discharge module 211 will be described with reference to fig. 4. When the port IN1 is at a high level, the port IN2 is at a low level, and the discharging module 211 does not operate.
When the port IN1 has high-low level change, the single chip microcomputer makes the port IN2 be high level, so that the triode Q9 is conducted, the collector potential of the triode Q10 is pulled low, so that the triode Q11, the triode Q12 and the triode Q10 are conducted, at this time, the triode Q10, the triode Q11 and the triode Q12 work IN an amplification area, at this time, the voltage of the port OUT1 is approximate to the voltage of the power supply Vcc1, and the load is discharged, so that the voltage on the bus Ln12 is quickly pulled up to the voltage Vcc1, and two buses Ln11 and Ln12 are equipotential.
Fig. 7 is a schematic circuit diagram of the code-returning detection module 31 in fig. 2, and the operation principle of the code-returning detection module 31 will be described with reference to fig. 7. The code return detection module 31 performs code return detection when the port IN1 has high and low level changes and the voltage on the bus Ln12 is pulled up to the voltage Vcc1, so as to detect the code return current of the device, thereby determining whether the communication is normal. When the port IN3 is at a high level, the triode Q19 is turned on, the triode Q20 is turned on, the anode of the zener diode ZD3 is at the voltage Vcc1, the triode Q21 is turned off, the triode Q22 is turned off, and a code returning platform is not generated.
When the port IN3 is at a low level, the triode Q19 is turned off, the triode Q20 is turned off, the zener diode ZD3 is connected into the circuit, the triode Q21 is conducted, the triode Q22 is conducted, and the base voltage of the triode Q22 is Vcc1-U ZD3 Wherein, U ZD3 For the reverse breakdown voltage value of zener diode ZD3, V4= U is generated between two bus lines Ln11 and Ln12 during code-back ZD3 -2*V PN The left and right potential differences are the code return platforms, and the device will perform code return at this time when generating the code return platforms, which in one embodiment may be current code return. The current may generate a voltage drop across the resistor R38, and in a specific embodiment, the output terminal OUT5 samples a voltage across the resistor R40, so as to determine whether the device performs code recovery according to a voltage value obtained by sampling.
Fig. 8 is a schematic circuit diagram of the output module 11 and the short-circuit protection module 41 in fig. 2, and the operation principle of the short-circuit protection module 41 will be described with reference to fig. 8. The short-circuit protection module 41 collects current flowing through the resistor R8 to determine whether short-circuit protection is required, when the MOSFET Q6 is turned on, current flows through the resistor R8, and when the current flowing through the MOSFET Q6 is greater than a set value, that is, when the potential of the source of the MOSFET Q6 is greater than the set value, that is, after the voltage of the source of the MOSFET Q6 is divided by the resistor R27 and the resistor R28, the base potential of the triode Q17 is greater than the voltage V PN When the transistor Q17 is turned on, the transistor Q18 is turned on, and a larger current is provided to the base of the transistor Q17 to lock the base voltage of the transistor Q17, at this time, the voltage of the second end of the resistor R1 is about equal to the ground, and the gate voltage of the MOSFET Q1 is pulled down, so that the MOSFET Q1 is turned off, and the MOSFET Q6 is turned off to ensure that the voltage is largeAnd turning off the MOSFET Q6 during current so as to implement short-circuit protection. Wherein, the voltage V PN Is the voltage drop of a PN junction. The port OUT3 is a short-circuit signal acquisition port, the port OUT3 is connected with an input I/O port of the single chip microcomputer, the voltage of the collector of the triode Q17 can be continuously acquired, and whether short-circuit protection needs to be triggered or not is judged. When the voltage of the collector of the triode Q17 is greater than a set value, the situation that short circuit does not occur is shown; when the voltage of the collector of the triode Q17 is not more than the set value, the short circuit is indicated to occur, and the singlechip controls the turn-off circuit.
Fig. 9 is a schematic circuit diagram of the output module 11 and the overcurrent protection module 51 in fig. 1, and the operation principle of the overcurrent protection module 51 will be described with reference to fig. 9. When current flows through the resistor R8, the first end of the resistor R29 generates a voltage drop to the ground, namely voltage V3, the voltage V3 is sampled and amplified by the operational amplifier A1 and then is output to the singlechip at the output end OUT4, the current flowing through the resistor R8 can be obtained after the singlechip carries OUT AD sampling processing, and when the current flowing through the resistor R8 is larger than a set overcurrent protection point, overcurrent protection is triggered. The resistor R30 has a calibration function, and the diodes D7 and D8 have a protection function to prevent the circuit from being damaged.
When a plurality of pairs of two buses are put into use, a short-circuit protection module and an overcurrent protection module can be respectively equipped for the output module of each pair of two buses for carrying out short-circuit protection and overcurrent protection on the circuit; meanwhile, a code returning judgment module is also arranged for the output module of each pair of two buses and is used for judging which pair of two buses needs to carry out code returning detection currently; the output modules of a plurality of pairs of two buses can share one discharging module and one code returning detection module.
Fig. 10 is a block diagram of a second embodiment of the two-bus circuit of the present invention, in which there are 4 pairs of two buses, i.e., the bus Ln21 and the bus Ln22, the bus Ln31 and the bus Ln32, the bus Ln41 and the bus Ln42, and the bus Ln51 and the bus Ln52. As shown in fig. 10, the input terminal of the output module 12 is connected to a power supply Vcc1, the output terminals of the output module 12 are a bus Ln21 and a bus Ln22, and the output module 12 controls the voltage output on the two buses Ln21 and Ln 22; the output module 12 is connected to the discharging module 22, and the discharging module 22 is used for rapidly pulling up the voltage on the bus Ln22 to the voltage Vcc1 and discharging the load; the two buses Ln21 and Ln22 are connected to the code returning judgment module 62, the code returning judgment module 62 is connected to the code returning detection module 32, the code returning judgment module 62 judges whether the output module 12 needs to return codes, and the code returning detection module 32 judges whether the devices are in normal communication by detecting code returning currents of the devices connected in parallel between the two buses; the output module 12 is connected with the short-circuit protection module 42 and the overcurrent protection module 52, the short-circuit protection module 42 has the function of ensuring that a switching tube is turned off to perform short-circuit protection on a circuit when a large current flows, and the overcurrent protection module 52 detects an output current to perform overcurrent protection on the circuit. Optionally, the short-circuit protection module 42 and the over-current protection module 52 are connected to the same end of the output module 12.
The input end of the output module 13 is connected with a power supply Vcc1, the output ends of the output module 13 are a bus Ln31 and a bus Ln32, and the output module 13 controls the voltage output on the two buses Ln31 and Ln 32; the output module 13 is connected to the discharging module 22, and the discharging module 22 is used for rapidly pulling up the voltage on the bus Ln32 to the voltage Vcc1 and discharging the load; the two buses Ln31 and Ln32 are connected to the loop code judging module 63, the loop code judging module 63 is connected to the loop code detecting module 32, the loop code judging module 62 judges whether the output module 13 needs loop codes, and the loop code detecting module 32 judges whether the devices are in normal communication by detecting loop code currents of the devices connected in parallel between the two buses; the output module 13 is connected with the short-circuit protection module 43 and the over-current protection module 53, the short-circuit protection module 43 has a function of ensuring that a switching tube is turned off to perform short-circuit protection on a circuit when a large current flows, and the over-current protection module 53 detects an output current to perform over-current protection on the circuit. Optionally, the short-circuit protection module 43 and the over-current protection module 53 are connected to the same end of the output module 13.
The input end of the output module 14 is connected with a power supply Vcc1, the output ends of the output module 14 are a bus Ln41 and a bus Ln42, and the output module 14 controls the voltage output on the two buses Ln41 and Ln 42; the output module 14 is connected to the discharging module 22, and the discharging module 22 is used for rapidly pulling up the voltage on the bus Ln42 to the voltage Vcc1 and discharging the load; the two buses Ln41 and Ln42 are connected to the code returning judgment module 64, the code returning judgment module 64 is connected to the code returning detection module 32, the code returning judgment module 64 judges whether the output module 14 needs to return codes, and the code returning detection module 32 judges whether the devices are in normal communication by detecting code returning currents of the devices connected in parallel between the two buses; the output module 14 is connected to the short-circuit protection module 44 and the over-current protection module 54, the short-circuit protection module 44 is used for ensuring that a switching tube is turned off to perform short-circuit protection on a circuit when a large current flows, and the over-current protection module 54 detects an output current to perform over-current protection on the circuit. Optionally, the short-circuit protection module 44 and the over-current protection module 54 are connected to the same end of the output module 14.
The input end of the output module 15 is connected to a power supply Vcc1, the output ends of the output module 15 are a bus Ln51 and a bus Ln52, and the output module 15 controls the voltage output on the two buses Ln51 and Ln 52; the output module 15 is connected to the discharging module 22, and the discharging module 22 is used for rapidly pulling up the voltage on the bus Ln52 to the voltage Vcc1 and discharging the load; the two buses Ln51 and Ln52 are connected to the loop code judging module 65, the loop code judging module 65 is connected to the loop code detecting module 32, the loop code judging module 65 judges whether the output module 15 needs loop codes, and the loop code detecting module 32 judges whether the devices are in normal communication by detecting loop code currents of the devices connected in parallel between the two buses; the output module 15 is connected with the short-circuit protection module 45 and the overcurrent protection module 55, the short-circuit protection module 45 has the function of ensuring that a switching tube is turned off to perform short-circuit protection on a circuit when a large current flows, and the overcurrent protection module 55 detects output current to perform overcurrent protection on the circuit. Optionally, the short-circuit protection module 45 and the over-current protection module 55 are connected to the same end of the output module 15.
Fig. 11 is a circuit diagram of the output module 12 shown in fig. 10, and as shown in fig. 11, compared with the circuit of the output module 11 shown in fig. 3, in the present embodiment, a discharge determining branch is added in the output module 12, where the discharge determining branch includes a resistor R11, a transistor Q8, a diode D1, a capacitor C2, a resistor R9, a resistor R10, a diode D2, a MOSFET Q7, and a diode D3. The input end of the output module 12 is a port IN1, the port IN1 is an I/O port of a single chip microcomputer, the port IN1 is connected to a first end of a resistor R1, a second end of the resistor R1 is connected to a gate of a MOSFET Q1, a drain of the MOSFET Q1 is connected to a bus Ln21 through a resistor R2, a drain of the MOSFET Q1 is connected to a base of a transistor Q2, a collector of the transistor Q2 is connected to the bus Ln21 through a resistor R3, a collector of the transistor Q2 is connected to a base of a transistor Q3 and a base of a transistor Q4, an emitter of the transistor Q4 is connected to a base of a transistor Q5, and an emitter of the transistor Q5 is connected to an emitter of the transistor Q3, the collector of the transistor Q5 is connected to the collector of the transistor Q4, the collector of the transistor Q4 is connected to the first end of the resistor R5 through the resistor R4, the second end of the resistor R5 is connected to the bus Ln21, the emitter of the transistor Q3 is connected to the gate of the MOSFET Q6 through the resistor R6, the first end of the resistor R7 is connected to the gate of the MOSFET Q6, the second end of the resistor R7 is connected to the source of the MOSFET Q6, the second end of the resistor R7 is also grounded, the source of the MOSFET Q6 is grounded through the resistor R8, and the source of the MOSFET Q1, the emitter of the transistor Q2, and the collector of the transistor Q3 are grounded, respectively. The anode of the capacitor C1 is connected to the midpoint of the series connection of the resistor R4 and the resistor R5, the cathode of the capacitor C1 is grounded, the cathode of the zener diode ZD1 is connected to the anode of the capacitor C1, the anode of the zener diode ZD1 is grounded, the anode of the diode D1 is connected to the cathode of the zener diode ZD1, the cathode of the diode D1 is connected to the drain of the MOSFET Q6 through the capacitor C2, the drain of the MOSFET Q6 is connected to the bus Ln22, the cathode of the diode D1 is connected to the first end of the resistor R10 through the resistor R9, the second end of the resistor R10 is connected to the gate of the MOSFET Q7, the source of the MOSFET Q7 is connected to the bus Ln22, the anode of the diode D2 is connected to the bus Ln22, the cathode of the diode D2 is connected to the gate of the MOSFET Q7, the drain of the MOSFET Q7 is connected to the cathode of the diode D3, and the anode of the diode D3 is the output terminal OUT1 of the output module 12. The port IN1 is connected with the base electrode of a triode Q8 through a resistor R11, the collector electrode of the triode Q8 is connected with the series midpoint of the resistor R9 and the resistor R10, the emitter electrode of the triode Q8 is grounded, and the bus Ln21 is connected with a power supply Vcc1. The triode Q2, the triode Q4, the triode Q5 and the triode Q8 are respectively an NPN type triode, and the triode Q3 is a PNP type triode; the capacitor C1 is an electrolytic capacitor. The triode Q2, the triode Q3, the triode Q4 and the triode Q5 form a push-pull circuit, a signal output by an I/O port IN1 of a single chip microcomputer is amplified to drive the MOSFET Q6, the MOSFET Q1, the MOSFET Q6 and the MOSFET Q7 are N-type MOSFETs, and the triode Q4 and the triode Q5 can be replaced by 1 NPN-type triode.
The output module 12 controls the voltage on the two buses by controlling the on-off of the MOSFET Q6, and the MOSFET Q6 is connected to the negative terminal of the two buses, namely Ln22, so that the driving is convenient. When the port IN1 is at a high level, the two buses are IN a power supply mode, more specifically, the MOSFET Q1 is turned on, the MOSFET Q6 is turned on under the action of the transistor Q2, the transistor Q3, the transistor Q4 and the transistor Q5, and the voltage Vcc1 is output between the two buses Ln21 and Ln22 under the action of the power supply Vcc1. IN addition, when the port IN1 is at a high level, the transistor Q8 is turned on, so that the MOSFET Q7 is IN an off state; under the action of the zener diode ZD1, the reverse breakdown voltage U of the zener diode ZD1 ZD1 And charging the capacitor C2, and creating conditions for the fast turn-on of the MOSFET Q7 when the MOSFET Q6 is cut off.
When the port IN1 has a high-low level change, the two buses are IN a communication mode, more specifically, the MOSFET Q1 is turned off, the MOSFET Q6 is turned off under the action of the transistor Q2, the transistor Q3, the transistor Q4 and the transistor Q5, the voltage on the capacitor C2 makes the MOSFET Q7 turn on quickly, so that the bus Ln22 is connected to the port OUT1 through the MOSFET Q7 and the diode D3. At this time, the discharging module 22 operates to quickly raise the voltage on the bus line Ln22 to the voltage Vcc1, and to discharge the remaining amount of electricity between the two bus lines Ln21 and Ln 22.
The specific implementation and operation principle of the output module 13, the output module 14, and the output module 15 are the same as those of the output module 12 in fig. 11, and are not described herein again. Under a normal condition, each output module is IN a power supply mode, when one output module is IN a communication mode, the corresponding port IN1 has high and low level changes, the discharging judgment branch enables the MOSFET Q7 to be conducted, so that the port OUT1 is connected with the discharging module, and the discharging module works.
The specific implementation and operation principle of the discharging module 22 are the same as those of the discharging module shown in fig. 4 to 6, and are not described herein again.
Fig. 12 is a schematic circuit diagram of the code returning determination module 62 IN fig. 10, IN which an input end of the code returning determination module 62 is a port IN4, the port IN4 is an I/O port of the single chip microcomputer, the port IN4 is connected to a base of the transistor Q13 through the resistor R18, an emitter of the transistor Q13 is grounded, a collector of the transistor Q13 is connected to a first end of the resistor R20 through the resistor R19, and a second end of the resistor R20 is connected to the bus Ln21. The bus line Ln22 is connected to the anode of the diode D4, the cathode of the diode D4 is connected to the source of the MOSFET Q14, the gate of the MOSFET Q14 is connected to the series midpoint of the resistor R19 and the resistor R20, and the drain of the MOSFET Q14 serves as the port P13. The triode Q13 is an NPN type triode, and the MOSFET Q14 is a P type MOSFET.
The specific implementation and operation principle of the code returning judgment module 63, the code returning judgment module 64, and the code returning judgment module 65 in fig. 10 are the same as those of the code returning judgment module 62 in fig. 12, and are not described herein again.
Fig. 13 is a schematic circuit diagram of the code-back detection module 32 in fig. 10, in which the port P13 is connected to an emitter of a transistor Q15, a base of the transistor Q15 is connected to an emitter of a transistor Q16, and a collector of the transistor Q16 is connected to a collector of the transistor Q15. The power supply Vcc1 is connected with the cathode of the zener diode ZD2, the anode of the zener diode ZD2 is connected with the base of the triode Q16, the resistor R21 is connected in parallel between the base of the triode Q16 and the ground GND, the collector of the triode Q16 is connected with the first end of the resistor R23 through the resistor R22, the second end of the resistor R23 is grounded, the resistor R24 is connected in series between the first end of the resistor R23 and the first end of the resistor R25, the second end of the resistor R25 is grounded, the first end of the resistor R25 is the output end OUT2 of the code returning detection module 32, and the output end OUT2 is an I/O port of the single chip microcomputer. The triode Q15 and the triode Q16 are PNP type triodes.
When a certain output module needs to perform code-returning detection, the corresponding port IN1 has high and low level changes. When the port IN4 is at a low level, no code return stage is generated, the triode Q13 is turned off, and the MOSFET Q14 is turned off.
When the terminal IN4 is at a high level, the transistor Q13 is turned on, the voltage Vcc1 on the bus Ln21 is divided by the resistors R19 and R20, a voltage V1 is generated at the gate of the MOSFET Q14 to turn on the MOSFET Q14, so that the terminal P13 is connected to the bus Ln22, and the base voltage of the transistor Q16 is Vcc1-U ZD2 Wherein, U ZD2 For the reverse breakdown voltage value of the zener diode ZD2, the transistor Q15 and the transistor Q16 are turned on, and when code is returned, V2= U is generated between the two buses Ln21 and Ln22 ZD2 -2*V PN The left and right potential differences are the code return platforms, and the device will perform code return at this time when generating the code return platforms, which in one embodiment may be current code return. The current will cause a voltage drop across the resistor R23, and in a specific embodiment, the output terminal OUT2 will couple to the currentAnd the voltage at the two ends of the resistor R25 is sampled, so that whether the device returns the code or not is judged according to the voltage value obtained by sampling.
The specific implementation and operation principle of the short-circuit protection module 42, the short-circuit protection module 43, the short-circuit protection module 44, the short-circuit protection module 45 in fig. 10 are the same as those of the short-circuit protection module 41 in fig. 8, and it should be noted that if the port OUT3 of each short-circuit protection module is connected to the same I/O port of a single chip, a diode D6 needs to be connected in series between the port OUT3 of each short-circuit protection module and the collector of the transistor Q17 for isolation, as shown in fig. 14, the anode of the diode D6 is connected to the port OUT3, and the cathode of the diode D6 is connected to the collector of the transistor Q17. If the port OUT3 of each short-circuit protection module is connected to a different I/O port of the single chip, the diode D6 may not be needed.
The specific implementation and operation principle of the overcurrent protection module 52, the overcurrent protection module 53, the overcurrent protection module 54, and the overcurrent protection module 55 in fig. 10 are the same as those of the overcurrent protection module 51 in fig. 9, and are not described herein again.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims (17)

1. A two-bus circuit is characterized by comprising an output module, a discharging module and a code returning detection module, wherein the input of the output module is connected with a power supply, the output of the output module is two buses, the two buses comprise a first bus and a second bus, the output module is connected with the discharging module, and the code returning detection module is connected with the two buses in parallel;
the output module comprises a plurality of switch tubes, a plurality of triodes, a first voltage-stabilizing diode and a first resistor, a first bus is connected with a first power supply, a first input end is connected with the grid electrode of the first switch tube, the source electrode of the first switch tube is grounded, the drain electrode of the first switch tube is connected with the base electrode of the first triode, the base electrode of the first triode is connected with the first bus, the emitting electrode of the first triode is grounded, the collecting electrode of the first triode is connected with the first bus, the collecting electrode of the first triode is connected with the base electrode of the second triode and the base electrode of the third triode, the collecting electrode of the second triode is grounded, the emitting electrode of the second triode is connected with the grid electrode of the second switch tube, the collecting electrode of the third triode is connected with the first bus, the emitting electrode of the third triode is connected with the base electrode of the fourth triode, the collecting electrode of the fourth triode is connected with the collecting electrode of the third triode, the emitting electrode of the fourth triode is connected with the grid electrode of the second switch tube, the source electrode of the second switch tube is grounded, the drain electrode of the second switch tube is connected with the first voltage-stabilizing diode, and the cathode of the first voltage-stabilizing diode is connected with the ground.
2. The two-bus circuit as claimed in claim 1, wherein the output module further includes a fifth transistor, a first capacitor, a third transistor, and a plurality of diodes, an anode of the first diode is connected to a cathode of the first zener diode, a cathode of the first diode is connected to a first end of the first capacitor, a second end of the first capacitor is connected to a drain of the second switch, a source of the third transistor is connected to the second bus, a cathode of the second diode is connected to a gate of the third transistor, an anode of the second diode is connected to a source of the third transistor, a drain of the third transistor is connected to a cathode of the third diode, an anode of the third diode is connected to the first output terminal, the first input terminal is connected to a base of the fifth transistor, an emitter of the fifth transistor is grounded, and a collector of the fifth transistor is connected to a gate of the third transistor and the first end of the first capacitor.
3. The two-bus circuit as claimed in claim 1, wherein the discharging module comprises a plurality of transistors, the second input terminal is connected to the base of the sixth transistor, the emitter of the sixth transistor is grounded, the collector of the sixth transistor is connected to the collector of the seventh transistor, the emitter of the seventh transistor is connected to the first power supply, the emitter of the eighth transistor is connected to the base of the seventh transistor, the base of the eighth transistor is connected to the emitter of the ninth transistor, the base of the ninth transistor is connected to the collector of the seventh transistor, the collector of the eighth transistor and the collector of the ninth transistor are connected to the first output terminal, and the first output terminal is connected to the base of the seventh transistor.
4. The two-bus circuit as claimed in claim 1, further comprising a code-returning judging module, wherein the code-returning judging module comprises a thirteenth diode, a second resistor, a third resistor, a fourth switch tube and a fourth diode, a third input terminal is connected to a base of the thirteenth diode, an emitter of the thirteenth diode is grounded, a collector of the thirteenth diode is connected to a gate of the fourth switch tube through the second resistor, a gate of the fourth switch tube is connected to the first bus through the third resistor, the second bus is connected to an anode of the fourth diode, a cathode of the fourth diode is connected to a source of the fourth switch tube, and a drain of the fourth switch tube is connected to the first intermediate terminal.
5. The two-bus circuit as claimed in claim 4, wherein the code-loop detection module comprises a plurality of transistors, a plurality of resistors, and a second zener diode, the first intermediate terminal is connected to an emitter of an eleventh transistor, a base of the eleventh transistor is connected to an emitter of a twelfth transistor, a collector of the twelfth transistor is connected to a collector of the eleventh transistor, a base of the twelfth transistor is connected to an anode of the second zener diode, a cathode of the second zener diode is connected to the first power supply, a first terminal of a fourth resistor is connected to a base of the twelfth transistor, a second terminal of the fourth resistor is grounded, a collector of the twelfth transistor is connected to a first terminal of a fifth resistor, a second terminal of the fifth resistor is grounded, and a first terminal of the fifth resistor is connected to the second output terminal.
6. The two-bus circuit of claim 1, further comprising a short-circuit protection module, the short-circuit protection module coupled to the output module.
7. The dual-bus circuit as claimed in claim 6, wherein the short-circuit protection module comprises a plurality of transistors and a plurality of resistors, a third output terminal is connected to a collector of a thirteenth transistor and a base of a fourteenth transistor, the collector of the thirteenth transistor is connected to the second power supply, an emitter of the thirteenth transistor is grounded, the base of the thirteenth transistor is connected to the collector of the fourteenth transistor, an emitter of the fourteenth transistor is connected to the gate of the first switch, a collector of the fourteenth transistor is grounded, a first terminal of a sixth resistor is connected to the collector of the fourteenth transistor, a second terminal of the sixth resistor is grounded, a first terminal of the sixth resistor is connected to a first terminal of a seventh resistor, and a second terminal of the seventh resistor is connected to the source of the second switch.
8. The two-bus circuit as claimed in claim 7, wherein said short-circuit protection module further comprises a fifth diode, an anode of said fifth diode is connected to said third output terminal, and a cathode of said fifth diode is connected to a collector of said thirteenth triode.
9. The two-bus circuit as claimed in claim 1, further comprising an over-current protection module, wherein the over-current protection module is connected to the output module.
10. The two-bus circuit as claimed in claim 9, wherein the over-current protection module comprises a first operational amplifier, the source of the second switch tube is connected to the positive input terminal of the first operational amplifier, the negative input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier is connected to the fourth output terminal.
11. The dual-bus circuit as claimed in claim 1, wherein the code-returning detection module comprises a plurality of transistors, a plurality of resistors, and a third zener diode, a fourth input terminal is connected to a base of a fifteenth transistor, an emitter of the fifteenth transistor is grounded, a collector of the fifteenth transistor is connected to a base of the sixteenth transistor, an emitter of the sixteenth transistor is connected to the first power source and a cathode of the third zener diode, a collector of the sixteenth transistor is connected to an anode of the third zener diode, the first output terminal is connected to an emitter of the seventeenth transistor, a base of the seventeenth transistor is connected to an emitter of the eighteenth transistor, a base of the eighteenth transistor is connected to an anode of the third zener diode, a collector of the eighteenth transistor is connected to a collector of the seventeenth transistor, a first terminal of an eighth resistor is connected to a base of the eighteenth transistor, a second terminal of the eighth resistor is grounded, a collector of the seventeenth transistor is connected to a first terminal of a ninth resistor, a second terminal of the ninth resistor is grounded, and a first terminal of the ninth resistor is connected to a fifth output terminal.
12. The two-bus circuit as claimed in claim 1, wherein the discharging module includes a nineteenth transistor, a twentieth transistor, a fourth zener diode, and a fifth switch tube, a fifth input terminal is connected to the base of the nineteenth transistor, the emitter of the nineteenth transistor is grounded, the collector of the nineteenth transistor is connected to the collector of the twentieth transistor, the emitter of the twentieth transistor is connected to the first power source, the base of the twentieth transistor is connected to the source of the fifth switch tube, the gate of the fifth switch tube is connected to the collector of the twentieth transistor, the drain of the fifth switch tube is connected to the first output terminal, the cathode of the fourth zener diode is connected to the source of the fifth switch tube, and the anode of the fourth zener diode is connected to the gate of the fifth switch tube.
13. The dual-bus circuit as claimed in claim 1, wherein the discharging module comprises a twenty-first transistor and a sixth switching tube, a sixth input terminal is connected to the base of the twenty-first transistor, the emitter of the twenty-first transistor is grounded, the collector of the twenty-first transistor is connected to the gate of the sixth switching tube, the source of the sixth switching tube is connected to the first power supply, and the drain of the sixth switching tube is connected to the first output terminal.
14. The two-bus circuit as claimed in claim 1, wherein said first switch and said second switch are N-type MOSFETs.
15. The two-bus circuit as set forth in claim 2, wherein said third switching transistor is an N-type MOSFET.
16. The two-bus circuit as claimed in claim 4, wherein said fourth switch is a P-type MOSFET.
17. A two-bus circuit comprising a plurality of two-bus circuits according to any of claims 1-16.
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