CN115440611A - Wafer edge exposure structure, method and equipment and wafer photoetching method - Google Patents

Abstract

The application provides a wafer edge exposure structure, a method and equipment and a wafer photoetching method, wherein the wafer edge exposure structure comprises: arranging one or more optical fibers at the edge of a wafer to be exposed; the optical fiber is used for positioning part/all edges of the wafer to be exposed so as to complete wafer edge exposure. And positioning partial/whole edge of the wafer by arranging one or more positioning optical fibers at the edge of the wafer to be exposed so as to complete the edge exposure of the wafer. The wafer edge exposure process is not required to be carried out by an ASML photoetching machine, and the ZERO MARK (0 layer MARK layer) is not required to be additionally arranged, so that the wafer edge exposure can be more accurately finished, and the productivity of the photoetching machine is liberated.

Description

Wafer edge exposure structure, method and equipment and wafer photoetching method

Technical Field

The application relates to the technical field of semiconductor manufacturing, in particular to a wafer edge exposure structure, a wafer edge exposure method, wafer edge exposure equipment and a wafer photoetching method.

Background

With the rapid development of the semiconductor industry, the ASML photoetching machine is mostly adopted for photoetching at present. The wafer sheet coated with the photoresist is exposed by light emitted by a photoetching machine through a photomask with patterns, and the photoresist can change in properties after being exposed to light, so that the patterns on the photomask are copied onto the sheet, and the sheet has the effect of an electronic circuit diagram.

A layer of ZERO MARK (0 layer) is arranged on a wafer sheet, no pattern is arranged on the ZERO MARK, only 2 alignment MARKs are arranged at the left side and the right side of the wafer sheet, and the alignment MARKs on the wafer sheet need to be aligned in the photoetching process. Because the shape of the edge region of the wafer is fluctuated, the ASML photoetching machine is adopted to expose the edge of the wafer, so that the ASML photoetching machine not only occupies the photoetching machine to reduce the capacity of the photoetching machine and causes higher cost of the photoetching process, but also is difficult to realize accurate alignment in the process of exposing the edge of the wafer.

Therefore, a new wafer edge exposure scheme is needed.

Disclosure of Invention

In view of the above, embodiments of the present disclosure provide a wafer edge exposure structure, a method and an apparatus thereof, and a wafer lithography method, which are applied to a wafer lithography process.

The embodiment of the specification provides the following technical scheme:

an embodiment of the present disclosure provides a wafer edge exposure structure, which includes:

arranging one or more optical fibers at the edge of a wafer to be exposed; the optical fiber is used for positioning part/all edges of the wafer to be exposed so as to complete wafer edge exposure.

An embodiment of the present specification further provides a wafer edge exposure method, where an embodiment of the present specification is applied to provide a wafer edge exposure structure according to any technical scheme, and the wafer edge exposure method includes:

arranging one or more optical fibers according to the pattern position on the wafer to be exposed;

and exposing the edge of the wafer to be exposed through at least two optical fibers.

Embodiments of the present description also provide a wafer edge exposure apparatus, where the wafer edge exposure apparatus includes a semiconductor TRACK apparatus; the wafer edge exposure method provided by any technical scheme in the embodiment of the specification is carried out by adopting a semiconductor TRACK device, wherein a wafer edge exposure structure provided by any technical scheme in the embodiment of the specification is placed in the semiconductor TRACK device.

An embodiment of the present disclosure further provides a wafer lithography method, where the wafer lithography method includes:

arranging one or more optical fibers at an initial position of the wafer corresponding to the photoetching according to the position of the pattern to be photoetched;

and determining a target position according to the optical fiber and the initial position, and finishing photoetching patterns on the target position of the wafer.

Compared with the prior art, the embodiment of the specification adopts at least one technical scheme which can achieve the beneficial effects that at least:

through setting up optic fibre and fixing a position on the wafer to realize the wafer edge exposure even the graphic lithography of wafer assigned position, need not to adopt ASML lithography machine to carry out the wafer edge exposure, also need not additionally to set up ZERO MARK (0 layer MARK layer), not only can realize more accurate wafer edge exposure, has greatly liberated the productivity of lithography machine moreover, only carries out effectual photoetching with the lithography machine and promptly the photoetching and goes out the figure, further improves productivity.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of a prior art ZERO MARK;

FIG. 2 is a schematic diagram of a wafer edge exposure structure provided in an embodiment of the present disclosure;

FIG. 3 is a schematic diagram of an exposure mask positioning for a newly added fiber port according to an embodiment of the present disclosure;

fig. 4 is a flowchart of a wafer edge exposure method according to an embodiment of the present disclosure.

Detailed Description

The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

The following description of the embodiments of the present application is provided by way of specific examples, and other advantages and effects of the present application will be readily apparent to those skilled in the art from the disclosure herein. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. The present application is capable of other and different embodiments and its several details are capable of modifications and/or changes in various respects, all without departing from the spirit of the present application. It should be noted that the features in the following embodiments and examples may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It is noted that various aspects of the embodiments are described below within the scope of the appended claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present application, one skilled in the art should appreciate that one aspect described herein may be implemented independently of any other aspects and that two or more of these aspects may be combined in various ways. For example, an apparatus may be implemented and/or a method practiced using any number and aspects set forth herein. In addition, such an apparatus may be implemented and/or such a method may be practiced using other structure and/or functionality in addition to or other than one or more of the aspects set forth herein.

It should be further noted that the drawings provided in the following embodiments are only schematic illustrations of the basic concepts of the present application, and the drawings only show the components related to the present application rather than the numbers, shapes and dimensions of the components in actual implementation, and the types, the numbers and the proportions of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.

In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details.

At present, most of semiconductor lithography machines adopt ASML lithography machines to carry out lithography processes, a ZERO MARK layer is required to be arranged on a wafer sheet, as shown in figure 1, no pattern is arranged on the ZERO MARK layer, 2 cross-shaped alignment MARKs are only arranged at the left position and the right position of a wafer, and the lithography process is carried out on the wafer sheet by aligning the alignment MARKs. The photoresist accumulation at the edge of the wafer causes uneven topography of the area, so that the problems of difficult alignment and the like exist in the exposure at the edge of the wafer, the occupancy rate of the photoetching machine is high, the capacity of the photoetching machine is reduced, and the equipment cost of the photoetching process is high.

In view of the above, the inventors found that on the basis of completing the original function of the WEE (wafer edge exposure), the exposure position of the wafer can be positioned by adding the optical fiber, so as to achieve a better effect of wafer edge exposure.

Based on this, the embodiment of the present specification proposes a processing scheme: as shown in fig. 2, based on the optical fiber implemented by the original WEE function, the wafer edge is accurately exposed by adding one or more optical fibers.

The technical solutions provided by the embodiments of the present application are described below with reference to the accompanying drawings.

As shown in fig. 2, embodiments of the present disclosure provide a wafer edge exposure structure that may include one or more additional optical fibers, such as 1-2 optical fibers and 1-3 optical fibers. As shown in fig. 2, the optical fiber 1-1 is the optical fiber that is originally processed during the wafer edge exposure process, i.e. the optical fiber is connected to a light source to transmit the illumination light to form the incident light projected to the photoresist layer on the wafer edge. The 1-2 optical fiber and the 1-3 optical fiber also adopt the principle of the 1-1 optical fiber to provide incident light on a photoresist layer at the edge of the wafer, and combine the 1-1 optical fiber to position the partial/whole edge of the wafer to be exposed, thereby completing the edge exposure of the wafer more accurately.

Compared with the prior art, the method has the advantages that the ZERO MARK layer is not needed, and in order to improve the accuracy of wafer edge exposure, the wafer edge is positioned according to the position of the graph on the wafer and the original 1-1 optical fiber. Because of the process limitations of photoresist properties, machine design, wafer edge formation, lithography conditions and the like, if the exposure conditions of the photoresist on the wafer edge exceed the depth of field of exposure, a defocus phenomenon (defocus) is easily generated, and the photoresist on the wafer edge cannot be well patterned; but rather easily affect the lithography patterning on the central region of the wafer.

Therefore, on the basis of the original optical fiber 1-1, at least one optical fiber such as 1-2 optical fibers and 1-3 optical fibers is additionally arranged, so that part/all edges of the wafer can be well positioned, the accurate positioning of the position of an exposure area can be realized, the problems caused by the process limitation can be reduced, the edge exposure of the wafer can be better realized, the defocusing phenomenon cannot occur, and the imaging of the central area of the wafer cannot be influenced.

In some embodiments, the additional optical fibers are respectively provided with one or more optical fibers according to the horizontal position direction and/or the height direction of the wafer to be exposed.

Specifically, as shown in fig. 2, the optical fibers 1-2 and 1-3 may be optical fibers added in the horizontal position direction, optical fibers added in the height direction, or optical fibers combined in the height direction in the horizontal position direction. Specifically, the positioning is performed according to the positions of the original 1-1 optical fiber and the wafer graph, and then the specific position of the edge area of the wafer is accurately positioned according to the 1-2 optical fiber and the 1-3 optical fiber, so that the exposure of the specific position of the edge of the wafer is completed. Wherein the wafer edge is an annular region of the wafer edge outside the central circular region of the wafer. The horizontal position direction of the positioning optical fiber comprises at least 2 directions such as x and y directions with the original optical fiber 1-1 as an origin, and the height direction of the positioning optical fiber is determined according to the height of each layer of the wafer and the height of the original optical fiber 1-1. In some embodiments, according to different positions of the wafer edge to be exposed, the positions of the wafer edge can be adjusted in various directions, and the illumination intensity of the light source corresponding to the projection optical fiber can be adjusted, so that the wafer edge area can be accurately positioned, and the wafer edge exposure can be completed.

In some embodiments, the optical fiber includes at least 2 directions in the horizontal position direction. Specifically, the optical fibers 1-2 and 1-3 can be positioned in the x and y directions in the horizontal position by using the original optical fiber 1-1 as the origin, or in the directions of at least 2 polar angles in 360 degrees in the horizontal position by using the original optical fiber 1-1 as the pole.

In some embodiments, the optical fiber is determined based on the position of the wafer relative to the mask. Specifically, as shown in FIG. 3,2-2 is an exposure mask at the position of the newly added fiber port 1-4 for forming the required pattern, and 2-1 is a fixed position of the port mask for preventing the abnormal rotation of the wafer pattern.

In some embodiments, the wafer edge exposure structure does not include an original lithography layer or the original lithography layer is not provided with a mark position. Specifically, the wafer edge exposure structure of the embodiment of the present specification does not need to provide a layer of ZERO MARK (0 layer of MARK, as illustrated in fig. 1) without pattern but with only left and right MARKs on the wafer sheet. And the accurate exposure of the edge of the wafer is realized by additionally arranging the positioning optical fiber. In some embodiments, even if a 0-layer wafer is provided, it is not necessary to provide alignment marks thereon.

In conclusion, the wafer edge exposure structure does not need to be carried out by an ASML (automatic reticle lithography) machine, and does not need to additionally arrange a ZERO MARK (0 layer MARK layer), so that the more accurate wafer edge exposure can be realized, the productivity of the photoetching machine is greatly liberated, the photoetching machine is only used for carrying out effective photoetching, namely, photoetching of patterns, and the productivity is further improved.

Fig. 4 illustrates a wafer edge exposure method according to an embodiment of the present disclosure, which may include step S410 of disposing one or more optical fibers according to a position of a wafer to be exposed corresponding to a pattern on a mask. Step S420, performing exposure on the edge of the wafer to be exposed through at least two optical fibers.

Specifically, in step S410, one or more optical fibers are disposed according to the position of the wafer to be exposed corresponding to the pattern on the mask.

In the prior art, an ASML lithography machine is used for firstly setting a ZERO MARK layer, and 2 cross-shaped alignment MARKs are set on the ZERO MARK layer without any pattern, and the lithography process is performed on a wafer by aligning the 2 alignment MARKs. However, the uneven topography of the area caused by the accumulation of the photoresist on the edge of the wafer not only causes the difficulty in aligning the exposure on the edge of the wafer, but also causes the higher occupancy rate of the ASML photoetching machine, the reduction of the capacity of the photoetching machine and the further higher cost of the photoetching process equipment.

In order to release the productivity of the ASML lithography machine, in the embodiment of the present specification, one or more optical fibers are additionally provided according to the position of the pattern on the mask corresponding to the wafer to be exposed and the original optical fiber by using the semiconductor TRACK device based on the original optical fiber for wafer edge exposure, so as to realize more accurate wafer edge exposure. Wherein the wafer edge is a wafer edge ring area outside the wafer center ring area. As shown in fig. 2, at least one optical fiber is added according to the pattern position of the wafer to be exposed, so that part/all of the edge of the wafer can be better positioned, the position of the exposure area can be more accurately positioned, the problems of defocusing caused by process limitation, easiness in influencing the patterning of the lithography in the central area of the wafer, and the like can be reduced, and the edge exposure of the wafer can be better realized.

Step S420, exposing the edge of the wafer to be exposed through at least two optical fibers.

Specifically, according to the horizontal position and height of the wafer positioned by the original optical fiber, in some embodiments, a positioning optical fiber is only added in the horizontal position or height direction of the wafer, so that the edge region of the wafer can be well positioned, and the edge of the wafer to be exposed is exposed. Namely, the relative positions of the original optical fiber and the newly added optical fiber which are plane straight lines are determined. In other embodiments, only one positioning fiber is added to combine with the original fiber to better position the specific region of the wafer edge, and more positioning fibers are needed to ensure the accurate positioning of the specific region of the wafer edge, so as to better complete the wafer edge exposure.

In some embodiments, the disposing one or more optical fibers according to the position of the wafer to be exposed corresponding to the pattern on the mask includes:

and arranging the one or more optical fibers according to the horizontal position direction and the height direction of the wafer to be exposed.

Specifically, as shown in fig. 2, the optical fibers 1-2 and 1-3 may be optical fibers additionally arranged in the horizontal position direction, optical fibers additionally arranged in the height direction, or optical fibers combined in the height direction in the horizontal position direction. Specifically, the specific position of the edge area of the wafer is accurately positioned according to the positions of the original 1-1 optical fiber and the graph, and further the specific position of the edge area of the wafer is accurately positioned according to the 1-2 optical fiber, the 1-3 optical fiber and the like, so that the exposure of the specific position of the edge of the wafer is completed.

The horizontal position of the positioning optical fiber comprises at least 2 directions, such as 1-2 optical fibers and 1-3 optical fibers, which can be set in the horizontal position in the x and y directions according to the original optical fiber 1-1 as the origin, or in the 360 DEG of the horizontal position in the at least 2 polar angle directions according to the original optical fiber 1-1 as the pole. The height direction of the positioning optical fiber is determined according to the height of each layer of the wafer and the height of the original optical fiber 1-1. In some embodiments, according to different positions of the wafer edge to be exposed, the optical fiber for positioning the wafer edge and the illumination intensity of the light source corresponding to the optical fiber for providing projection light can be properly adjusted, so as to accurately position the wafer edge area and complete the wafer edge exposure.

In some embodiments, the optical fiber is determined based on the position of the wafer relative to the mask. Specifically, as shown in FIG. 3, FIG. 2-2 is an exposure mask at the position of the newly added fiber port 1-4 for forming the required pattern, and FIG. 2-1 is a fixed position of the port mask for preventing the abnormal rotation of the wafer pattern.

In some embodiments, the optical fiber need not be determined from the location of the mark on the original lithographic layer.

Specifically, the wafer edge exposure method of the embodiments of the present disclosure does not need to provide a layer of ZERO MARK without pattern but with two left and right MARKs on the wafer sheet, as illustrated in fig. 1. But the accurate exposure of the edge of the wafer is realized by additionally arranging the positioning optical fiber. In some embodiments, even if a 0-layer wafer is provided, it is not necessary to provide alignment marks thereon.

In conclusion, the wafer edge exposure method does not need to adopt an ASML (advanced application markup language) photoetching machine, and does not need to additionally arrange a ZERO MARK (0 layer MARK layer), so that the more accurate wafer edge exposure can be realized, the productivity of the photoetching machine is greatly liberated, the photoetching machine only carries out effective photoetching, namely, patterns are photoetched, and the productivity is further improved.

The embodiment of the specification provides a wafer edge exposure apparatus, which comprises a semiconductor TRACK apparatus; the wafer edge exposure method according to any one of the technical schemes in the embodiments of the present specification is performed by using a semiconductor TRACK device, wherein the wafer edge exposure structure according to any one of the technical schemes in the embodiments of the present specification is placed in the semiconductor TRACK device.

Specifically, in the wafer edge exposure process of the embodiment of the present specification, only the existing wafer exposure equipment is used without using an ASML lithography machine, the additionally positioned optical fiber and the wafer structure to be exposed are placed in the semiconductor TRACK equipment, and the positioned optical fiber is used to realize more accurate exposure of the wafer edge.

In the embodiment of the present description, a layer of ZERO MARK lithography is omitted, the capacity release of the ASML lithography machine is realized for processing other processes, and the relationship between the specific saved capacity and the lithography level of the product is as shown in table 1 below, and the ratio between the saved capacity and the lithography level of the product can be further converted into the number of machines of the required lithography machine or the number of products to be output on the basis of the original number of lithography machines. Not only the capacity of the photoetching machine is released or improved, but also the circulation speed of the product is improved. And ZERO level photoetching is omitted to a certain extent, so that the cost of the product is greatly reduced.

TABLE 1

In combination with the foregoing embodiments, an embodiment of the present specification further provides a wafer lithography method, where the wafer lithography method includes: arranging one or more optical fibers at an initial position of the wafer corresponding to the photoetching according to the position of the pattern to be photoetched; and determining a target position according to the optical fiber and the initial position, and finishing photoetching patterns on the target position of the wafer.

Specifically, by using the principle that the optical fibers provide incident light, the positioning of the required photoetching position of the wafer can be realized by arranging one or more optical fibers on the wafer, and the photoetching pattern of the wafer can be completed on the positioning. According to the position of a pattern to be photoetched, roughly acquiring an initial position corresponding to photoetching on a wafer, and arranging one or more optical fibers at the initial position; the optical fibers can be used for further adjusting the initial position to an accurate target position and completing the photoetching graph of the wafer on the obtained accurate target position. Not only improves the accuracy of the photoetching of the specific part of the wafer, but also does not need to set a ZERO layer compared with the prior art, thereby releasing or improving the productivity of the photoetching machine and also improving the circulation speed of products. And 4, ZERO level photoetching is omitted to a certain extent, so that the cost of the product is greatly reduced.

The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A wafer edge exposure structure, comprising:

arranging one or more optical fibers at the edge of a wafer to be exposed; the optical fiber is used for positioning part/all edges of the wafer to be exposed so as to complete wafer edge exposure.

2. The wafer edge exposure structure of claim 1, wherein the one or more optical fibers are respectively disposed in a horizontal position direction and a height direction of the wafer to be exposed.

3. The wafer edge exposure structure of claim 2, wherein the optical fiber comprises at least 2 directions in a horizontal position direction.

4. The wafer edge exposure structure of claim 1, wherein the optical fiber is determined according to the position of the wafer corresponding to the mask.

5. The wafer edge exposure structure according to claim 1, wherein the wafer edge exposure structure does not include an original lithography layer, and the original lithography layer is not provided with a mark position.

6. A wafer edge exposure method, wherein the wafer edge exposure structure according to any one of claims 1 to 5 is applied, the wafer edge exposure method comprising:

arranging one or more optical fibers according to the position of the wafer to be exposed, which corresponds to the graph on the photomask;

and exposing the edge of the wafer to be exposed through at least two optical fibers.

7. The wafer edge exposure method of claim 6, wherein the step of arranging one or more optical fibers according to the position of the wafer to be exposed corresponding to the pattern on the mask comprises:

and arranging the one or more optical fibers according to the horizontal position direction and the height direction of the wafer to be exposed.

8. The wafer edge exposure method of claim 6, wherein the optical fiber is determined without reference to a position of a mark on an original lithography layer.

9. A wafer edge exposure apparatus, characterized in that, the wafer edge exposure apparatus comprises a semiconductor TRACK apparatus;

the wafer edge exposure method according to any one of claims 6 to 8 is performed using a semiconductor TRACK apparatus in which the wafer edge exposure structure according to any one of claims 1 to 5 is placed.

10. A wafer photoetching method is characterized by comprising the following steps:

arranging one or more optical fibers at an initial position of the wafer corresponding to the photoetching according to the position of the pattern to be photoetched;

and determining a target position according to the optical fiber and the initial position, and completing photoetching patterns on the target position of the wafer.

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